Chua 2018 Applied Physics A

Applied Physics A (2018) 124:563
https://doi.org/10.1007/s00339-018-1971-0
INVITED PAPER
Five non-volatile memristor enigmas solved

L. Chua1
Received: 27 June 2018 / Accepted: 30 June 2018 / Published online: 25 July 2018
© Springer-Verlag GmbH Germany, part of Springer Nature 2018
Abstract
Numerous publications on non-volatile memristors made from disparate materials (from inorganic to organic) share many
qualitatively similar memory switching and unique v–i phenomena that have hitherto defied a unified physical explanation.
This paper selects five, among many, such unexplained mysteries and presents rigorous mathematical proof of the nonlinear
dynamical mechanisms responsible for these mysteries. Since no quantum mechanical or chemical concepts are invoked,
our resolution of these enigmas does not depend on the material or structure of the memristors.
1 Introduction finger-like multi-prong-pinched hysteresis loop response is

a universal phenomenon exhibited by all non-volatile mem-
Experimental observation of an aluminum-oxide thin-film ristors driven by any periodic signal with a non-zero mean,
sandwiched device exhibiting a reproducible (non-volatile) such as v(t) = A |sin(ωt)|+C. Our ingrained experience with
range of conductivity, measured with small voltage sensing linear system behaviors would predict that any periodic input
signal with zero DC bias, is given in Fig. 12 of Hickmott signal must give rise to a periodic steady-state response.
[1]. Moreover, the conductivity can be changed continuously Why then should the periodic input signal in Fig. 1c give rise
over a continuum range by applying single voltage pulses. to a non-periodic response, as depicted in the non-periodic
Similar switching phenomena have been reported in numer- finger-like multi-prong response in Fig. 1c? This is a hitherto
ous other publications, including Gibbons and Beadle [2], unsolved enigma which we will resolve in this paper.
Simmons and Verderber [3], Krieger et al. [4], and Beck Following is the list of the five non-volatile memristor
et al. [5]. enigmas to be examined in-depth and resolved rigorously in
None of the above phenomena can be explained in a uni- the ensuing sections.
fied manner, because the devices used in the experiments
are made of different materials, namely, aluminum oxide A. Enigma 1: all non-volatile memristors have continuum
in [1], nickel oxide in [2], silicon monoxide in [3], various memories.
molecular compounds (polyconjugated compounds, phthalo- B. Enigma 2: conductance of all non-volatile memristors
cyanines, and charge transfer complexes) in [4], and S rZrO3 can be tuned by applying single voltage pulses.
in [5]. C. Enigma 3: faster switching can always be achieved by
While all memristors must exhibit a periodic-pinched increasing the pulse amplitude.
hysteresis loop in the current vs. voltage planes when driven D. Enigma 4: periodic unipolar input gives non-periodic
by a periodic voltage signal with zero mean, memristors finger-like multi-prong-pinched hysteresis loops.
driven by a periodic voltage signal with a non-zero aver- E. Enigma 5: DC V–I curves of non-volatile memristors are
age are found to exhibit a complicated non-periodic cur- fakes.
rent response waveform consisting of shifted non-identical
finger-like multi-prong hysteresis lobes, such as depicted
in Fig. 1c for an NbO Pt memristor [6]. This non-periodic 2 Circuit‑theoretic concepts
The universe of all memristors can be partitioned into four

* L. Chua classes of increasing generality, as depicted in the Venn
chua@berkeley.edu
diagram shown in Fig. 2. When a memristor is driven
1
Electrical Engineering and Computer Sciences, University by a current source (resp. voltage source), it is called a
of California, Berkeley, CA 94720, USA
13
Vol.:(0123456789)
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L. Chua
Page 2 of 43
Fig. 1 a A NbO Pt memristor.

Two-cylinder interfacial area
defined the junction with a
400 nm-thick oxide layer thick-
ness and circular geometry with
r = 350 nm. b Two electrical
terminals of the memristor. c
I–V traces measured by apply-
ing 20 triangle voltage sweeps.
Sweeps 1, 5, 10, 15, and 20
are shown for clarity display-
ing growing current. d Pinched
hysteresis loop measured by
applying a zero-mean periodic
voltage input
The Memristor Universe Genealogy of Voltage – Controlled Memristors

EXTENDED MEMRISTOR
v = R( x , i ) i dx Extended Generic Ideal Ideal
= f(x , i)
R( x , 0) ≠ ∞ dt Memristor Memristor Generic Memristor
GENERIC MEMRISTOR Memristor
dx Voltage – Controlled
v = R( x ) i = f(x , i) Voltage – Controlled Voltage – Controlled Voltage – Controlled
dt
i =G( x , v) v i = G( x ) v i = G (φ ) v
IDEAL GENERIC MEMRISTOR
i = G( x ) v
G ( x , 0) ≠ ∞
dx dx dx dφ
dx ^ = g(x , v) = ĝ(x)v
v = R( x ) i = f(x)i = g(x , v) dt dt =v
dt dt dt
IDEAL MEMRISTOR
dq
v = R (q ) i =i
dt Fig. 3 Equations defining the four classes of voltage-controlled mem-
ristors, where the conductance G is called the memductance, an acro-
nym for memory conductance
Fig. 2 Venn diagram of all current-controlled memristors
For the ideal memristor in Fig. 2 the state-dependent

current-controlled (resp., voltage-controlled) memristor. Ohm’s Law and its associated state equation are given,
Each memristor is defined by a state-dependent Ohm’s respectively, by:
law and a state equation as depicted in Fig. 2 for current-
controlled memristors. Observe that the four equations on
v = R(q) i, (1)
the left column of Fig. 2 have the same form as the classic dq
Ohm’s law, except that the term multiplying the memristor = i. (2)
dt
current i is not a constant, but can depend on one, or more,
state variables x = (x1, x2,…xn), for the ideal, ideal generic, An ideal memristor, in Chua et al. [7], is integrable and,
and generic memristors, and can also depend on the current hence, can be defined by an equivalent algebraic function,
i for extended memristors. Although most results proved in dubbed the memristor’s constitutive relation, by substitut-
this paper are valid for any number n of state variable, in ing the state equation dq/dt = i in place of i in the state-
this paper, we assume that n = 1 to avoid clutter. The resist- dependent Ohm’s law (1), and the integrating both sides,
ance R in Fig. 2 is called the memristance, an acronym for with ϕ(0) = 0, q(0) = 0:
memory resistance.
R(q) dq ≜ 𝜑(q).
t q
�0 �0
In addition, all results stated for current-controlled mem- 𝜑= v(t) dt = ̂ (3)
ristors holds, mutatis mutandis, also for the dual voltage-
controlled memristors, and vice versa. For example, the As an example, consider the ideal current-controlled
equations defining the current-controlled memristors in memristor in Fig. 4 defined by (ϕ = q + 1/3q3) in Fig. 4a and
Fig. 2 are given in Fig. 3 for the corresponding voltage- driven by a current source i(t) = sin(t). The exact solution
controlled memristors. v(t) is shown in Fig. 4b. The loci of v(t) and i(t) in the v vs.
13
Five non-volatile memristor enigmas solved Page 3 of 43 563
(a) (c)
(b) (d)
Fig. 4 Example 1 A charge-controlled ideal memristor defined by the constitution 𝜑 = 𝜑̂ (q) = q + 1∕3 q3
Fig. 5 Pinched hysteresis loop in the i vs. v planes looks like the

extended wing of a seagull
Fig. 6 Example 2 The hp titanium dioxide memristor is defined by its

i plane are a pinched hysteresis loop, as shown in Fig. 4c.
memristance R(w) = RON (w/D) + ROFF (1–w/D) where RON, ROFF, and
When used as a binary switch, it is often more convenient D are device parameters
to plot the loci in the log |v| vs. i plane, as shown in Fig. 4d,
henceforth referred to as a gull-wing hysteresis plot, in view
of its resemblance to the extended wing of a Seagull, as depicted in Fig. 6. The memristance R(w) is a function of the
depicted in Fig. 5. state variable w. The equations describing the hp memristor
An example of an ideal memristor is the titanium dioxide are as follows [8]:
memristor developed by Stanley Williams’ group at hp [8] as
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Page 4 of 43
Fig. 7 Hodgkin–Huxley circuit
model with erroneous time-
1961 Nobel Prize in Physiology
dependent potassium and Hodgkin- Huxley Nerve Membrane Model
sodium conductance
I
+ + INa + IK
VNa V_K
GNa GK GL
C V _
ENa EK EL
_
Time-varying Sodium Time-varying Potassium

conductance conductance
Sir A. L. Hodgkin Sir A. F. Huxley
From
A. L. Hodgkin and A. F. Huxley
A Quantitative Description of Membrane Current and its
Application to Conduction and Excitation in Nerve.
Journal of Physiology, Vol. 117, pp.500-544, 1952
⎡ ⎤ 3 POP and DRM: two new tools to unravel

⎢ � �
w
�
w ⎥
�⎥ memristor’s nonlinear dynamics
State-Dependent Ohm’s Law: v = ⎢RON + ROFF 1 − i
⎢ D D ⎥
⎢⏟⏞⏞⏞⏞⏞⏞⏞⏞⏞⏞⏞⏞⏞⏞⏞⏞⏞⏟⏞⏞⏞⏞⏞⏞⏞⏞⏞⏞⏞⏞⏞⏞⏞⏞⏞⏟⎥
⎣ ⎦
Two powerful yet simple tools will be used to resolve the
R(w)
(4) five non-volatile memristor enigmas. Both tools involve only
the state equation:
and
( ) dx
dw RON = f (x, v), (6)
State equation: = 𝜇V i. (5) dt
dt D
Observe that the hp memristor is an ideal generic memris-

tor, which differs from an ideal memristor by the constant
term (µV RON/D). However, in theory, they are equivalent,
because every ideal generic memristor can be transformed
to an equivalent ideal memristor via a one-to-one transfor-
mation [9, 10].
Most real-life and physical memristors are generic or
extended memristors. The time-varying potassium and
sodium conductances erroneously identified by Hodgkin
and Huxley in their classic nerve membrane axon circuit
model [11] shown in Fig. 7 are in fact not time-dependent
conductance, but memristors, [12, 13] as depicted in the
revised memristive Hodgkin–Huxley model shown in Fig. 8!
In particular, the potassium ion channel in the nerve axon is
a voltage-controlled generic memristor as defined in Fig. 9.
Similarly, the sodium ion channel in the nerve axon is a
voltage-controlled generic memristor as defined in Fig. 10. In
this case, there are two state variables, namely, the sodium ion-
channel activation variable m, and inactivation variable h. In
terms of the symbol in Fig. 3, we can identify x1 = m and x2 = h.
Our final example in Fig. 11 shows the state-dependent
Ohm’s Law and its associated state equation of a Pt/TaOX/ Fig. 8 Corrected Hodgkin–Huxley circuit model with time-invariant
Ta-extended memristor [14]. potassium and sodium memristors
13
(a)
(b)
Fig. 9 Example 3 a State-dependent Ohm’s Law and its associated state equation of potassium ion-channel memristor. b Associated pinched
hysteresis loop as a function of the frequency f of the applied sinusoidal excitation signal
of voltage-controlled memristor, where f(x, v) is assumed to v to current i in (6). The secret to unravel the complex non-
be a continuous function of x and v. The same analysis holds linear dynamics of non-volatile memristors is to interpret
for current-controlled memristors upon changing the voltage the motion of the state variable x on the phase plane, which
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L. Chua
Page 6 of 43
(a)
(b)
Fig. 10 Example 4. a State-dependent Ohm’s Law and its two associated state equations of a second-order sodium ion-channel generic memris-
tor. b Associated pinched hysteresis loop as a function of the frequency f of the applied sinusoidal excitation signal
13
Fig. 11 Example 5 State-
dependent Ohm’s Law and its
associated state equation of an
extended memristor, made of
tantalum oxide
Phase Plane A Volatile Memristor

The 2-dimensional plane dx Voltage – Controlled Memristor State Equation
dx
dt
versus x is called the phase plane. dt dx
= f ( x , v)
POP
dt
It is the 2-dimensional special case
0 x when there is no input voltage, v = 0, we obtain v=0 dx
of phase space, introduced by Paul and dt Stable
Tatiana Ehrenfest in their classic work dx
Zero - Input State Equation : = f ( x , 0)
on the kinetic theory of gases in 1911. dt
x
Paul Ehrenfest is a student of Boltzmann, and is known for his
Dynamic Routes 0
formulation of the Ehrenfest theorem, Bose-Einstein Statistics, If North go East Unstable Unstable
Planck’s energy quanta and the initial concept of spin. If South go West Phase Plane
Fig. 12 Revealing phase plane

Fig. 13 Example of a POP with three equilibrium points, but only the
green middle-intersection point is stable
we define in Fig. 12, to underscore its significance. POP

and DRM are the acronym for Power Off Plot and Dynamic
Route Map, respectively. Both POP and DRM in the follow- A Bistable Memristor
ing sections reside on the phase plane. Voltage – Controlled Memristor State Equation
dx
= f ( x , v)
POP
3.1 POP: power‑off plot dt dx
when there is no input voltage, v = 0, we obtain Stable
Unstable dt
dx
Every time, we switch off the power of a non-volatile volt- Zero - Input State Equation :
dt
= f ( x , 0)
x
0
age-controlled memristor, the state Eq. (6) reduces to the Dynamic Routes
following “power-off” state equation: Stable v=0
If North go East
Phase Plane
dx If South go West
= f (x, 0). (7)
dt
In the phase plane, the power-off-plot state equation is Fig. 14 Example of a POP with three equilibrium points; two of them
are stable
just a continuous single-valued curve (such as the two exam-
ples depicted in Figs. 13, 14) henceforth dubbed the Power-
Off Plot, or POP for short. on POP can be determined instantly by inception: any initial
Observe that every intersection between the POP and the point on the POP that lies above the x-axis must traverse to
horizontal x-axis, where dx/dt = 0, is an equilibrium point the right along POP, because dx/dt > 0 for any point on POP
of the memristor. However, not all equilibrium points are located in the upper half plane. Conversely, any point on
locally asymptotically stable [15]. How can one tell which POP lying in the lower half plane must traverse to the left
equilibrium point of a memristor is unstable ? Thanks to the before dx/dt < 0 there. Following the above simple rule, we
phase plane, the direction of motion starting from any point can attach arrowheads along POP, as depicted in Fig. 13. It
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Page 8 of 43
Fig. 15 a Definition of the i

generic Chua Corsage memris- dx
= f0 ( x )
Chua dt 0
tor. b POP and its dynamic v=0
routes v Corsage
Memristor
State-Dependent Ohm’s Law

i = G ( x )v
where, G ( x ) = x 2
State Equation
dx dx
= 30 - x + x - 20 - x - 40 + v f(x, v) = f0 ( x )
dt dt v=0
f0 (x)
POP (Power-Off Plot)

is the function f0 (x) extracted from
the state equation after setting the
voltage v = 0:
f 0 ( x ) = 30 – x + x – 20 – x – 40
(a) (b)
is very helpful to imagine the POP as one-way streets which v units. The arrowheads attached to each parameterized
switch direction upon crossing the x-axis. Such arrowhead- dynamic route follows the same route-direction slogan “If
posted segments of POP are called dynamic routes. Drawing North go East” in the upper half plane and “If South go
dynamic routes on the POP is a cinch by just following the West” in the lower half plane.
slogan “If North go East” and “If South go West.” The DRM of the Chua Corsage memristor is shown in
It follows from the dynamic routes on the POP in Fig. 13 Fig. 16, for seven dynamic routes, each parametrized by a
that this voltage-controlled memristor is volatile, because value of the memristor voltage v. It is important to under-
there is only one asymptotically stable equilibrium point. stand that the DRM consists of an infinitely dense number
Applying the same slogan to the POP shown in Fig. 14, of distinct dynamic routes, where only a few typical routes
we can conclude, by inspection, that the corresponding are displayed. It is extremely important to note that the fur-
memristor is bistable, and can be used as a non-volatile, ther up a dynamic route is located in the upper half plane,
discrete, binary memory. the faster it is for a point moving along its track to the right,
when compared to another point with the same state x below
3.2 DRM: dynamic route map it.
Similarly, the further down a dynamic route is located in
While the POP of a memristor decrees the dynamic route the lower half plane, the faster it is for a point moving along
which the state variable x(t) must traverse, when its terminal its track to the left. It is helpful to imagine the dynamic
voltage v(t) is constrained to zero, exactly the same concept routes on the DRM in Fig. 16 as a super highway with mul-
can be generalized to specify the dynamic route for any non- tiple parallel lanes, each with a posted speed, where all cars
zero constant voltage v = E1, E2, …, Em. A collection of such on a particular lane must move with the designated speed.
dynamic routes, parametrized by the voltage v, is called a To move faster, a driver must switch to a lane further away
dynamic route map, or DRM, and henceforth pronounced from the center dividing curb where dx/dt = 0 by increasing
DRUM as a mnemonic. the amplitude of a square voltage source of a certain pulse
To enhance the understanding this powerful new tool, width w. To cover the same distance [x0, x1], in less time,
consider the Chua Corsage memristor [16] defined in one simply increases the amplitude A. Conversely, covering
Fig. 15a by a piecewise-linear state equation, thereby allow- the same distance with a smaller amplitude A would require
ing on exact analysis for deeper comprehension. a longer pulse width w.
Observe that in view of the simplicity of the state equa- Since the proof of the memristor Enigma 4 follows the
tion where the parameter v is simply added to the piecewise- same mechanisms for switching from the asymptotical stable
linear function f0(x), each dynamic route parametrized by equilibrium point Q0 to Q1, and vice versa, it is helpful to
v is just a vertical translation of the memristor’s POP by
13
dx dx
= f0 ( x ) dt
= f(x)+ v = f (x, v) DRM
dt v=0
70
60 V = 60
50
40
POP 30
m1 = 1 m2 = -1
V = 40
m0 = -1 20
Q0 Q1 10 Q0 Q2 Q1 V = 20 x
x
Q2
-20 -10-10 0 10 20 30 40 50 60 70 80
-20
V=0
-30 POP
-40
-50 V = -20
-60
-70
V = -60 V = -40
Fig. 16 DRM of the Chua Corsage memristor
How to Switch ? How to Switch Back ?

vs i i
1. From Q0 to Q1 2. From Q1 to Q0 vs
A
Apply voltage pulse vs(t) Δt
+ Apply voltage pulse vs(t) +
with Amplitude A = 15 Δt t vs (t) ̶ t vs (t) ̶
with Amplitude A = -15
dx dx -A
30 dt f(x) 30 dt
25 t = Δt 25
20 f(x) + 15 20
15 15
f(x) 10 10 t=0
5
Q0 Q2 Q1 x 5
Q0 Q2 Q1 x
-20 -10 0 10 20 30 40 50 60 70 80 -20 -10 0 10 20 30 40 50 60 70 80
-5
v = 15 v = -15
-5
v=0
-10 t=0 -10
-15 -15
-20 -20
-25 -25
-30
v=0 -30 t = Δt f(x) - 15
Dynamic route associated with the set operation Dynamic route associated with the reset operation
(a) (b)
Fig. 17 a Switching from Q0 to Q1 via a positive square voltage pulse. b Switching from Q1 to Q0 via a negative square voltage pulse
learn the switching dynamics from a simple analytical exam- located on the upper blue route where dx/dt > 0, it must move
ple whose solutions can be derived in closed form. to the right by following the direction prescribed by the blue
To switch from Q0 to Q1, let us apply a 15-V square route until t = Δt, when the square pulse switches back to
pulse as shown in Fig. 17a at t = 0. This forces the relevant zero, and the relevant dynamic route reverts back abruptly
dynamic route to change instantaneously from the red POP to the red POP, where upon the dynamics must continue to
where v = 0 to the upper blue route shown in Fig. 17a, which move along the dynamic route indicated by the two black
in this simple example is obtained by translating the red arrowheads until it converges to state Q1.
route upwards by 15 V. Since the initial state at t = 0+ is now
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Page 10 of 43
Fig. 18 Switching fails when vs i

the pulse terminates before the
state x(t) passes the unstable Switching Failure 1 A = 15
equilibrium point Q2 at x = 30
Pulse width w = Δt vs(t) v
is too narrow 0 t
Δt
dx
dt
POP
It is important to observe that in order for the switching dynamic route stipulates that the motion must move to the
to be successful, the pulse width Δt must be large enough left (because dx/dt < 0), thereby returning to Q0. Hence, the
for the motion to pass beyond the unstable equilibrium state switching process had failed this case. It is clear from Fig. 18
Q2. Observe that, however, faster switching is possible by that, to switch from Q0 to Q1 successfully, the pulse width
increasing the pulse amplitude A in Fig. 17a, because the w = Δt must be at least long enough for the downward jump
corresponding blue route would be translated to a higher to land to the right of the unstable equilibrium Q 2, as in
position where the speed dx/dt of the motion would be Fig. 17a.
greater than the case with a smaller pulse amplitude.
To switch from Q1 to Q0, simply apply a 15-V negative • Switching failure mechanism 2
voltage pulse as shown in Fig. 17b.
The Moral [17]: Consider next the case where the pulse amplitude A is too
small, as depicted in Fig. 19. Observe that the return down-
1. For a given pulse amplitude A, there is a minimum pulse ward jump will fall on the negative side of the red curves,
width w = Δt necessary to switch between any two dis- where the dynamic route decreed that the motion must move
crete equilibrium states. to the left (because dx/dt < 0), thereby returning eventually to
2. For a given pulse width w = Δt, there is a minimum pulse the initial point Q0. Observe that this scenario will take place
amplitude A necessary to switch between any two dis- no matter how large the pulse width is because it would take
crete equilibrium states. an infinite amount of time for the motion along the blue
curve to reach x = 15. Observe that the point at x = 15 (see
In contrast to the above, in our resolution of Enigma 4 in inset) is a new equilibrium point, while the square pulse is
Sect. 4, we will prove that, for any given pulse amplitude A, on, and it would take an infinite amount of time to arrive at
it is, in principle, always possible to switch between any two an equilibrium point. For a successful switching from Q0
equilibrium states in a non-volatile memory. to Q1, the pulse magnitude A must be larger than A = 10
To understand that there is a fundamental difference in in order for the minima of the blue curve to stay above the
switching between two discrete locally asymptotical stable x-axis, as in Fig. 17a.
equilibrium states and two non-discrete stable equilibrium
states, we end this section with two failure mechanisms in
switching between two discrete equilibrium states. 4 Fundamental passive non‑volatile
memristor theorem: two is infinite
• Switching failure mechanism 1
The non-volatile memristor Enigma 1, as well as the other
Consider the case where the pulse width w = Δt is too 4 enigmas, is a simple consequence of the following funda-
short, as depicted in Fig. 18. Observe the return downward mental passive memristor theorem, which we have endear-
jump will fall on the negative side of the red curves, whose ingly dubbed “two implies infinite.” The term passive is a
13
Fig. 19 Switching fails when i

the pulse height A is too short,
such that the motion never Switching Failure 2 vs
reaches beyond x = 15, no mat-
ter how long is the pulse width Pulse height A is too A=5 vs(t) v
short 0
Δt
t
standard circuit-theoretic concept [17] implying the absence

of any source of energy, such as, battery, solar cell, chemical
i1 = −f (v1 , v2 ), (11)
or nuclear reactions, electric or magnetic fields, quantum
mechanical phenomena, etc. inside the device package. In
i2 = G(v1 , v2 ) v2 , (12)
particular, an extended voltage-controlled memristors is pas- where f and G are identical to those used to define (9) and
sive if and only if G(x, v) ≥ 0. (10), apart from a change of symbols x → v1 and v → v2.
Theorem (Two is infinte) The necessary and sufficient con- Since port 1 of ℛ is connected to a capacitor, we have
dition for a passive memristor described by a voltage-con- only two free terminals, namely the two wires connected to
trolled state equation dx
dt
= f (x, v) to be non-volatile over port 2 of ℛ . Let us enclose the contiguous part of the circuit
the entire x-axis is that there exists 2 stable states x = xa by a box 𝒩 and derive the relationship between the current
and x = xb such that i and voltage v of the new 2-terminal device 𝒩 . Recall that
( ) we have defined x = v1 and v = v2. Applying Kirchhoff current
f xa , 0 = 0, (8a) law to the upper node of port 2 of ℛ , we obtain
( )
f xb , 0 = 0. (8b) i = i2 = G(v1 , v2 ) v2 = G(x, v) v, (13)
Remark To avoid clutter, we assume that the state equation where we have made use of (12), v1 = x, and v2 = v. Similarly,
is defined over the entire real axis − ∞ < x < ∞. Exactly, the we obtain iC = − i1 by applying the Kirchhoff current law to
same proof also holds over a finite range xa < x < xb where the upper node of port 1 of ℛ.
the device functions as a memristor. Applying Kirchhoff voltage law across port 1 of ℛ and
invoking (11) and the equation iC = C (dvC/dt) with C = 1,
Proof of “Two is infinite” Theorem Consider the most general we obtain
class of passive memristors, namely, an extended memristor dx dvC ( )
defined by: = = −i1 = f v1 , v2 = f (x, v). (14)
dt dt
State-Dependent Ohm’s Law: i = G(x, v)v, (9) Since (13) and (14) are identical to (9) and (10), the new
device 𝒩 is an equivalent circuit of the extended memristor
State Equation:
dx
= f (x, v). (10) defined in (9) and (10), because it is impossible to distin-
dt guish 𝒩 from the extended memristor by performing any
Equations (9), (10) have an equivalent circuit consisting measurements when both are driven by the same input sig-
of a 2-port resistor [17] ℛ whose port 1 on the left is con- nals across their external terminals.
nected to a 1-F capacitor, as shown in Fig. 20, where the Now, consider the situation when the power to the mem-
2-port resistor ℛ is defined by: ristor in Fig. 20 is switched off, i.e., v = 0, and the voltage
source connected across the memristor reduces to a short
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Page 12 of 43
Since the memristor in Fig. 20 is non-volatile, by assump-

tion, it must exhibit at least two stable equilibrium states x(Q1)
and x(Q2). In other words, in the simplest situation, the greatly
simplified yet still equivalent circuit consists of just a 1F capac-
itor in parallel with a nonlinear resistor ℛ , and this circuit must
be a bistable circuit with an i1–v1 curve qualitatively similar to
that shown in Fig. 14. Let us model this i1–v1 curve by
i1 = k f̂ (v1 ) , (17)
where k ≥ 0 is a scaling constant, as depicted in the rightmost
part of Fig. 21, for three values of k and f̂ (v1 ) is any continu-
ous function intersecting the v1-axis at three points, where
the slope of the middle-intersection point is negative.
Fig. 20 Every memristor has an equivalent circuit constructed by Now observe that the i1–v1 curve of the resistor ℛ in
connecting a 1F capacitor across port 1 of a nonlinear 2-port resistor Fig. 21 must necessarily intersect the second and fourth
ℛ defined by (11) and (12) quadrants of the i1–v1 plane where the instantaneous power
p(t) ≜ i1 (t)v1 (t) < 0 , for all k > 0. This implies the resistor
circuit. In this case, the capacitor is connected only to a ℛ , and its equivalent parent circuit 𝒩 is an active device
2-terminal device, and not a 4-terminal 2-port, because port requiring an internal source of power, which contradicts the
2 no longer existed, as depicted in the top of Fig. 21. This fundamental property of non-volatility that the memristor
allows us to further simplify the top circuit by connecting the does not have an internal power supply.
1F capacitor across a 2-terminal 1-port resistor defined by: The only way to satisfy the passivity condition is when
k = 0, in which case, i1 = 0 in view of (17). It follows from
i1 = −f (v1 , 0), (15) (14) that:
i2 = 0, (16) dx
= 0, (18)
upon setting v 2 = 0 in (11) and (12). Observe that (15) dt
defines a new 2-terminal resistor ℛ via (15), which has a i1 when k = 0. Hence, a passive extended memristor is non-
vs. v1, i–v curve in the i1–v1 plane, as depicted in the middle volatile if, and only if, its POP coincides with the x-axis.
part of Fig. 21. It is truly stunning as it follows from the simplest
assumption that the memristor is endowed with two stable
Fig. 21 Sequence of simplified Proof :

equivalent circuits when the
memristor is switched off v = 0 implies N is equivalent to an active nonlinear Resistor R
N i
iC i1 i2 i
i1 = - f (v1 , v2) +
+ + +
C = 1F vC v1 i2 = G (v1 , v2) v2 v2 v v
- - G(v1 , 0) ≠ ∞ -
-
R
i1
iC i1 k = 10
iC i1 k=5
i1 = -f ( v1 , 0 ) + + k=1
+ + v1
C = 1F vC v1
^
= k f ( v1 ) C=1F vC v1 R -1 0 1
- - i2 = 0
- -
^
iC i1 = 0 i1 = k f ( v 1 )
k=0 i1
R is passive N is passive Open
v1
if, and only if, if, and only if, C = 1F
circuit Any voltage -∞ < v1 < ∞
k=0 R is an open circuit
is non-volatile.
13
equilibrium states. It asserts that if one can measure experi- 5 Universal non‑volatile memristor
mentally a device that has two stable small-signal conduct- dynamics: no backtracking
ances, then it must also be endowed with a continuum of
stable equilibrium states. In short, we have resolved the A cursory inspection of the DRM of the four non-volatile
following version of the non-volatile memristor Enigma 1 memristors in Fig. 22, 23, 24, and 25 reveals that their
(state variable version): dynamic routes in the dx/dt vs. x-phase plane are segre-
It also follows from the two implies infinite theorem that gated in the upper half plane for v > 0, and in the lower half
a memristor has a non-volatile range [xa, xb] of stable states plane for v < 0, because no dynamic route can cross the POP
if, and only if, its POP is flat over [xa, xb]. We end Sect. 4 (which coincides with the horizontal x-axis) where all of its
with the DRM’s of four non-volatile memristors. points are equilibrium points, namely, dx/dt = 0 for all points
on the POP.
4.1 DRM of ideal memristors For a non-volatile memristor having a dynamic route end-
ing at some equilibrium point x = x* on the POP, a trajectory
The DRM of all ideal memristors defined in Figs. 2 and 3 starting from any point on this dynamic route can reach x*
consists of parallel horizontal lines. Observe that its POP only at t = ∞, because it takes infinite time for a trajectory
coincides with the x-axis. Observe that the DRM of the hp of any well-defined ordinary differential equation to arrive
memristor (which is an ideal generic current-controlled at an equilibrium point [15, 17]. As an example, consider
memristor with w as its state variable) defined in (5) is iden- the DRM of the Pt/TaOX/Ta memristor in Fig. 23. Observe
tical to the phase plane representation of an ideal memristor, that all dynamic routes in the upper half plane (where v > 0)
except that the ordinate of each horizontal line in the dual tend to the equilibrium point x = 1.0. Similarly, all dynamic
dw/dt vs. i phase plane is given by dw/dt = ki, where k = (µV routes in the lower half plane (where v < 0) tend to the equi-
RON/D) for each parameter value i. librium point x = 0. It follows that this memristor is defined
only over the closed interval [0, 1]. It degenerates into a
4.2 DRM of Pt/TaOx/Ta memristor nonlinear resistor R1 defined by i = G(0, v)̂v ≜ g1 (v) for
v < 0, when x = 0, and into a nonlinear resistor R2 defined by
Figure 23 shows the DRM of the Pt/TaOx/Ta memristor i = G(1, v)̂v ≜ g2 (v) for v > 0 when x = 1.
defined in Fig. 11. Observe that its POP is shown only over It follows from the above example that there is no loss
the interval 0 ≤ x ≤ 1.0, because the physical memristor of generality for us to focus our research to only non-vola-
degenerates into a nonlinear resistor for state variable x out- tile memristors whose DRM is described by sign-invariant
side the interval [0, 1]. (resp., anti-sign-invariant) functions defined and illustrated
in Fig. 26, where u = v for a voltage-controlled memris-
4.3 DRM of Wei Lu’s memristor tor, and u = i for a current-controlled memristor. Here, we
show only the u-parameterized family of curves over the
The structure of an extended memristor developed at Wei range xa ≤ x ≤ xb where we assume the device functions as
Lu’s lab [18] is shown in Fig. 24a. Due to the vastly different a memristor.
scales in the upper and lower planes, the DRM is shown in To emphasize that the nonlinear dynamics of all non-
two separate parts in Fig. 24b. Observe that the DRM and volatile memristors are qualitatively identical, regardless
POP of this memristor is valid only over 0 ≤ x ≤ 1. of the device material and internal structure, or the precise
form of the memristor’s state equation, let us pick the hypo-
4.4 DRM of an ideal hp tantalum‑oxide memristor thetical sign-invariant function shown graphically on the
top of Fig. 26, and use it to define the state equation of the
The structure of a tantalum-oxide memristor [19] is shown in hypothetical non-volatile memristor defined in Fig. 27, via
Fig. 25a. Its DRM is shown in Fig. 25b. Although the DRM its DRM.
and POP is shown over 0 ≤ x ≤ 3, this device functions as an Observe that unlike the DRM of the volatile Chua cor-
extended memristor only over 0 ≤ x ≤ 1. sage memristor shown in the right part of Fig. 16, where the
arrowhead on each dynamic route (for any fixed DC voltage
13
563
L. Chua
Page 14 of 43
Fig. 22 Three equivalent representations of an ideal memristor. (1) Constitutive relation between flux ϕ and charge q. (2) Dynamic representa-
tion via a state-dependent Ohm’s law and its associated state equation. (3) Phase plane representation via its associated DRM
much as to backtrack into the opposite direction, because

Pt / TaOx / Ta Memristor
each dynamic route is defined by a continuous single-valued
40 DRM function, and any backtracking would result in triple-value
Dynamic v = 0.5 v =0.7 v = 0.9 v = 1.25
v = 1.6 Z-shaped route.
v = 0.35
20 POP
Route Map v =0.2 v = 0.25
dx / dt
v = 0.15
0 1.0 5.1 Universal switching method: single‑pulse

DRM -20
v=0
v =-0.35 v =-0.25 v =-0.2 v =-0.15
v =-0.5
switching
v =-1.25 v =-0.7
-40 -1.6V < v < 1.6V v =-1.6
v =-0.9
The no backtracking phenomenon exhibited by all non-vol-
atile memristors guarantees that one can switch from any
0.0 0.2 0.4
x 0.6 0.8 1.0
initial state x0 = x(t0) to any other desired state x1 = x(t1), by
applying a single square pulse of pulse height A, and pulse
Fig. 23 DRM of the Pt/TaOx/Ta memristor defined in Fig. 11
width w, where A and w can be tuned continuously over a
broad range of values. The algorithm for choosing A and w is
v = V) changes direction whenever a segment of the dynamic rather straightforward, and will be presented, for pedagogi-
route crosses the x-axis, the arrowhead on each dynamic cal reasons, via the following two examples.
route of the non-volatile memristor in Fig. 27 never changes
its direction. In particular, the arrowhead on each dynamic Example 5.1.1 Switching from x0 to x1 via a single positive
route in the upper half plane is always directed from left to voltage pulse.
right. Conversely, the arrowhead on each dynamic route in
the lower half plane is always directed from right to left. Consider the same hypothetical memristor in Fig. 27 and
This is a universal phenomenon exhibited by all non-vola- pick 2 arbitrary states x0 and x1 where x0 < x1, as shown in
tile memristors. It follows directly from the unique property the left part of Fig. 29, along with a square pulse v(t) with
shown in Fig. 21 where the POP of all non-volatile mem- pulse height A and pulse width w. Suppose that we choose
ristors is a subset of the horizontal x-axis. We emphasize the pulse amplitude A = 3 V. At t = t0− , the state of the mem-
this endearing phenomenon via the no backtracking rule ristor is located at x0 on the x-axis, where the POP (v = 0)
engraved in Fig. 28. is located. At t = t0+ , the state x jumps instantaneously to a
Observe also from the DRM of Fig. 27 that although the point on the green dynamic route (corresponding to v = 3 V)
dynamic routes can be quite curvy, no route can bend so with x-coordinate x = x0. Since dx/dt > 0 at this point, x(t)
13
Current (µA)
Voltage (V)
Current (nA) Voltage (V)

1 read1 -2V read2 -3.5V read3
0
-1
-2
-3
on on off
50
0
0 200 400 600 800 1000 1200
Time (ns)
(a)
(b)
Fig. 24 a Structure of an extended memristor developed in Wei Lu’s lab [18]. b DRM of the Wei Lu’s extended memristor
must start moving to the right along the green dynamic Consider next the case where the pulse amplitude is cho-
route, at a relatively high speed, since the green dynamic sen to be A = 1 V. Exactly, the same scenario must transpire
route is located at a fairly high level relative to POP. Let t1 except that the relevant dynamic route is the blue curve
be the time when x(t) reaches its destination state x(t1) = x1. labeled v = 1, which is located near the x-axis. Since dx/
If we choose the pulse width to be w = w1 = (t1 − t0), then the dt > 0 also along this route, exactly, the same scenario must
state x(t) will drop instantaneously to x = x1 on the POP and occur, albeit at a much lower speed, since dx/dt is signifi-
remain there until it is driven by another voltage pulse at a cantly smaller than the previous case with A = 3 V. It follows
later time t > t1. that we can always switch from any initial state x0 to another
13
563
L. Chua
Page 16 of 43
Fig. 25 a Structure and state-

dependent Ohm’s law with state
equation of ideal hp tantalum-
oxide memristor. b DRM
of ideal hp tantalum-oxide
memristor
(a) (b)
Fig. 26 Definition and illustra-

tion of a sign-invariant function Definition: Sign–Invariant Function f(x , u) u=4
u=3
(top) and an anti-sign-invariant A continuous function f (x, u) is u=2
function (bottom) sign invariant over (xa , xb) if u=1
u=0
f (x , u) > 0 , u > 0 xa 0 xb
u = -1 x
=0 , u = 0 u = -2
<0 , u < 0 u = -3
for xa < x < xb . u = -4
Definition: Anti–sign Invariant Function f(x , u) u = -4

u = -3
A continuous function f (x , u) is u = -2
anti-sign invariant over (xa , xb) if u = -1
u=0
f (x , u) < 0 , u > 0 xa 0 xb
u=1
x
=0 , u = 0
u=2
>0 , u < 0
u=3
for xa < x < xb . u=4
state x1 > x0 by choosing a sufficiently long pulse width w. plane, where dx/dt < 0, the motion of x(t) will now be from
However, depending on the state equation describing the right to left. The mechanism for switching follows, mutatis
device, w may be too large to be of practical interest. mutandis, the scenario presented in Example 5.1.1.
The switching algorithm applied in the preceding two
Example 5.1.2 Switching back from x1 to x0 via a single examples is valid for all sign-invariant non-volatile mem-
negative voltage pulse. ristors, regardless of its material and internal structure.
Moreover, the trade-off between the pulse amplitude A and
To switch back from x1 to x0, we simply apply a negative pulse width w for a successful switching always follows the
square voltage pulse, as shown in Fig. 30. Since the dynamic hyperbolic-like rule encapsulated in Fig. 31.
routes on the DRM for v < 0 are located in the lower half
13
Fig. 27 DRM of a hypothetical
non-volatile extended memris-
tor described by a sign-invariant
state equation. Arrowheads
printed on each dynamic route
(identified by a fixed DC volt-
age v = V) indicate the direction
of motion from any chosen ini-
tial state on the dynamic route
labeled v = V
5.2 State‑dependent memductance
No Backtracking Rule on DRM
dx It follows from the no backtracking dynamics of non-volatile
dt memristors that when a positive (resp., negative) voltage
pulse v(t) is applied across a memristor, where a constant
Go Right POP (i.e., dc) voltage v = A (resp., v = − A) appears across the
memristor over t0 < t < t1, (t1 = t0 + w), the response of the
x memristor state variable x(t) is always a strictly monotoni-
cally increasing (resp., decreasing) function of time starting
from the initial state x(t0), as illustrated in Fig. 29 (resp.,
Go Left Fig. 30). However, it is inconvenient, if not impractical, to
measure the response waveforms of x(t), because the state
variable x is an internal physical variable of the device.
However, the time-dependent waveform x(t) induces a cor-
Fig. 28 Nonlinear dynamics of all sign-invariant non-volatile mem- responding time-varying current response i(t) via the mem-
ristors is akin to a multi-lane super-highway where all traffics on ristor’s state-dependent Ohm’s law i(t) = G(x(t), A) A (resp.,
lanes above the center curb (the POP) move to the right, and those
i(t) = − G(x(t), − A) A), which is easily measureable, over
below the curb move to the left
Fig. 29 Illustration of switch- vs(t) i v w1

ing from x0 to x1 using a square
w i = G ( x , v )v 3
2
voltage pulse with two pulse A
amplitudes A = 3 V, and A = 1 V, v dx 1
respectively = f (x , v ) 0 t0 t1 t
0 t0 t1 t dt x1
x
dx
DRM dt
= f (x , v )
v=4 x0
t0 t1 t
v=3 0
v=2 v
v=1 3
2
w2
v=0 x 1
xa POP 0 x0 x1 xb t
v = -1 0 t0 t1
v = -2 x
x1
v = -3
v = -4
How to switch from x0 to x1 ? x0

0 t0 t1 t2 t
13
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Page 18 of 43
Fig. 30 Illustration of switch- vs(t) i v t0 t1

ing from x1 to x0 using a
t0 t1 i = G ( x , v )v 0
-1
t
negative square voltage pulse t
with A = − 3V and A = − 1 V, 0 v dx -2
respectively = f (x , v ) -3
w1
-A
w
dt x
dx x1
DRM dt
= f (x , v )
v=4 x0
v=3 0 t0 t1 t
v=2 v t0 t1 t2
v=1 0
t
x0 x1 v=0 -1
xb x
xa POP 0
v = -1
-2
w2
-3
v = -2 x
v = -3 x1
v = -4
x0
How to switch from x1 to x0 ? 0 t0 t1 t2 t
Fig. 31 It is possible to switch

i
from one state to another state Amplitude – Pulse Width
of any sign-invariant (resp.,
anti-sign-invariant) non-volatile vs v Trade Off
memristor with an arbitrarily
small pulse amplitude A by
One can switch a non-volatile memristor from
choosing a sufficiently large state x1 to state x2 by choosing a square pulse
pulse width w vs whose amplitude A and pulse width w can be
w
A tuned continuously over a wide range.
Increasing the amplitude A has the same effect

0 t as decreasing the pulse width w, and vice-
Positive switching voltage domain versa.
vs
Unlike binary logic circuits, no minimum Pulse
0 t
amplitude A, or pulse width w, is necessary in
-A principle. However, in practice, if A is too
w
small, it may take an impractically long time
Negative switching voltage domain for switching to occur.
Fig. 32 3 examples of mem-

ductance functions of generic Memductance G(x) for Typical Applications
voltage-controlled memristors
defined in Fig. 3 G(x) G(x)
0 x 0 x
Binary Memductance for Bipolar Switch 4-Level Memductance for Bipolar Switch
G(x)
0 x
Binary Memductance for Unipolar Switch
13
the period t0 < t < t1 of the input voltage pulse v(t). In the

special case of binary logic circuits, one simply applies a Memductance G(x) for Synapse
small-amplitude voltage pulse and senses whether the cur- G(x) G(x)
rent response is large (for binary “1”) or small (for binary
“0”), implying that the memductance G is high or low,
respectively.
Three examples of memductance functions of generic
memristors for binary logic circuits are shown in Fig. 32.
For binary logic circuits, examples of a memductance 0 x 0 x
function G(x) of generic memristors consist of a steep but
Excitatory Synapse Inhibitory Synapse
continuous (not abrupt) transition from a low-level horizon-
tal line to a high-level horizontal line (upper left function).
In this case, a positive voltage pulse would be used to switch Fig. 33 Memductance G(x) for emulating synapses is smooth func-
tions
from an initially low-level memductance to a high-level
memductance. Conversely, a negative voltage pulse would
be used to switch from an initially high-level memductance
Memductance G(x, v) of Pt / TaOX / Ta Memristor
to a low-level memductance.
Another example of a two-state memductance function 10 -2
v = 3V
G(x) consists of a flip version of the upper left function
obtained by rotating the upper left curve by 180° about a
horizontal axis drawn through the midpoint of the middle 10 -3 v = 2V
transition curve. In this case, switching from an initial low-
v = 1V
memductance to a high (resp., low) memductance would G(x, v)
require the application of a negative (resp., positive) voltage 10 -4
pulse.
The memductance function G(x) shown in the upper right
of Fig. 32 would function as a five-state logic circuit. In 10 -5
this case, a voltage pulse of fixed pulse width w would be 0 0.2
x
0.4 0.6 0.8 1
used to switch between adjacent states. Switching between G(x, v) versus the state x for 3 values of v.
non-adjacent memductance states would require applying a
voltage pulse of longer pulse widths.
Fig. 34 Memductance G(x, v) of the Pt/TaOx/Ta-extended memristor.
The periodic memductance function shown in the bottom The parameter values used to calculate the memductance G(x, v) are:
of Fig. 32 would function as a unipolar binary logic circuit α = 6 e−3, β = 5 e−9, γ = 4.5 e−3, and δ = 0.75
where switching between the two binary memductances
can be executed by applying only positive voltage pulses, or
only negative voltage pulses, in view of the strict monotone-
increasing (resp., strict monotone decreasing) property of
the waveform of the state variable x(t). Such memristors
Memductance G(x, v) of Wei Lu’s Memristor
are said to be unipolar, because, unlike the memductance
function shown in the upper left of Fig. 32 which requires
both positive and negative voltage pulses to switch between
the two states, the memristor defined by the state-dependent
memductance function G(x) in the bottom of Fig. 32 can G(x, v)
be switched using only voltage pulses of the same polarity.
Non-volatile generic memristors defined by a state-depend-
ent memductance G(x) can be used for emulating both excit-
atory synapses as shown in the left of Fig. 33, and inhibitory
x
synapses, [20] as shown in the right of Fig. 33.
G(x, v) versus the state x for 3 values of | v |.
Observe that in contrast to the memductances in Fig. 32
for logic circuits, which are characterized by steep continu-
Fig. 35 Memductance G(x, v) of the Wei Lu’s extended memris-
ous functions, the memductances for synapses in Fig. 33 are
tor. The parameter values used to calculate the memductance G(x,
characterized by gently varying smooth functions. v) are: A = 10−12 m2, h = 6.63 × 10−34 Js, w = 2.1 × 2.1 × 10− 9 m,
q = 1.6 × 10− 19 C, P = 1 V, and m = 9.11 × 10− 31 kg
13
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Page 20 of 43
Memductance G(x, v) of Ideal hp TaO Memristor Consider switching the same hypothetical memristor
presented in Example 5.1.1 from the initial state x0 to the
terminal state x1 shown in the DRM in Fig. 29, but with a
v= ± 2V
chain of 3-V narrow voltage pulses whose width w1 is too
short for the trajectory to reach the desired terminal state x1,
G(x, v) v= ± 1V
as shown in Fig. 37. To be more specific, let us assume the
pulse width w1 = 2.5 s in Fig. 29, the minimum needed for
v = ± 1 mV
the green dynamic route labeled v = 3 in Fig. 29 to reach x1.
In particular, let us choose a chain of five identical narrow
positive voltage pulses of w1 = 0.5 s, as shown in upper right
x
half of Fig. 37. Since v = 3 V for each of the five identical
G(x, v) versus the state x for 3 values of v.
pulses, the dynamics of this memristor will move along the
green dynamic route from the initial state x0 at t = 0 until it
Fig. 36 Memductance G(x, v) of the ideal hp TaO-extended memris-
reaches the desired terminal state x1 at t = 6.5 s.
tor. The parameter values used to calculate the memductance G(x, v)
are: Gm = 20 × 10−3 S, a = 7.2 × 10−6 S, and b = 4.7−1/2 V Here, to avoid details that would complicate our analy-
sis, let us suppose, without loss of generality, that the path
from x0 to x1 in the green dynamic route labeled v = 3 (left
For extended memristors (see Fig. 3), the memductance part of Fig. 37) is horizontal, so the speed along the green
G(x, v) is a function of both the state variable x and the route is uniform. Observe that, since v(t) = 0 over the time
input voltage v. In this case, G(x, v) would consist of several intervals [0.5, 1.5], [2.0, 3.0], [3.5, 4.5], [5.0, 6.0], and [6.5,
curves, each parameterized by its associated voltage v, as ∞], the dynamics along the green dynamic route will stop
shown in Figs. 34, 35, and 36, respectively, each showing at the first four points indicated in the DRM for 1 s, and
G(x, v) for three values of v. The memductance G(x, v) is until t = ∞ after t = 6.5 s, where the five-pulse input volt-
calculated from the equation given in Figs. 11, 24, and 25, age returns to v(t) = 0 for t ≥ 6.5 s. It follows from the no
respectively. backtracking rule that the state variable x(t) will increase
monotonically as shown in the waveform shown in the right
Example 5.2.1 Switching from x0 to x1 via multiple narrow bottom of Fig. 37, except for four 1-s rest intervals where x(t)
positive voltage pulses. remains stationary. Assuming a strictly monotone-increasing
memductance G(x), as the one shown in the bottom right of
vs(t)
How to switch from x0 to x1 ? 0
i
Sign-invariant
v memristor
t
t=0 2.0 ≤ t < 3.0 5.0 ≤ t < 6.0
v(t)
0.5 ≤ t < 1.5 3.5 ≤ t < 4.5 3

t ≥ 6.5
0 0.5 1.5 2.0 3.0 3.5 4.5 5.0 6.0 6.5 t
dx i(t)
DRM dt
= f (x , v ) v=4
v=3
v=2
v=1 0 0.5 1.5 2.0 3.0 3.5 4.5 5.0 6.0 6.5 t
v=0
x x(t)
xa POP 0
x0 x1 xb
v = -1
x1
v = -2
v = -3
v = -4
x0
Dynamic Routes on Phase Plane 0 t
Fig. 37 Blue current response of the hypothetical memristor (defined width w1 = 0.5 s consists of a burst of five non-identical trapezoidal
by the DRM on the left) to a green voltage input consisting of burst pulses with monotonically increasing peaks
five identical square positive voltage pulses of amplitude v = 3 V and
13
i
How to switch from x1 to x0 ? vs(t)
t Sign-invariant
0 v memristor
5.0 ≤ t < 6.0 3.5 ≤ t < 4.5
0.5 ≤ t < 1.5 v(t)
0.5 1.5 2.0 3.0 3.5 4.5 5.0 6.0 6.5
t ≥ 6.5 2.0 ≤ t < 3.0 0 t
t=0
-3
dx i(t)
DRM dt
= f (x , v ) v=4 0
0.5 1.5 2.0 3.0 3.5 4.5 5.0 6.0 6.5
t
v=3
v=2
x0 x1 v=1
v=0 x
xb x1 x(t)
xa POP 0
v = -1
v = -2
v = -3
v = -4
x0
Dynamic Routes on Phase Plane 0 0.5 1.5 2.0 3.0 3.5 4.5 5.0 6.0 6.5 t
Fig. 38 Blue current response of the hypothetical memristor (defined and width w1 = 0.5 s consists of a burst of five non-identical trapezoi-
by the DRM on the left) to a green voltage input consisting of a burst dal pulses with monotonically decreasing peaks
five identical square negative voltage pulses of amplitude v = − 3 V
Fig. 37, the corresponding response i(t) would consist of a There is a well-known theorem from linear system which
burst of five trapezoidal-shaped pulses whose peak increases asserts that any non-conservative linear system driven
monotonically, as shown in the middle right of Fig. 37. by any periodic input signal must give rise to a periodic
Since the amplitude of the five positive voltage pulses steady-state response. Our next two examples show that the
is identical, it follows from the state-dependent Ohm’s law response of a non-volatile memristor to a periodic input may
i(t) = G(x(t)) v(t) that the memductance function G(x) of the not be periodic.
hypothetical memristor must be a strictly monotonically
increasing function of x. Example 5.2.3 Consider the same hypothetical memris-
tor presented in Example 5.1.1, driven by a periodic non-
Example 5.2.2 Switching from x1 to x0 via multiple narrow negative square wave as shown in the left part of Fig. 39.
negative voltage pulses. Using the same analysis as Example 5.2.1 but with a peri-
odic non-negative voltage input, instead of the five-pulse
Consider switching the same hypothetical memristor pre- voltage input in Fig. 37, it is straightforward to prove that the
sented in Example 5.1.2 from the terminal state x1 indicated current response is not periodic, but consists of trapezoidal-
in the DRM in Fig. 30, but with a chain of 3-V narrow volt- like pulses whose peak increases monotonically to infinity,
age pulses whose width w1 is too short for the trajectory assuming that the memductance is a strictly monotone-
to return to the desired initial state x0, as shown in Fig. 38. increasing function, as shown in Fig. 39.
Let us, therefore, reverse the process in Example 5.2.1 by
choosing of five identical narrow negative voltage pulses of
width w1 = 0.5 s, as shown in the upper right half of Fig. 38. Example 5.2.4 Figure 40 shows the current response of the
The corresponding state variable x(t) and current response same memristor in Fig. 39 which is also not periodic when
follows those shown in Example 5.2.1, mutatis mutandis, as driven by a periodic non-positive voltage.
shown in the right part of Fig. 38.
Since the amplitude of the five negative voltage pulses
is identical, it follows from the state-dependent Ohm’s law
i(t) = G(x(t)) v(t) that the memductance function G(x) of the
hypothetical memristor must be a strictly monotonically
decreasing function of x.
13
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Page 22 of 43
A Periodic Input Voltage May Not Give A Periodic Current Response

vs(t) i A non – volatile memristor with a strictly
v
Sign-invariant monotone – increasing memductance
memristor
0 t function G(x) will give rise to a
v(t) non – periodic current response when
driven by a
periodic non – negative voltage input.
0 t G(x)
i(t)
0 t xa 0 xb x
Fig. 39 Example showing the current response of a non-volatile memristor driven by a periodic non-negative voltage input is not periodic
A Periodic Input Voltage May Not Give A Periodic Current Response

vs(t) i A non – volatile memristor with a strictly
t
0
v Sign-invariant monotone – increasing memductance
memristor
function G(x) will give rise to a
v(t) non – periodic current response when
0 t driven by a
periodic non – positive voltage input.
G(x)
i(t)
0 t
x
xa 0 xb
Fig. 40 Example showing the current response of a non-volatile memristor driven by a periodic non-positive voltage input is not periodic
6 Resolution of all five enigmas 6.1 Enigma 1: all non‑volatile memristors have

continuum memories
Armed with the concepts and tools developed in Sect. 4 and
5, we are now ready to resolve the five non-volatile memris- Recall that the “two is infinite” theorem in Sect. 4 implies
tor enigmas enumerated in Sect. 1. that all non-volatile memristors have a continuum of stable
13
states xa ≤ x ≤ xb (state variable version of Enigma 1) where Nevertheless the operation of such a memory cell is
[xa, xb] is the range of the state variables where the memris- not restricted to four levels; in principle more levels
tor is defined. However, since the state variable x is an inter- could be addressed.
nal physical variable, it is usually impractical to measure
using standard instruments. In practice, the non-volatility of 6.2 Enigma 2: Conductance of all non‑volatile
a memristor is couched in terms of the memductance G(x, memristors can be tuned by applying single
v) for voltage-controlled memristors, or memristance R(x, i) voltage pulses
for current-controlled memristors, which is easily measured
by applying a small signal under zero DC bias. Since the POP is an impenetrable barrier for any dynamic
Let us assume that the memductance function G(x) for route from the upper half plane (resp., lower half plane)
generic memristors, or G(x, v) for extended memristors, to move into the lower half plane (resp., upper half plane)
is given, via the memristor’s state-dependent Ohm’s law, of the DRM of any non-volatile memristors, and since the
which, by definition, is given over the entire range xa ≤ x ≤ xb, no backtracking rule from Sect. 5 constrains all dynami-
where the memristor is defined, as illustrated in Figs. 32 cal routes located in the upper half plane (resp., lower half
and 33 for generic memristors, and Figs. 34, 35, and 36 for plane) to move to the right (resp., to the left), as decreed in
extended memristors. Let Gmin ≤ G ≤ Gmax be the range of Fig. 28, it is always possible to apply a single square voltage
the memductance over [xa, xb], where Gmin and Gmax denote pulse of appropriate amplitude (A or − A) and pulse width
the minimum memductance and maximum memductance, w, to steer any initial state x0 to any desired terminal state
respectively, over [xa, xb]. It follows from the state variable x1, as illustrated in Fig. 29 for a positive voltage pulse, and
version of Enigma 1 from Sect. 4.2 that all non-volatile volt- in Fig. 30 for a negative voltage pulse. The above dynam-
age-controlled memristors (resp., current-controlled mem- ics holds for any non-volatile memristor characterized by
ristors) must exhibit a continuum Gmin ≤ G ≤ Gmax (resp., any memductance function G(x), such as those illustrated
Rmin ≤ R ≤ Rmax) of memductances (resp., memristances), in Figs. 32 and 33 for generic memristors, or G(x, v) such as
as stated in Enigma 1. those illustrated in Figs. 34, 35, and 36.
We cannot overemphasize that the above proof of Enigma We have, therefore, proved the universal validity of
1 did not invoke any physical or chemical properties of the Enigma 2 for all non-volatile memristors, regardless of the
material, structure, or geometry of the device. It makes use device’s material composition, structure, and geometry.
of only the definition of memristors given in Figs. 2 and 3. It is instructive to note that the assertion from Enigma 2
In other words, Enigma 1 is a universal property of all non- has been reported, but not proved in numerous papers since
volatile memories. It follows that any attempt to prove the 1962. For example, in the third paragraph, column 1, page
above-cited continuum, or analog, memory property using 2675, Hickmott [1] reported:
physical or chemical principles of the material composition Figures 12, 13 show changes in oxide film conductivity
of the non-volatile memristor is doom to fail. It is instructive that can be made by single voltage pulses.
to cite some examples, where Enigma 1 is reported without Similarly, in a widely cited paper, Simmons and Verder-
proof. ber [3] reported on line 3 (from bottom), page 84 the follow-
For example, line 11, column 1 on page 2675 of Hickmott ing experimental results:
[1] had reported:
Switching out of any of the continuum of memory
Conductivity of aluminum-oxide sandwiches can be states described above can be accomplished by a volt-
varied over wide limits…. age pulse approximately 100 ns wide.
Another example, by Simmons and Verderber [3] However, the most detailed illustration of Enigma 2 is the
reported that (line 6, from bottom on page 82): experimental result reported in, perhaps, the most influential
paper by Beck et al. [5], on memristor switching via single
The sample can, in fact, be set in any one of a contin-
pulses, which we reproduced in Fig. 41, where the relevant
uum of impedance memory states existing between the
sentence is enlarged in the upper right inset.
high and the low impedance states described above.
We stress that the above three quotations are among
As a final example, we quote the following statement numerous other similar reports confirming Enigma 2, but
from a widely cited paper (line 1, column 1, page 141) by were never proved to be a universal truth.
Beck et al. [5]:
13
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Page 24 of 43
Pinched Hysteresis loop of Switching performance of a capacitor-like structure based on Cr-doped

Cr-doped SrZrO3 memristor SrZrO3. (a) Applied voltage vs time and (b) readout current vs time.
A negative voltage pulse of 2ms switches the system into

the low-impedance state. After applying a positive voltage
pulse of 2ms, the ‘‘information’’ written to the device is
erased and the high impedance state is recovered.
Faster switching speeds, i.e., shorter write and erase

pulses as used here, are also possible but require higher
voltage amplitudes.
Fig. 41 Two quotations extracted and magnified from the second paragraph, column 1, page 140, of the standard reference by Beck et al. [5] on
switching non-volatile memristors by single pulses
6.3 Enigma 3: faster switching can always be compounds. This device is a memristor by virtue of the
achieved by increasing the pulse amplitude pinched hysteresis loop which it exhibits (left of figure,
reproduced from Fig. 4).
The assertion of Enigma 3 follows directly from the hypo- Finally, we note that the assertion of Enigma 3 had been
thetical DRM shown in Fig. 29 for a positive switching reported in numerous publications, including the widely
pulse, and in Fig. 30 for a negative switching pulse. The cited Beck et al. [5] paper, which we have reproduced in the
value of the pulse amplitude v associated with each dynamic magnified inset on the bottom right of Fig. 41, which was
route can be interpreted as the speed of an imaginary car measured from a Cr-doped S rZrO3 memristor. Interestingly,
traversing the designated route; where the larger the value no one has succeeded in giving a physical mechanism of
of the magnitude of v, the faster is the prescribed speed. For such a hyperbolic-like pulse-switching curve, because the
example, the green dynamic route with |v| = 3 in Figs. 29 and mechanism is a direct consequence of the nonlinear dynam-
30 covers the same distance Δx = |x1 − x0| in significantly ics of the dynamic routes on the DRM.
less time than the blue dynamic route with the posted speed
|v| = 1. It follows that there is a trade-off between the pulse
amplitude A and pulse width w as stated in Fig. 31, and
depicted in the hyperbolic-like pulse-switching curve shown Pulse Amplitude – Width Trade off Relationship
in Fig. 42.
Enigma 3 follows directly from the strictly monotone There is a trade – off between the pulse amplitude A and the pulse
decreasing shape of the pulse-switching curve depicted in width w to switch between 2 conductance values.
Fig. 42.
A shorter switching time w requires a taller pulse amplitude A, and
From a historical perspective, it is interesting to note
that the assertion of Enigma 3 has already been discovered vice versa.
experimentally by Gibbons and Beadle [2] in 1964, as shown

in Fig. 43, where we have reproduced an experimentally
measured hyperbolic-like pulse-switching curve in Fig. 7
and Fig. 10 of [2].
To stress that Enigma 3 does not depend on the device
material, Fig. 44 shows a hyperbolic-like pulse-switching Fig. 42 Typical pulse-switching curve of non-volatile memristors. A
curve reproduced from Fig. 4 of Kriger et al. [4], measured successful switching requires choosing (A, w) above the pulse-switch-
from a molecular memristor made from polyconjugated ing curve
13
Switching Properties of Thin NiO Films

J. F. Gibbons and W. E. Beadle
FIG. 1. Schematic representation of basic NiO thin film device.
FIG. 10. Average low impedance resistance vs.

FIG. 7. Turn-off time as a function of switching current. amplitude of 40 sec switching pulse.
Fig. 43 Measured pulse-switching curve from a thin NiO film device on the left and a corresponding low resistance vs. amplitude of a 40 s
switching pulse
Study of Test Structures of a Molecular Memory Element

Yu. G. Kriger, N. F. Yudanov, I. K. Igumenov, and S. B. Vashehenkoc
Fig. 3. Voltage-current characteristic of a Fig. 4. Dependence of the write pulse

molecular memory element. amplitude on the write pulse time.
Fig. 44 Molecular memristor characterized by a pinched hysteresis loop on the left, and an experimentally measured pulse-switching curve on
the right
6.4 Enigma 4: periodic unipolar input gives function G(x, v) must give rise to non-periodic finger-like
non‑periodic finger‑like multi‑prong pinched multi-prong pinched hysteresis loops similar to those
hysteresis loops depicted in Fig. 1c.
The simplest example of a periodic non-negative (resp.,
Applying a periodic non-negative (resp., non-positive) volt- non-positive) voltage waveforms v(t) is that shown in Fig. 39
age 0 ≤ v(t) ≤ A (resp., − A ≤ v(t) ≤ 0) across any non-volatile (resp., Fig. 40). Recall the corresponding current response
memristor with a strictly monotone-increasing memductance i(t) is not periodic where its peak increases (resp., decreases)
monotonically after each period of v(t). We have shown in
13
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Page 26 of 43
Synaptic Behaviors and Modeling of a Metal Oxide Memristive Device

T. Chang, S. H. Jo, K. H. Kim, P. Sheridan, S. Gaba, W. Lu
a b
c d
Fig. 45 Illustration of non-periodic finger-like multi-prong i(t) for A > 0 (resp., A < 0) on the bottom left (resp., bottom right)
Example 5.2.3 (resp., 5.2.4) that the monotonically increas- steady-state current IQ is measured or calculated after all
ing peak in the current response i(t) is a direct consequence transient currents had decayed to zero. If, depending on the
of the no backtracking rule depicted in Fig. 28 of Sect. 5. initial condition, several DC currents I1Q, I2Q, …, INQ are
Exactly, the same monotone-increasing current response measured, or calculated, for some voltage V = VQ, then all N
must occur except that the shape of i(t) would be different points (I1Q, VQ), (I2Q, VQ), …, (INQ, VQ) belong to the DC V–I
for other periodic non-negative (resp., non-positive) volt- curve of 𝒟 . Conversely, if one applies a constant DC current
age waveforms, such as v(t) = A |sin ωt|, where A ≥ 0 (resp., IQ and measure N corresponding steady-state voltages V1Q,
A ≤ 0), as in Fig. 39 (resp., Fig. 40). Enigma 4 is just a formal V2Q, …, VNQ, then (IQ, V1Q), (IQ, V2Q), …, (IQ, VNQ) would
statement of the above phenomenon. also belong to the DC V-I curve of 𝒟 . The collection of all
An example of Enigma 4 is shown in the bottom left such measured, or calculated, points is called the DC V–I
(resp., right) of Fig. 45 for A > 0 (resp., A < 0), where the curve of 𝒟 . If the DC V–I curve of 𝒟 consists of a continu-
non-periodic finger-like multi-prong current response i(t) on ous single-valued function of V (resp., I), 𝒟 is said to be a
the bottom left (resp., right) is reproduced from [21]. voltage-controlled device (resp., current-controlled device).
In contrast to the non-periodic response i(t) to unipolar By definition, any point (I, V) measured, or calculated,
input signals, for a bipolar periodic input voltage, such as from 𝒟 that remains stationary at all times belongs to the
v(t) = A sin (ωt), the steady-state current response i(t) is peri- device’s DC V–I curve. It is important to note that, by defini-
odic, whose loci in the i vs. v plane is an odd-symmetric tion, a point Q on the DC V–I curve may be unstable in the
pinched hysteresis, shown in the upper right of Fig. 45. sense that Q would drift away upon any infinitesimal pertur-
bation, such as electrical noise. In other words, such unstable
6.5 Enigma 5: DC V–I curves of non‑volatile points on the DC V–I curve of 𝒟 may not be measurable, but
memristors are fakes may be calculated numerically from the equilibrium equa-
tions describing 𝒟 , obtained by assuming (dxi/dt) = 0, for all
The DC V–I curve of a 2-terminal electronic device 𝒟 is internal state variables x1, x2, …, xn [12, 13].
defined in circuit theory as the set of all points (I, V) that Although a point (VQ, IQ) on a DC V–I curve may not be
can be measured, or calculated, from a mathematical circuit measurable in practice, by definition, it must remain station-
model of 𝒟 , where I and V denote a constant DC (code for ary for all times, i.e., (dIQ/dt) = 0, (dVQ/dt) = 0. The historical
Direct Current) current and voltage that remain stationary reason for requiring (VQ, IQ) on a DC V–I curve to be sta-
for all times. A point Q (IQ, VQ) is a point on the DC V–I tionary is to justify technically the powerful circuit analysis
curve of 𝒟 if upon connecting a battery with terminal volt- tool of yore, dubbed the small-signal equivalent circuit22
age VQ volts across the device 𝒟 , a corresponding constant derived by deleting the higher-order terms of the Taylor
13
series expansion of the nonlinear equations describing 𝒟 ,

about a point Q on the DC V–I curve. It is crucial that all The Corsage memristor V-I Plot
points belonging to the DC V–I curve of a 2-terminal device
must be stationary at all times. Otherwise, results calculated
using classical circuit analysis concepts would yield incor-
rect results and predictions.
In theory, the DC V–I curve of 𝒟 is obtained by connect-
ing a battery with voltages V1, V2, …, VQ across 𝒟 and then
measure the corresponding DC current I1, I2, …, IQ, after
the transient component had decayed to zero. In practice,
instead of the above time-consuming procedure, one would
often replace the battery by a periodic voltage signal gen-
erator vs(t) at a sufficient low frequency f, and measure the
corresponding steady-state current response is(t), after the
transient component had settled to zero. The resulting loci
of (is(t), vs(t)) in the I vs. V plane are then called the DC
Fig. 46 The DC V–I plot of the Corsage memristor defined in Fig. 15
V–I curve of 𝒟 . For example, the V–I curve of the volatile
potassium ion-channel memristor calculated at f = 1 Hz in
Fig. 9 would tend to stationary loci for f ≪1 Hz. Such a
curve is a valid DC V–I curve. Similarly, the volatile sodium v(t) = 0. Indeed, the DC V–I curve of all non-volatile mem-
ion-channel memristor in Fig. 10 would tend to a stationary ristors consists of only one point (V, I) = (0, 0). Such a
DC V–I curve for f ≪ Hz. This is a valid DC V–I curve in strange circuit element is called a nullator in circuit theory
the sense that an oscillator can be designed by applying the [22]. To avoid exacerbating the confusion between the genu-
Hopf Bifurcation theorem [15] via a Taylor series expan- ine DC V–I curve for volatile memristors and the techni-
sion about a point Q located on the part of the DC V–I curve cally incorrect moniker for non-volatile memristors, we will,
with a negative slope. Indeed, all volatile memristors have a henceforth, dub all pinched hysteresis loops of non-volatile
DC V–I curve by virtue of the fact that for each DC voltage memristors as quasi DC V–I plots, because hysteresis loops
(resp., current) source applied across a volatile memristor, a are not curves, but loci of points.
corresponding stationary current can be measured, or calcu- We end this section with the genuine DC V–I plot of the
lated, because its dynamic routes in the DRM intersect the volatile Chua Corsage memristor (defined in Fig. 15) in
x-axis at one or more discrete equilibrium points, such as Fig. 46. This memristor is volatile, because it can be built
those illustrated in the DRM of the Chua Corsage memris- only with an internal power supply.
tor in Fig. 16. The DC V–I plot in Fig. 46 has three distinct points for
Now, recall that the POP of all non-volatile memristors − 10 < v < 10, because the dynamic routes in the DRM in
lies on the x-axis where (dx/dt) = 0. This impenetrable bar- Fig. 16 would intersect the x-axis at only one point (cor-
rier prevents any dynamic route located in the upper half responding to equilibrium point Q2 where v = 0) for v ≥ 10,
plane (resp., lower half plane) where v > 0 (resp., v < 0) from and v < − 10. This DC V–I plot actually consists of a sin-
crossing the x-axis. It follows from the no backtracking rule gle contiguous string. In fact, it has an exact formula [10]
in Fig. 28 that the dynamical evolution from any initial state defined by two parametric equations I = ̂i(X) , and V = v̂ (X) .
x0 can never tend to a DC steady state in finite time. Hence, Observe that the red DC V–I plot in Fig. 46 looks like a cor-
non-volatile memristors do not have DC V–I curves. It fol- sage ribbon upon rotating it about an imaginary horizontal
lows that the loci of points measured by applying a periodic line drawn across the center of the picture frame.
voltage across a non-volatile memristor are not a DC V–I
curve.
Unfortunately, the pinched hysteresis loops of many non- 7 Concluding remarks
volatile memristors in the i vs. v planes (or equivalently, the
gull-wing hysteresis loci plotted in the log |v| vs. i planes, We close this paper with a sampled list of illustrative exam-
such as Example 1 in Fig. 4), are often incorrectly called DC ples of commonly observed but unexplained memristor
V–I curves in the literature. This sloppy choice of names is phenomena reported in the literature, and from recent yet
not a trivial semantic issue, but rather a fundamental con- unpublished results from various memristor research lab-
ceptual mistake, because such incorrectly labeled DC V–I oratories, which confirm that though made from different
curve will never tend to a limiting curve in finite time, unless materials, with different geometry and structures, they all
13
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L. Chua
Page 28 of 43
Where Can I Buy a Memristor ?
Ceramic DIP package containing 8

discrete memristors Pinched Hysteresis Loops
The above product can be ordered from:
http://knowm.org
Fig. 47 Self-directed channel ion-conducting memristors using a GeSeSn–W material, commercially available from Knowm, Inc. (left) a pack-
age of eight memristors and (right) hysteresis V–I curves of the GeSeSn–W memristor from Knowm as a function of frequency
fall under the five enigmas that have now been rigorously Scope waveforms from A KNOWM Memristor : By Kris Campbell
Set Switch from low to high Conductance
resolved in the preceding sections. The key to resolving the
five enigmas is the no backtracking rule depicted in Fig. 28,
which, in turn, is derived from two fundamental concepts,
dubbed the POP (power-off plot) and the DRM (dynamic
route map). It is crucial to understand that these two key
concepts involve only the memristor state variable x and its
rate dx
dt
, and not the memristor voltage, or current.
In the proofs given in Sect. 6, we assume, without loss
of generality, that the memristor traffic moves from West
to East (resp. East to West) for memristor states residing
in the upper hemisphere (resp. lower hemisphere). We also
assume, without loss of generality, that the state-depend- Fig. 48 Current measured through the GeSeSn–W Knowm memris-
tor during application of a train of consecutive “write” programming
ent memductance function G(x, v) is a strictly monotone- voltage pulses. This demonstrates the ability of the Knowm memris-
increasing function of x, for fixed voltage v. Corresponding tor to be programmed to a continuum of conductances from a low
“no backtracking rules” for converse situations can be trivi- conductance to a high conductance
ally derived, mutatis mutandis.
7.1.1 Knowm memristor
7.1 Illustrations of Enigma 1: non‑volatile
memristors are electronic synapses Figure 47 shows the world’s first commercially available
memristor in a DIP package containing 8 discrete memris-
Electronic synapses must be endowed with a continuum tors1. It is an ion-conducting device based on a self-directed
of memory states that can be tuned continuously during channel formation mechanism. The active material layer
learning [23]. We now exhibit some real-world non-volatile
memristors.
1
The Knowm memristor is currently the only commercially avail-
able memristor that is ideal for students and researchers that wish to
develop hands-on experience with real-world memristors. It can be
ordered from : https://knowm.org/.
13
Scope waveforms from A KNOWM Memristor : By Kris Campbell an irreversible chemical reaction in the active layer which
Reset Switch from high to low Conductance permanently creates the “self-directed” channels through
which Ag ion move into and out of during all subsequent
operations.
The device stack structure is (from bottom to top): W-bot-
tom electrode/Ge 2Se3 + W/Sn/(Ag-source layers)/W-top
electrode. The layer marked as “Ag-source layer” is a set
of layers included just for ease of processing. The impor-
tant point is that it is a layer that provides Ag ions during
operation.
The devices that Knowm sells are fairly large, since they
were fabricated in Prof. Campbell’s lab at 1 µm in diameter,
Fig. 49 Current measured through the GeSeSn–W Knowm mem- up to 3 µm in diameter. However, on a non-production basis,
ristor during application of a train of consecutive “Erase” program- Prof. Campbell has made devices smaller than 130 nm, and
ming voltage pulses. This experiment demonstrates the ability of the
Knowm memristor to be programmed to a continuum of analog mem- do not see any degradation. She anticipates that it could go
ories from a high conductance to a low conductance smaller than 20 nm.
To demonstrate the continuum (analog) memory nature of
the Knowm memristor, Fig. 48 shows the current resulting
is a G
e2Se3–Sn–W material which uses Ag ion motion from an application of a train of identical narrow positive
into and out of the conductive channel that is permanently voltage pulses. Note that unlike an ordinary resistor where
formed during the first operation. The device was designed the steady-state current response to each successive iden-
by Professor Kris Campbell from Boise State University, tical input voltage pulse would also be identical, observe
such that the first programming voltage application causes that the Knowm memristor current response increases
Current vs. Number of pulses in a Ta/HfO2 Memristor

Pulse width: 1 μs
0.7 V
Pulse width: 1 μs
-1.1 V
Source : Professor Qiangfei Xia’s Lab, 2018

Fig. 50 Experimentally measured current, and hence the conduct- right column. Conversely, the magnitude of the measure current in
ance, of the Ta/HfO2 memristor, on the upper left column increases the lower left column decreases monotonically with the number of
monotonically with the number of applied positive voltage pulses, as applied negative voltage pulses, as predicted theoretically from the
predicted theoretically from the hypothetical memristor on the upper hypothetical memristor on the lower right column
13
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L. Chua
Page 30 of 43
Ta/HfO2 Device for 64 Stable States
C. Li, M. Hu, Y. Li, H. Jiang, N. Ge, E. Montgomery, J. Zhang, W. Song, N. Davila, C.E. Graves, Z. Li, J.P. Strachan, P. Lin, Z.
Wang, M. Barnell, Q. Wu, R.S. Williams, J.J. Yang, Q. Xia, “Analogue signal and image processing with large memristor
crossbars”, Nature Electronics 1, 52-59 (2018). DOI: 10.1038/s41928-017-0002-z. (Fig. 1e and 1g of this article)
Fig. 51 Experimentally measured loci showing 64 nearly straight signal conductance value defined by the memristor’s state-dependent
lines through the origin of the V–I plane (left column) of the Ta/HfO2 Ohm’s Law [17, 24]. The memductance G(x, V) corresponding to the
memristor with 64 distinct slopes, each corresponding to a small- 64 memductances is plotted on the right column
Fig. 52 Sequence of gull-wing IEEE Tran. Electron Devices, 58 (2011) pp. 2729-2737 doi: 10.1109/TED.2011.2147791
loci in the log|I| vs. V of the
TiN/HfOx/AlOx/Pt memristor
An electronic synapse device based on metal oxide resistive switching
measured from a programmed memory for neuromorphic computation
sequence of periodic unipolar Shimeng Yu, Yi Wu, Rakesh Jeyasingh, Duygu Kuzum, and H-S Philip Wong
voltage pulses
Multiple Low Resistance
State
Multiple High Resistance

State
Voltage (V)
A continuum of resistances from 10 kΩ to several hundred kΩ measured
from a TiN / HFOx / AlOx / Pt memristor via programmed Pulse sequences
monotonically! This means that the memristance decreases to decrease monotonically with time, as in the hypothetical
after each voltage pulse, as in the hypothetical example example which we encountered earlier in Fig. 38.
presented earlier in Fig. 37. By decreasing the width of
the voltage pulses, we can, in principle, tune the Knowm 7.1.2 Ta/HfO2 memristor
memristor to attain any desired conductance Ga < G < Gb by
simply applying a sequence of voltage pulses of appropriate Figure 50 shows measurements (left column) similar to those
pulse height, and pulse width, over the operating range of described in the preceding section, but using an entirely
the memristor. different material (Ta/HfO2) and a much smaller structure
Conversely, Fig. 49 shows the reverse operation where (some down to 2 nm) that were conducted very recently
application of a sequence of identical negative voltage pulses at Professor Qiangfei Xia’s laboratory at the University of
causes the current amplitude in the same Knowm memristor Massachusetts. On the right column is shown corresponding
13
Fig. 53 Potentiation–depres-
sion curve measured from an
Ag/Si memristor by applying
a sequence of 100 identical
positive (3.2 V, 300 µs) voltage
pulses, followed by 100 identi-
cal negative (− 2.8, 300 µs) volt-
age pulses, across the memristor
results predicted in Figs. 37 and 38 for a hypothetical mem- 7.2 Illustrations of Enigma 2: potentiation–
ristor using only the “No Backtracking Rule” enshrined in depression vs. pulse number relationship
Fig. 28. We cannot over emphasize that no materials, or is a universal attribute independent
structures, are used to make the predictions shown in the of memristor material or structure
right column. Yet, a cursory comparison of the left and right
columns of Fig. 50 shows that the corresponding results are It follows from the “No Backtracking Rule” derived in
qualitatively identical. Sect. 5, and immortalized in Fig. 28, that one can increase
We emphasize that the monotonic conductance vs. pulse (resp. decrease) the small-signal conductance of any non-
number relationship exhibited by both the Knowm mem- volatile memristor by merely applying a train of positive
ristor, and the Ta/HfO2 memristor, implies that both mem- (resp. negative) voltage pulses, of fixed, or varying, pulse
ristors are endowed with a continuum (analog) memory in width and/or pulse height.
their respective memductances G(x, V). We demonstrate this One favorite conductance tuning protocol is to apply a
important Corollary in Fig. 51, by displaying 64 experimen- short sequence of identical narrow positive voltage pulses,
tally measured stable currents I1, I2, ... I64, and their corre- and followed immediately by a short sequence of identical
sponding conductances G1(x1, V), G2(x2, V), …, G64(x64,V), narrow negative voltage pulses. The resulting loci of the con-
for some fixed voltage V. ductance vs. pulse number widely seen in the literature are
Yet, another manifestation of the continuum memory all similar in shape, and referred to as a potentiation–depres-
property exhibited by all non-volatile memristors is dis- sion curve [26]. It has remained an enigma on why the same
played in a family of seven gull-wing hysteresis loci (for potentiation–depression curve, modulo a smooth stretching
V ≥ 0) in Fig. 52, corresponding to seven non-negative and/or compressing operation, emerges in countless measure-
periodic voltage signals applied across a TiN/HfOx/AlOx/ ments on totally unrelated memristor devices having different
Pt memristor, and seven corresponding gull-wing hysteresis internal structures and material compositions.
loci (for V ≤ 0) [25]. The above enigma has now been demystified and clarified
We remark that the conductance continuum property in Figs. 37 and 38 thanks to the “No Backtracking Rule”.
exhibited by the two non-volatile memristors in Sect. 7.1.1 We now present four examples of potentiation–depression
and 7.1.2 is a direct consequence of the “Two is infinite” curves in Figs. 53, 54, 55, and 56, respectively.
theorem presented and proved in Sect. 4. It is a universal
property exhibited by all non-volatile memristors. Indeed, 7.3 Illustrations of Enigma 3: how to trade pulse
it is the key concept of Enigma 1. height with pulse width?
Any non-volatile memristor can be tuned to switch from a

conductance G1 to another conductance G2 over the mem-
ristor’s conductance range by applying one or more pulses
of appropriate pulse amplitude A and pulse width w, as
explained in Sect. 6.3. In particular, one can speed up the
13
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Page 32 of 43
IEEE Tran. Electron Devices, 36 (2015) pp. 772-774 doi: 10.1109/LED.2015.2448756

An electronic synapse device based on solid electrolyte resistive random access memory
W. Zhang, Y. Hu, T. C. Chang, K. C. Chang, T. M. Tsai, H. L. Chen, Y. T. Su, T. J. Chu, M. C. Chen,
H.C. Huang, W. C. Su, J. C. Zheng, Y. C. Hung, and S. M. Sze
P
D
Sawtooth-like Potentiation-Depression conductance vs. pulse number of Pt / GeSO / TiN memristor
Fig. 54 Potentiation–depression curve measured from a Pt/GeSO/TiN memristor
Fig. 55 Potentiation–depression Multilevel non-volatile resistive switching behavior and reliable potentiation/ depression
curve measured from a 2 nm Ta/
HfO2 memristor
P
D
Pulse Number
H. Jiang, L. Han, P. Lin, Z. Wang, M.H. Jang, Q. Wu, M. Barnell, J.J. Yang, H.L. Xin, Q. Xia, “Sub-10 nm Ta Channel Responsible
for Superior Performance of a HfO2 Memristor”, Scientific reports, 6, 28525-1-28525-8, (2016).
DOI: 10.1038/srep28525. (Fig. 2c of this article)
switching operation (i.e., decreasing w) by increasing the nonlinear transit dynamics is illustrated with four different
pulse height A. Conversely, decreasing the pulse height A memristors in Fig. 57, Fig. 58, Fig. 59, and Fig. 60.
would result in slower switching. Once again, the trade-off The phenomenon displayed in Fig. 59b is mysterious and
law between the pulse amplitude A and the pulse width w, cannot be explained from the physical properties of the tung-
as stipulated in Fig. 42, is a direct consequence of the “No sten oxide where the device is made from.
backtracking Rule” decreed in Fig. 28, and the assumption On the contrary, we can apply the “No Backtracking
that the voltage-parametrized curves in the DRM follows the Rule” to predict the near-periodic “sawtooth-like” poten-
typical dynamic route map shown in Fig. 27, where the more tiation-depression waveform shown in Fig. 59a when both
positive the value of the voltage parameter v, the higher is positive and negative voltage pulses have identical ampli-
the dynamic route in the dx dt
vs. x-phase plane, and hence, the tudes (1.4 V). We can also predict its transition to a not
faster it takes the state x to move a given distance from left periodic waveform where the local maxima and minima of
to right in the upper half plane. A similar transit mechanism each potentiation–depression component of the sawtooth-
applies to the case of negative values of voltage v. The above like “I vs. Pulse number” waveform in Fig. 59a increases
13
NANO FUTURES, 1 (2017) pp. 015003 (8 pages) doi: 10.1088/2399-1984/aa678b

Tolerance of intrinsic device variation in fuzzy restricted Boltzmann machine network
based on Memristive nano-synapses
Teng Zhang, Minghui Yin, Xiayan Lu, Yimao Cai, Yuchao Yang, and Ru Huang
Resistance switching characteristics of Pt / TaOx / Ta memristors and an experimentally verified

memristor model
Fig. 56 Potentiation–depression curve measured from a Pt/TaOx/Ta memristor
Fig. 57 Experimental illustration showing how to tune the conduct- voltage pulse is much skinnier. In contrast, the percentage change in
ance of an Ag/Si memristor by varying the pulse width w, while magnitude of the conductance due to the negative voltage pulse at
keeping the pulse amplitude fixed, for both positive and negative t = 6 ms is almost equal to that of the preceding positive voltage pulse
voltage pulses. Observe that, for voltage pulse of both polarity, the at t = 5 ms, because the pulse width of the negative voltage pulse is
percentage change in the small-signal conductance increases with slightly larger than that of the taller positive voltage pulse, and also
the pulse width. For example, the percentage increase (compared to from the nonlinear nature of the dynamic route at V = 3.5 V, and at
the previous measurement) in conductance from the applied voltage − 3 V, respectively, which is not given in [26]
pulse # 1 is much larger than that of pulse # 2, because the second
monotonically when the amplitude of the negative voltage function G(x). Under this assumption, the current I must
pulse was reduced to 1.2 V. It follows from the near-perio- increase as a function of the number of positive voltage
dicity of the current waveform in Fig. 59a that the tungsten- pulses, as depicted in the ascending black dots. Conversely,
oxide memristor must have an almost symmetric DRM (not the current I must decrease as a function of the number of
given) and a strictly monotone-increasing memductance negative voltage pulses, as depicted by the descending red
13
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Page 34 of 43
Nanotechnology 22 (2011) 254023 (5pp) doi:10.1088/0957-4484/22/25/254023

Analog memory and spike-timing-dependent plasticity characteristics of a nanoscale
titanium oxide bilayer resistive switching device
Kyungah Seo, Insung Kim, Seungjae Jung, Minseok Jo, Sangsu Park, Jubong Park, Jungho Shin,
Kuyyadi P Biju, Jaemin Kong, Kwanghee Lee, Byounghun Lee and Hyunsang Hwang
P
D
Pulse Number
Fig. 58 Potentiation–depression curve measured from a titanium height but varying width (right). Note that the percentage change in
oxide memristor (left) and percentage change in small-signal con- conductance in this memristor is proportional to the width of the volt-
ductance due to a programmed sequence of mixed positive and nega- age pulses of either polarity
tive voltage pulses (expressed in electric field intensity) of fixed
Appl Phys A, 102 (2011) pp. 857-863 doi: 10.1007/s00339-011-6296-1

Synaptic behaviors and modelling of a metal oxide Memristive device
Ting Chang, Sung-Hyun Jo, kuk-Hwan Kim, Patrick Sheridan, Siddharth Gaba and Wei Lu
P P
D
D
Pulse Number Pulse Number

Pulse response of Tungsten-oxide memristor
(a) P: 1.4 V / 400 µs, D: -1.4 V / 400 V µs (b) P: 1.4 V/400 µs, D: -1.2 V / 400 V µs
Fig. 59 Five consecutive potentiation–depression curves measured symmetric DRM. On the right, the memristor is driven by the same
from a tungsten-oxide memristor driven by five identical voltage sig- input voltage signal, except that the pulse amplitude of the five corre-
nals, each composed of a 1.4 V, 400 µs pulse followed by a − 1.4 V, sponding negative voltage pulses is only 1.2 V. In this case, the peak
400 µs pulse (left). Note that the five corresponding current response of the current response increases monotonically with time (right)
components are virtually identical, implying that the memristor has a
dots, mirroring its positive twin. It follows that the wave- is invoked twice, in opposite directions; namely, the state
form of the I vs. pulse number shown in Fig. 59a must be x(t) must move to the right (no backtracking to the left) in
nearly periodic. Observe that the “No Backtracking Rule” the upper half plane of the memristor’s DRM where v > 0.
13
Nature materials, 11 (2012) pp. 860-864 doi: 10.1038/NMAT3415

A ferroelectric memristor
A. Chanthbouala, V. Garcia, R. O. Cherifi, K . Bouzehouane, S. Fusil, X. Moya, S. Xavier, H. Yamada, C. Deranlot,
N.D. Mathur, M. Bibes, A. Barthelemy, and J. Grollier
(a) Red: Potentiation (c)
Blue: Depression
R(Ω)
R(Ω)
Pulse number Pulse number
(b) (d)
Vwrite(V)
Vwrite(V)
Pulse number Pulse number
Saw-tooth like resistance vs. pulse number measured from a Ferroelectric tunnel junction memristor
for 2 different combinations of pulse widths.
Fig. 60 Sequence of potentiation–depression curve of a ferroelectric tive voltage pulses A = − 2.5 V, w = 10 ns; c, d positive voltage pulses
tunnel junction memristor driven by sequence of mixed-polarity volt- A = 3 V, w = 10 ns; negative voltage pulses A = − 3 V, w = 10 ns
age pulses. a, b Positive voltage pulses A = 2.9 V, w = 10 ns; nega-
Conversely, it must move to the left (no backtracking to the A sequence of blue depression waveform units exhibiting a
right) in the lower half plane of the memristor’s DRM where monotonically decreasing minima in the memristor’s small-
v < 0. signal resistance, in response to a train of negative pulses
In the case where the amplitude (1.2 V) of the negative with varying pulse widths, is shown in Fig. 60a, b on the left.
voltage pulses is less than that of the positive voltage pulses A dual demonstration of red potentiation units exhibiting a
(1.4 V), our powerful “No Backtracking Rule” would predict monotonically increasing maxima in the memristor’s small-
that the first corresponding red depression current response signal resistance, in response to a train of bipolar voltage
segment will terminate slightly higher in Fig. 59b, so that pulses with varying pulse widths among the positive pulses,
its twin black segment will begin from a slightly larger ini- is shown in Fig. 60c, b.
tial state than that of the corresponding minima of the red
segment in Fig. 59a. Since the amplitude of each positive 7.4 Illustrations of Enigma 4: how does
voltage pulse is 1.4 V, identical to that in Fig. 59a, the next a pinched hysteresis loop metamorphose
black segment in Fig. 59b will be, approximately, a vertical into a multi‑prong finger‑like hysteresis loop?
translation of the first black potentiation segment in Fig. 59a,
resulting in a slightly higher peak than that of Fig. 59a. This It is well known that any voltage-controlled (resp., current-
same scenario will repeat itself once every period of the controlled) memristor (volatile or non-volatile) must exhibit
sawtooth-like potentiation–depression curve depicted in a pinched hysteresis loop fingerprint [9, 10] in the v–i plane,
Fig. 59a. when driven by a periodic sine-wave-like voltage source
The preceding scenario of the evolution of potentiation- (resp., current source). The most well-known example of
depression units in response to a bipolar pulse train com- a pinched hysteresis loop is the rotated number 8 loci of a
posed of different combinations of voltage pulse widths is titanium dioxide memristor, depicted in Fig. 2b of the semi-
rather typical, because they must all obey the “No Back- nal hp paper published in Nature, 2008 [8], when it is driven
tracking Rule”. by a sinusoidal voltage source. However, when the input
Our next example in Fig. 60 is a case in point. Here, the signal is more complicated, such as that shown in Fig. 2c
memristor is made of ferroelectric materials, instead of the of [8], the corresponding loci in the v–i plane (reproduced
traditional metal oxides. Figure 60 shows a reproduction in Fig. 61) became much more complicated, though still
(reference cited on top of figure) of a sequence of sawtooth- periodic. It consists of one contiguous closed curve with
like potentiation–depression units with varying maxima and multiple finger-like sub-loops—henceforth referred to as a
minima, in response to several combinations of pulse widths. multi-prong finger-like pinched hysteresis loop. Where does
13
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Page 36 of 43
Nature LETTERS 253 (2008) pp. 80-83 doi: 10.1038/nature06932

The missing memristor found
Dmitri B. Strukov, Gregory S. Snider, Duncan R. Stewart & R. Stanley Williams
6-Prong Finger-like pinched hysteresis loop from the HP TiO2 Memristor
1.0
0.5
Voltage
Charge
0 1 2 3 4 5 6
-0.5
-1.0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 Flux
Time (× 103) Finger-like
8 Multi-prong
Current (× 10 -3)
4 pinched
hysteresis loop
0 1 2 3 4 5 6
-4
-8
0.0 0.1 0.2 0.3 0.4 0.5 0.6
Time (× 103)
Fig. 61 A 6-prong finger-like pinched hysteresis loop (right) derived current response (lower left). The inset in the upper left corner is the
from driving an HP TiO2 memristor with a periodic three-hump volt- charge vs. flux constitutive relation of the memristor
age waveform (upper left) and measuring its corresponding periodic
Synaptic behaviors and modeling of a metal oxide memristive device

V(V)
I(µA)
I(µA)
(a) (b) V(V)

I(µA)
V(V)
I(µA)
(d)
(c) V(V)
Fig. 62 Two-lobe-pinched hysteresis loop (upper right) measured gle voltage signal (lower left), we get a ten-prong finger-like pinched
by driving a metal-oxide memristor with a periodic triangle voltage hysteresis loop (lower right)
waveform (upper left). When driven with a periodic four-hump trian-
the sub-loops come from? The answer is hidden in the green waveform in the first half period has three local maximum
current waveform shown in the lower left figure. Observe points whose height increases with respect to the time t.
that the current waveform returns to zero at the same time However, what is the mechanism responsible for this
instants as the periodic voltage. Observe also the current monotone-increasing local extremum points ? The answer
is hidden in the omnipresent “No Backtracking Rule”
13
NANO LETTERS 10 (2010) pp. 1297-1301 doi:10.1021/nl904092h

Nanoscale Memristor Device as Synapse in Neuromorphic Systems
Sung Hyun Jo, Ting Chang, Idongesit Ebong, Bhavitavya B. Bhadviya, Pinaki Mazumder, and Wei Lu
Ag / Si Memristor
Fig. 63 Ten-prong finger-like pinched hysteresis loop (left) measured from a Ag/Si memristor by driving it with an unsymmetrical five-hump
voltage signal (right)
Multi-prong “finger-like” pinched hysteresis loops

10 μs triangular wave
Multi-prong loop
0.7 V
0.0
Voltage (V)
-0.5
-1.0
-1.2
0.0
-1.1 V
Current (mA)
-0.4
-0.8
-1.2
0 10 20 30 40 50 60 70
Time (µs)
Fig. 64 Five-prong finger-like unipolar pinched hysteresis loop meas- five positively clipped triangular voltage signals with a 10 µs base.
ured by driving a sub-10 nm Ta/HfO2 Memristor with five clipped The lower input consists of five negatively clipped triangular voltage
10 µs unipolar triangular voltage signal. The upper input consists of signal with a 10 µs base
engraved in Fig. 28. To uncover the hidden mechanism, This implies that the conductance G(x(t)) must increase
observe that during the positive half period, the dynamic monotonically with time. Applying the same argument to
routes are restricted the upper half plane of the DRM where the lower half plane where dx
dt
< 0, it follows that the negative
dx
dt
> 0. It follows that x(t) must always increase with time. extreme points must decrease with time.
13
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Page 38 of 43
Exactly, the same mechanism led to the multi-prong frequency is zero, the voltage source tends to a DC battery,
finger-like pinched hysteresis loops shown in Figs 61, 62, but the current must continue to vary, because its associate
63, and 64. state variable x(t) can never tend to a constant equilibrium
state, by virtue of the no memristor DC V–I curve theorem.
7.5 Illustrations of Enigma 5: why non‑volatile Such erroneous memristor V–I curves should, henceforth,
memristors cannot have DC V–I curves ? be dubbed quasi DC V–I curves.
A glimpse of the “No Backtracking Rule” in Fig. 28 reveals 7.5.1 Periodic input may give non‑periodic multi‑prong
that whenever we connect a DC battery with a positive volt- finger‑like pinched hysteresis loci
age V(DC) > 0 (resp., a negative voltage V(DC) < 0) across any
non-volatile memristor, the state variable x of that memris- A closer examination of the multi-prong finger-like pinched
tor starting from an initial state x(0) located in the upper hysteresis loci in Figs. 61, 62, 63, and 64 reveals that, while
half plane (resp., lower half plane) must move from x(0) the pinched loci in Figs. 61 and 62 are periodic in the sense
towards the right (resp., towards the left) along a dynamic that tracing the loci from any initial point would return to the
route located in the upper half plane (resp., lower half plane) original point, thereby forming a closed loop; this is not true
of the memristor’s DRM that is identified with the DC volt- in the multi-prong finger-like loci in Figs. 63 and 64, if we
age v = V(DC). Since no dynamic route can intersect the hori- consider the five-hump voltage signal on the left of Fig. 63
zontal x-axis over the range of x where the device operates as as one period of a periodic input voltage generated by copy-
a non-volatile memristor, such a trajectory must continue to ing the signal on the left after each period. In this case, the
move to the right (resp., to the left) until it reaches the state corresponding current will be seen to be not periodic in the
boundary where the device ceases to function as a memris- sense that the number of fingers keeps increasing, while the
tor. In case of an ideal memristor where the state space is thickness of the new finger keeps decreasing.
boundless, i.e., − ∞ < x < + ∞, the state variable x(t) must A related non-periodic phenomenon is observed in
keep on moving towards + ∞ (resp., − ∞). In other words, Fig. 64 where the number of fingers keeps increasing, while
the trajectory starting from any initial state x(0) of a non- being squeezed periodically into skinnier fingers. Here,
volatile memristor will never stop moving, let alone back- the applied voltage is also periodic, while the correspond-
tracking, as depicted earlier in Fig. 27. In the parlance of ing current is not. The non-periodic nature of the current
electronic circuit engineers, this perpetual memristor motion response in the left of Fig. 64 can be recognized by observ-
implies that non-volatile memristors driven by a DC battery ing the peak of each current pulse in the upper left part of
will never settle to a DC steady state. Let us summarize the Fig. 64 which increases slightly after each clipped triangular
above fundamental steady-state dynamics of non-volatile voltage pulse elapses at the end of each period.
memristors as follows: To prove rigorously that the current waveform shown in
the upper left part of Fig. 64 will never become periodic,
it would be necessary to apply the mathematical theory of
nonlinear dynamics [15, 27] to the state equation of the Ta/
HfO memristor device from Prof. Xia’s lab which was used
to obtain the current waveform shown in Fig. 64. Since no
state equation has yet been derived for this sub-10-nm mem-
It follows from the above theorem that the memristor “DC ristor device, we will use the state equation of the HP tan-
V–I curves” often alluded to in electronic device literatures talum-oxide memristor given in the left column of Fig. 25,
are erroneous. Such misconception can be traced back to the along with its DRM, shown in the right column. Applying
common measuring techniques of yore for measuring the the periodic voltage signal v(t) shown in the upper right of
DC V–I curve of electronic devices by applying a periodic Fig. 65 across this memristor, we obtain (by numerical inte-
voltage source v(t), such as a sine wave, or a triangular wave, gration) the corresponding state variable solution x(t) (with
of sufficiently low frequency and measuring the correspond- initial state x(0) = 0.10), and current i(t), as shown in the
ing current response i(t). The loci traced out by (v(t), i(t)) in right column of Fig. 65. Observe that, just like Fig. 64, the
the v–i plane is then called the device’s DC V–I curve. The current i(t) consists of a continuously alternating waveform
above DC V–I curve measuring scheme is valid only if, and with very slowly increasing peaks, and is, therefore, not
only if, the resulting measured loci in the v–i plane converge periodic, even though the memristor is driven by a periodic
to a unique curve as the frequency tends to zero. Unfor- input voltage (shown in the upper right column of Fig. 65)
tunately, for non-volatile memristors, the above measuring with an exact equation given in the bottom left column in
scheme is not valid, because, at the crucial limit where the Fig. 65. Note that the waveform of the corresponding state
variable x(t) shown in the middle also rises gingerly. To
13
Fig. 65 Equations specifying the state-dependent Ohm’s law and its form of the periodic voltage source v(t) shown on top of the right
associated state equation are given in the left column, along with the column gives rise to a non-periodic state variable x(t) with the initial
piecewise-linear equation of the periodic voltage source. The wave- state x(0) = 0.10, and a corresponding non-periodic current i(t)
Fig. 66 Enlargement of the state variable x(t) over the range 1.24 < x < 1.3 shows a staircase-like waveform rising towards infinity, just like the
ancient Sumerian Ziggurat of Ur, thereby confirming its non-periodic characteristic
analyze the evolution of x(t), Fig. 66 shows a zoom portion However, how can we claim that i(t) and x(t) will not
of x(t) over 1.24 < x < 1.3, where it reveals a near-stepwise evolve into a periodic waveform after perhaps a very long
nature of x(t). time ? We cannot. The only way to claim that x(t) and i(t)
13
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Page 40 of 43
Fig. 67 Ideal flux-controlled memristor (characterized by q = ϕ + 1/3 routes in the d𝜑∕ dt vs. 𝜑 phase plane consists of a family of uni-
ϕ3) shown on top of the left column is driven by a voltage source formly spaced horizontal lines pointing to the right (resp., left) in the
v = sin t. Its exact solution given in the bottom of the left column upper (resp., lower) half plane, each line parametrized by the memris-
represents the equation of a circle with unit radius, and a center tor voltage. The advantage of this graphical approach is that it can be
located at ϕ = 1. This same solution can be derived by applying the applied to any non-volatile memristors that do not have closed form
“No Backtracking Rule” on the memristor’s DRM, whose dynamic solutions
are not periodic functions of time is to derive a rigorous odd-symmetric DRM and driven by an anti-symmetric sine-
mathematical proof. Indeed, we have derived the corre- wave-like signal, we can painlessly predict an instantly peri-
sponding Poincare map characterizing this strongly nonlin- odic solution x(t), without any transients—thanks again to
ear HP tantalum-oxide memristor and proved that x(t), and the “No backtracking Rule”. For non-symmetric non-volatile
as a consequence, also i(t), does not converge to a periodic memristors driven by a bipolar sine-wave-like signal with
function of time. zero mean, we will show, in Sect. 7.6.2, that we can also
predict the state variable x(t) must converge to a periodic
7.6 Back to no backtracking steady-state waveform after the transient component peters
out.
We have demonstrated, through numerous examples, the
wonders of the “No backtracking Rule”, that must have been 7.6.1 Ideal memristor: transient less periodic response
since imprinted in the reader’s minds.
We close this tutorial with one more illustration of the Consider the ideal (flux-controlled) memristor defined in the
prowess of this golden rule. left column of Fig. 67. The DRM of this memristor consists
While we have focused our attention in the last section to of symmetrically directed horizontal lines, as shown in the
the application of the “No backtracking Rule” on non-vola- upper right column. Note all dynamic routes in the upper
tile memristors driven by DC inputs, namely, batteries, we half plane are directed towards the right, and those below are
end this tutorial by showing how to predict and explain the directed to the left, as predicted by the “No backtracking
steady-state behaviors of non-volatile memristors driven by Rule”. By virtue of the anti-symmetry of the sinusoidal input
bipolar periodic input signals, where the waveform assumes signal, our endearing “No backtracking ( Rule” predicts ) that
both positive and negative values, as in Figs. 61, 62, 63, the trajectory from any initial point x(0) , dx (0) at time
dt
64, and 65. In this case, the periodic change in polarity of
the input signal allows us to overrule the “No backtrack- t = 0 in the dx
dt
vs. xphase plane is a circle passing through the
ing Rule” to switch the direction of traverse, once every initial point, as shown in the bottom right of the DRM in
half period. For non-volatile memristors blessed with an
13
t = 13.15 x** = 0.197351 Vm = 0.4 V

Vm = 0.3975 V x** = 0.197351 Vm = 0.4 V
Vm = 0.3975 V
f = 1 Hz , x(0) = 0.05
v(t) = 0.4 sin (2πft)
1 t = 11.25
Vm = 0.395 V 1 t = 11.25 Vm = 0.395 V
Vm = 0.39 V Vm = 0.39 V
Vm = 0.385 V
POP (Vm = 0) t = 12.5
Vm = 0.385 V
dx -1 t = 12.5
0
Vm = 0.38 V
s 0 Vm = 0.38 V
Vm = -0.32 V
dt Vm = -0.32 V
t = 9.5
dx -1 Vm = -0.33 V
t = 10.5
=0 Vm = -0.33 V Vm = -0.34 V
-1 dt
t = 9.5
dx -1
t = 10.5
Vm = -0.35 V
s -2
Vm = -0.34 V
POP (Vm = 0) Vm = -0.4 V
Vm = -0.36 V
dt t=0 Vm = -0.35 V x* = 0.125797 Vm = -0.37 V
-2 x(0) = 0.05 -3
x* = 0.125797 Vm = -0.36 V 0.07 0.1 0.15 x 0.2 0.23
Vm = -0.4 V 0.5
Vm = -0.37 V
-3
x
0.2 t = 12
0 0.05 0.1 0.15 0.2 0.25 dx t = 11.5
dt
s -1 0
-0.2
POP (Vm = 0) t = 11.75
-0.4
Fig. 68 Plot of the numerically calculated solution of x(t) and dx in 0.12 0.125 x 0.13
dt
the phase plane, of the HP tantalum-oxide memristor (defined in
Fig. 25), with the initial condition x(0) = 0.05, dx
dt
(0) = 0. Note the Fig. 69 Zoom shot of the evolution of the trajectory in a small neigh-
blue trajectory in the upper (resp., lower) half plane always move to borhood of the fixed point x* moments before the trajectory con-
the right (resp., left), as predicted by the “No Backtracking Rule”. verges to x*
Observe that the chain of semi-circular arcs grows bigger in the upper
half plane while expanding upwards with respect to time, and causing
the state x(t) to move faster, thereby traversing an increasingly longer
interval in x(t) over the upper half plane. The above evolution sce- from the initial state x(0) = 0.05 , dx
dt
(0) = 0, is shown in
nario does not occur in the lower half plane, at least over the range Fig. 68. Observe from the geometry of the DRM in Fig. 25
x < 0.12, because the dynamic routes for v < 0 are clung closely to that for voltage amplitude V = 0.4, the dynamic routes in the
each other just a minuscule distance below the POP, where the speed
of movement is much smaller relative to their robust neighbors above upper half plane moves at a much faster speed than those
the POP. The increasing size of the hoping arcs in the blue chain over located in the lower half plane. Assuming that the HP tanta-
0.05 < x < 0.125 can be predicted from the “No backtracking Rule”, lum-oxide memristor has a periodic steady-state response to
and the geometry of the dynamic routes up to x < 0.125. However, for the applied sinusoidal voltage v(t) = 0.4 sin (2πft), the “No
x > 0.1, and v > − 0.4 V, the dynamic routes in the lower half plane
suddenly explodes, literally at a vengeance, and soon overtook their backtracking Rule” would predict qualitatively (not quanti-
northern neighbors. This push–pull effect causes the speed of the tatively) how a typical trajectory would evolve from the ini-
trajectory in the southern half plane to eventually exceed that of its tial point x(0) = 0.05 by hopscotch-like jumps, like a kanga-
northern neighbors, resulting in a see-saw movement of their respec- roo, as depicted in the numerically derived blue trajectory
tive intersections with the POP and a subsequent convergence to a
common point, where the corresponding trajectory became a closed in Fig. 68. The initially near-semi-circular hopscotch arcs
orbit, namely, a periodic solution. Observe that this closed orbit inter- would move the right in the upper half plane, with increasing
sects the POP at 2 points: namely, x = x* = 0.125797 on the left, and speed, and increasing arc radius, thereby consuming more
x = x** = 0.197351 on the right. These two points are called fixed time in the upper half plane. It follows also from the “No
points in the mathematical theory of nonlinear dynamics [15, 27],
because if we pick either point as an initial state, the trajectory will backtracking Rule” that as the radius of the hopscotch arc
return to the same point after one period, i.e., the point x*, or x**, increases, the trajectory could eventually reach a point on
remains fixed in all subsequent evolutions the x-axis where a periodic orbit passes, which is what actu-
ally happened in this example. The detailed evolution sce-
nario near such an equilibrium point is shown in the zoom
Fig. 67, whose exact analytical equation is given in the bot- inset in Fig. 69.
tom left.
7.7 A new unsolved memristor enigma
7.6.2 HP tantalum‑oxide memristor: how to hopscotch
to a periodic orbit? Observe that the periodic voltage waveforms that give rise
to a non-periodic current response in the Ag/Si memristor
Let us apply a sinusoidal voltage v(t) = 0.4 sin (2πft) with in Fig. 63, the Ta/HfO2 memristor in Fig. 64, and the HP
frequency f = 1 Hz across the HP tantalum-oxide memris- tantalum-oxide memristor in Fig. 65 share a common fea-
tor described in Fig. 25. Because the state equation of this ture; namely, they have a non-zero time average. We end this
memristor is not symmetric, a trajectory starting from an tutorial with the following offer from the author2:
initial
( state )
x(0) , dx
dt
(0) outside of any periodic orbit that may exist,
must necessarily come with a transient component. An
example of such a trajectory, calculated numerically, starting 2
The proof must hold for all nth-order extended memristors, n > 1.
13
563
L. Chua
Page 42 of 43
Acknowledgements This work is supported by the USA Air Force 11. A.L. Hodgkin, A.F. Huxley, A quantitative description of mem-
office of Scientific Research under Grant number FA9550-18-1-0016. brane current and its application to conduction and excitation in
The author would like to thank Professor Yuchao Yang from Peking nerve. J. Physiol. 117, 500–544 (1952). https://doi.org/10.1113/
University for providing the DRM in Fig. 23, Professor Wei Lu from jphysiol.1952.sp004764
University of Michigan for the equations describing the memristor in 12. L. Chua, V. Sbitnev, H. Kim, Hodgkin–Huxley axon is made of
Fig. 24, Professor Qiangfei Xia from the University of Massachusetts memristors. Int. J. Bifurc. Chaos. 22, 1230011-1–1230011-48
for the slides in the concluding section measured from his latest Ta/ (2012). https://doi.org/10.1142/S021812741230011X
HfO2 memristor devices, and Professor Kris Campbell from the Boise 13. L. Chua, V. Sbitnev, H. Kim, Neurons are poised near the edge of
State University for many constructive discussions. He also wishes to chaos. Int. J. Bifurc. Chaos. 22, 1250098-1–1250098-49 (2012).
thank Professor Ronald Tetzlaff and Dr. Alon Ascoli from the Technical https://doi.org/10.1142/S0218127412500988
University of Dresden for providing Figs. 25, 35, and 36. Last but not 14. T. Zhang, M. Yin, X. Lu, Y. Cai, Y. Yang, R. Huang, Tolerance
least, he wishes to thank Professor Hyongsuk Kim, Zubaer Mannan, of intrinsic device variation in fuzzy restricted Boltmann machine
and Dr. Vetriveeran Rajamani for drawing most of the colorful figures network based on memristive nano-synapses. Nano Futures. 1,
in this paper. 015003-1-015003-8 (2017). https://doi.org/10.1088/2399-1984/
aa678b
15. L. P. Shilnikov, A. L. Shilnikov, D. V. Turaev, L. O. Chua, Meth-
ods of Qualitative Theory in Nonlinear Dynamics Part-I, (World
References Scientific Series on Nonlinear Science Series A., 1998). https://
doi.org/10.1142/3707. ISBN:978-981-4496-42-1(ebook)
1. T.W. Hickmott, Low frequency negative resistance in thin 16. Z.I. Mannan, H. Choi, V. Rajamani, H. Kim, L. Chua, Chua cor-
oxide films. J. Appl. Phys. 33, 2669–2682 (1962). https://doi. sage memristor: phase portraits, basin of attraction, and coexisting
org/10.1063/1.1702530 pinched hysteresis loops. Int. J. Bifurc. Chaos. 27(1), 173001-
2. J.F. Gibbons, W.E. Beadle, Switching properties of thin NiO 1–1730011-36 (2017). https: //doi.org/10.1142/S0218127417 3001
films. Solid-State Electron. 7, 785–797 (1964). https: //doi. 17).
org/10.1016/0038-1101(64)90131-5 17. L. Chua, Introduction to Nonlinear Theory (McGraw-Hill, New
3. J.G. Simmons, R.R. Verderber, New conduction and reversible York, 1969)
memory phenomena in thin insulating films. Proc. Roy. Soc. A. 18. K.H. Kim, S.H. Jo, S. Gaba, W. Lu, Nanoscale resistive mem-
301, 77–102 (1967). https://doi.org/10.1098/rspa.1967.0191 ory with intrinsic diode characteristics and long endurance.
4. Y.G. Kriger, N.F. Yudanov, I.K. Igumenov, S.B. Vashchenko, Appl. Phys. Letters, 96, 053106-1–053106-3 (2010). https://doi.
Study of test structures of a molecular memory element. J. Struct. org/10.1063/1.3294625
Chem. 34, 966–970 (1993). https://doi.org/10.1007/BF00752875 19. R. Ascoli, L.O. Tetzlaff, J.P. Chua, R.S. Strachan, Williams,
5. A. Beck, J.G. Bednorz, C.H. Gerber, C. Rossel, D. Widmer, History erase effects in a non-volatile memristor. IEEE Trans.
Reproducible switching effect in thin oxide films for memory Circuits Syst. I. 63, 389–400 (2016). https://doi.org/10.1109/
applications. Appl. Phys. Lett. 77, 139–141 (2000). https://doi. TCSI.2016.2525043
org/10.1063/1.126902 20. E.R. Kandel, J.H. Schwartz, T.M. Jessel, S.A. Siegelbaum, A.J.
6. C.J. O’Kelly, H.N.M. Abunahla, M.A. Jaoude, D. Homouz, Sub- Hudspeth, Principle of Neural Science (McGraw-Hill, New York,
threshold continuum conductance change in NbO Pt memristor 2000)
interfaces. J. Phys. Chem. C 120, 18971–18976 (2016). https:// 21. T. Chang, S.H. Jo, K.H. Kim, P. Sheridan, S. Gaba, W. Lu, Synap-
doi.org/10.1021/acs.jpcc.6b05010 tic behaviors and modelling of a metal oxide memristive device.
7. L.O. Chua, Memristor—the missing circuit element. IEEE Trans. Appl. Phys. A. 102, 857–863 (2011). https://doi.org/10.1007/
Circuit Theory. 18, 507–519 (1971). https://doi.org/10.1109/ s00339-011-6296-1
TCT.1971.1083337 22. H.J. Carlin, D.C. Youla, Network synthesis with negative resistors.
8. D.B. Strukov, G.S. Snider, D.R. Stewart, R.S. Williams, The Proc. IRE. 49, 907–920 (1961). https://doi.org/10.1109/JRPRO
missing memristor found. Nature. 453, 80–83 (2008). https://doi. C.1961.287934
org/10.1038/nature06932 23. W. Gerstner, W.M. Kistler, R. Naud, L. Paninski, Neuronal
9. L. Chua, If it’s pinched it’s a memristor. Semicond. Sci. Technol. Dynamics (Cambridge University Press, Cambridge, 2014)
29, 104001-1–104001-42 (2014). https://doi.org/10.1088/0268- 24. L.O. Chua, C.A. Desore, E.S. Kuh, Linear and Nonlinear Circuits
1242/29/10/104001 (McGraw-Hill, New York, 1987)
10. L. Chua, Everything you wish to know about memristors but are 25. S. Yu, Y. Wu, R. Jeyasingh, D. Kuzum, H.S.P. Wong, An elec-
afraid to ask. Radioengineering. 24, 319–368 (2015). https://doi. tronic synapse device based on metal oxide resistive switch-
org/10.13164/re.2015.0319 ing memory for neuromorphic computation. IEEE Trans.
13
Electron Devices 58, 2729–2737 (2011). https://doi.org/10.1109/ 27. L.P. Shilnikov, A.L. Shilnikov, D.V. Turaev, L.O. Chua, Methods
TED.2011.2147791 of Qualitative Theory in Nonlinear Dynamics Part-II, (World
26. S.H. Jo, T. Chang, I. Ebong, B.B. Bhadviya, P. Maxumder, W. Lu, Scientific Series on Nonlinear Science Series A., 2001). https://
Nanoscale memristor as synapse in neuromorphic systems. Nano doi.org/10.1142/4221. ISBN:978-981-4494-29-8(ebook)
Lett. 10, 1297–1301 (2010). https://doi.org/10.1021/nl904092h
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Applied Physics A (2018) 124:563

Five non-volatile memristor enigmas solved

1 Introduction finger-like multi-prong-pinched hysteresis loop response is

The universe of all memristors can be partitioned into four

Fig. 1 a A NbO Pt memristor.

The Memristor Universe Genealogy of Voltage – Controlled Memristors

For the ideal memristor in Fig. 2 the state-dependent

Fig. 4 Example 1 A charge-controlled ideal memristor defined by the constitution 𝜑 = 𝜑̂ (q) = q + 1∕3 q3

Fig. 5 Pinched hysteresis loop in the i vs. v planes looks like the

Fig. 6 Example 2 The hp titanium dioxide memristor is defined by its

Time-varying Sodium Time-varying Potassium

⎡ ⎤ 3 POP and DRM: two new tools to unravel

Observe that the hp memristor is an ideal generic memris-

Phase Plane A Volatile Memristor

Fig. 12 Revealing phase plane

we define in Fig. 12, to underscore its significance. POP

Fig. 15 a Definition of the i

State-Dependent Ohm’s Law

POP (Power-Off Plot)

Fig. 16 DRM of the Chua Corsage memristor

How to Switch ? How to Switch Back ?

Fig. 18 Switching fails when vs i

Fig. 19 Switching fails when i

standard circuit-theoretic concept [17] implying the absence

Since the memristor in Fig. 20 is non-volatile, by assump-

Fig. 21 Sequence of simplified Proof :

much as to backtrack into the opposite direction, because

0 1.0 5.1 Universal switching method: single‑pulse

Current (nA) Voltage (V)

Fig. 25 a Structure and state-

Fig. 26 Definition and illustra-

Definition: Anti–sign Invariant Function f(x , u) u = -4

Fig. 29 Illustration of switch- vs(t) i v w1

How to switch from x0 to x1 ? x0

Fig. 30 Illustration of switch- vs(t) i v t0 t1

Fig. 31 It is possible to switch

Increasing the amplitude A has the same effect

Fig. 32 3 examples of mem-

the period t0 < t < t1 of the input voltage pulse v(t). In the

0.5 ≤ t < 1.5 3.5 ≤ t < 4.5 3

A Periodic Input Voltage May Not Give A Periodic Current Response

A Periodic Input Voltage May Not Give A Periodic Current Response

6 Resolution of all five enigmas 6.1 Enigma 1: all non‑volatile memristors have

Pinched Hysteresis loop of Switching performance of a capacitor-like structure based on Cr-doped

A negative voltage pulse of 2ms switches the system into

Faster switching speeds, i.e., shorter write and erase

experimentally by Gibbons and Beadle [2] in 1964, as shown

Switching Properties of Thin NiO Films

FIG. 1. Schematic representation of basic NiO thin film device.

FIG. 10. Average low impedance resistance vs.

Study of Test Structures of a Molecular Memory Element

Fig. 3. Voltage-current characteristic of a Fig. 4. Dependence of the write pulse

Synaptic Behaviors and Modeling of a Metal Oxide Memristive Device

series expansion of the nonlinear equations describing 𝒟 ,

Where Can I Buy a Memristor ?

Ceramic DIP package containing 8

Current vs. Number of pulses in a Ta/HfO2 Memristor

Source : Professor Qiangfei Xia’s Lab, 2018

Ta/HfO2 Device for 64 Stable States

Source : Professor Qiangfei Xia’s Lab, 2018

Multiple High Resistance

Any non-volatile memristor can be tuned to switch from a

IEEE Tran. Electron Devices, 36 (2015) pp. 772-774 doi: 10.1109/LED.2015.2448756

Sawtooth-like Potentiation-Depression conductance vs. pulse number of Pt / GeSO / TiN memristor

Fig. 1 a A NbO Pt memristor.

Fig. 4 Example 1 A charge-controlled ideal memristor defined by the constitution 𝜑 = 𝜑̂ (q) = q + 1∕3 q3

Fig. 5 Pinched hysteresis loop in the i vs. v planes looks like the

Fig. 6 Example 2 The hp titanium dioxide memristor is defined by its

⎡ ⎤ 3 POP and DRM: two new tools to unravel

Fig. 12 Revealing phase plane

Fig. 15 a Definition of the i

Fig. 16 DRM of the Chua Corsage memristor

Fig. 18 Switching fails when vs i

Fig. 19 Switching fails when i

Fig. 21 Sequence of simplified Proof :

0 1.0 5.1 Universal switching method: single‑pulse

Fig. 25 a Structure and state-

Fig. 26 Definition and illustra-

Fig. 29 Illustration of switch- vs(t) i v w1

Fig. 30 Illustration of switch- vs(t) i v t0 t1

Fig. 31 It is possible to switch

Fig. 32 3 examples of mem-

6 Resolution of all five enigmas 6.1 Enigma 1: all non‑volatile memristors have

Fig. 54 Potentiation–depression curve measured from a Pt/GeSO/TiN memristor

Fig. 56 Potentiation–depression curve measured from a Pt/TaOx/Ta memristor