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TYPICAL APPLICATIO
Cable Driver Frequency Response AV = –1 Large-Signal Response
2
0 VS = ±15V
VS = ±2.5V
VS = ±5V
–2
GAIN (dB)
VS = ±10V
IN
–4 + OUT
1/2 75Ω
LT1364
– 75Ω
510Ω
–6
510Ω
–8
1 10 100
FREQUENCY (MHz) 1364/1365 TA02
1364/1365 TA01
1
LT1364/LT1365
W W W U
ABSOLUTE MAXIMUM RATINGS (Note 1)
Total Supply Voltage (V + to V –) ............................... 36V Operating Temperature Range (Note 8) ...–40°C to 85°C
Differential Input Voltage Specified Temperature Range (Note 9) ....–40°C to 85°C
(Transient Only, Note 2) .................................... ±10V Maximum Junction Temperature (See Below)
Input Voltage ............................................................ ±VS Plastic Package ................................................ 150°C
Output Short-Circuit Duration (Note 3) ............ Indefinite Storage Temperature Range ..................–65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
U W U
PACKAGE/ORDER INFORMATION
TOP VIEW TOP VIEW
ORDER PART ORDER PART
OUT A 1 8 V+ NUMBER OUT A 1 8 V+ NUMBER
–IN A 2 7 OUT B –IN A 2 7 OUT B
+IN A 3
A
6 –IN B
LT1364CN8 +IN A 3
A
6 –IN B
LT1364CS8
B B
V– 4 5 +IN B V– 4 5 +IN B
S8 PART MARKING
N8 PACKAGE S8 PACKAGE
8-LEAD PDIP 8-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 130°C/ W TJMAX = 150°C, θJA = 190°C/ W 1364
TOP VIEW ORDER PART TOP VIEW ORDER PART
OUT A 1 14 OUT D NUMBER OUT A 1 16 OUT D NUMBER
–IN A 2 13 –IN D –IN A 2 15 –IN D
+IN A 3
A D
12 +IN D
LT1365CN +IN A 3
A D
14 +IN D
LT1365CS
V+ 4 11 V – V+ 4 13 V –
+IN B 5 10 +IN C +IN B 5 12 +IN C
B C B C
–IN B 6 9 –IN C –IN B 6 11 –IN C
OUT B 7 8 OUT C OUT B 7 10 OUT C
NC 8 9 NC
N PACKAGE
14-LEAD PDIP
S PACKAGE
16-LEAD PLASTIC SO
2
LT1364/LT1365
ELECTRICAL CHARACTERISTICS TA = 25°C, VCM = 0V unless otherwise noted.
SYMBOL PARAMETER CONDITIONS VSUPPLY MIN TYP MAX UNITS
Input Voltage Range + ±15V 12.0 13.4 V
±5V 2.5 3.4 V
±2.5V 0.5 1.1 V
Input Voltage Range – ±15V –13.2 –12.0 V
±5V –3.2 –2.5 V
±2.5V –0.9 –0.5 V
CMRR Common Mode Rejection Ratio VCM = ±12V ±15V 84 90 dB
VCM = ±2.5V ±5V 76 81 dB
VCM = ±0.5V ±2.5V 66 71 dB
PSRR Power Supply Rejection Ratio VS = ±2.5V to ±15V 90 100 dB
AVOL Large-Signal Voltage Gain VOUT = ±12V, RL = 1k ±15V 4.5 9.0 V/mV
VOUT = ±10V, RL = 500Ω ±15V 3.0 6.5 V/mV
VOUT = ±7.5V, RL = 150Ω ±15V 2.0 3.8 V/mV
VOUT = ±2.5V, RL = 500Ω ±5V 3.0 6.4 V/mV
VOUT = ±2.5V, RL = 150Ω ±5V 2.0 5.6 V/mV
VOUT = ±1V, RL = 500Ω ±2.5V 2.5 5.2 V/mV
VOUT Output Swing RL = 1k, VIN = ±40mV ±15V 13.5 14.0 ±V
RL = 500Ω, VIN = ±40mV ±15V 13.0 13.7 ±V
RL = 500Ω, VIN = ±40mV ±5V 3.5 4.1 ±V
RL = 150Ω, VIN = ±40mV ±5V 3.4 3.8 ±V
RL = 500Ω, VIN = ±40mV ±2.5V 1.3 1.7 ±V
IOUT Output Current VOUT = ±7.5V ±15V 50 60 mA
VOUT = ±3.4V ±5V 23 29 mA
ISC Short-Circuit Current VOUT = 0V, VIN = ±3V ±15V 70 105 mA
SR Slew Rate AV = – 2, (Note 5) ±15V 750 1000 V/µs
±5V 300 450 V/µs
Full Power Bandwidth 10V Peak, (Note 6) ±15V 15.9 MHz
3V Peak, (Note 6) ±5V 23.9 MHz
GBW Gain Bandwidth f = 200kHz ±15V 50 70 MHz
±5V 35 50 MHz
±2.5V 40 MHz
tr, tf Rise Time, Fall Time AV = 1, 10%-90%, 0.1V ±15V 2.6 ns
±5V 3.6 ns
Overshoot AV = 1, 0.1V ±15V 36 %
±5V 23 %
Propagation Delay 50% VIN to 50% VOUT, 0.1V ±15V 4.6 ns
±5V 5.6 ns
ts Settling Time 10V Step, 0.1%, AV = –1 ±15V 50 ns
10V Step, 0.01%, AV = –1 ±15V 80 ns
5V Step, 0.1%, AV = –1 ±5V 55 ns
Differential Gain f = 3.58MHz, AV = 2, RL = 150Ω ±15V 0.03 %
±5V 0.06 %
f = 3.58MHz, AV = 2, RL = 1k ±15V 0.01 %
±5V 0.01 %
Differential Phase f = 3.58MHz, AV = 2, RL = 150Ω ±15V 0.10 Deg
±5V 0.04 Deg
f = 3.58MHz, AV = 2, RL = 1k ±15V 0.05 Deg
±5V 0.25 Deg
RO Output Resistance AV = 1, f = 1MHz ±15V 0.7 Ω
Channel Separation VOUT = ±10V, RL = 500Ω ±15V 100 113 dB
IS Supply Current Each Amplifier ±15V 6.3 7.5 mA
Each Amplifier ±5V 6.0 7.2 mA
3
LT1364/LT1365
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the temperature range
0°C ≤ TA ≤ 70°C, VCM = 0V unless otherwise noted.
The ● denotes the specifications which apply over the temperature range – 40°C ≤ TA ≤ 85°C, VCM = 0V unless otherwise noted. (Note 9)
4
LT1364/LT1365
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the temperature range
– 40°C ≤ TA ≤ 85°C, VCM = 0V unless otherwise noted. (Note 9)
Note 1: Absolute Maximum Ratings are those values beyond which the life Note 6: Full power bandwidth is calculated from the slew rate
of a device may be impaired. measurement: FPBW = SR/2πVP.
Note 2: Differential inputs of ±10V are appropriate for transient operation Note 7: This parameter is not 100% tested.
only, such as during slewing. Large, sustained differential inputs will cause Note 8: The LT1364C/LT1365C are guaranteed functional over the
excessive power dissipation and may damage the part. See Input operating temperature range of –40°C to 85°C.
Considerations in the Applications Information section of this data sheet Note 9: The LT1364C/LT1365C are guaranteed to meet specified
for more details. performance from 0°C to 70°C. The LT1364C/LT1365C are designed,
Note 3: A heat sink may be required to keep the junction temperature characterized and expected to meet specified performance from – 40°C to
below absolute maximum when the output is shorted indefinitely. 85°C, but are not tested or QA sampled at these temperatures. For
Note 4: Input offset voltage is pulse tested and is exclusive of warm-up drift. guaranteed I-grade parts, consult the factory.
Note 5: Slew rate is measured between ±10V on the output with ±6V input
for ±15V supplies and ±1V on the output with ±1.75V input for ±5V supplies.
U W
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Supply Voltage Input Common Mode Range vs Input Bias Current vs
and Temperature Supply Voltage Input Common Mode Voltage
10 V+ 1.0
TA = 25°C VS = ±15V
–0.5 ∆VOS < 1mV TA = 25°C
IB+ + IB–
8 –1.0 IB = ————
INPUT BIAS CURRENT (µA)
COMMON MODE RANGE (V)
125°C 0.8
SUPPLY CURRENT (mA)
2
–1.5
25°C
6 –2.0
0.6
–55°C
4 2.0
1.5
0.4
2 1.0
0.5
0 V– 0.2
0 5 10 15 20 0 5 10 15 20 –15 –10 –5 0 5 10 15
SUPPLY VOLTAGE (±V) SUPPLY VOLTAGE (±V) INPUT COMMON MODE VOLTAGE (V)
1364/1365 G01 1364/1365 G02 1364/1365 G03
5
LT1364/LT1365
U W
TYPICAL PERFORMANCE CHARACTERISTICS
Input Bias Current vs Open-Loop Gain vs
Temperature Input Noise Spectral Density Resistive Load
1.4 100 10 85
VS = ±15V VS = ±15V TA = 25°C
IB+ + IB–
1.2 IB = ———— TA = 25°C
RS = 100k
VS = ±15V
0.8 en 75
in
10 1
0.6
70
0.4
65
0.2
0 1 0.1 60
–50 –25 0 25 50 75 100 125 10 100 1k 10k 100k 10 100 1k 10k
TEMPERATURE (°C) FREQUENCY (Hz) LOAD RESISTANCE (Ω)
1364/1365 G04 1364/1365 G05 1364/1365 G06
77
2.0 RL = 500Ω 2.0
76 1.5 1.5
–40°C
1.0 RL = 1k 1.0
75
0.5 0.5 85°C
74 V – V –
– 50 –25 0 25 50 75 100 125 0 5 10 15 20 –50 –40 –30 –20 –10 0 10 20 30 40 50
TEMPERATURE (°C) SUPPLY VOLTAGE (±V) OUTPUT CURRENT (mA)
1364/1365 G07 1364/1365 G08 1364/1365 G09
Output Short-Circuit Current vs Settling Time vs Output Step Settling Time vs Output Step
Temperature (Noninverting) (Inverting)
140 10 10
VS = ±5V VS = ±15V VS = ±15V
OUTPUT SHORT-CIRCUIT CURRENT (mA)
8 AV = 1 8 AV = –1
130 10mV
6 RL = 1k 6 RF = 1k
CF = 3pF
120 4 4
10mV 1mV
OUTPUT STEP (V)
1mV
110 2 2
SOURCE 0 0
100
–2 –2
SINK
90 –4 –4
10mV 1mV 10mV
–6 –6 1mV
80
–8 –8
70 –10 –10
–50 –25 0 25 50 75 100 125 0 20 40 60 80 100 0 20 40 60 80 100
TEMPERATURE (°C) SETTLING TIME (ns) SETTLING TIME (ns)
1364/1365 G10 1364/1365 G11 1364/1365 G12
6
LT1364/LT1365
U W
TYPICAL PERFORMANCE CHARACTERISTICS
10 50 80
PHASE (DEG)
GAIN VS = ±15V – 50
CROSSTALK (dB)
40 60
– 60
GAIN (dB)
VS = ±5V
1 30 40 –70
AV = 10 VS = ±5V
– 80 VS = ±15V
20 20
AV = 1 RL = 1k
– 90
0.1 10 0 VS = ±5V
TA = 25°C –100 RL = 500Ω
0 AV = –1
RF = RG = 1k –110
0.01 –10 –120
10k 100k 1M 10M 100M 10k 100k 1M 10M 100M 100k 1M 10M 100M
FREQUENCY (Hz) FREQUENCY (Hz) FREQUENCY (Hz)
1364/1365 G13 1364/1365 G14 1364/1365 G21
PHASE MARGIN
PHASE MARGIN (DEG)
100 VS = ±15V 35 4 6
C = 50pF
90 30 2 3
GAIN (dB)
C=0
80 GAIN BANDWIDTH 25 0 0
VS = ±15V
70 20 –2 –3
±5V
60 15 –4 –6
50 10 –6 –9
GAIN BANDWIDTH ±2.5V
40 VS = ± 5V 5 –8 –12
30 0 –10 –15
– 50 –25 0 25 50 75 100 125 100k 1M 10M 100M 1M 10M 100M
TEMPERATURE (°C) FREQUENCY (Hz) FREQUENCY (Hz)
1364/1365 G16 1364/1365 G17 1364/1365 G18
Gain Bandwidth and Phase Power Supply Rejection Ratio Common Mode Rejection Ratio
Margin vs Supply Voltage vs Frequency vs Frequency
130 50 100 120
+PSRR VS = ±15V VS = ±15V
COMMON-MODE REJECTION RATIO (dB)
POWER SUPPLY REJECTION RATIO (dB)
7
LT1364/LT1365
U W
TYPICAL PERFORMANCE CHARACTERISTICS
Slew Rate vs Supply Voltage Slew Rate vs Temperature Slew Rate vs Input Level
2400 1400 2000
2200 TA = 25°C AV = –2 TA = 25°C
1800 VS = ±15V
2000
AV = –1
1200 SR+ + SR–
RF = RG = 1k SR = ————— 1600 AV = –1
2
1800 SR+ + SR– RF = RG = 1k
SR = ————— 1400 SR+ + SR –
SLEW RATE (V/µs)
VO = 3VRMS 25 AV = –1
RL = 500Ω 8
AV = 1
20 AV = 1
6
AV = –1
0.001 15
4
AV = 1
10
VS = ±15V
RL = 1k 2 VS = ±5V
5
AV = 1, 1% MAX DISTORTION RL = 1k
AV = –1, 2% MAX DISTORTION 2% MAX DISTORTION
0.0001 0 0
10 100 1k 10k 100k 100k 1M 10M 100k 1M 10M
FREQUENCY (Hz) FREQUENCY (Hz) FREQUENCY (Hz)
1364/1365 G25 1364/1365 G26 1364/1365 G27
RL = 500Ω
AV = 2 3RD HARMONIC
DIFFERENTIAL GAIN
–60
OVERSHOOT (%)
0.3 0
DIFFERENTIAL PHASE (DEG)
–70 50
2ND HARMONIC 0.2
–80 DIFFERENTIAL PHASE
0.1 AV = 2
–90 AV = 1
RL = 150Ω
TA = 25°C
–100 0.0 0
100k 200k 400k 1M 2M 4M 10M ±5 ±10 ±15 10p 100p 1000p 0.01µ 0.1µ 1µ
FREQUENCY (Hz) SUPPLY VOLTAGE (V) CAPACITIVE LOAD (F)
1364/1365 G28 1364/1365 G29 1364/1365 G30
8
LT1364/LT1365
U W
TYPICAL PERFORMANCE CHARACTERISTICS
Small-Signal Transient Small-Signal Transient Small-Signal Transient
(AV = 1) (AV = –1) (AV = –1, CL = 200pF)
U U W U
APPLICATIONS INFORMATION
Layout and Passive Components Input Considerations
The LT1364/LT1365 amplifiers are easy to use and toler- Each of the LT1364/LT1365 inputs is the base of an NPN
ant of less than ideal layouts. For maximum performance and a PNP transistor whose base currents are of opposite
(for example, fast 0.01% settling) use a ground plane, polarity and provide first-order bias current cancellation.
short lead lengths, and RF-quality bypass capacitors Because of variation in the matching of NPN and PNP beta,
(0.01µF to 0.1µF). For high drive current applications use the polarity of the input bias current can be positive or
low ESR bypass capacitors (1µF to 10µF tantalum). negative. The offset current does not depend on NPN/PNP
beta matching and is well controlled. The use of balanced
The parallel combination of the feedback resistor and gain
setting resistor on the inverting input combine with the source resistance at each input is recommended for
applications where DC accuracy must be maximized.
input capacitance to form a pole which can cause peaking
or oscillations. If feedback resistors greater than 5kΩ are The inputs can withstand transient differential input volt-
used, a parallel capacitor of value ages up to 10V without damage and need no clamping or
source resistance for protection. Differential inputs, how-
CF > RG x CIN/RF
ever, generate large supply currents (tens of mA) as
should be used to cancel the input pole and optimize required for high slew rates. If the device is used with
dynamic performance. For unity-gain applications where sustained differential inputs, the average supply current
a large feedback resistor is used, CF should be greater will increase, excessive power dissipation will result and
than or equal to CIN. the part may be damaged. The part should not be used as
9
LT1364/LT1365
U U W U
APPLICATIONS INFORMATION
a comparator, peak detector or other open-loop applica- output step in a gain of 10 has only a 1V input step,
tion with large, sustained differential inputs. Under whereas the same output step in unity gain has a 10 times
normal, closed-loop operation, an increase of power dis- greater input step. The curve of Slew Rate vs Input Level
sipation is only noticeable in applications with large slewing illustrates this relationship. The LT1364/LT1365 are tested
outputs and is proportional to the magnitude of the for slew rate in a gain of –2 so higher slew rates can be
differential input voltage and the percent of the time that expected in gains of 1 and –1, and lower slew rates in
the inputs are apart. Measure the average supply current higher gain configurations.
for the application in order to calculate the power dissipa- The RC network across the output stage is bootstrapped
tion. when the amplifier is driving a light or moderate load and
has no effect under normal operation. When driving a
Capacitive Loading
capacitive load (or a low value resistive load) the network
The LT1364/LT1365 are stable with any capacitive load. is incompletely bootstrapped and adds to the compensa-
This is accomplished by sensing the load induced output tion at the high impedance node. The added capacitance
pole and adding compensation at the amplifier gain node. slows down the amplifier which improves the phase
As the capacitive load increases, both the bandwidth and margin by moving the unity-gain frequency away from the
phase margin decrease so there will be peaking in the pole formed by the output impedance and the capacitive
frequency domain and in the transient response as shown load. The zero created by the RC combination adds phase
in the typical performance curves. The photo of the small to ensure that even for very large load capacitances, the
signal response with 200pF load shows 62% peaking. The total phase lag can never exceed 180 degrees (zero phase
large signal response shows the output slew rate being margin) and the amplifier remains stable.
limited to 10V/µs by the short-circuit current. Coaxial
cable can be driven directly, but for best pulse fidelity a Power Dissipation
resistor of value equal to the characteristic impedance of The LT1364/LT1365 combine high speed and large output
the cable (i.e., 75Ω) should be placed in series with the drive in small packages. Because of the wide supply
output. The other end of the cable should be terminated voltage range, it is possible to exceed the maximum
with the same value resistor to ground. junction temperature under certain conditions. Maximum
junction temperature (TJ) is calculated from the ambient
Circuit Operation
temperature (TA) and power dissipation (PD) as follows:
The LT1364/LT1365 circuit topology is a true voltage
feedback amplifier that has the slewing behavior of a LT1364CN8: TJ = TA + (PD x 130°C/W)
current feedback amplifier. The operation of the circuit can LT1364CS8: TJ = TA + (PD x 190°C/W)
be understood by referring to the simplified schematic. LT1365CN: TJ = TA + (PD x 110°C/W)
The inputs are buffered by complementary NPN and PNP LT1365CS: TJ = TA + (PD x 150°C/W)
emitter followers which drive a 500Ω resistor. The input
voltage appears across the resistor generating currents Worst case power dissipation occurs at the maximum
which are mirrored into the high impedance node. Comple- supply current and when the output voltage is at 1/2 of
mentary followers form an output stage which buffers the either supply voltage (or the maximum swing if less than
gain node from the load. The bandwidth is set by the input 1/2 supply voltage). For each amplifier PDMAX is:
resistor and the capacitance on the high impedance node.
PDMAX = (V+ – V–)(ISMAX) + (V+/2)2/RL
The slew rate is determined by the current available to
charge the gain node capacitance. This current is the Example: LT1365 in S16 at 70°C, VS = ±5V, RL = 150W
differential input voltage divided by R1, so the slew rate is PDMAX = (10V)(8.4mA) + (2.5V)2/150Ω = 126mW
proportional to the input. Highest slew rates are therefore
seen in the lowest gain configurations. For example, a 10V TJMAX = 70°C + (4 x 126mW)(150°C/W) = 145°C
10
LT1364/LT1365
W W
SI PLIFIED SCHE ATIC
V+
R1 CC
500Ω +IN RC
–IN OUT
C
V–
1364/1365 SS01
U
PACKAGE DESCRIPTION Dimension in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.400*
(10.160)
0.300 – 0.325 0.045 – 0.065 0.130 ± 0.005 MAX
(7.620 – 8.255) (1.143 – 1.651) (3.302 ± 0.127)
8 7 6 5
0.065
0.255 ± 0.015*
(1.651)
0.009 – 0.015 TYP (6.477 ± 0.381)
(0.229 – 0.381) 0.125
(3.175) 0.020
+0.035 MIN (0.508) 1 2 3 4
0.325 –0.015
( )
0.100 0.018 ± 0.003 MIN
+0.889
8.255 (2.54) (0.457 ± 0.076)
–0.381 BSC N8 1098
N Package
14-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.770*
(19.558)
0.300 – 0.325 0.130 ± 0.005 0.045 – 0.065 MAX
(7.620 – 8.255) (3.302 ± 0.127) (1.143 – 1.651)
14 13 12 11 10 9 8
0.020
(0.508) 0.255 ± 0.015*
MIN 0.065 (6.477 ± 0.381)
0.009 – 0.015 (1.651)
(0.229 – 0.381) TYP
+0.035 1 2 3 4 5 6 7
0.325 –0.015 0.005
0.018 ± 0.003
( )
0.125
+0.889 (0.125)
8.255 (3.175) (0.457 ± 0.076)
–0.381 MINMIN 0.100
(2.54)
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. BSC
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) N14 1098
464Ω 1.33k
– R3 VIN –
1k 1/2 549Ω 1.13k
1/2
LT1364 – 220pF LT1364 –
1/2 1/2
– + LT1364
VOUT + 470pF LT1364
VOUT
VIN + +
+ 1364/1365 TA04
R4 1 R2 R3 R2 + R3
GAIN = 1 + + +
( ) = 102
R3 2 R1 R4 R5
TRIM R5 FOR GAIN
TRIM R1 FOR COMMON-MODE REJECTION
1364/1365 TA01
BW = 700kHz
U
PACKAGE DESCRIPTION Dimension in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
0.010 – 0.020
× 45° 0.053 – 0.069 8 7 6 5
(0.254 – 0.508)
(1.346 – 1.752)
0.004 – 0.010
0.008 – 0.010
0°– 8° TYP (0.101 – 0.254)
(0.203 – 0.254)
S Package
16-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.386 – 0.394*
(9.804 – 10.008)
0.010 – 0.020 14 13 12
× 45° 0.053 – 0.069 0.004 – 0.010 16 15 11 10 9
(0.254 – 0.508)
(1.346 – 1.752) (0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254) 0° – 8° TYP
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LT1363 70MHz, 1000V/µs Op Amp Single Version of LT1364/LT1365
LT1361/LT1362 Dual and Quad 50MHz, 800V/µs Op Amps Lower Power Version of LT1364/LT1365, VOS = 1mV, 4mA/Amplifier
LT1358/LT1359 Dual and Quad 25MHz, 600V/µs Op Amps Lower Power Version of LT1364/LT1365, VOS = 0.6mV, 2mA/Amplifier
LT1813 Dual 100MHz, 700V/µs Op Amps Low Voltage, Low Power LT1364/LT1365, 3mA/Amplifier