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Internal Use Only

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LCD TV
SERVICE MANUAL
CHASSIS : LJ81A

MODEL : 42LB7DF 42LB7DF-SB

CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CONTENTS

CONTENTS .............................................................................................. 2

PRODUCT SAFETY ..................................................................................3

SPECIFICATION ........................................................................................6

ADJUSTMENT INSTRUCTION ...............................................................12

TROUBLE SHOOTING ............................................................................20

BLOCK DIAGRAM...................................................................................48

EXPLODED VIEW .................................................................................. 54

SVC. SHEET ...............................................................................................

Copyright©2007 LG Electronics. Inc. All right reserved. -2- LGE Internal Use Only
Only for training and service purposes
SAFETY PRECAUTIONS

IMPORTANT SAFETY NOTICE


Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Replacement Parts List.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.

General Guidance Leakage Current Hot Check (See below Figure)


Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5K/10watt resistor in parallel with a 0.15uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1W), keep the resistor 10mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
AC Volt-meter
Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed


metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical Good Earth Ground
shock. such as WATER PIPE,
To Instrument's CONDUIT etc.
0.15uF
Leakage Current Cold Check(Antenna Cold Check) exposed
METALLIC PARTS
With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC 1.5 Kohm/10W
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1MΩ and 5.2MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

Copyright©2007 LG Electronics. Inc. All right reserved. -3- LGE Internal Use Only
Only for training and service purposes
SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service unit under test.
manual and its supplements and addenda, read and follow the 2. After removing an electrical assembly equipped with ES
SAFETY PRECAUTIONS on page 3 of this publication. devices, place the assembly on a conductive surface such as
NOTE: If unforeseen circumstances create conflict between the aluminum foil, to prevent electrostatic charge buildup or
following servicing precautions and any of the safety precautions on exposure of the assembly.
page 3 of this publication, always follow the safety precautions. 3. Use only a grounded-tip soldering iron to solder or unsolder ES
Remember: Safety First. devices.
4. Use only an anti-static type solder removal device. Some solder
General Servicing Precautions removal devices not classified as "anti-static" can generate
1. Always unplug the receiver AC power cord from the AC power electrical charges sufficient to damage ES devices.
source before; 5. Do not use freon-propelled chemicals. These can generate
a. Removing or reinstalling any component, circuit board electrical charges sufficient to damage ES devices.
module or any other receiver assembly. 6. Do not remove a replacement ES device from its protective
b. Disconnecting or reconnecting any receiver electrical plug or package until immediately before you are ready to install it.
other electrical connection. (Most replacement ES devices are packaged with leads
c. Connecting a test substitute in parallel with an electrolytic electrically shorted together by conductive foam, aluminum foil
capacitor in the receiver. or comparable conductive material).
CAUTION: A wrong part substitution or incorrect polarity 7. Immediately before removing the protective material from the
installation of electrolytic capacitors may result in an leads of a replacement ES device, touch the protective material
explosion hazard. to the chassis or circuit assembly into which the device will be
installed.
2. Test high voltage only by measuring it with an appropriate high CAUTION: Be sure no power is applied to the chassis or circuit,
voltage meter or other voltage measuring device (DVM, and observe all other safety precautions.
FETVOM, etc) equipped with a suitable high voltage probe. 8. Minimize bodily motions when handling unpackaged
Do not test high voltage by "drawing an arc". replacement ES devices. (Otherwise harmless motion such as
3. Do not spray chemicals on or near this receiver or any of its the brushing together of your clothes fabric or the lifting of your
assemblies. foot from a carpeted floor can generate static electricity
4. Unless specified otherwise in this service manual, clean sufficient to damage an ES device.)
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable General Soldering Guidelines
non-abrasive applicator; 10% (by volume) Acetone and 90% (by 1. Use a grounded-tip, low-wattage soldering iron and appropriate
volume) isopropyl alcohol (90%-99% strength) tip size and shape that will maintain tip temperature within the
CAUTION: This is a flammable mixture. range or 500ºF to 600ºF.
Unless specified otherwise in this service manual, lubrication of 2. Use an appropriate gauge of RMA resin-core solder composed
contacts in not required. of 60 parts tin/40 parts lead.
5. Do not defeat any plug/socket B+ voltage interlocks with which 3. Keep the soldering iron tip clean and well tinned.
receivers covered by this service manual might be equipped. 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
6. Do not apply AC power to this instrument and/or any of its bristle (0.5 inch, or 1.25cm) brush with a metal handle.
electrical assemblies unless all solid-state device heat sinks are Do not use freon-propelled spray-on cleaners.
correctly installed. 5. Use the following unsoldering technique
7. Always connect the test receiver ground lead to the receiver a. Allow the soldering iron tip to reach normal temperature.
chassis ground before connecting the test receiver positive (500ºF to 600ºF)
lead. b. Heat the component lead until the solder melts.
Always remove the test receiver ground lead last. c. Quickly draw the melted solder with an anti-static, suction-
8. Use with this receiver only the test fixtures specified in this type solder removal device or with solder braid.
service manual. CAUTION: Work quickly to avoid overheating the
CAUTION: Do not connect the test fixture ground strap to any circuitboard printed foil.
heat sink in this receiver. 6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
Electrostatically Sensitive (ES) Devices (500ºF to 600ºF)
Some semiconductor (solid-state) devices can be damaged easily b. First, hold the soldering iron tip and solder the strand against
by static electricity. Such components commonly are called the component lead until the solder melts.
Electrostatically Sensitive (ES) Devices. Examples of typical ES c. Quickly move the soldering iron tip to the junction of the
devices are integrated circuits and some field-effect transistors and component lead and the printed circuit foil, and hold it there
semiconductor "chip" components. The following techniques only until the solder flows onto and around both the
should be used to help reduce the incidence of component component lead and the foil.
damage caused by static by static electricity. CAUTION: Work quickly to avoid overheating the circuit
1. Immediately before handling any semiconductor component or board printed foil.
semiconductor-equipped assembly, drain off any electrostatic d. Closely inspect the solder area and remove any excess or
charge on your body by touching a known earth ground. splashed solder with a small wire-bristle brush.
Alternatively, obtain and wear a commercially available
discharging wrist strap device, which should be removed to
prevent potential shock reasons prior to applying power to the

Copyright©2007 LG Electronics. Inc. All right reserved. -4- LGE Internal Use Only
Only for training and service purposes
IC Remove/Replacement
Some chassis circuit boards have slotted holes (oblong) through Circuit Board Foil Repair
which the IC leads are inserted and then bent flat against the Excessive heat applied to the copper foil of any printed circuit
circuit foil. When holes are the slotted type, the following technique board will weaken the adhesive that bonds the foil to the circuit
should be used to remove and replace the IC. When working with board causing the foil to separate from or "lift-off" the board. The
boards using the familiar round hole, use the standard technique following guidelines and procedures should be followed whenever
as outlined in paragraphs 5 and 6 above. this condition is encountered.

Removal At IC Connections
1. Desolder and straighten each IC lead in one operation by gently To repair a defective copper pattern at IC connections use the
prying up on the lead with the soldering iron tip as the solder following procedure to install a jumper wire on the copper pattern
melts. side of the circuit board. (Use this technique only on IC
2. Draw away the melted solder with an anti-static suction-type connections).
solder removal device (or with solder braid) before removing the
IC. 1. Carefully remove the damaged copper pattern with a sharp
Replacement knife. (Remove only as much copper as absolutely necessary).
1. Carefully insert the replacement IC in the circuit board. 2. carefully scratch away the solder resist and acrylic coating (if
2. Carefully bend each IC lead against the circuit foil pad and used) from the end of the remaining copper pattern.
solder it. 3. Bend a small "U" in one end of a small gauge jumper wire and
3. Clean the soldered areas with a small wire-bristle brush. carefully crimp it around the IC pin. Solder the IC connection.
(It is not necessary to reapply acrylic coating to the areas). 4. Route the jumper wire along the path of the out-away copper
pattern and let it overlap the previously scraped end of the good
"Small-Signal" Discrete Transistor copper pattern. Solder the overlapped area and clip off any
Removal/Replacement excess jumper wire.
1. Remove the defective transistor by clipping its leads as close as
possible to the component body. At Other Connections
2. Bend into a "U" shape the end of each of three leads remaining Use the following technique to repair the defective copper pattern
on the circuit board. at connections other than IC Pins. This technique involves the
3. Bend into a "U" shape the replacement transistor leads. installation of a jumper wire on the component side of the circuit
4. Connect the replacement transistor leads to the corresponding board.
leads extending from the circuit board and crimp the "U" with
long nose pliers to insure metal to metal contact then solder 1. Remove the defective copper pattern with a sharp knife.
each connection. Remove at least 1/4 inch of copper, to ensure that a hazardous
condition will not exist if the jumper wire opens.
Power Output, Transistor Device 2. Trace along the copper pattern from both sides of the pattern
Removal/Replacement break and locate the nearest component that is directly
1. Heat and remove all solder from around the transistor leads. connected to the affected copper pattern.
2. Remove the heat sink mounting screw (if so equipped). 3. Connect insulated 20-gauge jumper wire from the lead of the
3. Carefully remove the transistor from the heat sink of the circuit nearest component on one side of the pattern break to the lead
board. of the nearest component on the other side.
4. Insert new transistor in the circuit board. Carefully crimp and solder the connections.
5. Solder each transistor lead, and clip off excess lead. CAUTION: Be sure the insulated jumper wire is dressed so the
6. Replace heat sink. it does not touch components or sharp edges.

Diode Removal/Replacement
1. Remove defective diode by clipping its leads as close as
possible to diode body.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor
Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.
3. Solder the connections.
CAUTION: Maintain original spacing between the replaced
component and adjacent components and the circuit board to
prevent excessive component temperatures.

Copyright©2007 LG Electronics. Inc. All right reserved. -5- LGE Internal Use Only
Only for training and service purposes
SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.

1. Application range 3. Test method


This specification is applied to LJ81A chassis.
3.1 Performance : LGE TV test method followed
Chassis Model Name Market Brand Remark
3.2 Demanded other specification
LJ81A 42LB7DF-SB Central and LG Safety : UL, CSA, IEC Specification
EMC : FCC, ICES, IEC
South AMEROCA
Model Name Market Appliance
2. Requirement for Test 42LB7DF-SB Central and Safety : IEC/EN60065
Testing for standard of each part must be followed in below
South AMEROCA EMC : CISPR13
condition.

(1) Temperature : 20 ± 5°C, CST : 40± 5°C


(2) Humidity : 65% ± 10%
(3) Power : Standard input voltage (100-240V~, 50/60Hz)
*Standard Voltage of each products is marked by models.
(4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with SBOM.
(5) The receiver must be operated for about 20 minutes prior
to the adjustment.

4. General Specification(TV)

No Model Specification Option Remark

1 Receiving System 1) SBTVD / NTSC / PAL-M / PAL-N


2 Available Channel 1) VHF : 02~13
2) UHF : 14~69
3) DTV : 02-69
4) CATV : 01~135
3 Input Voltage 1) AC 100 ~ 240V 50/60Hz
Market Central and South AMERICA
4 Screen Size 42 inch Wide (1366 x 768) HD
42 inch Wide (1920 x 1080) FULL HD
5 Aspect Ratio 16:9
6 Tuning System FS
7 Module LC420WU6-SLA1 FULL HD 42LB7DF-SB
8 Operating Environment 1) Temp : 0 ~ 40 deg
2) Humidity : ~ 80 %
9 Storage Environment 1) Temp : -20 ~ 60 deg
2) Humidity : ~ 85 %

Copyright©2007 LG Electronics. Inc. All right reserved. -6- LGE Internal Use Only
Only for training and service purposes
5. Chroma & Brightness
No Item Min Typ Max Unit Remark
1 White brightness 400 500 cd/m 2
42LB7DF-SB
(Center 1-point/Full white Pattern)
2 Brightness uniformity 80 % Full white
3 Color coordinate RED X Typ-0.03 0.638 Typ+0.03 Typ.
Y 0.340 +0.03
GREEN X 0.279
Y 0.611
BLUE X 0.146
Y 0.062
WHITE X 0.272
Y 0.278
4 Color coordinate uniformity N/A
5 Contrast ratio 700:1 1000:1 NORMAL
7000:1 10000:1 DCR
Color Temperature Cool Typ. 11000 Typ. <Test Condition>
Standard -1000 9300 +1000 HDMI Input,
Warm 6500 85% Full white pattern
Color Distortion, DG 10.0 %
Color Distortion, DP 43.0 10.0 deg
Color S/N, AM/FM -80 dB
Color Killer Sensitivity dBm

6. Component Video Input (Y, CB/PB, CR/PR)

No Resolution H-freq(kHz) V-freq(kHz) Pixel clock Proposed


1 720*480 15.73 60 13.5135 SDTV ,DVD 480I
2 720*480 15.73 59.94 13.5 SDTV ,DVD 480I
3 720*480 31.47 60 27.027 SDTV 480P
4 720*480 31.47 59.94 27.0 SDTV 480P
5 1280*720 45.00 60.00 74.25 HDTV 720P
6 1280*720 44.96 59.94 74.176 HDTV 720P
7 1920*1080 33.75 60.00 74.25 HDTV 1080I
8 1920*1080 33.72 59.94 74.176 HDTV 1080I
9 1920*1080 67.500 60 148.50 HDTV 1080P
10 1920*1080 67.432 59.939 148.352 HDTV 1080P
11 1920*1080 27.000 24.000 74.25 HDTV 1080P
12 1920*1080 26.97 23.94 74.176 HDTV 1080P
13 1920*1080 33.75 30.000 74.25 HDTV 1080P
14 1920*1080 33.71 29.97 74.176 HDTV 1080P
15 1920*1080 56.25 50.000 148.5 HDTV 1080P
16 1920*1080 28.125 25.000 74.25 HDTV 1080P

Copyright©2007 LG Electronics. Inc. All right reserved. -7- LGE Internal Use Only
Only for training and service purposes
7. RGB Input (PC)

No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed


PC DDC
1 640*350 31.468 70.09 25.17 EGA X
2 720*400 31.469 70.08 28.32 DOS O
3 640*480 31.469 59.94 25.17 VESA(VGA) O
4 640*480 37.861 72.80 31.50 VESA(VGA) O
5 640*480 37.500 75.00 31.50 VESA(VGA) O
6 800*600 35.156 56.25 36.00 VESA(SVGA) O
7 800*600 37.879 60.31 40.00 VESA(SVGA) O
8 800*600 48.077 72.18 50.00 VESA(SVGA) O
9 800*600 46.875 75.00 49.50 VESA(SVGA) O
10 1024*768 48.363 60.00 65.00 VESA(XGA) O
11 1024*768 56.476 70.06 75.00 VESA(XGA) O
12 1024*768 60.023 75.02 78.75 VESA(XGA) O
13 1280*768 47.776 59.870 79.5 CVT(WXGA) O
14 1280*768 60.289 74.893 102.25 CVT(WXGA) O
15 1360*768 47.712 60.015 85.50 VESA (WXGA) O
16 1280*1024 63.981 60.020 108.00 VESA (SXGA) O
17 1280*1024 79.976 75.025 135 VESA (SXGA) O
18 1600*1200 75.00 60.00 162 VESA (UXGA) O
19 1920*1080 67.5 60 148.5 HDTV 1080P O

Copyright©2007 LG Electronics. Inc. All right reserved. -8- LGE Internal Use Only
Only for training and service purposes
8. HDMI Input (PC/DTV)
No Resolution H-freq(kHz) V-freq.(Hz) Pixel clock(MHz) Proposed
PC DDC
1 640*350 31.468 70.09 25.17 EGA X
2 720*400 31.469 70.08 28.32 DOS O
3 640*480 31.469 59.94 25.17 VESA(VGA) O
4 640*480 37.861 72.80 31.50 VESA(VGA) O
5 640*480 37.500 75.00 31.50 VESA(VGA) O
6 800*600 35.156 56.25 36.00 VESA(SVGA) O
7 800*600 37.879 60.31 40.00 VESA(SVGA) O
8 800*600 48.077 72.18 50.00 VESA(SVGA) O
9 800*600 46.875 75.00 49.50 VESA(SVGA) O
10 1024*768 48.363 60.00 65.00 VESA(XGA) O
11 1024*768 56.476 70.06 75.00 VESA(XGA) O
12 1024*768 60.023 75.02 78.75 VESA(XGA) O
13 1280*768 47.776 59.870 79.5 CVT(WXGA) O
14 1360*768 47.712 60.015 85.50 VESA (WXGA) O
15 1280*1024 63.981 60.020 108.00 VESA (SXGA) O
16 1280*1024 79.976 75.025 135 VESA (SXGA) O
17 1600*1200 75.00 60.00 162 VESA (UXGA) O
18 1920*1080 67.5 60 148.5 HDTV 1080P O
DTV
1 720*480 31.47 60 27.027 SDTV 480P
2 720*480 31.47 59.94 27.00 SDTV 480P
3 1280*720 45.00 60.00 74.25 HDTV 720P
4 1280*720 44.96 59.94 74.176 HDTV 720P
5 1920*1080 33.75 60.00 74.25 HDTV 1080I
6 1920*1080 33.72 59.94 74.176 HDTV 1080I
7 1920*1080 67.500 60 148.50 HDTV 1080P
8 1920*1080 67.432 59.939 148.352 HDTV 1080P
9 1920*1080 27.000 24.000 74.25 HDTV 1080P
10 1920*1080 26.97 23.94 74.176 HDTV 1080P
11 1920*1080 33.75 30.000 74.25 HDTV 1080P
12 1920*1080 33.71 29.97 74.176 HDTV 1080P
13 1920*1080 56.25 50.000 148.5 HDTV 1080P
14 1920*1080 28.125 25.000 74.25 HDTV 1080P

Copyright©2007 LG Electronics. Inc. All right reserved. -9- LGE Internal Use Only
Only for training and service purposes
9. General specifications (module)
No Item Value Unit Remark
1 Active Screen Size 1067.31 (diagonal) mm 42.02 inches
2 Outline Dimension 983(H)x576(V)x47.3(D) mm
3 Pixel Pitch 0.4845 x 0.4845 um
4 Pixel Format 1920(H)x1080(V) RGB stripe arrangement
5 Color Depth 8bit 16.7 Mbit
6 Luminance ,White 500 (center 1 point typ) cd/m2
7 Viewing Angle (CR>10) R/L 178(Typ),U/D 178(Typ) degree
8 Power Consumption 168.36 Watt
9 Weight 11(Typ), 12(Max) kg
10 Display Operating Mode Transmissive mode ,normally black
11 Surface Treatment Hard coating (3H)

10. Electro Optical Characteristic Specifications (module standard)


No Item Min Typ Max Unit Remark
1 Contrast Ratio CR 800 1000
CR with DCR
2 Surface Luminance, White 400 500 Cd/m2 Full white
3 Luminance Variation 1.3 (•‰ white/5P)
4 Response Time Gray to Gray 5 8 msec
Rise+decay 10 14
5 Color coordinate RED X Typ TBD Typ Full Pattern
Y -0.03 TBD +0.03
GREEN X TBD
Y TBD
BLUE X TBD
Y TBD
WHITE X TBD
Y TBD
6 Viewing Angle (CR>10) X axis right(ø=0) 89 degree
X axis left(ø=180) 89
Yaxis up (ø=90) 89
Z axis down(ø=270) 89
7 Gray Scale Without DCR 2.2
With DCR

Copyright©2007 LG Electronics. Inc. All right reserved. - 10 - LGE Internal Use Only
Only for training and service purposes
12. Customer Menu Setup (Shipment Condition)

No Item Condition Remark


1 Input Mode TV02CH
2 Volume Level 20
3 Mute Off
4 Aspect Ratio 16:9
5 Video EZ Picture Daylight
Color temperature (Disable) Can be access only EZ picture is setting user mode
XD Auto
Advanced Cinema: Off
Reset
6 Audio Audio Language Off
EZ SoundRite Off
EZ Sound Normal
Balance 0
Treble 50
Bass 50
Front Surround Off
TV Speaker On
7 Timer Auto clock Off
Manual Clock Off
Off Timer Off
On Timer Off
Auto Off Off
8 Option Aspect Ratio 16:9
Caption/Text Off
Caption Option Off
Language English
ISM Method Normal
SET ID 1
9 Lock Lock System Off
Set password On ( Default : 0000 )
Block channel None
Movie Rating Off
TV Rating-Children Off
TV Rating-General Off
Audio Block Off
10 Channel Memory none

Copyright©2007 LG Electronics. Inc. All right reserved. - 11 - LGE Internal Use Only
Only for training and service purposes
ADJUSTMENT INSTRUCTION
1. Application Range 4.PCB Assembly Adjustment
This spec sheet is applied all of the 'LJ81A' Chassis.
4-1. CPLD DOWNLOAD
- JTAG MODE
2. Specification
(1) Because this is not a hot chassis, it is not necessary to use
an isolation transformer. However, the use of isolation
transformer will help protect test instrument.
(2) Adjustment must be done in the correct order.
(3) The adjustment must be performed in the circumstance of
25±5°C of temperature and 65±10% of relative humidity if
there is no specific designation.
(4) The input voltage of the receiver must keep 100-220V~,
50/60Hz.
(5) The receiver must be operated for about 5 minutes prior to
the adjustment.
O After RGB 100% Full White pattern(06CH) then process
Heat-run(or “8.Test patter” condition of EZ-Adjust
status).
O Enter into HEAT-RUN MODE (1) <<PRINT PORT>> PIN MAP
1) Press the POWER ON KEY on R/C for adjustment.
Component JTAG Mode Signal Name
2) Press ADJ button of Service remocon. Select
“10.Test pattern” and, after select “White” using 2 TCK
navigation button, and then you can see 100% Full 3 TMS
White pattern.
8 TDI
3) In this status you can maintain Heat-Run useless any
pattern generator. 11 TDO
* Notice! 13 -
If you maintain one picture over 20minute(Especially sharp
15 VCC
distinction black with white pattern-13Ch, or Cross hatch pattern-
09Ch) then it can appear image stick near black level. 18 to 25 GND

3. Adjustment items
3-1. PCB Assembly adjustment
O CPLD DOWNLOAD
O Adjust 480i Comp1
O Adjust 1080p Comp1 / RGB
- If it necessary, it can adjustment at Manufacture Line.
- You can see set adjustment status at “9.ADJUST
CHECK” of the “In-start menu”.

3-2. Set Assembly Adjustment


O EDID(The Extended Display Identification Data)
/ DDC(Display Data Channel) download
O Color Temperature(White Balance) Adjustment
O Make sure RS-232C control
O Selection Factory output option

Copyright©2007 LG Electronics. Inc. All right reserved. - 12 - LGE Internal Use Only
Only for training and service purposes
(2) <<10P WAFER>> PIN MAP (3) Circuit Board Header Connection
Dimenstions are shown in inches. The spacing between pin centers is 0.1 inch. - The ByteBlasterMV 10-pin female plug connects to a 10-
pin male header on the circuit board. The 10-pin male
header has two rows of five pins, which are connected to
0.425 Typ.
the device’s programming or configuration pins.
- The ByteBlasterMV cable receives power and downloads
data via the male header. Fig.1 shows the dimensions of
Color Strip
a typical 10-pin male header.

0.250 Typ. Dimensions are shown in incles.


Top View\\\\ Side View
0.100\\ 0.100\ 0.025 Sq.

0.100 Sq. 0.025 Sq.

0.700 Typ. 0.235

1) Table 2. Identifies the 10-pin female plug’s pin names


for the corresponding download mode.
Table2. ByteBlasterMV Female Plug;s Pin Names & Download Models
PS Mode JTAG Mode
(Fig.1) 10-Pin Male Header Dimensions
Pin
Singal Name Description Singal Name Description 1) Table 3. Through 5 summarize the absolute maximum
ratings, recommended operating conditions, and DC
1 DCLK Clock singnal TCK Clock singnal
operating conditions for the ByteBlasterMV cable.
2 GND Signal ground GND Signal ground
Table 3. ByteBlasterMV Cable Absolute Maximum Ratings
3 CONF_DONE Configuration TDO Data to device
Symbol Parameter Conditions Min Max Unit
control
Vcc Supply voltage With respect ot ground -0.5 7.0 V
4 VCC Power supply VCC Power supply
VI DC input voltage With respect ot ground -0.5 7.0 V
5 nCONFIG Configuration TMS JTAG state
control machine control
Table 4. ByteBlasterMV Calbe Recommended Operating Conditions
6 - No connect - No connect
Symbol Parameter Conditions Min Max Unit
7 nSTATUS Configuration - No connect
Vcc Supply voltage 5.0-V Operation 4.5 5.5 V
status
Supply voltage 3.3-V Operation 3.0 3.6 V
8 - No connect - No connect
9 DATA0 Data to device TDI Data to device
10 GND Signal ground GND Signal ground

Copyright©2007 LG Electronics. Inc. All right reserved. - 13 - LGE Internal Use Only
Only for training and service purposes
(4) Real-Time ISP with the Quartus II Software. (5) MAX II Device Handbook, Volume1.
1) The programming file formats generated by the Quartus - To configure or program one or more devices with the
II software that support these two features are the ByteBlasterMV cable and the Quartus II programmer.
Programmer Object File(.pof) that is used with the 1) Compile a project. The Quartus II compiler generates a
Quartus II programmer, and the Jam File(.jam) and Jam .sof file to configure APEX II, APEX 20K, Mercury, and
Byte-Code File(.jbc) that are used with either the Excalibur devices. To program an EPC configuration
Quartus II programmer or other programming tools. device, a .pof or JAM STAPL format file should be
2) Ensure that you enable this feature before programming used.
a MAX II device through the Quartus II programmer. 2) Attach the ByteBlasterMV cable to a parallel port on a
You can enable the real-time ISP feature by selecting PC and insert the 10-pin female plug into the prototype
the Enable real-time ISP to allow background system containing the target device. The board must
programming(for MAX II devices) option from the supply power to the ByteBlasterMV cable.
Quartus II programmer window. Refer Fig.2. - For the Windows Nt operating system, a driver must
be installed before using the ByteBlasterMV cable,
go to the “ByteBlasterMV and MasterBlaster
Installation” section in the Quartus II.
3) Open the Quartus II programmer by selecting Open
Programmer from the (Processing Menu). Choose
Setup... in the Programming Hardware section. Specify
the ByteBlasterMV cable and the appropriate LPT port.
Please see “Changing Setup” under the ByteBlasterMV
cable in the Quartus II software Help menu for more
information.
4) Select either passive serial or JTAG programming mode
and then add the files and/or devices you want to
program or configure using the add file.. or add
device... buttons to create a chain description file(.cdf).
- The programmer has two programming modes “
(Fig.2) Real-Time ISP Option in the Quartus II Programmer Window passive serial and JTAG, In passive mode, you
3) You can also enable the real-time ISP feature in the select which SOFs to include in the device chain. In
Quartus II software through the following steps: JTAG mode, you add specific devices and
1. Choose Options(Tool menu). configuration devices to the device chain, in addition
2. Choose Programmer under the Category section. to POFs and SOFs, and you have several
programming options for each configuration device in
the chain. In JTAG mode, you can verify an EPC
configuration device’s contents against its
programming file data, check that a device is blank,
examine a programmed device and save its data to
file, or use its data to program or verify another
configuration device.
5) Choose the start button in the Quartus II software to
program or configure the device(s). The ByteBlasterMV
cable downloads the data from the SOF and/or POF
file(s) into the device(s).

Copyright©2007 LG Electronics. Inc. All right reserved. - 14 - LGE Internal Use Only
Only for training and service purposes
4-2. Using RS-232C
Orher Command Set response
Inter the Adjustment ad 00 00 d 00 OK00x
Mode
Change the Source kb 00 04 b 00 00 OK04x(Adjust 480i comp1)
Start Adjustment kb 00 06 b 00 OK06x(Adjust 1080p comp1/RGB)
Return the ad 00 10 <Fig.3> Adjustment pattern : 480i/1080p 60Hz Pattern

Response OKx(Success condition)


5-4. Adjustment method 480i Comp1,
NGx(Failed condition) Adjust 1080p Comp1/RGB
Read Adjustment (main) (main) (1) ADC 480i Component1 adjustment.
- Check connection of Component1
data ad 00 20 000000000000000000000000007c007b006dx
- MSPG-925FA -> Model : 209, Pattern : 65
(sub) (Sub) 1) Set Component 480i mode and 100% Horizontal Color
ad 00 21 000000070000000000000000007c00830077x Bar Pattern(HozTV31Bar), then set TV set to
Component1 mode and its screen to “NORMAL”
Confirm Adjustment ad 00 99 NG 03 00x (Failed condition)
2) After get the signal, wait more a second and enter the
NG 03 01x (Failed condition) “Ez-Adjust” with press ADJ key of Service remocon.
NG 03 02x (Failed condition) After then select “3.ADC 480i Comp1” with navigator
button and press “Enter”. It is automatically adjustment.
OK 03 03x (Success condition)
3) You can see “ADC Component1 Success” message
End of Adjustment ad 00 90 d 00 OK90x after Adjustment success.
4) Error Messages: When its adjustment is not correct,
* See ADC Adjstment RS-232C Protocol_Ver1.0
“ADC Component1 480i Fail” message displayed. If
O Necessary items before Adjustmment items
component is not connection “Component1 Not
- Pattern Generator : MSPG-925FA
Connected”, its format is not 480i then “Not Valid
- Adjust 480i Comp1
Format”, its signal don’t out then “Check Signal Status”
(MSPG-925A : model-209, pattern-65)
message displayed. These messages will be displayed
- Adjust 1080p Comp1/RGB
just a second.
(MSPG-925FA : Model-225, pattern-65)
* If you want more information then see the below Adjsutment
(2) ADC 1080p Component1 / RGB adjustment
method(Factory Adjustment)
- Check connection both of Component1 and RGB
- MSPG-925FA -> Model: 225, Pattern:65
O Adjustment sequence
1) Set Component 1080p mode and 100% Horizontal Color
- ad 00 00 : Enter the ADC Adjustment mode.
Bar Pattern(HozTV31Bar), then set TV set to
- kb 00 04 : Change the mode to Component(No actions)
Component1 mode and its screen to “NORMAL”
- ad 00 10 : Adjust 480i Comp1.
2) If adjustment is correctly finished, “ADC Component1
(Change the mode and adjustment action)
Success” message will be displayed. But adjustment is
- kb 00 06 : Change to RGB-DTV mode(No action)
not correctly finished, “ADC Component1 1080p Fail”
- ad 00 10 : Adjust 1080p Comp1/RGB.
message will be displayed.
(Change the mode and adjustment action)
3) After adjustment Component1 mode, move to RGB-DTV
- ad 00 90 : End of the adjustment.
mode automatically and RGB adjustment start. After
RGB Adjustment successfully finished, “ADC RGB
1080P Success” message will be displayed.
* Factory Adjustment 4) If Adjustment doesn’t success, check conditions all of
the adjustment condition and adjustment again. See
5. Auto Adjust Component 480i/1080p “Error Messages” sentence.
RGB 1080p 5) After adjustment finished, press “ADJ” key and exit from
Adjustment mode.
5-2. Summary
- Adjustment component 480i/1080i and RGB 1080p is Gain
and Black level setting at Analog to Digital converter, and
compensate the RGB deviation

5-3. Using in strument


- Adjustment remocon, 801GF(802B, 802F, 802R) or
MSPG925FA pattern generator.(It can output 480i/1080i
horizontal 100% color bar pattern signal, and its output level
must setting 0.7V±0.1V p-p correctly)
* You must make it sure its resolution and pattern cause every
instrument can have different setting.

Copyright©2007 LG Electronics. Inc. All right reserved. - 15 - LGE Internal Use Only
Only for training and service purposes
6. EDID (The Extended Display (2) HDMI-2 EDID table

Identification Data)/ DDC (Display


Data Channel) Download.
6-1. Summary
(1) It is established in VESA, for communication between PC
and Monitor without order from user for building user
condition. It helps to make easily use realize “Plug and
Play” function.
(2) For EDID data write, we use DDC2B protocol.

6-2. Write HDMI EDID data


(1) Using instruments
1) Jig.(PC Serial to D-Sub connection) for PC, DDC
adjustment.
2) S/W for DDC recording (EDID data write and read)
3) D-sub jack
4) Additional HDMI cable connection Jig.
(2) Preparing and setting.
1) Set instruments and Jig. Like pic.5), then turn on PC (3) HDMI-3 EDID table
and Jig.
2) Operate DDC write S/W (EDID write & read)
3) It will operate in the DOS mode.

LCD TV SET
(or Digital Board)

<Fig.4> For write EDID data, setting Jig and another instruments

6-3. EDID data (Model name = LG TV)


(1) HDMI-1 EDID table

(4) Analog(RGB) EDID table

* See Working Guide if you want more information about


EDID communication.

Copyright©2007 LG Electronics. Inc. All right reserved. - 16 - LGE Internal Use Only
Only for training and service purposes
7. Adjustment Color Temperature A RS-232C Command(Commonly apply)

(White Balance) RS-232C Command


Meaning
[CMD ID DATA]
7-1. Using Instrucments wb 00 00 Start white balance adjustment
(1) Color Analyzer: CA-210 (CH 9) wb 00 10 Start Gain adjustment(Internal white pattern)
- Using LCD color temperature, Color Analyzer (CA-210) wb 00 1f End Gain adjustment
must use CH 9, which Matrix compensated (White, Red, wb 00 20 Start Offset adjustment (Internal white pattern)
Green, Blue compensation) with CS-2100. See the
wb 00 2f End Offset adjustment
Coordination bellowed one.
wb 00 ff End white Balance adjustment (Internal pattern disappear)
(2) Auto-adjustment Equipment (It needs when Auto-
adjustment - It is availed communicate with RS-232C : - Wb 00 00 Start Auto-adjustment of white balance
Baud rate: 115200) - Wb 00 10 Start Gain adjustment (Inner pattern)
(3) Video Signal Generator MSPG-925F 720p, 216Gray - Jb 00 c0
(Model: 217, Pattern 78) -…
- Wb 00 1f End of Adjustment
7-2. Connection Diagram(Auto Adjusment) * If it needs, offset adjustment(wb 00 20-Start, wb 00 2f-End)
(1) Using Inner Pattern - Wb 00 ff End of white balance adjustment
(Inner pattern disappear)

Full White Pattern Color Analyer * Notice!


(Inner pattern) Adjustment Mapping information.
RS-232C COMMAND CENTER
[CMD ID DATA] Min (DEFAULT) Max
RS-232C
Cool Mid Warm Cool Mid Warm
(2) Using HDMI input R Gain jg ja jd 00 184 192 192 192

G Gain jh jb je 00 187 183 159 192


Color Analyer
216Gray White Pattern B Gain ji jc jf 00 192 161 95 192
(HDMI Pattern) MSPG-925FS
Video
ideo Signal Generator R Cut 64 64 64 127
Model : 217
Pattern : 78
G Cut 64 64 64 127

B Cut 64 64 64 127
RS-232C
Baud Rate : 1115200
15200
- When Color temperature (White balance) Adjustment.
<Fig. 5> Connection diagram for Adjusment White balance (Automatically)
1) Press “Power only key” of service remocon and operatie
automatically adjustment.
7-2. White Balance Adjusment 2) Set BaudRate to 115200.
(1) If you can’t adjust with inner pattern, then you can adjust it - You must start “wb 00 00” and finish it “wb 00 ff”.
using HDMI pattern. You can select option at “Ez-Adjust - If it needs, then adjustment “Offset”.
Menu - 7. White Balance” there items “NONE, INNER,
HDMI”. It is normally setting at inner basically. If you can’t
adjust using inner pattern you can select HDMI item, and
you can adjust.
(2) In manual Adjust case, if you press ADJ button of service
remocon, and enter “Ez-Adjust Menu - 7. White Balance”,
then automatically inner pattern operates. (In case of
“Inner” originally “Inner” will be selected.
1) Connect all cables and equipments like Pic.5)
2) Set Baud Rate of RS-232C to 115200. It may set
115200 orignally.
3) Connect RS-232C cable to set
4) Connect HDMI cable to set
5) Select LA75A Chassis at Adjustment equipment, and
adjust.

Copyright©2007 LG Electronics. Inc. All right reserved. - 17 - LGE Internal Use Only
Only for training and service purposes
7-3. White Balance Adjusment 8. GND and ESD Testing
(Manual adjustment)
(1) Test Equipment: CA-210
1) Using LCD color temperature, Color Analyzer (CA-210)
8-1. Prepare GND and ESD Testing
- Check the connection between set and power cord.
must use CH 9, which Matrix compensated (White, Red,
Green, Blue compensation) with CS-2100. See the
Coordination bellowed one.
8-2. Operate GND and ESD auto-test
(1) Fully connectd(Between set and power cord) set enter the
(2) Manual adjustment sequence is like bellowed one.
Auto-test sequence.
1) Turn to “Ez-Adjust” mode with press ADJ button of
(2) Connect D-Jack AV jack test equipment.
service remocon.
(3) Turn on Auto-controller(GWS103-4)
2) Select “10.Test Pattern” with CH+/- button and press
(4) Start Auto GND test.
enter. Then set will go on Heat-run mode. Over 30
(5) If its result is NG, then notice with buzzer.
minutes set let on Heat-run mode.
(6) If its result is OK, then automatically it turns to ESD Test.
3) Let CA-210 to zero calibration and must has gap more
(7) Operate ESD test
10cm from center of LCD module when adjustment.
(8) If its result is NG, then notice with buzzer.
4) Press “ADJ” button of service remocon and select
(9) If its result is OK, then process next steps. Notice it with
“7.White-Balance” in “Ez-Adjust” then press “ G” button
Good lamp and STOPER Down.
of navigation key.
(When press “ G” button then set will go to full white
mode)
8-3. Check Items
(1) TEst Voltage
5) Adjust at three mode (Cool, Medium, Warm)
1) GND : 1.5KV/min at 100mA
6) If “Medium” and “Warm” mode.
2) Signal : 3KV/min at 100mA
- Let R-Gain to 192 and R, G, B-Cut to 64 and then
(2) Test time : just 1 second.
control G, B gain adjustment High Light adjustment.
(3) Test point
7) With volume button (+/-) you can adjust.
1) GND test: Test between Power cord GND and Signal
8) After all adjustment finished, with Enter ( A key) turn to
cable metal GND.
Ez-Adjust mode. Then with ADJ button, exit from
2) ESD test: Test between Power cord GND and Live and
adjustment mode.
neutral.
(4) Leakage current: Set to 0.5mA(rms)
(3) Using CS-1000 Equipment.
Color Temperature Remark
COOL T=11000K, ∆uv=0.000, X=0.276, Y=0.283
MEDIUM T= 9300K, ∆uv=0.000, X=0.285, Y=0.293
WARM T= 6500K, ∆uv=0.000, X=0.313, Y=0.329

(4) Using CS-210 Equipment.(9CH)


- Contrast value : 216Gray
Color temperature Color analyzer Color coordinate
X Y
COOL CA-210 0.276±0.002 0.283±0.002
MEDIUM CA-210 0.285±0.002 0.293±0.002
WARM CA-210 0.313±0.002 0.329±0.002

7-4. Test of RS-232C control


- Press In-Start button of Service Remocon then set the
“4.Baud Rate” to 115200. Then check RS-232C control.

7-5. Selection of Country option


- Selection of country option is allowed only North American
model (Not allowed Korean model). It is selection of Country
about Rating and Time Zone.

(1) Models: All models which use LA75A Chassis (See the
first page.)
(2) Press “In-Start” button of Service Remocon, then enter the
“Option” Menu with “PIP CH-” Button.
(3) Select one of these three (USA, CANADA, MEXICO)
defends on its market using “Vol. +/-” button.

Copyright©2007 LG Electronics. Inc. All right reserved. - 18 - LGE Internal Use Only
Only for training and service purposes
9. Default Service option 10. Default Service option
No Item Condition

1 Input Mode TV02CH


2 Volume Level 10
3 Mute Off
4 Aspect Ratio 16:9
5 Picture Picture Mode Vivid
User1 Back Light 100
Contrast 100
Bright 50
Sharpness 70
9-1. ADC-Set Color 70
(1) R-Gain adjustment Value (default 128)
(2) G-Gain adjustment Value (default 128) Tint 0
(3) B-Gain adjustment Value (default 128) Color Temperature Medium
(4) R-Offset adjustment Value (default 64 )
(5) G-Offset adjustment Value (default 64 ) Picture Reset
(6) B-Offset adjustment Value (default 64 ) 6 Audio Sound Mode Standard

9-2. White balance. Value Auto Volume Off

CENTER(DEFAULT) Clear Voice Off


Max
Cool Mid Warm Front Surrround Off
Balance 0
R Gain 184 192 192 192
TV Speaker On
G Gain 189 184 150 192
7 Time Clock Auto
B Gain 192 161 84 192
Off Timer / On Timer Off
R Cut 64 64 64 127
Sleep Timer / Auto Off
G Cut 64 64 64 127
8 Option Language(Menu/Audio) Portugues
B Cut 64 64 64 127
SimpLink On
9-3. Temperature Threshold Key Lock Off
(1) Threshold Down Low 20
Caption Off
(2) Threshold Up Low 23
(3) Threshold Down High 70 Set ID 1
(4) Threshold Down High 75
9 Channel Memory RF : 2,3,4,5,6,7,8,9,10,11,
12,13,14,30,51,63
CATV : 15,16,17

Copyright©2007 LG Electronics. Inc. All right reserved. - 19 - LGE Internal Use Only
Only for training and service purposes
NVRAM
I2C 24C16
NIM TUNER KIA7029

RF Analog DDR1(128MB)
DDR1(128MB)
/Digital TC90512 74LVC14APW (16Mx16x4) MTV416
Switch Reset
(16Mx16x4) Local KEY
1. Power-Up Boot Fail

Tuner
64Bit I/F (Micom)

Only for training and service purposes


PKT
Serial TP IB0 WXGA(768P)
HD/SD
CVBS Digital out
Video
1-1. Block Diagram of Troubleshooting

SIF Parse2
Encoder
CVBS/Y/C
AV1

Copyright©2007 LG Electronics. Inc. All right reserved.


Video RSBUF
CVBS/Y/C Full HD(1080P)
AV2 Front
End
COMP1 XCBUF MNT out (Audio Only)
Y/Cb/Cr
COMP2
RMX0
R/G/B Audio 74HC04
RGB-PC

- 20 -
DVI HD-DVI BCM3553 DSP SPDIF Out
(Coaxial)
20bits
Dual
TMDS341A TMDS_RX+- SPDIF Out
HDMI HDMI
(3x1,S/W)
1/2/3 Rx PCI/
TROUBLESHOOTING

I2S EBI Flash


L/R CS5340
(32MB)
COMP 1 MC33078 MCLK
COMP 2 I2S BCM7412
L/R (AMP)
TEA6420 HSX Serial
AV1 (MPEG4
DDR1

USB2.0
(64MB)

AV2 Audio NTP3000 TP Decoder)


RGB-PC SW (Digital AMP) DM1/DP1
RX/TX 12bit YC 4:2:2

DVI
X-tal(54M) EPM240F
RS232 4:2:2 20bit YC

LGE Internal Use Only


Check P800, P801 All N Check Power connector Y Replace Power board
OK ?
1-2. Troubleshooting
Voltage Level (19V, 12V, 6V, 3.3V)
1. Power-Up Boot Fail

Only for training and service purposes


Check IC804 #2 Pin / L805 N Replace IC804 / L805 & N
Voltage Level 3.3V Recheck

Copyright©2007 LG Electronics. Inc. All right reserved.


Check IC803 #5 Pin / L807 N Replace IC803 or L807 & N Check Micom IC407
Voltage Level 2.6V Recheck Redownload or replace

Check C830, C853, C856 N Replace IC802 or IC805 & N


Voltage Level 1.2V Recheck

- 21 -
Y

Check X200 Clock N Replace X200


54MHz
TROUBLESHOOTING

Check R154 Clock N Maybe BCM3553 has troubles.


33MHz

Replace IC101 Flash Memory

LGE Internal Use Only


I2C

2. No OSD
NVRAM 24C16
NIM TUNER KIA7029

RF Analog DDR1(128MB)
DDR1(128MB)
/Digital TC90512 74LVC14APW (16Mx16x4)
(16Mx16x4) MTV416 Local KEY
Switch Tuner Reset
64Bit I/F (Micom)

PKT

Only for training and service purposes


Serial TP IB0 WXGA(768P)
HD/SD
CVBS Digital out
Parse2 Video
2-1. Block Diagram of Troubleshooting

SIF
Encoder
CVBS/Y/C
AV1 Video

Copyright©2007 LG Electronics. Inc. All right reserved.


CVBS/Y/C RSBUF
Front Full HD(1080P)
AV2
End
COMP1 XCBUF MNT out (Audio Only)
Y/Cb/Cr
COMP2
RMX0
R/G/B Audio 74HC04
RGB-PC

- 22 -
DVI HD-DVI BCM3553 DSP SPDIF Out
20bits (Coaxial)
Dual
TMDS341A TMDS_RX+- SPDIF Out
HDMI HDMI
(3x1,S/W)
1/2/3 Rx PCI/
TROUBLESHOOTING

I2S EBI Flash


L/R CS5340
(32MB)
COMP 1 MC33078 MCLK
COMP 2 I2S BCM7412
L/R (AMP)
TEA6420 HSX Serial
AV1 (MPEG4
DDR1

USB2.0
(64MB)

AV2 Audio NTP3000 TP Decoder)


RGB-PC SW (Digital AMP) DM1/DP1
RX/TX 12bit YC 4:2:2

DVI
X-tal(54M) EPM240F
RS232 4:2:2 20bit YC

LGE Internal Use Only


2-2. Troubleshooting
2. Power-Up Boot Fail

Check D901 Pin #1 N Check Y Replace Power board


Voltage Level 12V Power connector

Only for training and service purposes


Y

Check L901 N Replace L901


Voltage Level 12V

Copyright©2007 LG Electronics. Inc. All right reserved.


Y

Check P903
#33(TXAC-) , #32(TXAC+) , N
Maybe BCM3553 has problems
#17(TXBC-) , #16(TXBC+)

- 23 -
Y

N
Check LVDS Cable Replace Cable
TROUBLESHOOTING

Check PDP/LCD Module


Control board

LGE Internal Use Only


NVRAM
I2C 24C16
NIM TUNER KIA7029

RF Analog DDR1(128MB)
DDR1(128MB) 3. Digital TV Video
/Digital TC90512 74LVC14APW (16Mx16x4) MTV416
Switch Reset
(16Mx16x4) Local KEY
Tuner
64Bit I/F (Micom)

Only for training and service purposes


PKT
Serial TP IB0 WXGA(768P)
HD/SD
CVBS Digital out
Video
3-1. Block Diagram of Troubleshooting

SIF Parse2
Encoder
CVBS/Y/C
AV1

Copyright©2007 LG Electronics. Inc. All right reserved.


Video RSBUF
CVBS/Y/C Full HD(1080P)
AV2 Front
End
COMP1 XCBUF MNT out (Audio Only)
Y/Cb/Cr
COMP2
RMX0
R/G/B Audio 74HC04
RGB-PC

- 24 -
DVI HD-DVI BCM3553 DSP SPDIF Out
(Coaxial)
20bits
Dual
TMDS341A TMDS_RX+- SPDIF Out
HDMI HDMI
(3x1,S/W)
1/2/3 Rx PCI/
TROUBLESHOOTING

I2S EBI Flash


L/R CS5340
(32MB)
COMP 1 MC33078 MCLK
COMP 2 I2S BCM7412
L/R (AMP)
TEA6420 HSX Serial
AV1 (MPEG4
DDR1

USB2.0
(64MB)

AV2 Audio NTP3000 TP Decoder)


RGB-PC SW (Digital AMP) DM1/DP1
RX/TX 12bit YC 4:2:2

DVI
X-tal(54M) EPM240F
RS232 4:2:2 20bit YC

LGE Internal Use Only


Check RF Cable

Y
3. Digital TV Video
3-2. Troubleshooting
Check BCM7412 Input Clock N Replace it
N R107 (27MHz)
Check Tuner 5V Power Replace IC810
IC810 #3 Pin

Only for training and service purposes


Y
Y

red Maybe BCM3553(IC100) has problems


Check D805 color Bad Tuner. Replace Tuner.

Copyright©2007 LG Electronics. Inc. All right reserved.


None

Check TP Clock, Data, Sync N


Maybe Tuner(TU800) has problems
R925 (38.1MHz), R804, R803

- 25 -
Check BCM3553 Output TP Clock,
N Maybe BCM3553(IC100) has problems
Data, Sync
R153, R155, R152

Y
TROUBLESHOOTING

Check BCM7412 Clock,Hsync, Vsync N Maybe BCM7412(IC1000) has problems


R1088 (Typ. 74.25MHz), R1087, R1086

Check PLD Clock, Hsync, Vsync N


Redownload PLD file or replace
R1102 (Typ. 74.25MHz), R1100, R1101

LGE Internal Use Only


NVRAM
I2C 24C16
NIM TUNER KIA7029

RF Analog DDR1(128MB)
DDR1(128MB)
4. Analog TV Video
/Digital TC90512 74LVC14APW (16Mx16x4) MTV416
Switch Reset
(16Mx16x4) Local KEY
Tuner
64Bit I/F (Micom )

Only for training and service purposes


PKT
Serial TP IB0 WXGA(768P)
HD/SD
CVBS Digital out
4-1. Block Diagram of Troubleshooting

Parse2 Video
SIF
Encoder
CVBS/Y/C

Copyright©2007 LG Electronics. Inc. All right reserved.


AV1 Video
CVBS/Y/C RSBUF
Front Full HD(1080P)
AV2
End
COMP1 XCBUF MNT out (Audio Only)
Y/Cb/Cr
COMP2
RMX0
R/G/B Audio 74HC04

- 26 -
RGB-PC
DVI HD-DVI BCM3553 DSP SPDIF Out
(Coaxial)
20bits
Dual
TMDS341A TMDS_RX+- SPDIF Out
HDMI HDMI
(3x1,S/W)
1/2/3 Rx PCI/
TROUBLESHOOTING

I2S EBI Flash


L/R CS5340
(32MB)
COMP 1 MC33078 MCLK
COMP 2 I2S BCM7412
L/R (AMP)
TEA6420 HSX Serial
AV1 (MPEG4
DDR1

USB2.0
(64MB)

AV2 Audio NTP3000 TP Decoder)


RGB-PC SW (Digital AMP) DM1/DP1
RX/TX 12bit YC 4:2:2

DVI
X-tal(54M) EPM240F
RS232 4:2:2 20bit YC

LGE Internal Use Only


4. Analog TV Video
4-2. Troubleshooting

Check RF Cable

Only for training and service purposes


Check Tuner 5V Power N Replace it
IC810 #3 Pin

Copyright©2007 LG Electronics. Inc. All right reserved.


Check CVBS signal N Maybe Tuner(TU800) has problems
TU800 #17 Pin

- 27 -
Check CVBS signal N Replace IC808 or check L800 5V power
IC808 #8 Pin

Y
TROUBLESHOOTING

Check CVBS signal N Replace it


C658

Maybe BCM3553(IC100) has problems

LGE Internal Use Only


NVRAM I2C 24C16
NIM TUNER KIA7029

RF Analog DDR1(128MB)
DDR1(128MB)
/Digital TC90512 74LVC14APW (16Mx16x4)
(16Mx16x4) MTV416 Local KEY
5. Component Video

Switch Tuner Reset


64Bit I/F (Micom)

PKT

Only for training and service purposes


Serial TP IB0 WXGA(768P)
HD/SD
CVBS Digital out
Parse2 Video
5-1. Block Diagram of Troubleshooting

SIF
Encoder
CVBS/Y/C
AV1 Video

Copyright©2007 LG Electronics. Inc. All right reserved.


CVBS/Y/C RSBUF
Front Full HD(1080P)
AV2
End
COMP1 XCBUF MNT out (Audio Only)
Y/Cb/Cr
COMP2
RMX0
R/G/B Audio 74HC04
RGB-PC

- 28 -
DVI HD-DVI BCM3553 DSP SPDIF Out
20bits (Coaxial)
Dual
TMDS341A TMDS_RX+- SPDIF Out
HDMI HDMI
(3x1,S/W)
1/2/3 Rx PCI/
TROUBLESHOOTING

I2S EBI Flash


L/R CS5340
(32MB)
COMP 1 MC33078 MCLK
COMP 2 I2S BCM7412
L/R (AMP)
TEA6420 HSX Serial
AV1 (MPEG4
DDR1

USB2.0
(64MB)

AV2 Audio NTP3000 TP Decoder)


RGB-PC SW (Digital AMP) DM1/DP1
RX/TX 12bit YC 4:2:2

DVI
X-tal(54M) EPM240F
RS232 4:2:2 20bit YC

LGE Internal Use Only


5-2. Troubleshooting
5. Component Video

Check signal format


Is it supported?

Only for training and service purposes


Y

Check Component Cable

Copyright©2007 LG Electronics. Inc. All right reserved.


N
Check J700 / J702 Replace connector

- 29 -
Check signal N Replace it.
L700, L701. L702 / L704, L705, L706

Y
TROUBLESHOOTING

Check signal N Replace it


C638, C639, C640 / C628, C629, C630

Maybe BCM3553(IC100) has problems

LGE Internal Use Only


NVRAM
I2C 24C16

6. RGB Video
NIM TUNER KIA7029

RF Analog DDR1(128MB)
DDR1(128MB)
/Digital TC90512 74LVC14APW (16Mx16x4) MTV416
Switch
(16Mx16x4) Local KEY
Tuner Reset
64Bit I/F (Micom)

Only for training and service purposes


PKT
Serial TP IB0 WXGA(768P)
HD/SD
CVBS Digital out
6.1 Block Diagram of Troubleshooting

Parse2 Video
SIF
Encoder
CVBS/Y/C
AV1

Copyright©2007 LG Electronics. Inc. All right reserved.


Video RSBUF
CVBS/Y/C Full HD(1080P)
AV2 Front
End
COMP1 XCBUF MNT out (Audio Only)
Y/Cb/Cr
COMP2
RMX0
R/G/B Audio 74HC04
RGB-PC

- 30 -
DVI HD-DVI BCM3553 DSP SPDIF Out
(Coaxial)
20bits
Dual
TMDS341A TMDS_RX+- SPDIF Out
HDMI HDMI
(3x1,S/W)
1/2/3 Rx PCI/
TROUBLESHOOTING

I2S EBI Flash


L/R CS5340
(32MB)
COMP 1 MC33078 MCLK
COMP 2 I2S BCM7412
L/R (AMP)
TEA6420 HSX Serial
AV1 (MPEG4
DDR1

USB2.0
(64MB)

AV2 Audio NTP3000 TP Decoder)


RGB-PC SW (Digital AMP) DM1/DP1
RX/TX 12bit YC 4:2:2

DVI
X-tal(54M) EPM240F
RS232 4:2:2 20bit YC

LGE Internal Use Only


Check signal format
Is it supported?

Y 6. RGB Video
6.2 Troubleshooting

Check RGB Cable

Only for training and service purposes


Y

N Replace connector
Check P701

Copyright©2007 LG Electronics. Inc. All right reserved.


Check signal,Hsync, Vsync N Replace it.
C745, C746, C747, R839, R843

- 31 -
Check signal N Replace it
R727, R714, R729

Y
TROUBLESHOOTING

N
Check L708 Voltage Level 9V Replace L708 / Q701 / Q702 / Q703

Check Signal N Replace it


C635, C636, C637

Maybe BCM3553(IC100) has problems

LGE Internal Use Only


NVRAM I2C 24C16

7. AV Video
NIM TUNER KIA7029

RF Analog DDR1(128MB)
DDR1(128MB)
/Digital TC90512 74LVC14APW (16Mx16x4)
(16Mx16x4) MTV416 Local KEY
Switch Tuner Reset
64Bit I/F (Micom)

Only for training and service purposes


PKT
Serial TP IB0 WXGA(768P)
HD/SD
CVBS Digital out
Video
7-1. Block Diagram of Troubleshooting

SIF Parse2
Encoder
CVBS/Y/C
AV1 Video

Copyright©2007 LG Electronics. Inc. All right reserved.


CVBS/Y/C RSBUF
Front Full HD(1080P)
AV2
End
COMP1 XCBUF MNT out (Audio Only)
Y/Cb/Cr
COMP2
RMX0
R/G/B Audio 74HC04
RGB-PC

- 32 -
DVI HD-DVI BCM3553 DSP SPDIF Out
20bits (Coaxial)
Dual
TMDS341A TMDS_RX+- SPDIF Out
HDMI HDMI
(3x1,S/W)
1/2/3 Rx PCI/
TROUBLESHOOTING

I2S EBI Flash


L/R CS5340
(32MB)
COMP 1 MC33078 MCLK
COMP 2 I2S BCM7412
L/R (AMP)
TEA6420 HSX Serial
AV1 (MPEG4
DDR1

USB2.0
(64MB)

AV2 Audio NTP3000 TP Decoder)


RGB-PC SW (Digital AMP) DM1/DP1
RX/TX 12bit YC 4:2:2

DVI
X-tal(54M) EPM240F
RS232 4:2:2 20bit YC

LGE Internal Use Only


7. AV Video
7-2. Troubleshooting
Check signal format
Is it supported?

Only for training and service purposes


Check AV Cable / S-Video Cable

Copyright©2007 LG Electronics. Inc. All right reserved.


Check J701 (Rear) N Replace connector
Check P700 & Cable (Side)

- 33 -
Check signal
N
R755 (Composite), R814 / R815 (S-Video) (Rear) Replace it.
R855 (Composite), R856 / R857 (S-Video) (Side)

Check signal
N
TROUBLESHOOTING

C651 (Composite), C648 / C649 (S-Video) (Rear) Replace it


C652 (Composite), C659 / C660 (S-Video) (Rear)

Maybe BCM3553(IC100) has problems

LGE Internal Use Only


NVRAM I2C 24C16
NIM TUNER KIA7029

RF Analog DDR1(128MB)
DDR1(128MB) 8. HDMI Video
/Digital TC90512 74LVC14APW (16Mx16x4)
(16Mx16x4) MTV416 Local KEY
Switch Tuner Reset
64Bit I/F (Micom)

PKT

Only for training and service purposes


Serial TP IB0 WXGA(768P)
HD/SD
CVBS Digital out
Parse2 Video
8-1. Block Diagram of Troubleshooting

SIF
Encoder
CVBS/Y/C
AV1 Video

Copyright©2007 LG Electronics. Inc. All right reserved.


CVBS/Y/C RSBUF
Front Full HD(1080P)
AV2
End
COMP1 XCBUF MNT out (Audio Only)
Y/Cb/Cr
COMP2
RMX0
R/G/B Audio 74HC04
RGB-PC

- 34 -
DVI HD-DVI BCM3553 DSP SPDIF Out
20bits (Coaxial)
Dual
TMDS341A TMDS_RX+- SPDIF Out
HDMI HDMI
(3x1,S/W)
1/2/3 Rx PCI/
TROUBLESHOOTING

I2S EBI Flash


L/R CS5340
(32MB)
COMP 1 MC33078 MCLK
COMP 2 I2S BCM7412
L/R (AMP)
TEA6420 HSX Serial
AV1 (MPEG4
DDR1

USB2.0
(64MB)

AV2 Audio NTP3000 TP Decoder)


RGB-PC SW (Digital AMP) DM1/DP1
RX/TX 12bit YC 4:2:2

DVI
X-tal(54M) EPM240F
RS232 4:2:2 20bit YC

LGE Internal Use Only


Check signal format
Is it supported?

8. HDMI Video
Y

8-2. Troubleshooting
Check HDMI Cable

Only for training and service purposes


N Replace connector
Check J600 / J601 / J602

Copyright©2007 LG Electronics. Inc. All right reserved.


Check IC809 #2 Pin Voltage Level N Replace it
3.3V

- 35 -
N
Check L607 Voltage Level 3.3V Replace it

Check EDID NVRAM (IC602, 603, 604) N Replace it orredownload


Power & I2C Signal (#5, #6)
TROUBLESHOOTING

Check HDCP Key NVRAM (IC102) N Replace it


Power & I2C Signal (#5, #6)

Check IC601 Clock Signal N Replace it Maybe BCM3553(IC100) has problems


#26, #27

LGE Internal Use Only


NVRAM I2C 24C16
NIM TUNER KIA7029

RF Analog DDR1(128MB)
DDR1(128MB)
/Digital TC90512 74LVC14APW
9. All Source Audio
(16Mx16x4)
(16Mx16x4) MTV416 Local KEY
Switch Tuner Reset
64Bit I/F (Micom)

PKT

Only for training and service purposes


Serial TP IB0 WXGA(768P)
HD/SD
CVBS Digital out
Video
9-1. Block Diagram of Troubleshooting

SIF Parse2
Encoder
CVBS/Y/C
AV1 Video

Copyright©2007 LG Electronics. Inc. All right reserved.


CVBS/Y/C RSBUF
Front Full HD(1080P)
AV2
End
COMP1 XCBUF MNT out (Audio Only)
Y/Cb/Cr
COMP2
RMX0
R/G/B Audio 74HC04
RGB-PC

- 36 -
DVI HD-DVI BCM3553 DSP SPDIF Out
20bits (Coaxial)
Dual
TMDS341A TMDS_RX+- SPDIF Out
HDMI HDMI
(3x1,S/W)
1/2/3 Rx PCI/
TROUBLESHOOTING

I2S EBI Flash


L/R CS5340
(32MB)
COMP 1 MC33078 MCLK
COMP 2 I2S BCM7412
L/R (AMP)
TEA6420 HSX Serial
AV1 (MPEG4
DDR1

USB2.0
(64MB)

AV2 Audio NTP3000 TP Decoder)


RGB-PC SW (Digital AMP) DM1/DP1
RX/TX 12bit YC 4:2:2

DVI
X-tal(54M) EPM240F
RS232 4:2:2 20bit YC

LGE Internal Use Only


Make sure you can’t hear any audio

Y 9. All Source Video


9-2. Troubleshooting
Check BCM3553 I2S Output N
Replace it.
R627, R628, R629

Only for training and service purposes


Check IC501 Power 19V, 3.3V, 1.8V N Replace L
L500, L501, L502, L503

Copyright©2007 LG Electronics. Inc. All right reserved.


Check Signal N
Replace it.
L504, L505

- 37 -
Check Signal N
Replace it
L508, L509, L510, L511

Y
TROUBLESHOOTING

Check Connector N Replace connector


P500

N Replace speaker
Check speaker

Maybe NTP3000 has problems. Replace it

LGE Internal Use Only


NVRAM I2C 24C16
NIM TUNER KIA7029

RF Analog DDR1(128MB)
DDR1(128MB)
/Digital TC90512 74LVC14APW
10. Digital TV Audio
(16Mx16x4)
(16Mx16x4) MTV416 Local KEY
Switch Tuner Reset
64Bit I/F (Micom)

Only for training and service purposes


PKT
Serial TP IB0 WXGA(768P)
HD/SD
CVBS Digital out
Parse2 Video
10-1. Block Diagram of Troubleshooting

SIF
Encoder
CVBS/Y/C
AV1 Video

Copyright©2007 LG Electronics. Inc. All right reserved.


CVBS/Y/C RSBUF
Front Full HD(1080P)
AV2
End
COMP1 XCBUF MNT out (Audio Only)
Y/Cb/Cr
COMP2
RMX0
R/G/B Audio 74HC04
RGB-PC

- 38 -
DVI HD-DVI BCM3553 DSP SPDIF Out
20bits (Coaxial)
Dual
TMDS341A TMDS_RX+- SPDIF Out
HDMI HDMI
(3x1,S/W)
1/2/3 Rx PCI/
TROUBLESHOOTING

I2S EBI Flash


L/R CS5340
(32MB)
COMP 1 MC33078 MCLK
COMP 2 I2S BCM7412
L/R (AMP)
TEA6420 HSX Serial
AV1 (MPEG4
DDR1

USB2.0
(64MB)

AV2 Audio NTP3000 TP Decoder)


RGB-PC SW (Digital AMP) DM1/DP1
RX/TX 12bit YC 4:2:2

DVI
X-tal(54M) EPM240F
RS232 4:2:2 20bit YC

LGE Internal Use Only


TROUBLESHOOTING
10. Digital TV Audio
10-2. Troubleshooting

Maybe BCM3553 internal audio DSP has


Follow procedure digital TV video

problems. Replace it
trouble shooting
N

N
Follow procedure All source audio trouble
Check video output

shooting
Y

Copyright©2007 LG Electronics. Inc. All right reserved. - 39 - LGE Internal Use Only
Only for training and service purposes
NVRAM I2C 24C16
NIM TUNER KIA7029

RF Analog DDR1(128MB)
DDR1(128MB)
/Digital TC90512 74LVC14APW
11. Analog TV Audio
(16Mx16x4)
(16Mx16x4) MTV416 Local KEY
Switch Tuner Reset
64Bit I/F (Micom)

Only for training and service purposes


PKT
Serial TP IB0 WXGA(768P)
HD/SD
CVBS Digital out
Video
11-1. Block Diagram of Troubleshooting

SIF Parse2
Encoder
CVBS/Y/C

Copyright©2007 LG Electronics. Inc. All right reserved.


AV1 Video
CVBS/Y/C RSBUF
Front Full HD(1080P)
AV2
End
COMP1 XCBUF MNT out (Audio Only)
Y/Cb/Cr
COMP2
RMX0
R/G/B Audio 74HC04

- 40 -
RGB-PC
DVI HD-DVI BCM3553 DSP SPDIF Out
20bits (Coaxial)
Dual
TMDS341A TMDS_RX+- SPDIF Out
HDMI HDMI
(3x1,S/W)
1/2/3 Rx PCI/
TROUBLESHOOTING

I2S EBI Flash


L/R CS5340
(32MB)
COMP 1 MC33078 MCLK
COMP 2 I2S BCM7412
L/R (AMP)
TEA6420 HSX Serial
AV1 (MPEG4
DDR1

USB2.0
(64MB)

AV2 Audio NTP3000 TP Decoder)


RGB-PC SW (Digital AMP) DM1/DP1
RX/TX 12bit YC 4:2:2

DVI
X-tal(54M) EPM240F
RS232 4:2:2 20bit YC

LGE Internal Use Only


N Follow procedure analog TV video
Check video output
trouble shooting

Y
11. Analog TV Video

N
11-2. Troubleshooting
Check L801 voltage level 5V Replace it

Only for training and service purposes


Check SIF signal N Replace it
C801 / C806 / Q800

Copyright©2007 LG Electronics. Inc. All right reserved.


Check SIF signal N Replace it
R726 / C665

Follow procedure All source audio trouble

- 41 -
N Maybe BCM3553 audio block has
shooting problems. Replace it
TROUBLESHOOTING

LGE Internal Use Only


NVRAM
I2C 24C16
NIM TUNER KIA7029

RF Analog DDR1(128MB)
DDR1(128MB)
/Digital TC90512 74LVC14APW (16Mx16x4) MTV416
Switch Reset
(16Mx16x4) Local KEY
Tuner
64Bit I/F (Micom)

PKT

Only for training and service purposes


Serial TP IB0 WXGA(768P)
HD/SD
12. Component / RGB / AV Audio

CVBS Digital out


Parse2 Video
SIF
12-1. Block Diagram of Troubleshooting

Encoder
CVBS/Y/C
AV1 Video

Copyright©2007 LG Electronics. Inc. All right reserved.


CVBS/Y/C RSBUF
Front Full HD(1080P)
AV2
End
COMP1 XCBUF MNT out (Audio Only)
Y/Cb/Cr
COMP2
RMX0
R/G/B Audio 74HC04
RGB-PC

- 42 -
DVI HD-DVI BCM3553 DSP SPDIF Out
(Coaxial)
20bits
Dual
TMDS341A TMDS_RX+- SPDIF Out
HDMI HDMI
(3x1,S/W)
1/2/3 Rx PCI/
TROUBLESHOOTING

I2S EBI Flash


L/R CS5340
(32MB)
COMP 1 MC33078 MCLK
COMP 2 I2S BCM7412
L/R (AMP)
TEA6420 HSX Serial
AV1 (MPEG4
DDR1

USB2.0
(64MB)

AV2 Audio NTP3000 TP Decoder)


RGB-PC SW (Digital AMP) DM1/DP1
RX/TX 12bit YC 4:2:2

DVI
X-tal(54M) EPM240F
RS232 4:2:2 20bit YC

LGE Internal Use Only


N Follow procedure external
Check video output
input video trouble shooting
12-2. Troubleshooting

Check signal N
Y Replace it or IC503
C554 / R569 / R581 / C562

Only for training and service purposes


Check Connector Y
J700 / J702 (Component) N
Replace connector
12. Component / RGB / AV Audio

J703 (RGB)
Check IC502 power L514 voltage level N
J701 / P700 & cable (AV Rear, AV Side) Replace it
3.3V & L515 voltage level 5V
Y
Y

Copyright©2007 LG Electronics. Inc. All right reserved.


Check signal
C734 / R746 / C735 / R752 (Component1) Check IC502 power L514 voltage level N
C736 / R829 / C737 / R833 (Component2) N Replace it
3.3V & L515 voltage level 5V
Replace it
C733 / R837 / C732 / R838 (RGB)
C701 / R816 / C700 / R817 (AV Rear) Y
C729 / R858 / C728 / R859 (AV Side)

- 43 -
Y Check I2S signal N Replace it or IC502
R548 / R549 / R550

N Y
Check IC500 power L512 voltage level 9V Replace it

Y Check Audio clock N Replace it


R134
TROUBLESHOOTING

Check signal N Y
Replace it or IC500
R532 / R533 / C555 / R568 / C563 / R582

Y Maybe BCM3553 has problems

N
Check IC503 power L513 voltage level 9V Replace it

LGE Internal Use Only


NVRAM I2C 24C16
NIM TUNER KIA7029

RF Analog DDR1(128MB)
DDR1(128MB) 13. HDMI Audiol
/Digital TC90512 74LVC14APW (16Mx16x4)
(16Mx16x4) MTV416 Local KEY
Switch Tuner Reset
64Bit I/F (Micom)

PKT

Only for training and service purposes


Serial TP IB0 WXGA(768P)
HD/SD
CVBS Digital out
Parse2 Video
SIF
13-1 Block Diagram of Troubleshooting

Encoder
CVBS/Y/C
AV1 Video RSBUF

Copyright©2007 LG Electronics. Inc. All right reserved.


CVBS/Y/C Full HD(1080P)
AV2 Front
End
COMP1 XCBUF MNT out (Audio Only)
Y/Cb/Cr
COMP2
RMX0
R/G/B Audio 74HC04
RGB-PC

- 44 -
DVI HD-DVI BCM3553 DSP SPDIF Out
20bits (Coaxial)
Dual
TMDS341A TMDS_RX+- SPDIF Out
HDMI HDMI
(3x1,S/W)
1/2/3 Rx PCI/
I2S EBI
TROUBLESHOOTING

Flash
L/R CS5340
(32MB)
COMP 1 MC33078 MCLK
COMP 2 I2S BCM7412
L/R (AMP)
TEA6420 HSX Serial
AV1 (MPEG4
DDR1

USB2.0
(64MB)

AV2 Audio NTP3000 TP Decoder)


RGB-PC SW (Digital AMP) DM1/DP1
RX/TX 12bit YC 4:2:2

DVI
X-tal(54M) EPM240F
RS232 4:2:2 20bit YC

LGE Internal Use Only


N Follow procedure HDMI video trouble
Check video output
shooting

Y 13. HDMI Audio


13-2. Troubleshooting
Check EDID NVRAM (IC602, 603, 604) N Replace it orredownload
Power & I2C Signal (#5, #6)

Only for training and service purposes


Follow procedure All source audio trouble N Maybe BCM3553 audio block has
shooting problems. Replace it

Copyright©2007 LG Electronics. Inc. All right reserved.


- 45 -
TROUBLESHOOTING

LGE Internal Use Only


14. USB
NVRAM
I2C 24C16
NIM TUNER KIA7029

RF Analog DDR1(128MB)
DDR1(128MB)
/Digital TC90512 74LVC14APW (16Mx16x4) MTV416
Switch Reset
(16Mx16x4) Local KEY
Tuner
64Bit I/F (Micom)

PKT

Only for training and service purposes


Serial TP IB0 WXGA(768P)
HD/SD
CVBS Digital out
Parse2 Video
SIF
14-1. Block Diagram of Troubleshooting

Encoder
CVBS/Y/C
AV1 Video

Copyright©2007 LG Electronics. Inc. All right reserved.


CVBS/Y/C RSBUF
Front Full HD(1080P)
AV2
End
COMP1 XCBUF MNT out (Audio Only)
Y/Cb/Cr
COMP2
RMX0
R/G/B Audio 74HC04
RGB-PC

- 46 -
DVI HD-DVI BCM3553 DSP SPDIF Out
(Coaxial)
20bits
Dual
TMDS341A TMDS_RX+- SPDIF Out
HDMI HDMI
(3x1,S/W)
1/2/3 Rx PCI/
TROUBLESHOOTING

I2S EBI Flash


L/R CS5340
(32MB)
COMP 1 MC33078 MCLK
COMP 2 I2S BCM7412
L/R (AMP)
TEA6420 HSX Serial
AV1 (MPEG4
DDR1

USB2.0
(64MB)

AV2 Audio NTP3000 TP Decoder)


RGB-PC SW (Digital AMP) DM1/DP1
RX/TX 12bit YC 4:2:2

DVI
X-tal(54M) RS232 EPM240F
4:2:2 20bit YC

LGE Internal Use Only


14. USB
Check USB 2.0 Cable

Check USB Device


14-2. Troubleshooting
If device is 2.5 inch HDD, check power adaptor

Only for training and service purposes


N
Check P201 Replace it

Copyright©2007 LG Electronics. Inc. All right reserved.


Check L205 voltage level 5V N Replace it or IC202

- 47 -
Maybe BCM3553 has problems

• Exception
TROUBLESHOOTING

- USB power could be disabled by inrushing current


- In this case, remove the device and try to reboot the TV (AC power off/on)

LGE Internal Use Only


NVRAM
I2C 24C16
NIM TUNER KIA7029

RF Analog DDR1(128MB)
DDR1(128MB)
/Digital TC90512 74LVC14APW (16Mx16x4) MTV416
Switch Reset
(16Mx16x4) Local KEY
Tuner
64Bit I/F (Micom)

Only for training and service purposes


PKT
Serial TP IB0 WXGA(768P)
HD/SD
CVBS Digital out
Parse2 Video
SIF
Encoder
CVBS/Y/C
AV1 Video

Copyright©2007 LG Electronics. Inc. All right reserved.


CVBS/Y/C RSBUF
Front Full HD(1080P)
AV2
End
COMP1 XCBUF MNT out (Audio Only)
Y/Cb/Cr
COMP2
RMX0
R/G/B Audio 74HC04
RGB-PC

- 48 -
DVI HD-DVI BCM3553 DSP SPDIF Out
(Coaxial)
20bits
Dual
TMDS341A TMDS_RX+- SPDIF Out
HDMI HDMI
(3x1,S/W)
BLOCK DIAGRAM

1/2/3 Rx PCI/
I2S EBI Flash
L/R CS5340
(32MB)
COMP 1 MC33078 MCLK
COMP 2 I2S BCM7412
L/R (AMP)
TEA6420 HSX Serial
AV1 (MPEG4
DDR1

USB2.0
(64MB)

AV2 Audio NTP3000 TP Decoder)


RGB-PC SW (Digital AMP) DM1/DP1
RX/TX 12bit YC 4:2:2

DVI
X-tal(54M) EPM240F
RS232 4:2:2 20bit YC

LGE Internal Use Only


Reset Design I2C Design
Active Low Active High 3.3V
Power-on CH 0
BCM7412
Reset
NIM TUNER
(0xC2, 0x30)
Not Gate Active Low 5V
BCM3553 CH 1
Audio

Only for training and service purposes


Switch
Flash (0x9A)
BCM3553
3.3V
CH 2
HDCP Key Audio
Tuner NVRAM

Copyright©2007 LG Electronics. Inc. All right reserved.


EEPROM AMP
(0xA6)
(0xA8) (0x54)
3.3V
CH 3
PLD
Micom
(0x50)

- 49 -
Clock Design
Main Clock

54M
BLOCK DIAGRAM

BCM3553
Crystal

33MHz

BCM7412

27MHz Clock is Recovered From The STC Values

BCM3553 BCM7412
VCXO 27M

LGE Internal Use Only


Power-Up Sequence

BCM3553
- A Controlled power-up sequence is necessary to establish the two core voltages before the pad voltage is applied

Only for training and service purposes


Copyright©2007 LG Electronics. Inc. All right reserved.
- 50 -
D3.3V, D1.2V.jpg
BLOCK DIAGRAM

BCM7412
- Recommends the following power-up sequence: 1.2V -> 2.5V -> 3.3V
- Recommends no more than 5ms between different supplies
All Voltages should regulate at their nominal output voltages no later than 10ms

So, Power-up is Controlled by Micom


- These 3 voltages should ramp up within 20ms total in any order, no sequence required, supplying
- 1.2V/2.6V/3.3V simultaneously is meet our requirement too.

LGE Internal Use Only


Power-Up Sequence

1) Power Sequence measurement waveform

Only for training and service purposes


D1.2_BCM
D2.6_BCM
D3.3_BCM
BCM_Reset

Copyright©2007 LG Electronics. Inc. All right reserved.


- 51 -
BLOCK DIAGRAM

2) Result

- Initially 1.2V, 2.6V, 3.3V ramp up in 10ms.(Spec. : within 20ms)e

- Actually Reset time is approximately 100ms(considering the variation of R, C)


after power on.(Spec. : after 75ms)

LGE Internal Use Only


GPIO Structure
GPIO Signal Name Direction Description

5 S-VIDEO1_SW Input S-Video 1 Auto Detect

6 HDMI_POWER_0 Input HDMI 0 Power Detect

7 HDMI_POWER_1 Input HDMI 1 Power Detect

8 HDMI_POWER_2 Input HDMI 2 Power Detect

Only for training and service purposes


9 HDMI_HPD_0 Output HDMI 0 Hot Plug Detect

10 HDMI_HPD_1 Output HDMI 1 Hot Plug Detect

11 HDMI_HPD_2 Output HDMI 2 Hot Plug Detect

Copyright©2007 LG Electronics. Inc. All right reserved.


14 COMP1_SW Input Component 1 Auto Detect

15 COMP2_SW Input Component 2 Auto Detect

16 REV_SEL0 Input Board Revision 0

17 REV_SEL1 Input Board Revision 1

- 52 -
23 Reserved

24 COMPOSITE2_SW Input Composite 2 Auto Detect

26 COMPOSITE1_SW Input Composite 1 Auto Detect


BLOCK DIAGRAM

29 HDMI_SEL_0 Output HDMI Source 0 Select

30 HDMI_SEL_1 Output HDMI Source 1 Select

31 RF_SWITCH_CTRL Output RF Switch Control

38 Reserved

39 Reserved

40 Reserved

41 Reserved

55 S-VIDEO2_SW Input S-Video 2 Auto Detect


56 RGB_SW Input RGB Auto Detect

62 REV_SEL2 Input Board Revision 2

LGE Internal Use Only


MEMO

Copyright©2007 LG Electronics. Inc. All right reserved. - 53 - LGE Internal Use Only
Only for training and service purposes
EXPLODED VIEW

400
520

540
814

530
810

910
815

550
813

816

817
811

900
812
200

120

510
121
300

120

500

Copyright©2007 LG Electronics. Inc. All right reserved. - 54 - LGE Internal Use Only
Only for training and service purposes
BCM PO, USB
+19.0V IC100
BCM3553
A1.2V
+19.0V D3.3V
R541 A2.6V W18
3 .3 A10 GND_1 GND_108
PWM_MOD/AMP C513 C517 P202
A13 GND_2 GND_109
W19
W20
A16

10K R206

1K R213

1K R216

1K R217
T

READY
HB-1M1608-102J
T
330uF 0 . 1 uF YFDW254-14S

HB-1M1608-102J
C535 +5.0V GND_3 GND_110
C534 470pF LEFT D3.3V A19
GND_4 GND_111
W21
470pF W26
R545 R551 P200 A22
C520 L504 RIGHT GND_5 GND_112
W34

L207
10 10 HB-1M1608-102J
T

L204
0 . 0 1 uF SMW250-04 A25 GND_6
L508 B4 BCM3553_JTAG_TRSTb 1 2 GND_113
DA-8580 Y8
A28
IC504 C575 3 4 GND_7 GND_114
C539 C547 JP203 IC100 B4 BCM3553_JTAG_TDI IC100 Y9

R560
0 . 1 uF A31

4.7K
TC74VHC04FT C200 5 6 GND_8 GND_115
D3.3V C514 0 . 1 uF
1S 1F 0 . 1 uF C543 0 . 0 1 uF
4 . 7 uF BCM3553 B4 BCM3553_J
TAG_TDO D1.2V BCM3553 A32 Y14
0 . 1 uF 0 . 4 7 uF 1 7 8 GND_9 GND_116
C518

R201

R202
R564 B4 BCM3553_JTAG_TMS

1.5K

1.5K
JP505 B30 Y15
3 .3 L509 JP200 B4 BCM3553_JTAG_TC
K 9 10 GND_10 GND_117
2S 2F B31 Y16
L502 1A 1 14 VCC J 5 01 M32 T3 11 12 M12 GND_11 GND_118
HB-1M1608-102J
T HB-1M1608-102J
T
H2;6:AJ15 2
BSC_S_SC
L DDR1_ADDR00
4:A7 JTAG_RESETb
VDDC_1 C4 Y17
C540 C545 PPJ204-0
6 GND_12 GND_119

R558
13 14

4.7K
R543 4 BCM3553_SPDIF_OU
T M31 U4 M13

R207
R552 0 . 1 uF JP506 JP501 JP201 BSC_S_SD
A DDR1_ADDR01 VDDC_2 C8 Y18
C515 10 1Y 2 13 6A GND_13 GND_120
10 AH32 U2 M14 Y19
C507 22000pF 0 . 0 1 uF C576 C201 0 . 1 uF CLK54_AVDD1P2 DDR1_ADDR02 VDDC_3 C29
C512 +19.0V R522 R523 3 AG30 V2 M15 GND_14 GND_121
470pF 470pF R562 3 0 . 1 uF 120 75 O_SPRING 1 C202 0 . 1 uF CLK54_AVDD2P5 DDR1_ADDR03 VDDC_4 D3 Y20
0 . 1 uF 22000pF 2A 3 12 6Y JP202

1K
C531 C536 JP507 AH31 V4 M16 GND_15 GND_122
3 .3
CLK54_AVSS DDR1_ADDR04 VDDC_5 D10 Y21
C522 AH33 V3 M17 GND_16 GND_123
M CLK : 12.288MHz 1uF
JP508
2 2Y 4 11 5A C577
100pF
R524
110
C578
100pF ZD501
CONTACT 2
4
E3 54MHz_XTAL_N
AH34
CLK54_XTAL_N DDR1_ADDR05
U3 TOP View M18
VDDC_6 D34
E9
GND_17 GND_124
Y26
AA8
5.6B E3 54MHz_XTAL_P CLK54_XTAL_P DDR1_ADDR06 VDDC_7 GND_18 GND_125
A1.2V AG32 U5 M19 AA9
MICOM_RESET C532 C537 3A 5 10 5Y L201 CLK54_MONITOR DDR1_ADDR07 D2.6V VDDC_8 E27
470pF 470pF AF30 U6 M20 GND_19 GND_126
4:H3;G1 R544 1 U_CAN 3 HB-1M1608-102J
T VCXO_AGND1 DDR1_ADDR08 VDDC_9 F7 AA14
R553 JP500 AF29 V5 M21 GND_20 GND_127
10 HB-1M1608-102J
T AA15
10 3Y 6 9 4A VCXO_AVDD1P2 DDR1_ADDR09 VDDC_10 F8 GND_21
C509 L506 AH29 T2 M22 GND_128
L510 C204 F24 AA16
1:H3;D2 BCM3553_AUD_MCLK BYP_XTAL_EN DDR1_ADDR10 VDDC_11 GND_22 GND_129
DA-8580 0 . 1 uF N29 V6 M23 AA17
1uF SMAW250-04 GND 7 8 4Y 4 . 7 uF BYP_CPU_CLK DDR1_ADDR11 VDDC_12 F27
C548 C203 N28 V7 C268 N12 GND_23 GND_130

R561
C269 C270 C279 AA18

4.7K
C541 C544 P500 BYP_SYS175_CLK DDR1_ADDR12 C272 VDDC_13 H8
+1.8V 1S 1F 0 . 0 1 uF P27 R2 1000pF 0 . 0 1 uF 0 . 1 uF 10uF 33uF N13 GND_24 GND_131

56
55
54
53
52
51
AA19

50
49
48
47
46
45
44
43
C525 0 . 1 uF 0 . 4 7 uF A1.2V BYP_SYS216_CLK DDR1_BA0 VDDC_14 H10
A3.3V AF28 R3 N14 GND_25 GND_132
1uF R565 H11 AA20
1 42 A2.6V BYP_DS_CLK DDR1_BA1 VDDC_15 GND_26 GND_133
C500 HB-1M1608-102J
T 3 .3 L511 AG28 AB2 N15 AA21
41 2S 2F BYP_SYS9_C
LK DDR1_DATA00 VDDC_16 H12
100pF L500 2 AM13 AA7 N16 GND_27 GND_134
C546 USB_AVSS1 DDR1_DATA01 VDDC_17 H13 AB1
3 40 C524 R546 HB-1M1608-102J
T
C o a x i a l Out AL12 AB3 N17 GND_28 GND_135

R559
+19.0V

4.7K
10 R554 C542 USB_AVDD1P2 DDR1_DATA02 VDDC_18 H14 AB6
4 39 22000pF GND_29 GND_136
10 0 . 1 uF 0 . 0 1 uF AL13 AA6 N18 AB8
5 38 R563 USB_AVDD1P2PLL DDR1_DATA03 VDDC_19 H15 GND_30
L200 GND_137

0. 1uF
470pF AJ15 AA3 N19

0. 1uF

4 . 7 uF
3 .3 HB-1M1608-102J
T USB_AVDD2P5 DDR1_DATA04 VDDC_20 H16 AB14
3.3K 6 37 C533 GND_31 GND_138
1000pF AK13 AA2 D3.3V N20 AB15
R531 C505 7 IC501 36 USB_AVDD3P3 DDR1_DATA05 VDDC_21 H17
C501 AK15 AA5 N21 GND_32 GND_139
10uF NTP3000A C538 USB_RREF DDR1_DATA06 VDDC_22 H18 AB16
8 35 GND_33 GND_140
470pF AK14 AA4 N22

C278
C277
R211 AB17

C205

C206
0 . 1 uF 34 R203 USB_AVDD2P5REF DDR1_DATA07 VDDC_23 H19
9 C207 22 GND_34 GND_141

C231
C503 AP14 W5 N23
10 IIC CH4 33 100pF 3.9K E6 USB_DM1 USB_DM1 DDR1_DATA08 VDDC_24 H20
GND_35 GND_142
AB18
AN14 W2 P12 AB19

12pF
11 0x54 32 C528 E6 USB_DP1 USB_DP1 DDR1_DATA09 VDDC_25 H21 GND_36 GND_143

0. 1uF

0. 1uF
0 . 1 uF AL14 W4 C261 C262 C263 C264 C265 C266 C267 P13

C229
R214 H22 AB20
12 31 USB_DM2 DDR1_DATA10 C273 VDDC_26

R208
120 AM14 W3 1000pF 0 . 0 1 uF 0 . 1 uF 4 . 7 uF 1000pF 0 . 0 1 uF 0 . 1 uF P22 GND_37 GND_144

604
+1.8V C526 +9V OPT H23 AB21
13 30 C228 USB_DP2 DDR1_DATA11 VDDC_27 GND_38 GND_145
0 . 1 uF AJ14 Y3 READY P23 AB34
14 29 0 . 1 uF USB_MONCDR DDR1_DATA12 VDDC_28 H24
AH14 W6 R12 GND_39 GND_146
L501 D3.3V USB_MONPLLCDR DDR1_DATA13 54MHz_XTAL_P B2 VDDC_29 H25 GND_40 GND_147
AC3
AP13 Y2 R13

15
16
17
18
19
20
21
22
23
24
25
26
27
28

54MHz
AC4

X200
HB-1M1608-102J
T C6 USB_PWRFLT1 1K USB_PWRFLT_1 DDR1_DATA14 VDDC_30 H26
GND_41 GND_148
AM12 Y4 L206 R22 AC5
L513 USB_PWRFLT_2 DDR1_DATA15 54MHz_XTAL_N B2 VDDC_31 J9
GND_42 GND_149
C506 R200 AN13 R4 R23 AC14
A6 USB_PWRON1 USB_PWRON_1 DDR1_DATA16 VDDC_32 J 10
C504 10uF HB-1M1608-102J
T AN12 R7 1008LS-272XJLC T12 GND_43 GND_150
USB_PWRON_2 DDR1_DATA17 VDDC_33 L5 AC15
0 . 1 uF K34 P2 T13 GND_44 GND_151
+19.0V RESET_OUT DDR1_DATA18 D3.3V VDDC_34 L7
GND_45 GND_152
AC16
1 : D 6 ; 4 : B 6 ; 8 : A 3 ; 11 : O 11SYS_RESET AD8 P5 T22 AC17
R501 b RESET DDR1_DATA19 C232 VDDC_35 L26
3 .3 1K K29 N2 READY 33pF T23 GND_46 GND_153
NMI DDR1_DATA20 M8 AC18
R205 VDDC_36 GND_47 GND_154
R209 P4 U12 AC19
C523 C529 DDR1_DATA21 VDDC_37 M26 GND_48 GND_155
C527 AF2 P6 U13 AC20
22000pF 330uF 0 . 1 uF TMODE_0 DDR1_DATA22 VDDC_38 M34
C559 C561 AF1 P3
C252 C253 C254 C255 C256 C257 C258 C259 C280
U22 GND_49 GND_156

12pF
R212 AC21

1K
I C503 0.1uF TMODE_1 DDR1_DATA23 4 . 7 uF 1000pF 0 . 0 1 uF 0 . 1 uF 4 . 7 uF 1000pF 0 . 0 1 uF 0 . 1 uF 10uF VDDC_39 N1

R204
1uF 22 GND_50 GND_157

C230
6:AJ17 BCM3553_I2S_DATA_OUT C521 100uF AE6 M6 U23
N8 AC26
C530 TMODE_2 DDR1_DATA24 VDDC_40 GND_51 GND_158
6:AJ17 BCM3553_I2S_LRCLK_OUT 0 . 0 1 uF MC33078DR2
G AE5 M3 V12
N34 AD2
TMODE_3 DDR1_DATA25 VDDC_41 GND_52 GND_159
6:AJ17 BCM3553_I2S_SCLK_OUT R536 BCM3553_JTAG_TC
K
AG3 L2 V13
P8 AD3
22 E1 EJTAG_TCK DDR1_DATA26 VDDC_42 GND_53 GND_160
1 : A 2 ; 1 : H 1 ; 4 : E 6 ; 9 : E4 SDA2_3.3V R537
OUTPUT1
1 8
VCC R581 C562 AF3 M4 V22 AD26
22 E1 BCM3553_JTAG_TDI EJTAG_TDI DDR1_DATA27 VDDC_43 P14
22uF AG2 M2 V23 GND_54 GND_161
1 : A 2 ; 1 : H 1 ; 4 : E 6 ; 9 : E4 SCL2_3.3V 150 MC33078_R_OU
T BCM3553_J
TAG_TDO EJTAG_TDO DDR1_DATA28 VDDC_44 P15 AD27
INPUT1-
2 7
OUTPUT2 E1 AF4 M5 W12 GND_55 GND_162
AD28
C554 R569 E1 BCM3553_JTAG_TMS EJTAG_TMS DDR1_DATA29 VDDC_45 P16 GND_56 GND_163
+1.8V
G2 MC33078_L_OU
T C564 G2 AF6 N4 W13 AE7
R534 INPUT1+
3 6
INPUT2-
C560 R579 EJTAG_CE DDR1_DATA30 VDDC_46 P17
GND_57 GND_164
100 C553 150 6.8K 0.01uF AF5 N3 W22 AE8
4:F1 MUTE1 22uF R570 C556 E1 BCM3553_JTAG_TRSTb EJTAG_TRST DDR1_DATA31
Y6
D1.2V
W23
VDDC_47 P18 GND_58 GND_165
L503 0.01uF 6.8K
VEE
4 5
INPUT2+ 47pF A1.2V DDR1_DM0 VDDC_48 P19 AE27
C508 HB-1M1608-102J
T 47pF R580
L202 N31 Y5 Y12 GND_59 GND_166
AE28
PLL_MIPS_AVDD1P2 DDR1_DM1 VDDC_49 P20
33pF
R518
270 TEA6420_R_OU
T N30 N5 Y13 GND_60 GND_167
AE29
HB-1M1608-102J
T PLL_MIPS_AGND DDR1_DM2 VDDC_50 P21
270 R572 R574 M33 N6 Y22 GND_61 GND_168
C209 R8 AE34
C555 R568 4.7K 4.7K PLL_MAIN_MIPS_RPTR_TESTOU
T DDR1_DM3 VDDC_51 GND_62 GND_169
TEA6420_L_OU
T R582 C563 A1 0 . 1 uF 4 . 7 uF AH28 Y7 Y23 AF7
A2 C208 VCXO_PLL_AUD_TESTOUT DDR1_DQS0 C233 C234 C235 C236 C237 C275 C276 C240 C241 VDDC_52 R14 GND_63 GND_170
C516
C519
10K 10K 22uF AJ28 W7
0 . 1 uF 4 . 7 uF 1000pF 0 . 0 1 uF 0 . 1 uF 10uF 10uF 33uF 33uF
AA12
R15 AF9
10uF PLL_DS_TESTOU
T DDR1_DQS1 VDDC_53 GND_64 GND_171
0 . 1 uF 22uF AJ29 P7 AA13
R16 AF15
L203 PLL_OB_TESTOU
T DDR1_DQS2 VDDC_54
C557 C558 R575 AH17 N7 AA22 GND_65 GND_172
AF16
PLL_VAFE_AVDD1P2 DDR1_DQS3 VDDC_55 R17
0.1uF 0.1uF 4.7K HB-1M1608-102J
T AH18 T7 AA23 GND_66 GND_173
AF17
R573 0 . 1 uF C211 PLL_VAFE_AVSS DDR1_RAS VDDC_56 R18 GND_67 GND_174
AH19 R5 AB12 AF18
4.7K C210 4 . 7 uF PLL_VAFE_TESTOUT DDR1_CAS VDDC_57 R19
GND_68 GND_175
+9V R6 AB13 AF19
DDR1_WE VDDC_58 R20 GND_69
P1 M7 AB22 GND_176
DDR1_VDDO2P5_
1 EXT_DDR1_CLK VDDC_59 R21 AF20
U1 T5 D1.2V D1.2V AB23 GND_70 GND_177
DDR1_VDDO2P5_
2 DDR1_CLK0 VDDC_60 R26 AF21
L512 HB-1M1608-102J
T Y1 T4 AC12 GND_71 GND_178
D2.6V AF22
DDR1_VDDO2P5_
3 DDR1_CLK0B VDDC_61 T1
AC1 U7 AC13 GND_72 GND_179
DDR1_VDDO2P5_
4 DDR1_CKE VDDC_62 T8 AF23
GND_73 GND_180
AUDIO SWITCH AB7
N9
DDR1_VDDO2P5_
5 DDR1_CSB0
T6
AC2
A1.2V
D3.3V
AC22
AC23
VDDC_63 T14 GND_74 GND_181
AF31
C212 C213 C214 C215 C216 C217 DDR1_VDDO2P5_
6 DDR1_VREF0 VDDC_64 T15 AF32
+5.0V GND_75 GND_182
+3.3V 0 . 1 uF 0 . 0 1 uF 1000pF 0 . 1 uF 0 . 0 1 uF 1000pF P9 L1
C242 C243 C244 C245 C246 C247 C248 C249 C250 C251 AG9
OP AMP R9
DDR1_VDDO2P5_
7
DDR1_VDDO2P5_
8
DDR1_VREF1
DDR1_BVDD1P2_
0
AB5 1000pF 0 . 0 1 uF 0 . 1 uF 4 . 7 uF 1000pF 0 . 0 1 uF 0 . 1 uF 4 . 7 uF 1000pF 0 . 0 1 uF G34
VDDO_1
T16
T17
GND_76 GND_183
AG10
T9 L4 J 26 GND_77 GND_184
DDR1_VDDO2P5_
9 DDR1_BVDD1P2_
1 VDDO_2 T18 AG11
HB-1M1608-102J
T U9 AB4 K9 GND_78 GND_185

C227

C225
C218

C219

C220
AG12

C221
C222

C223
L514 HB-1M1608-102J
T DDR1_VDDO2P5_1
0 DDR1_BVSS_
0 VDDO_3 T19
C549 V9 L3 K26 GND_79 GND_186
IC500 L515 DDR1_VDDO2P5_1
1 DDR1_BVSS_
1 VDDO_4 T20 AG13
100uF W9 K1 L8 GND_80 GND_187
DDR1_VDDO2P5_1
2 DDR1_PLL_AIO VDDO_5 T21 AG14
GND_81 GND_188

4 . 7 uF

4 . 7 uF
L9

0 . 1 uF

0 . 1 uF
AG15

470pF

470pF
VDDO_6 T26

1uF

1uF
GND SDA R539 M9 GND_82 GND_189
1 28 22 1:H1 T34 AG16
SDA1_5V C569 N26
VDDO_7 GND_83 GND_190
VDDO_8 U8 AG17
0 . 1 uF 1uF P26 GND_84 GND_191
C550 AG18
22uF
CAPACITANCE
2 27
SCL 22 R540 1:H1
16V 16V C567 C568 D3.3V U26
VDDO_9 U14
GND_85 GND_192
SCL1_5V 0 . 1 uF 0 . 1 uF 1uF
VDDO_10 U15 AG19
C565 C566 V26 GND_86 GND_193
VDDO_11 U16 AG20
C502 VS ADDR V34 GND_87 GND_194
3 26 AG21
IC502 R578 D3.3V VDDO_12 U17

R555
AA26 GND_88 GND_195
AG22

10K
0 . 0 1 uF
CS5340-CZZ
R 1K VDDO_13 U18
GND_89 GND_196
L1 R1 JP502 J 5 00 IC202 AA34
VDDO_14 U19 AG24
4 25 AV_R_IN_1 GND_90 GND_197
7:C6 AV_L_IN_ 1 7:C6 TPS2052BDRG
4 AB9
VDDO_15 U20 AG25
GND_91 GND_198

1K
M0 M1 GND M a k e t h i s t r a c e 1 2 ml i AB26 AG26

R210
M CLK : 12.288MHz VDDO_16 U21

1
L2 R2 1 16 GND_92 GND_199
BCM3553_SPDIF_OU
T JP504 AC9 AG29

F i b er O p t i c
7:G6 5 24 AV_R_IN_2
AV_L_IN_ 2 7:G7 L205 AD9
VDDO_17 V8
GND_93 GND_200
MCLK FILT + G7;6:AJ15 VCC +5.0V GND OC1 FB-MH3216-HM501NT VDDO_18 V14
GND_94 GND_201
AG31
1 8 AE9

2
L3 R3 2 15 USB_PWRFLT1 AH15
BCM3553_AUD_MCLK B3 V15

UB01123-4HHS-4F
P201

1
6 23 JP503 USB_POWER_OUT_
1 C6 VDDO_19 GND_95 GND_202
7:B2 COMP_L_IN_1 COMP_R_IN_
1 7:B2 C572 AE26 AH25

USB DOWN STREAM


1uF VDDO_20 V16
1:H3;A6 VL REF_GND
0 . 1 uF
C552 VINPUT AF12 GND_96 GND_203
AH26
C570 0.1uF VDDO_21 V17

3
NC1 NC4 3 14 ZD500 IN OUT1 GND_97 GND_204
TEA6420D AF13

2
7 22 2 7 USB_DM1 C3 AH27

4
USB_POWER_OUT_
1 F6 C224 VDDO_22 V18
OPT 0 . 0 1 uF
C274 AF14 GND_98 GND_205
AH30
SDOUT VA VDDO_23 V19
R548 10uF

FI X _POL E
22 GND_99 GND_206
NC2 ADDR 0x9A NC3 CS5340_I2S_DATA_OU
T 4 13 25V AF24
V20 AJ13

3
8 21 EN1 OUT2 C239 C260 USB_DP1 C3 VDDO_24 GND_100 GND_207
D2.6V AF25 AK28
6:AJ17 B3 USB_PWRON1
3 6 0 . 1 uF 0 . 1 uF M a k e t h i s t r a c e 1 2 ml i VDDO_25 V21 GND_101 GND_208
GND AINR AF26 AK30
L4 R4 5 12 J4 VDDO_26 W1
MC33078_R_OU
T C238 C226 GND_102 GND_209

4
9 20 COMP_R_IN_
2 7:D3 C571 AL20
7:D3 COMP_L_IN_2 0 . 1 uF 1uF 0 . 1 uF 0 . 1 uF W8
GND_103 GND_210
EN2 OC2 N27 AN30

5
VD VQ C573 4 5 VDDP_1 W14

7:F6
L5
10 19
R5
RGB_R_IN 7:F6
6 11 SPDIF OUT AF10
VDDP_2 W15
GND_104 GND_211
AN33
RGB_L_IN AF11 GND_105 GND_212
AN34
VDDP_3 W16 GND_106
SCLK AINL AF27 GND_213
R532
100 LOUT1 ROUT4 CS5340_I2S_SC
LK_OUT R549 22 7 10 VDDP_4 W17 AP10
11 18 MC33078_L_OU
T F4 AG27 GND_107 GND_214
F4 TEA6420_L_OU
T 6:AJ18 VDDP_5
R533 R550 LRCK RST
100 ROUT1 LOUT4 CS5340_I2S_LRCLK_OUT 22 8 9 AJ32
J4 TEA6420_R_OU
T 12 17 MICOM_RESET 4:H3;A6 AGC_VDDO1
6:AJ17
LOUT2 ROUT3
13 16
=========== ========== CUTTING PIN LIST =========== ==========
ROUT2 LOUT3
14 15 A 1 , A 2 , A 5 , A 8 , A 11 , A 1 4 , A 1 7 , A 2 0 , A 2 3 , A 2 6 , A 2 9 , A 3 4,
E 3 , E 3 4 , F 1 , H 3 4 , J1 ,
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S K 1 0 , K 11 , K 1 2 , K 1 3 , K 1 4 , K 1 5 , K 1 6 , K 1 7 , K 1 8 , K 1 9 , K 2 0 , K 2 1 , K 2 2 , K 2 3 , K 2 4 , K 2 5 ,
L 1 0 , L 11 , L 1 2 , L 1 3 , L 1 4 , L 1 5 , L 1 6 , L 1 7 , L 1 8 , L 1 9 , L 2 0 , L 2 1 , L 2 2 , L 2 3 , L 2 4 , L 2 5 , L, 3 4
AUDIO AD C SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. M1, M10, M11, M24, M25,
N 1 0 , N 11 , N 2 4 , N 2 5 ,
P 1 0 , P 11 , P 2 4 , P 2 5 , P 3 ,4
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS R1, R1 0, R11 , R2 4 , R2 5,
T 1 0 , T 11 , T 2 4 , T 2 5,
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR U 1 0 , U 11 , U 2 4 , U 25 , U 3 4,
V 1 , V 1 0 , V 11 , V 2 4 , V 2 5,
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC . W10, W11, W24, W25 ,

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS


ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
AUDI 0 Y 1 0 , Y 11 , Y 2 4 , Y 2 5 , Y 3 4,
AA1, AA10, AA11, AA24, AA25 ,
AB10, AB11, AB24, AB25,
A C10, A C11, A C24, A C25, A C34,
AD1, AD10, AD11, AD12, AD13, AD14, AD15, AD16, AD17, AD18, AD19, AD20, AD21, AD22, AD23, AD24, AD25
A E 1 0 , A E 11 , A E 1 2 , A E 1 3 , A E 1 4 , A E 1 5 , A E 1 6 , A E 1 7 , A E 1 8 , A E 1 9 , A E 2 0 , A E 2 1 , A E 2 2 , A E 2 3 , A E 2 4 , A E 2 5 ,
AF34, AG1, A J34, AK1,
A P 1 , A P 6 , A P 9 , A P 1 2 , A P 1 5 , A P 1 8 , A P 2 1 , A P 2 4 , A P 2 7 , A P 3 0 , A4P 3
,

IC101
S29GL256N10TFI02
0 D3.3V

Boot STRAP & FLASH


A1.2V

BCM7411_DVI_OUT2[0]
BCM7411_DVI_OUT2[1]
BCM7411_DVI_OUT2[2]
BCM7411_DVI_OUT2[3]

BCM7411_DVI_OUT2[4]
BCM7411_DVI_OUT2[5]
EBI_ADDR24
A2.6V IC100 D2

BCM3553 D3 EBI_ADDR23/PCI_DEVSEL
b
A23 NC5
EBI_ADDR16/PCI_CBE0 1 56 EBI_ADDR25
D3;10:BA16 D2
A22 NC4
AK34 H7 2 55
A1.2V OB_AGC DVO_0_0 E4;10:BA10 EBI_ADDR/PCI_AD[17-31] A15 A16
C100 0 . 1 uF AM30 E1 3 54
OB_ADCAV 1P2 DVO_0_1 R151 EBI_ADDR17/PCI_CBE
1
C101 0 . 1 uF AL30 K8 A14 BYTE 1K
L102 OB_ADCAV 2P5 DVO_0_2 EBI_ADDR/PCI_AD[31] 4 53 D3;10:BA15
AK29 J6
HB-1M1608-102J
T OB_AVSS_1 DVO_0_3 A13 VSS2 EBI_DATA/PCI_AD[0-15]
AM31 G4 EBI_ADDR/PCI_AD[30] 5 52
OB_AVSS_2 DVO_0_4 E5;10:BA15
AL29 E2 D3.3V A12 DQ15/A_1 EBI_DATA/PCI_AD[15]
OB_PLLAVDD1P2 DVO_0_5 EBI_ADDR/PCI_AD[29]

BCM7411_DVI_VSYNC2
AN31 F3 6 51
C103 C102
OB_I_N DVO_0_6 A11 DQ7 EBI_DATA/PCI_AD[7 ]
D3.3V
0 . 1 uF 4 . 7 uF AP31 L6 EBI_ADDR/PCI_AD[28] 7 50
OB_I_P DVO_0_7
AP32 K5 A10 DQ14 EBI_DATA/PCI_AD[14]
OB_IFVCO_N DVO_0_8 EBI_ADDR/PCI_AD[27]

1:A3
AP33 H2 8 49
R150

OB_IFVCO_P DVO_0_9 EBI_ADDR/PCI_AD[26] A9 DQ6 EBI_DATA/PCI_AD[6 ]


1K

H6 9 48
DVO_0_10
A33 H5 EBI_ADDR/PCI_AD[25] A8 DQ13 EBI_DATA/PCI_AD[13]
8:A3 TU2BCM3553_SCLK PKT0_CLK DVO_0_11 10 47
B33 K7
8:A3 TU2BCM3553_SDATA PKT0_DATA DVO_0_12 A19 DQ5 EBI_DATA/PCI_AD[5 ]
C31 G1 11 46
8:A3 TU2BCM3553_SYN
C PKT0_SYNC DVO_0_13 D2 EBI_ADDR20/PCI_PAR
33 R153 C30 H3 A20 DQ12 EBI_DATA/PCI_AD[12]
10:V28 HSX_CLK HSX_CLK DVO_0_14 12 45 D3.3V
22 R155 D30 G2 D2 EBI_ADDR21/PCI_IRDYb
10:V28 HSX_DATA HSX_DATA DVO_0_15 WE DQ4 EBI_DATA/PCI_AD[4 ]
R157

22 R152 B32

BCM7411_DVI_OUT[15]
BCM7411_DVI_OUT[14]

BCM7411_DVI_OUT[13]
J5

BCM7411_DVI_OUT[2]
BCM7411_DVI_OUT[1]

BCM7411_DVI_OUT[0]
100

HSX_SYNC D1;10:BA16 EBI_WE1b 13 44


10:V28 HSX_SYNC DVO_0_16
G3 RESET VCC
DVO_0_17 14 43

0 . 1 uF

0 . 1 uF
BCM Recommen
d H28 F2 2 : B 3 ; 4 : B 6 ; 8 : A 3 ; 11 : O 11 SYS_RESET
b

33
CHIP2POD_CR
X DVO_0_18 A21 DQ11 EBI_DATA/PCI_AD[11 ]
H29 H4 15 42 C124
CHIP2POD_DR
X DVO_0_19 D2 EBI_ADDR22/PCI_STOP
b 0 . 1 uF
G29 J7 WP/ACC DQ3 EBI_DATA/PCI_AD[3 ]
POD2CHIP_MCLKI DVO_0_20 16 41

R1101
E28 J8
POD2CHIP_MDI0 DVO_0_21

C1103

C1105
B34 H1 RY/BY DQ10 EBI_DATA/PCI_AD[10]
17 40
POD2CHIP_MDI1 DVO_0_22
C32 K6 A18 DQ2 EBI_DATA/PCI_AD[2 ]
POD2CHIP_MDI2 DVO_0_23 18 39
K28 K2 D3;10:BA15 EBI_ADDR19/PCI_CBE3
POD2CHIP_MDI3 DVO_0_24 A17 DQ9 EBI_DATA/PCI_AD[9 ]

B2_VCCIO2_3

B2_VCCIO2_2
K27 K3 19 38

B2_GNDIO_6

B2_GNDIO_5
POD2CHIP_MDI4 DVO_0_25 D3;10:BA15 EBI_ADDR18/PCI_CBE2

B2_IO_100
J 29 J2 A7 DQ1 EBI_DATA/PCI_AD[1 ]

B2_IO_99
B2_IO_98
B2_IO_97
B2_IO_96
B2_IO_95
B2_IO_94

B2_IO_91
B2_IO_90
B2_IO_89
B2_IO_88
B2_IO_87
B2_IO_86
B2_IO_85
B2_IO_84
B2_IO_83
B2_IO_82
B2_IO_81
B2_IO_80

B2_IO_77
B2_IO_76
POD2CHIP_MDI5 DVO_0_26 EBI_ADDR/PCI_AD[24] 20 37
J 28 K4
POD2CHIP_MDI6 DVO_0_27 A6 DQ8 EBI_DATA/PCI_AD[8 ]
J 27 J3 EBI_ADDR/PCI_AD[23] 21 36
POD2CHIP_MDI7 DVO_0_28
D32 J4 A5 DQ0 EBI_DATA/PCI_AD[0 ]
POD2CHIP_MISTR
T DVO_0_29 EBI_ADDR/PCI_AD[22] 22 35
C34 G8
POD2CHIP_MIVAL DVO_0_CLK_NEG A4 OE
F32 G7 EBI_ADDR/PCI_AD[21] 23 34

F7
B2

C3
B3

C4

B4

C5
B5
C6

B6

B7
C7

B8
A1

A2
A3

G7

A4

A5

A6
A7

A8
D6
G5

A9
CHIP2POD_MCLKO DVO_0_CLK_POS EBI_RDb D1;10:BA17
D3.3V
H27
F34
F33
CHIP2POD_MDO
0
CHIP2POD_MDO
1
DVO_0_DE
DVO_0_HSYNC
F4
D2
D1
EBI_ADDR/PCI_AD[20]

EBI_ADDR/PCI_AD[19]
A3

A2
24

25
33

32
VSS1

CE
EBI_CS0b
D3.3V
BCM7411_DVI_OUT[3]
BCM7411_DVI_OUT[4]
B1_IO_1
B1_IO_2
B1_IO_3
C2
B1
A10
B9
B2_IO_75
B2_IO_74
B2_IO_73
BCM7411_DVI_OUT2[6]
BCM7411_DVI_OUT2[7]
BCM7411_DVI_OUT2[8]
CPL D Program I /F
A3.3V H31
CHIP2POD_MDO
2 DVO_0_VSYNC D2 BCM7411_DVI_OUT[5] C1 C8
EBI_ADDR/PCI_AD[18] A1 A0
CHIP2POD_MDO
3 26 31 BCM7411_DVI_OUT[16] B1_IO_4 D3 C9 B2_IO_72 BCM7411_DVI_OUT2[9]
A2.6V F30 B7
CHIP2POD_MDO
4 LVDS_TX_0_DATA_0_N LVDS_TX_OUT_TA0- 9 : A 3 ; 9 : E5 NC1 NC3 EBI_ADDR/PCI_AD[17] B1_IO_5 B2_IO_71 BCM7411_DVI_OUT2[10]
E30 C7 BCM7411_DVI_OUT[6] D2 B10
LVDS_TX_OUT_TA0+ 9 : A 3 ; 9 : E5 27 30
CHIP2POD_MDO
5 LVDS_TX_0_DATA_0_P B1_IO_6 B2_IO_70 BCM7411_DVI_OUT2[11]
E33 D7 NC2 VIO
BCM7411_DVI_OUT[7] D1 D8
CHIP2POD_MDO
6 LVDS_TX_0_DATA_1_N LVDS_TX_OUT_TA1- 9 : A 3 ; 9 : E4 28 29 B1_IO_7 B2_IO_69 BCM7411_DVI_OUT2[12]
1K
1K
1K
1K
1K

E32 E7 BCM7411_DVI_OUT[17] E3 D9
CHIP2POD_MDO
7 LVDS_TX_0_DATA_1_P LVDS_TX_OUT_TA1+ 9 : A 3 ; 9 : E4
H30 B6 C1100 0 . 1 uF B1_VCCIO1_1 B2_IO_68 BCM7411_DVI_OUT2[13]

R1106

R1107
G28
CHIP2POD_MOSTR
T LVDS_TX_0_DATA_2_N
C6
LVDS_TX_OUT_TA2- 9 : A 3 ; 9 : E5
C123 B1_GNDIO_1
E4
I C1107 C10
B2_IO_67 BCM7411_DVI_OUT2[14]
P1100

10K

10K
D5 D10
R121
R122
R123
R124
R125

CHIP3POD_MOVAL LVDS_TX_0_DATA_2_P LVDS_TX_OUT_TA2+ 9 : A 3 ; 9 : E5 0 . 1 uF GIL-G-06-S3T2


B5 GNDINT_1 B2_IO_66 BCM7411_DVI_OUT2[15]
LVDS_TX_OUT_TA3- 9 : A 4 ; 9 : E4 E6 E8
AL26
AM28
VDAC_BGVDD2P5
LVDS_TX_0_DATA_3_N
LVDS_TX_0_DATA_3_P
C5
D5
LVDS_TX_OUT_TA3+ 9 : A 4 ; 9 : E4 B1_IO_11/GCLK0 E2 EPM240F100C5
N E9 B2_IO_65 BCM7411_DVI_OUT2[16]
JP1100
C107 0 . 1 uF C1101 0 . 1 uF VCCINT_1 GNDINT_2
VDAC_AVDD3P3_1 LVDS_TX_0_DATA_4_N LVDS_TX_OUT_TA4- 9 : A 4 ; 9 : E4 E7 F5
C104 4 . 7 uF AL27 E5
B1_IO_13/GCLK1 B2_IO_63/GCLK3 33 R1102 1:A4 1
VDAC_AVDD3P3_2 LVDS_TX_0_DATA_4_P LVDS_TX_OUT_TA4+ 9 : A 4 ; 9 : E4 IC100 E1 E10 I15 CPLD_TCK
A1.2V C105 0 . 1 uF AJ26 A4 10:BB24 BCM7411_DVI_CLK BCM7411_DVI_CLK2
LVDS_TX_OUT_TB0- 9:A4 BCM7411_DVI_OUT[12] B1_IO_14 VCCINT_2 C1106 0 . 1 uF JP1101
AK27
VDAC_AVSS1 LVDS_TX_1_DATA_0_N
B4 G7;10:BA15 BCM3553 F2 F4
C108 LVDS_TX_OUT_TB0+ 9:A4 B1_IO_15 B2_IO_61/GCLK2
L100 VDAC_AVSS2 LVDS_TX_1_DATA_0_P EBI_DATA/PCI_AD[0-15] BCM7411_DVI_OUT[18] F3 F8 2
HB-1M1608-102J
T 0 . 0 1 uF AK26 D4 I15 CPLD_TDO
VDAC_AVSS3 LVDS_TX_1_DATA_1_N LVDS_TX_OUT_TB1- 9:A5 B1_IO_16 B2_IO_60 BCM7411_DVI_OUT2[17]
AJ27 E4 BCM7411_DVI_OUT[8] F1 F9 JP1102
VDAC_AVDD1P2 LVDS_TX_1_DATA_1_P LVDS_TX_OUT_TB1+ 9:A5 EBI_DATA/PCI_AD[0 ] AC32 AJ9 BCM7411_DVI_OUT2[15] B1_IO_17 B2_GNDIO_4
AP26 A3 PCI_AD00 GPIO_00 BCM7411_DVI_OUT[9] G1 F6
C106 VDAC_DREG LVDS_TX_1_DATA_2_N LVDS_TX_OUT_TB2- 9:A4 EBI_DATA/PCI_AD[1 ] AC33 AH10 BCM7411_DVI_OUT2[16] 3
C109 AM27 B3 PCI_AD01 GPIO_01 BCM7411_DVI_OUT[10] B1_IO_18 H1 D4 B2_VCCIO2_1 C1107 0 . 1 uF I15 CPLD_TMS
0 . 1 uF LVDS_TX_OUT_TB2+ 9:A4 EBI_DATA/PCI_AD[2 ] AB31 AJ10 BCM7411_DVI_OUT2[17]
0 . 1 uF VDAC_RBIAS LVDS_TX_1_DATA_2_P JP1103
AN27 B2 PCI_AD02 GPIO_02 B1_IO_19 G2 F10 B2_IO_57 BCM7411_DVI_OUT2[18]
VDAC_0 LVDS_TX_1_DATA_3_N LVDS_TX_OUT_TB3- 9:A5 EBI_DATA/PCI_AD[3 ] AB32 AH11 BCM7411_DVI_OUT2[18] 10:BB24 BCM7411_DVI_HSYNC
AN26 B1 PCI_AD03 GPIO_03 BCM7411_DVI_OUT[19] B1_IO_20 G3 G10 B2_IO_56 BCM7411_DVI_OUT2[19] 4
560

VDAC_1 LVDS_TX_1_DATA_3_P LVDS_TX_OUT_TB3+ 9:A5 EBI_DATA/PCI_AD[4 ] AB33 AM8 BCM7411_DVI_OUT2[19]


R111

AM26 F6 PCI_AD04 GPIO_04 B1_TMS B2_IO_55 BCM7411_DVI_OUT2[20]


VDAC_2 LVDS_TX_1_DATA_4_N LVDS_TX_OUT_TB4- 9:A5 EBI_DATA/PCI_AD[5 ] AA31 F29 AB16 CPLD_TMS J1 G9 JP1104
AM25 F5 PCI_AD05 GPIO_05 S-VIDEO1_SW 7:C7 B1_TDI B2_IO_54 BCM7411_DVI_OUT2[21]
VDAC_3 LVDS_TX_1_DATA_4_P LVDS_TX_OUT_TB4+ 9:A5 EBI_DATA/PCI_AD[6 ] AA32 D31 AB15 CPLD_TDI H2 G8
D6 PCI_AD06 GPIO_06 HDMI_POWER_0 6:G28;6:AG29 B1_TCK B2_IO_53 BCM7411_DVI_OUT2[22] I15 CPLD_TDI 5
LVDS_TX_0_CLK_N LVDS_TX_OUT_TAC- 9 : A 3 ; 9 : E4 EBI_DATA/PCI_AD[7 ] Y30 G27 H3 H10 C1109
BCM7411_DVI_OUT2[0] AM5 E6 PCI_AD07 GPIO_07 HDMI_POWER_1 6:G9;6:AG26 AB17 CPLD_TCK
LVDS_TX_OUT_TAC+ 9 : A 3 ; 9 : E4 EBI_DATA/PCI_AD[8 ] Y31 C33 B1_TDO B2_IO_52 BCM7411_DVI_OUT2[23] 0 . 1 uF JP1105
HD_DVI_0 LVDS_TX_0_CLK_P CPLD_TDO J2 J 10
BCM7411_DVI_OUT2[1] AN4 C3 PCI_AD08 GPIO_08 HDMI_POWER_2 6:G19;6:AG23 AB16
LVDS_TX_OUT_TBC- 9:A4 EBI_DATA/PCI_AD[9 ] Y33 F28 BCM7411_DVI_OUT[11] B1_IO_25 B2_IO_51 BCM7411_DVI_OUT2[24]
1K
1K
1K

HD_DVI_1 LVDS_TX_1_CLK_N K1 H9 R1103 C1108 6


BCM7411_DVI_OUT2[2] AP4 C2 PCI_AD09 GPIO_09 HDMI_HPD_0 6:G29

K10
HD_DVI_2 LVDS_TX_1_CLK_P LVDS_TX_OUT_TBC+ 9:A4 EBI_DATA/PCI_AD[10] Y32 E31 10K 100pF

K2
K3
H4
G4
D7

K4

K5
H5
K6
H6

K7
K8

K9
G6

H7

H8
E5
J3

J4

J5

J6

J7

J8

J9
BCM7411_DVI_OUT2[3] AL6 A6 PCI_AD10 GPIO_10 HDMI_HPD_1 6:G11
R108
R102
R103

HD_DVI_3 LVDS_TX_AVSS_1 A2.6V A1.2V EBI_DATA/PCI_AD[11 ] AA27 F31


BCM7411_DVI_OUT2[4] AM6 D8 PCI_AD11 GPIO_11 HDMI_HPD_2 6:G20 BCM7411_DVI_OUT[0-19]
HD_DVI_4 LVDS_TX_AVSS_2 EBI_DATA/PCI_AD[12] AA28 AL9 BCM7411_DVI_OUT2[20] 10:BA22

B1_IO_26
B1_IO_27
B1_IO_28
B1_IO_29

B1_IO_32
B1_IO_33
B1_IO_34
B1_IO_35
B1_IO_36
B1_IO_37
B1_IO_38
B1_IO_39
B1_IO_40
B1_IO_41

B1_IO_46
B1_IO_47
B1_IO_48
B1_IO_49
B1_IO_50
B1_IO_43/DEV_CLRn
B1_IO_42/DEV_OE
B1_VCCIO1_2

B1_VCCIO1_3
BCM7411_DVI_OUT2[5] AP5 H9

B1_GNDIO_2

B1_GNDIO_3
PCI_AD12 GPIO_12
HD_DVI_5 LVDS_TX_AVSS_3 EBI_DATA/PCI_AD[13] AA30 AP7 BCM7411_DVI_OUT2[21] GND GND
BCM7411_DVI_OUT2[6] AN5 G6 D7;10:BA10 PCI_AD13 GPIO_13
HD_DVI_6 LVDS_TX_AVSS_4 EBI_DATA/PCI_AD[14] AA29 L31
BCM7411_DVI_OUT2[7] AL7 C1 EBI_ADDR/PCI_AD[17-31] PCI_AD14 GPIO_14 COMP1_S
W 7:A3
HD_DVI_7 LVDS_TX_AVSS_5 EBI_DATA/PCI_AD[15] Y27 J 33
BCM7411_DVI_OUT2[8] AL8 A7 PCI_AD15 GPIO_15 COMP2_S
W 7:C3
HD_DVI_8 LVDS_TX_AVDD2P5_1 U32 AD7
BCM7411_DVI_OUT2[9] AN6 E8 PCI_AD16 GPIO_16 REV_SEL0 J2
HD_DVI_9 LVDS_TX_AVDD2P5_2 L101 EBI_ADDR/PCI_AD[17] U33 AC8
BCM7411_DVI_OUT2[10] AM7 G5 PCI_AD17 GPIO_17 REV_SEL1 J2
HD_DVI_10 LVDS_PLL_AVDDC1P2 EBI_ADDR/PCI_AD[18] U31 AP8 BCM7411_DVI_OUT2[22]
BCM7411_DVI_OUT2[11] AK9 G9 PCI_AD18 GPIO_18
HD_DVI_11 LVDS_TX_AVDD C1P2 EBI_ADDR/PCI_AD[19] T32 AN8 BCM7411_DVI_OUT2[23]
BCM7411_DVI_OUT2[12] AN7 HB-1M1608-102J
T PCI_AD19 GPIO_19
HD_DVI_12 EBI_ADDR/PCI_AD[20] T33 AM9 BCM7411_DVI_OUT2[24]
BCM7411_DVI_OUT2[13] AK8 PCI_AD20 GPIO_20
HD_DVI_13 C110 C111 C112 C113 C125 EBI_ADDR/PCI_AD[21] T31 AL10 BCM7411_DVI_OUT2[25]

0 . 1 uF

0 . 1 uF
BCM7411_DVI_OUT2[14] AH9 PCI_AD21 GPIO_21

33
BCM7411_DVI_OUT2[0-14] HD_DVI_14 EBI_ADDR/PCI_AD[22] W29 AN9 BCM7411_DVI_OUT2[26]
AJ11 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF PCI_AD22 GPIO_22
11:K7 HD_DVI_CLK_N 4 . 7 uF EBI_ADDR/PCI_AD[23] W30 K32
AK10 PCI_AD23 GPIO_23
11:U17 BCM7411_DVI_CLK2 HD_DVI_CLK_P EBI_ADDR/PCI_AD[24] V28 K30
D3.3V

R1100
AH12 PCI_AD24 GPIO_24 COMPOSITE2_S
W 7:G6
11:O11 BCM7411_DVI_DE2 HD_DVI_DE EBI_ADDR/PCI_AD[25] V30 M27

C1102

C1104
AK11 PCI_AD25 GPIO_25
BCM7411_DVI_OUT2[15-29
]

11:N11 BCM7411_DVI_HSYNC2 HD_DVI_HSYNC EBI_ADDR/PCI_AD[26] V29 K31


AH13 PCI_AD26 GPIO_26 COMPOSITE1_S
W 7:C6
11:N22 BCM7411_DVI_VSYNC2 HD_DVI_VSYNC EBI_ADDR/PCI_AD[27] U27 L29
PCI_AD27 GPIO_27 BCMPWM_VBR_A 8:G6
1K
1K
1K
1K
1K
1K
1K
1K
1K
1K
1K
1K
1K

EBI_ADDR/PCI_AD[28] U28 J 34
PCI_AD28 GPIO_28 BCMPWM_VBR_B 8:G6
EBI_ADDR/PCI_AD[29] U29 G30
PCI_AD29 GPIO_29 HDMI_SEL_0 6:W19
EBI_ADDR/PCI_AD[30] U30 G32

BCM7411_DVI_VSYNC
R110
R109
R112
R113
R158
R159
R161
R162
R114
R115
R116
R117
R118

HDMI_SEL_1

b
6:W19

SYS_RESET
PCI_AD30 GPIO_30

BCM7411_DVI_DE2
EBI_ADDR/PCI_AD[31] T27 G31

BCM7411_DVI_HSYNC2
PCI_AD31 GPIO_31 RF_SWITCH_CTR
L 8:A5
AA33 E29
D7;10:BA16 EBI_ADDR16/PCI_CBE0 PCI_CBE00 GPIO_32
Y28 L30
G7;10:BA15 EBI_ADDR17/PCI_CBE1 PCI_CBE01 GPIO_33

1:A3

1:A4
V32 AG33
D6;10:BA15 EBI_ADDR18/PCI_CBE2 PCI_CBE02 GPIO_34
V27 AG34 33 R107

1 : D 6 ; 2 : B 3 ; 4 : B 6 ; 8 : A3
D6;10:BA15 EBI_ADDR19/PCI_CBE3 PCI_CBE03 GPIO_35 BCM7411_27M_CLK 10:AF4
R30 L33
33 PCI_CLK_IN GPIO_36
10:BA17 R32 M30
D3.3V BCM3553_CLK_OUT
R154 W33
PCI_CLK_OUT GPIO_37
L32
D7 EBI_ADDR23/PCI_DEVSEL
b PCI_DEVSEL GPIO_38
V33 K33
D3.3V PCI_FRAME GPIO_39

10:BB24
P33 AP25

BCM7411_DVI_OUT2[29]

BCM7411_DVI_OUT2[28]
BCM7411_DVI_OUT2[27]
BCM7411_DVI_OUT2[26]
BCM7411_DVI_OUT2[25]
PCI_GNT0 GPIO_40
N33 AN25
PCI_GNT1 GPIO_41
T29 AM10 BCM7411_DVI_OUT2[27]
IC102 PCI_GNT2 GPIO_42
R27 AL24 33 R134
CAT24C08WI-GT PCI_INT_A0 GPIO_43 BCM3553_AUD_MCLK 5 : A 6 ; 5 : D2
0 . 1 uF

R31 AL11 BCM7411_DVI_OUT2[28]


C122

PCI_INT_A1 GPIO_44
R29 AN10 BCM7411_DVI_OUT2[29]
10:BA16 BCM7411_INTb PCI_INT_A2 GPIO_45
R148

A0 VCC V31 M28


1 8 EBI_ADDR21/PCI_IRDYb PCI_IRDY GPIO_46
1K

D7 Y29 M29
D7 EBI_ADDR20/PCI_PAR PCI_PAR GPIO_47 BCM7411_DVI_OUT2[15-29] 11:K7
W28 AF33
A1 WP PCI_PERR GPIO_48 BCM_RX 4:A4
2 7 R28 AE32
PCI_REQ0 GPIO_49 BCM_TX 4:A4 B o a r d C o n f i g u r t i on
470
470
1K
1K
1K

1K
1K
1K

R34 AC6
PCI_REQ1 GPIO_50 D3.3V
A2 SCL 22 R100 T28 AE1 BCM7411_DVI_OUT2[0-29]
3 6 SCL2_3.3V H 1 ; 4 : E 6 ; 5 : A 5 ; 9 : E4 PCI_REQ2 GPIO_51
T30 AC7 R127 1K 1 : A 4 ; 1 : I2
R119
R160
R163
R164
R165
R166
R169
R170

PCI_RST GPIO_52
W27 AD4 R126 1K
VSS SDA 22 R101 PCI_SERR GPIO_53 H4 REV_SEL0
4 5 SDA2_3.3V W31 AE2
H 1 ; 4 : E 6 ; 5 : A 5 ; 9 : E4 EBI_ADDR22/PCI_STOP
b PCI_STOP GPIO_54 H4 REV_SEL1
D6 W32 G33
S-VIDEO2_SW H2 REV_SEL2
PCI_TRDY GPIO_55 7:G6
P29 D33
BCM Recommen
d +5.0V PCI_VIO_0 GPIO_56 RGB_SW 7 : J3
R104 100

R105 100

R106 100

P28 J 30
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S
READY

READY

READY

PCI_VIO_1 GPIO_57 REV_SEL2 J2


P30 J 32 D3.3V
PCI_VIO_2 GPIO_58
+5.0V
D7 EBI_ADDR24
R33
P32
EBI_ADDR24 GPIO_59
J 31
H33
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
EBI_ADDR25 GPIO_60
G7 EBI_ADDR25
AD31 H32 FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS

CPLD/BCM7411 PWR
F6 EBI_CS0b EBI_CS0 GPIO_61
4.7K
R137

4.7K
R138

4.7K
R139

4.7K
R140

4.7K
R141

4.7K
R142

4.7K
R143

4.7K
R144

AE33 L28
HDMI_HDCP KEY MEMORY C126
0 . 1 uF
AD32
EBI_CS1
EBI_CS2
GPIO_62
GPIO_63
L27 ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
READY

READY

AC30 AD29
EBI_CS3 SGPIO_00 SCL0_3.3V 8:A3
AD34 AD30
10:BA17 EBI_CS1b EBI_CS4 SGPIO_01 SDA0_3.3V 8:A3
AC29 AE31
EBI_DS SGPIO_02 SCL1_5V 5:C3
AB28 AE30
F6;10:BA17 EBI_RDb EBI_RD SGPIO_03 SDA1_5V 5:C3
AB27 AD6
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S EBI_TAb
AB29
EBI_RW
EBI_TA2
SGPIO_04
SGPIO_05
AD5
SCL2_3.3V
SDA2_3.3V
A 2 ; 4 : E 6 ; 5 : A 5 ; 9 : E4
A 2 ; 4 : E 6 ; 5 : A 5 ; 9 : E4
10:BA16
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION. AB30
N32
EBI_TA SGPIO_06
AE4
AE3
SCL3_3.3V 4 : F 1 ; 9 : A6
SDA3_3.3V
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS AD33
EBI_TS
EBI_TSIZE0
SGPIO_07 4 : F 1 ; 9 : A6

AC31
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR AC27
EBI_TSIZE1 READY READY READY READY READY READY READY READY
EBI_WE0
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC . AC28
C114

C115

C116

C117

C118

C119

C120

C121

D6;10:BA16 EBI_WE1b EBI_WE1


P31
NAND_PB

Copyright©2007 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
D2.6V D2.6V

JP725

JP724
JP726
E7
C301 DDR0_M_Data[0-63
]
C300 C302 C303 C304 C311 C306 C307 C308
100uF 0 . 1 uF C309 C310 C317 I7
0 . 0 1 uF 0 . 0 4 7 uF 2700pF 470pF 100uF 0 . 1 uF 0 . 0 1 uF L703
0 . 0 4 7 uF 2700pF 470pF A6 DDR0_M_Data[0-63
]
J 7 04 HH-1M2012-121
DDR_DATA[0-63] DDR0_VTT DDR0_VTT +9V
PPJ200-0
7
A1;A4;D5;D2;I2 DDR0_ADDR[0-12] READY
F7 J701 5B
MNT_L_OUT6:AM4 C730 C731
PMJ029-01 0.1uF 100uF
R300 DDR0_DQ[0-63]
R386 S-VIDEO1_C 6:Y12 READY
IC301 D2.6V
IC302 DDR_DATA[5 ] 33 DDR0_M_Data[5]
R381 75 0 2B READY JP735
D2.6V DDR_DATA[7 ] DDR0_M_Data[7] 33 DDR0_M_Data[0] 6 [S-VHS]GROUND_TER R814
D2.6V HY5DU561622FTP-D43-C 14

R818
D2.6V

75
ZD716
HY5DU561622FTP-D43-C DDR_DATA[2 ] DDR0_M_Data[2] DDR0_DQ[0-63] H6 DDR0_M_Data[2]
DDR0_BA_0 DDR0_BA0 R875

JP732
F7 DDR0_DQ[0-63] H6 0 . 1 uF 4A
DDR_DATA[0 ] DDR0_M_Data[0] DDR0_M_Data[7] 0 . 0 1 uF GND READY
R336 DDR0_BA_1 DDR0_ADDR[10] DDR0_BA1 C361 7A [S-VHS]C_LUG_L1 D_EYE
VDD_1 VSS_3 33 IC100 H6 DDR0_M_Data[5]
C376 4:C3 13
DDR_DATA[15] DDR0_M_Data[15
] DDR0_M_Data[0] DDR0_ADDR10 DDR0_ADDR[0]
VDD_1
1 66
VSS_3 1 66 DDR0_DQ[0] BCM3553 3A
6:AM4
MNT_R_OUT
JP736
DDR0_M_Data[2] DDR0_M_Data[4] 7B [S-VHS]C_LUG_L2
DDR_DATA[59] DQ0 DQ15 DDR_DATA[48] R301 DDR0_DQ[2] S-VIDEO1_L
DDR_DATA[27] DQ0 DQ15 DDR_DATA[16] 2 65 33 DDR0_M_Data[7] 0 . 1 uF 0 . 0 1 uF
6:Y12
2 65 DDR0_DQ[7] R387 C362 0 2A 12
VDDQ_1 VSSQ_5 C377

ZD718
DDR_DATA[4 ] DDR0_M_Data[4] DDR0_M_Data[5] DDR0_DQ[0] B9 C19 75 7C [S-VHS]C_LUG_L3 R815 C729
VDDQ_1 VSSQ_5 3 64 DDR0_DQ[5]

R819
75
3 64 DDR0_DQ[1] DDR0_DATA00 DDR0_ADDR00 33 DDR0_ADDR[1] DDR0_M_Data[15
]
DDR_DATA[58] DQ1 DQ14 DDR_DATA[49] DDR_DATA[11 ] DDR0_M_Data[11] DDR0_M_Data[4] F10 D18 5:C2 AV_R_IN_2
DDR0_DQ[4]

JP731
DDR_DATA[26] DQ1 DQ14 DDR_DATA[17] 4 63 DDR0_DQ[2] DDR0_DATA01 DDR0_ADDR01 DDR0_ADDR[2] 11
4 63 DDR_DATA[9 ] DDR0_M_Data[9] C10 B18 R382 DDR0_M_Data[14
] 0 . 1 uF 7D [S-VHS]C_LUG_L4 5.6K 1uF JP737

R862
470K
DDR_DATA[57] DQ2 DQ13 DDR_DATA[50] R302 DDR0_DQ[3] DDR0_DATA02 DDR0_ADDR02 DDR0_ADDR[3] 75 0 . 0 1 uF R858
R338 S-VIDEO1_S
W C727
DDR_DATA[25] DQ2 DQ13 DDR_DATA[18] 5 62 DDR_DATA[12] 33 DDR0_M_Data[12
] 33
E10
DDR0_DATA03 DDR0_ADDR03
B17 DDR0_M_Data[12
] C363 C378 1:H5 100pF ZD744
5 62 DDR0_DQ[4] DDR0_ADDR[4]
VSSQ_1 VDDQ_5 DDR_DATA[14] DDR0_M_Data[14
] DDR0_M_Data[15
] E12 D17 DDR0_M_Data[9] 8 [S-VHS]0_SPRING 10
VSSQ_1 VDDQ_5 6 61 DDR0_DQ[15] DDR0_DATA04 DDR0_ADDR04 R388 R755 ZD725
DDR0_DQ[5] B10 C17 DDR0_ADDR[5] 0 GND
6 61 DDR0_M_Data[11] C728
DDR0_M_Data[14
] DDR0_DATA05 DDR0_ADDR05 COMPOSITE1_I
N 6:Y10
DDR_DATA[24] DQ3 DQ12 DDR_DATA[19]
DDR_DATA[56] DQ3
7 60
DQ12 DDR_DATA[51] DDR_DATA[21] DDR0_M_Data[21
] DDR0_DQ[14] DDR0_DQ[6] G10 C18 DDR0_ADDR[6]
0 . 1 uF 2A [Y L]1P_CAN J703 AV_L_IN_ 2 GND

ZD735
7 60 DDR_DATA[23] DDR0_M_Data[23
] DDR0_M_Data[12
] DDR0_DATA06 DDR0_ADDR06 DDR0_M_Data[16
] 0 . 0 1 uF 5:A2
R303 DDR0_DQ[12] R340 DDR0_DQ[7] R383 DDR0_ADDR[7] 33 75 C364 9

R820
75
DDR_DATA[60] DQ4 DQ11 DDR_DATA[55] D11 G18 C379 ZD745

R863
5.6K JP738

470K
DDR_DATA[28] DQ4 DQ11 DDR_DATA[23] 8 59 DDR_DATA[18] DDR0_M_Data[18
] DDR0_M_Data[9] 33 DDR0_DATA07 DDR0_ADDR07 DDR0_M_Data[18
] C726 1uF

ZD706
DDR0_DQ[9] DDR0_DQ[8] DDR0_ADDR[8]

ZD717
33 F13 E18 PEJ024-0
1 R859
8 59 3A [YL]0_SPRING 100pF

JP733
VDDQ_2 VSSQ_4 DDR_DATA[16] DDR0_M_Data[16
] DDR0_M_Data[11] DDR0_DQ[11] DDR0_DQ[9] C12 DDR0_DATA08 DDR0_ADDR08 DDR0_M_Data[23
] R389
VDDQ_2 VSSQ_4 9 58 G17 DDR0_ADDR[9] ZD724
R384 DDR0_M_Data[21
] E_SPRING 8
9 58 DDR0_M_Data[16
] DDR0_DQ[10] E13 DDR0_DATA09 DDR0_ADDR09 3
DDR_DATA[61] DQ5 DQ10 DDR_DATA[54] DDR_DATA[31] DDR0_M_Data[31
] DDR0_DQ[16] B19 DDR0_ADDR[11] DDR0_VTT 0 . 1 uF 0 . 0 1 uF 4A [YL]CONTAC T
DDR_DATA[29] DQ5 DQ10 DDR_DATA[22] 10 57 DDR0_M_Data[18
] DDR0_DQ[11] B12 DDR0_DATA10 DDR0_ADDR10 DDR0_M_Data[20
] C365 GND
10 57 DDR0_DQ[18] R342 F17 DDR0_ADDR[12] C380 0 GND
DDR_DATA[62] DQ6 DQ9 DDR_DATA[53] R304 DDR0_DATA11 DDR0_ADDR11 T_TERMINAL1
DDR0_M_Data[23
] 33 DDR0_DQ[12] D12 6A COMPOSITE2_I
6:Y10 N

ZD703
DDR_DATA[30] DQ6 DQ9 DDR_DATA[21] 11 56 33 DDR0_DQ[23] E17 75 R855 JP739 7
11 56 DDR0_DATA12 DDR0_ADDR12 2B [WH]1P_CAN
VSSQ_2 VDDQ_4 DDR_DATA[20] DDR0_M_Data[20
] DDR0_M_Data[21
] DDR0_DQ[21]
DDR0_DQ[13] G12 C20 33 COMPOSITE1_S
W C740

R851
R305 75 R390 C733
VSSQ_2 VDDQ_4 12 55 DDR0_DQ[14] B11 DDR0_DATA13 DDR0_BA0 DDR0_ADDR10 DDR0_M_Data[31
] 0 . 1 uF C701 1:H3 B_TERMINAL1
12 55 D19 0 . 0 1 uF 7A 27pF

75
DDR_DATA[27] DDR0_M_Data[27
] DDR0_M_Data[20
] DDR0_DQ[20] DDR0_BA_0 R306 75 C366 5B [WH]C_LUG_L RGB_R_IN 5:C2
DDR_DATA[63] DQ7 DQ8 DDR_DATA[52] DDR0_DQ[15] C11 DDR0_DATA14 DDR0_BA1 C381 AV_L_IN_ 1 50V 6
DDR_DATA[31] DQ7 DQ8 DDR_DATA[20] 13 54 DDR_DATA[25] DDR0_M_Data[25
]
F11 DDR0_BA_1
DDR0_DQM0 R309 75 DDR0_M_Data[30
] R391 5:A2 1uF 5.6K JP740
13 54 R307 DDR0_DQ[16] B13 DDR0_DATA15 DDR0_DM0 75 R_SPRING

R805
R345 5.6K

470K
NC_1 NC_7 G11 ZD739 1uF C702 4 R837
DDR_DATA[28] DDR0_M_Data[28
] 33 DDR0_DQM1 R311 75 DDR0_M_Data[28
] 2C [RD]1P_CAN R816 C720 R835
NC_1 NC_7 14 53 33 DDR0_DQ[17] G13 DDR0_DATA16 DDR0_DM1 100pF
14 53 DDR0_M_Data[31
] F15 DDR0_M_Data[25
] 100pF 470K 5
VDDQ_3 VSSQ_3 DDR_DATA[30] DDR0_M_Data[30
] DDR0_DQ[31] DDR0_DQ[18] D14 DDR0_DATA17 DDR0_DM2 DDR0_DQM2 R313 75 0 . 1 uF 0 . 0 1 uF T_SPRING
COMPOSITE2_S
1:H4 W JP741
VDDQ_3 VSSQ_3 H5 15 52 G15 DDR0_M_Data[27
] ZD705 C700 GND 5 ZD746 ZD747 ZD748
15 52 DDR0_M_Data[30
] DDR0_DATA18 DDR0_DM3 DDR0_DQM3 R315 75 C367 C382 3C [RD]0_SPRING
DDR0_DQS7 DDR_DATA[37] DDR0_M_Data[37
] DDR0_DQ[30] DDR0_DQ[19] E14 E22 AV_R_IN_1
LDQS UDQS
LDQS
16 51
UDQS
DDR0_M_Data[28
] DDR0_DATA19 DDR0_DM4 DDR0_DQM4 R317 75 DDR0_M_Data[32
] R392 5:C2 C732 S-VIDEO2_S
W
H5 H6 DDR0_DQS6 H5 DDR_DATA[39] R308 DDR0_M_Data[39
] DDR0_DQ[28] R346 DDR0_DQ[20] E15 F22 75 5.6K C703 B_TERMINAL2 1:H2 4
16 51 DDR0_DQS2 1uF 7B
DDR0_DQS3 NC_2 NC_6 DDR0_REF DDR_DATA[34] DDR0_M_Data[34
] DDR0_M_Data[25
] 33 DDR0_DQ[21] B14 DDR0_DATA20 DDR0_DM5 DDR0_DQM5 R319 75 DDR0_M_Data[34
] 4C [RD]CONTACT R817 100pF RGB_L_IN 5:A2 R856

R749
DDR0_DQ[25]

470K
NC_2 NC_6 17 50 33 F26 ZD740 ZD726 ZD731 ZD730
17 50 DDR0_REF DDR0_M_Data[27
] DDR0_DATA21 DDR0_DM6 DDR0_DQM6 DDR0_M_Data[39
] 5.6K 0
D7 VDD_2 VREF
DDR_DATA[32] DDR0_M_Data[32
] DDR0_DQ[27] DDR0_DQ[22] F14 D26 1000pF 0 . 0 1 uF 6B T_TERMINAL2 C719
1uF
R838 6:Y11
S-VIDEO2_C
VDD_2 VREF 18 49 DDR0_DATA22 DDR0_DM7 DDR0_DQM7 DDR0_M_Data[37
] 3
DDR0_M_Data[32
] DDR0_DQ[23] C14 E11 R320 R337 33 C368 C383 ZD704 100pF R836
18 49 DDR_DATA[47] DDR0_M_Data[47
] 33

R852
DDR_DATA[0-63] DDR0_DQ[32] DDR0_DQS0 470K C738

75
C312 C315 NC_3 VSS_2 C314 C325 DDR0_DQ[24] E16 DDR0_DATA23 DDR0_DQS0 JP742
NC_3 VSS_2 F2 19 48 DDR0_M_Data[34
] DDR0_DQ[34] F12 R322 33 R339 33 DDR0_M_Data[36
] GND SHIELD_PLATE
19 48 0 . 1 uF 470pF 0 . 1 uF 470pF R348 DDR0_DATA24 DDR0_DQS1 DDR0_DQS1 8 27pF
DDR0_DQ[25] B16

JP734
DDR0_DQM_7 LDM UDM F2 R310 DDR0_M_Data[39
] DDR0_DQ[39] 33 G14 R324 33 R341 33 50V 2
LDM UDM 20 47 33 DDR0_DQ[26] G16 DDR0_DATA25 DDR0_DQS2 DDR0_DQS2 R393 GND
20 47 DDR0_DQM_6 DDR_DATA[36] DDR0_M_Data[36
] DDR0_M_Data[37
] F16 R326 33 R343 33 75 R857
E1 DDR0_DQM_3 DDR0_DQM_2 DDR0_WEb DDR0_DQ[37] DDR0_DQS3 1000pF 0 . 0 1 uF 0
/WE /CK DDR0_DQ[27] C16 DDR0_DATA26 DDR0_DQS3
/WE /CK 21 46 DDR0_CLK1b DDR_DATA[43] DDR0_M_Data[43
] DDR0_M_Data[36
]
G21 R328 33 R344 33
DDR0_DQS4
DDR0_M_Data[47
] C369 C384 6:Y11 S-VIDEO2_L
21 46 DDR0_CLK0b DDR0_DQ[36] DDR0_DQ[28] C15 DDR0_DATA27 DDR0_DQS4 1

R853
A 2 ; B 5 ; B 2 ; H 5 ; I1 DDR0_WEb DDR0_CASb /CAS CK G22 R331 33 R347 33 R394
D 2 ; H 5 ; I2 DDR_DATA[41] DDR0_M_Data[41
] DDR0_DQS5 DDR0_M_Data[46
] C739 ZD750
/CAS CK 22 45 DDR0_DQ[29] D16 DDR0_DATA28 DDR0_DQS5 ZD749

75
A 2 ; B 5 ; B 2 ; H 5 ; I1 DDR0_CLK1 R312 R351 E25 R332 R349 33 75 JP743
22 45 33 DDR0_M_Data[44
] 27pF
DDR0_CASb DDR0_CLK0 DDR0_RASb /RAS CKE B 5 ; B 2 ; D 2 ; H 5 ; I1 D 2 ; H 5 ; I3 DDR_DATA[44] 33 DDR0_M_Data[44
] 33 DDR0_DATA29 DDR0_DQS6 DDR0_DQS6 R700

JP727
DDR0_DQ[30] B15 33 R385 33 R350 33

JP728
/RAS CKE 23 44 E26 R334 50V

JP729

JP730
23 44 DDR0_CKE DDR_DATA[46] DDR0_M_Data[46
] DDR0_M_Data[47
] DDR0_DQ[47] DDR0_DATA30 DDR0_DQS7 DDR0_DQS7 DDR0_M_Data[41
] 1000pF 0 . 0 1 uF JP744
A 2 ; B 5 ; B 2 ; H 5 ; I1 DDR0_RASb DDR0_CKE DDR0_DQ[31] D15 E19 ZD728 0
DDR0_CSBb /CS NC_5 DDR0_ADDR[0-12] DDR0_M_Data[43
] C370 C385 GND ZD727 SMW200-14
/CS NC_5 24 43 DDR0_M_Data[46
] DDR0_DQ[32] B20 DDR0_DATA31 DDR0_RAS DDR0_CSBb
24 43 DDR_DATA[53] DDR0_M_Data[53
] DDR0_DQ[46] G19
A 2 ; B 5 ; B 2 ; H 5 ; I2 DDR0_CSBb NC_4 A12 DDR0_ADDR[12] DDR_DATA[55] DDR0_M_Data[55
] DDR0_M_Data[44
] DDR0_DQ[44] DDR0_DQ[33] F20 DDR0_DATA32 DDR0_CAS
G20
DDR0_RASb DDR0_M_Data[48
] R395
75
3216
C716 P700
NC_4 A12 DDR0_ADDR[12] 25 42 R314 R353
25 42 DDR0_M_Data[41
] 33 DDR0_DQ[34] D20 DDR0_DATA33 DDR0_WE DDR0_CASb DDR0_M_Data[50
] 0 . 0 1 uF
DDR0_BA0 BA0 A11 DDR0_ADDR[11] DDR_DATA[50] 33 DDR0_M_Data[50
] DDR0_DQ[41] G26
DDR0_WEb 1000pF 0 . 0 1 uF GND
BA0 A11 DDR0_ADDR[11] 26 41 DDR_DATA[48] DDR0_M_Data[48
] DDR0_M_Data[43
] DDR0_DQ[35] F21 DDR0_DATA34 EXT_DDR0_CLK DDR0_M_Data[55
]
A 2 ; B 5 ; B 2 ; H 7 ; I1 26 41 DDR0_DQ[43] C13 R352 33 C371 C386

6:Y14

6:Y14
6:Y15
DDR0_BA0 DDR0_BA1 BA1 A9 DDR0_ADDR[9] DDR0_DQ[36] C21 DDR0_DATA35 DDR0_CLK0 DDR0_CLK0DDR0_REF DDR0_M_Data[53
]
BA1 A9 DDR0_ADDR[9] 27 40 DDR0_M_Data[48
] D13 R355 33 GND
27 40 DDR_DATA[63] DDR0_M_Data[63
] DDR0_DQ[48] DDR0_DATA36 DDR0_CLK0B DDR0_CLK0b
A 2 ; B 5 ; B 2 ; H 7 ; I1 DDR0_BA1 DDR0_DQ[37] B21 D23 R356
DDR0_ADDR[10] A10/AP A8 DDR0_ADDR[8] DDR0_M_Data[50
] DDR0_DQ[50] 33 C388
A10/AP A8 DDR0_ADDR[8] 28 39 R354 DDR0_DQ[38] E21 DDR0_DATA37 DDR0_CLK1 DDR0_CLK1 DDR0_M_Data[52
]
28 39 DDR0_M_Data[55
] 33 C23 R358 33
DDR0_ADDR[0] A0 A7 DDR0_ADDR[7] R316 DDR0_DQ[55] DDR0_DATA38 DDR0_CLK1B DDR0_CLK1b L302

RGB_G
DDR0_DQ[39] E20

RGB_R
R396 470pF

RGB_B
A0 A7 DDR0_ADDR[7] 29 38 33 DDR0_M_Data[53
] F18 R360 33 1000pF
29 38 DDR_DATA[52] DDR0_M_Data[52
] DDR0_DQ[53] DDR0_DATA39 DDR0_CKE DDR0_CKE 75
DDR0_DQ[40] F23 C372

COMP2_Pr
F19

b
DDR0_ADDR[1] A1 A6 DDR0_ADDR[6]

COMP2_P
DDR0_DATA40 DDR0_CSB0 DDR0_M_Data[63
]

COMP2_Y
A1 A6 DDR0_ADDR[6] 30 37 DDR0_M_Data[52
] DDR0_DQ[41] D22 B 5 ; B 2 ; D 5 ; D 2 ; I1
DDR0_DQ[52] B8

b
30 37

COMP1_Pr
COMP1_P
DDR_DATA[59] DDR0_M_Data[59
] A1.2V

COMP1_Y
DDR0_ADDR[2] A2 A5 DDR0_ADDR[5] DDR0_DQ[42] G23 DDR0_DATA41 DDR0_VREF0 R397
A2 A5 DDR0_ADDR[5] 31 36 DDR_DATA[57] DDR0_M_Data[57
] B29 DDR0_M_Data[62
] C389
31 36 R318 R357 DDR0_DQ[43] B23 DDR0_DATA42 DDR0_VREF1 75
DDR0_ADDR[3] A3 A4 DDR0_ADDR[4] DDR_DATA[60] DDR0_M_Data[60
] 33 D9 DDR0_M_Data[60
]
A3 A4 DDR0_ADDR[4] 32 35 33 DDR0_DATA43 DDR0_BVDD1P2_
0
DDR0_ADDR[10]

DDR0_M_Data[63
] DDR0_DQ[44] C22 D28 1000pF 470pF
DDR0_ADDR[0]

DDR0_ADDR[1]

DDR0_ADDR[2]

DDR0_ADDR[3]

32 35 DDR_DATA[62] DDR0_M_Data[62
] DDR0_DQ[63] DDR0_M_Data[57
]
VDD_3 VSS_1 DDR0_DQ[45] E23 DDR0_DATA44 DDR0_BVDD1P2_
1 C373
VDD_3 VSS_1 33 34 C9 DDR0_M_Data[59
]

6:Y12
6:Y13

6:Y12
33 34 DDR0_M_Data[62
] DDR0_DQ[62] DDR0_DQ[46] B22 DDR0_DATA45 DDR0_BVSS_
0
DDR_DATA[1 ] DDR0_M_Data[1] D29 C333

6:Y13
R398

6:Y13

6:Y13
DDR0_M_Data[60
] DDR0_DQ[60] DDR0_DQ[47] D21 DDR0_DATA46 DDR0_BVSS_
1 C398 C332 C397 C334 DDR0_M_Data[6]
DDR_DATA[3 ] DDR0_M_Data[3] R359 A30 0 . 1 uF C335 75
DDR0_M_Data[57
] 33 1uF C356 C374 C387
DDR_DATA[6 ] DDR0_M_Data[6] DDR0_DQ[57] DDR0_DQ[48] B24 DDR0_DATA47 DDR0_PLL_AIO DDR0_M_Data[3]
A9
DDR0_M_Data[59
] DDR0_DATA48 DDR0_VDDO2P5_
1 R794 R798 R750 R823 R827 R832
R321 DDR0_DQ[59] DDR0_DQ[49] E24 A12 4 . 7 uF 0 . 1 uF
4 . 7 uF 1uF 470pF C360 DDR0_M_Data[1] 470pF 470pF 75
DDR0_DATA49 DDR0_VDDO2P5_
2 470pF 75 75 75 75 75
33 DDR0_DQ[50] C24 A15
DDR0_ADDR[0-12] R323 DDR0_M_Data[6]
DDR0_DQ[51] G25 DDR0_DATA50 DDR0_VDDO2P5_
3
A18 +5.0V

C714
DDR0_DQ[6] +9V IC701

C712
C710
DDR_DATA[13] 33 DDR0_M_Data[13
] R361 DDR0_DQ[52] C25 DDR0_DATA51 DDR0_VDDO2P5_
4 R399
A1;D5;D2;H7;I2 DDR0_M_Data[3] 33 A21 C375 C390
DDR_DATA[8 ] DDR0_M_Data[8] DDR0_DQ[3]
DDR0_DQ[53] D24 DDR0_DATA52 DDR0_VDDO2P5_
5 DDR0_M_Data[10
] 75 AT24C02BN-10SU-1.
8
DDR0_M_Data[1] A24 L708 +5.0V
DDR0_DQ[1] DDR0_M_Data[8]

FI-A2012-271KJT
DDR_DATA[10] DDR0_M_Data[10
] DDR0_DATA53 DDR0_VDDO2P5_
6

FI-A2012-271KJT

FI-A2012-271KJT
C704
DDR0_DQ[54] F25

C706
A27 470pF 470pF 120OHM

C708

27pF
DDR0_M_Data[13
]

27pF

27pF
D2.6V IC303 IC304 DDR_DATA[17] DDR0_M_Data[17
]
DDR0_M_Data[10
] DDR0_DQ[10] DDR0_DQ[55] B25 DDR0_DATA54 DDR0_VDDO2P5_
7
F9 A0 VCC
DDR0_DATA55 DDR0_VDDO2P5_
8 1 8 C724

FI-A2012-271KJT

FI-A2012-271KJT
D2.6V R434
HY5DU561622FTP-D43-C DDR0_M_Data[8] DDR0_DQ[56] D27

FI-A2012-271KJT
HY5DU561622FTP-D43-C DDR0_DQ[8] J 11 DDR0_M_Data[22
]

4.7K
R867

4.7K
R868
DDR_DATA[19] DDR0_M_Data[19
] C743 0 . 1 uF

L706
D2.6V 75 16V C742

L704

L705
D2.6V DDR0_M_Data[13
] DDR0_DQ[57] B27 DDR0_DATA56 DDR0_VDDO2P5_
9 D2.6V JP745

27pF

27pF

27pF
DDR_DATA[22] DDR0_M_Data[22
] DDR0_DQ[13] J 12 DDR0_M_Data[19
] 0 . 1 uF 0 . 1 uF 10uF R873
DDR0_DATA57 DDR0_VDDO2P5_1
0 A1 WP

C715
R362 DDR0_DQ[58] C28 J 13 DDR0_M_Data[17
] C391 C744 16V 16V 1K

C713
R325 2 7

C711
L700

L701
VDD_1 VSS_3 33 DDR0_DATA58 DDR0_VDDO2P5_1
1

R730
L702
VDD_1 VSS_3 DDR0_DQ[59] B28

R710
R715
1 66 33 J 14

15K
R363

15K
1 66

15K
33 DDR0_DQ[60] C26 DDR0_DATA59 DDR0_VDDO2P5_1
2 470pF
DDR_DATA[11 ] DQ0 DQ15 DDR_DATA[0 ] DDR_DATA[43] DQ0 DQ15 DDR_DATA[32] R327 J 15 A2 SCL
2 65 DDR_DATA[29] DDR0_M_Data[29
] DDR0_M_Data[22
] DDR0_DQ[22] DDR0_DATA60 DDR0_VDDO2P5_1
3 22 R860

C709
2 65 DDR0_DQ[61] C27

C705
33 GND 3 6

C707
R401

27pF
J 16 C C Q700
VDDQ_1 VSSQ_5 DDR_DATA[24] DDR0_M_Data[24
] DDR0_M_Data[19
] DDR0_DQ[19] DDR0_DATA61 DDR0_VDDO2P5_1
4 DDR0_M_Data[26
] 75 C C

27pF

27pF
VDDQ_1 VSSQ_5 3 64 DDR0_DQ[62] D25 J 17 TP189
3 64 DDR_DATA[26] DDR0_M_Data[26
] DDR0_M_Data[17
] C338 C339 DDR0_M_Data[24
] TP188 TP187 4:H2;6:A B28;6:A B24;6:A B21
DDR0_DQ[17] DDR0_DQ[63] B26 DDR0_DATA62 DDR0_VDDO2P5_1
5 C340 C341 C342 B Q703 B Q701 B Q702 GND SDA GND B
DDR_DATA[42] DQ1 DQ14 DDR_DATA[33] J 18 22 R861
DDR_DATA[10] DQ1 DQ14 DDR_DATA[1 ] 4 63 33uF 10uF 0 . 1 uF 0 . 0 1 uF 1000pF DDR0_M_Data[29
] 2SC3875
S 2SC3875
S 2SC3875
S 4 5 /W_PROTEC
T

RGB_HS

RGB_VS
4 63 DDR0_M_Data[26
] DDR0_DATA63 DDR0_VDDO2P5_1
6

27pF

27pF

27pF
DDR_DATA[33] DDR0_M_Data[33
] DDR0_DQ[26] J 19 R727 R714 R729
DDR_DATA[41] DQ2 DQ13 DDR_DATA[34] DDR0_VDDO2P5_1
7 R402

R731
6.8K
DDR_DATA[9 ] DQ2 DQ13 DDR_DATA[2 ] 5 62 DDR_DATA[35] DDR0_M_Data[35
] DDR0_M_Data[24
] DDR0_DQ[24] J 20 DDR0_M_Data[38
] E 22 E 22 E 22 E KRC102S

R707

6:Y14
TP191 TP190 TP186
75

6.8K
5 62

R712
6.8K

6:Y14
DDR0_M_Data[29
] DDR0_VDDO2P5_1
8 DDR0_M_Data[35
]
VSSQ_1 VDDQ_5 DDR_DATA[38] DDR0_M_Data[38
] DDR0_DQ[29] J 21

COMP_R_IN_2
COMP_L_IN_2
VSSQ_1 VDDQ_5 6 61

R717
DDR0_VDDO2P5_1
9

R728
C343

R725
6 61 R364 J 22 C344 C345 DDR0_M_Data[33
]

W
R329 0 . 1 uF

COMP2_S
DDR_DATA[40] DQ3 DQ12 DDR_DATA[35] 0 . 0 1 uF

1K
33 DDR0_VDDO2P5_2
0

1K
1000pF

1K
DDR_DATA[8 ] DQ3 DQ12 DDR_DATA[3 ]

1:H4
7 60 33 R365 J 23

COMP_R_IN_1
COMP_L_IN_1
7 60 GND GND

W
33 DDR0_VDDO2P5_2
1

COMP1_S
DDR_DATA[44] DQ4 DQ11 DDR_DATA[39] R330 J 24 R403

1:H4
DDR_DATA[12] DQ4 DQ11 DDR_DATA[7 ] 8 59 DDR_DATA[45] 33 DDR0_M_Data[45
] DDR0_M_Data[38
] DDR0_DQ[38]
8 59 DDR0_VDDO2P5_2
2 75
DDR0_M_Data[35
] J 25
DDR0_M_Data[42
] GND

5:C2
5:A2
VDDQ_2 VSSQ_4 VDDQ_2 VSSQ_4 DDR_DATA[40] DDR0_M_Data[40
] DDR0_DQ[35] DDR0_VDDO2P5_2
3
9 58 9 58 DDR0_M_Data[33
] G24
DDR0_M_Data[40
]
GND GND
DDR_DATA[42] DDR0_M_Data[42
] DDR0_DQ[33] DDR0_VDDO2P5_2
4 C346 C347
DDR_DATA[45] DQ5 DQ10 DDR_DATA[38] C348 GND GND

5:A2
DDR_DATA[13] DQ5 DQ10 DDR_DATA[6 ] 0 . 1 uF 0 . 0 1 uF 1000pF DDR0_M_Data[45
]
10 57 RGB_SW

5:C2
10 57 DDR0_M_Data[42
] DDR0_DQ[42] 1:H2
DDR_DATA[49] DDR0_M_Data[49
]
DDR_DATA[14] DQ6 DQ9 DDR_DATA[5 ] DDR_DATA[46] DQ6 DQ9 DDR_DATA[37] DDR0_M_Data[40
] R404 READY READY READY
11 56 11 56 DDR_DATA[51] DDR0_M_Data[51
] DDR0_DQ[40] DDR0_M_Data[54
] R722 R705 R723
75 ZD729
VSSQ_2 VDDQ_4 DDR0_M_Data[45
] DDR0_DQ[45] DDR0_M_Data[51
] 82 82 82
VSSQ_2 VDDQ_4 DDR_DATA[54] DDR0_M_Data[54
]
ZD719

R829

R833
12 55

5. 6K

5. 6K
12 55 C349 C350 C351 READY
R366 DDR0_M_Data[49
] READY

R854
DDR_DATA[47] DQ7 DQ8 DDR_DATA[36] R333 READY C748 ZD720

10K
DDR_DATA[15] DQ7 DQ8 DDR_DATA[4 ] 33 0 . 1 uF 0 . 0 1 uF 1000pF READY R720 READY

R746

R752
13 54

5. 6K

5. 6K
13 54 33 R367 R702 0 . 0 1 uF
C741 82 R721 C717

R847
NC_1 NC_7 33 82 82 50V GND
0 . 0 1 uF

10K
NC_1 NC_7 14 53 DDR0_M_Data[54
] 22pF C718
14 53 DDR_DATA[61] DDR0_M_Data[61
] DDR0_DQ[54]

1uF

C737

1uF
DDR0_REF R405 50V 22 22pF
DDR0_M_Data[51
] 22

C734

C735
VDDQ_3 VSSQ_3 DDR0_M_Data[58
] 75 JP720

1uF
DDR0_DQ[51]

1uF
VDDQ_3 VSSQ_3 DDR_DATA[56] DDR0_M_Data[56
] R839

C736
15 52 H6 H5 15 52 R843
DDR_DATA[58] DDR0_M_Data[58
] DDR0_M_Data[49
] DDR0_DQ[49] DDR0_M_Data[56
] JP722
DDR0_DQS5 LDQS UDQS

R830
470K
LDQS UDQS DDR0_DQS0 16 51 DDR0_M_Data[61
]
16 51 DDR0_DQS4 H5 DDR0_M_Data[58
] DDR0_VTT JP714
R335

R747

R753
DDR0_DQ[58]

470K

470K
H6 DDR0_DQS1 NC_2 NC_6
NC_2 NC_6 33 DDC_SCL

R834
DDR0_M_Data[56
]

470K
17 50 17 50 DDR0_DQ[56] 4:D3
DDR0_REF
VDD_2 VREF DDR0_M_Data[61
]

10uF
C745
VDD_2 VREF DDR0_DQ[61]
18 49

16V
18 49 DDC_SDA
75

ZD737

ZD738
NC_3 VSS_2 C318 C331 R406 R844 4:D3
NC_3 VSS_2 C316 C313 R368 ZD733

ZD734
19 48 F1 19 48 0 . 1 uF 470pF 33 DDR0_CLK1 0
0 . 1 uF 470pF 5.1V JP716

ZD702

ZD707
DDR0_DQM_5 LDM UDM D5;D2;H5

ZD700
LDM UDM

ZD732
20 47 ZD741

ZD701 5.1V
20 47 DDR0_DQM_4 F1 R408 ZD736 JP719

75
DDR0_VTT 75

JP708
E2 DDR0_DQM_1 DDR0_DQM_0 DDR0_VTT

ZD710

ZD715
/WE /CK DDR0_VTT DDR0_CLK1b JP709

JP710
E2 5.1V

ZD714
DDR0_WEb

R840
/WE /CK

ZD712

ZD713
A 5 ; B 5 ; B 2 ; H 5 ; I1 21 46 DDR0_CLK0b 21 46 DDR0_CLK1b D 5 ; H 5 ; I2 JP717
DDR0_WEb DDR0_ADDR[0-12] D5;D2;H5 0 . 0 1 uF ZD721
/CAS CK R370 R376 R411 75 JP700 JP702
/CAS CK DDR0_CASb

JP707
A 5 ; B 5 ; B 2 ; H 5 ; I1 22 45 75 75 DDR0_CLK0 C392
22 45 DDR0_CLK1 A1;A4;D5;D2;H7 JP703

10uF
D 5 ; H 5 ; I3

C746
DDR0_CASb

[BL]1P_CANZD711
DDR0_CLK0 B5;B2;H5 JP711

16V
DDR0_RASb /RAS CKE JP701 ZD708 ZD709 JP715
A 5 ; B 5 ; B 2 ; H 5 ; I1 /RAS CKE 23 44 R412 75 JP704
23 44 DDR0_CKE B 5 ; B 2 ; D 5 ; H 5 ; I1 R845

[GN]O_SPRING

[RD]O_SPRING
DDR0_RASb DDR0_CLK0b JP712 0 JP721

[GN]CONTACT

[RD]1P_CAN1

[RD]1P_CAN2

[RD]CONTACT
[GN]O_SPRING

[RD]O_SPRING

[WH]C_LUG_L
[RD]C_LUG_L
[BL]C_LUG_L
/CS NC_5 DDR0_CSBb /CS NC_5 DDR0_ADDR[0-12] JP705

[WH]1P_CAN
DDR0_CKE

[GN]1P_CAN
[GN]CONTACT

[RD]1P_CAN1

[RD]1P_CAN2

[RD]CONTACT
[WH]C_LUG_L
[RD]C_LUG_L
24 43

[BL]C_LUG_L
A 5 ; B 5 ; B 2 ; H 5 ; I2 24 43 B5;B2;H5 0 . 0 1 uF

[WH]1P_CAN
[GN]1P_CAN

[BL]1P_CAN
DDR0_CSBb
NC_4 A12 DDR0_ADDR[12]
A1;A4;D5;H7;I2 IC305 D2.6V R407 C393 ZD742 JP718

75
NC_4 A12 DDR0_ADDR[12] R369 R375 75
25 42 25 42
33 R371 33 R377 33 SC2595STR JP713

R841
B2 33 B6
DDR0_BA0 BA0 A11 DDR0_ADDR[11] H6 H6 JP706
A 5 ; B 5 ; B 2 ; H 7 ; I1 BA0 A11 DDR0_ADDR[11] 26 41 DDR0_DQM0 DDR0_DQM_0 DDR0_DQM_7 C352 C336 DDR0_ADDR[12] ZD722
26 41 DDR0_DQM7 JP723
DDR0_BA0 10uF DDR0_ADDR[11]
DDR0_BA1 BA1 A9 DDR0_ADDR[9]

10uF
NC VTT

C747
A 5 ; B 5 ; B 2 ; H 7 ; I1 BA1 A9 DDR0_ADDR[9] 27 40 220uF 1 8

16V
27 40 DDR0_ADDR[9] 0 . 0 1 uF
DDR0_BA1 H6 A2 D6

2
PPJ209-0
DDR0_ADDR[10] A10/AP A8 DDR0_ADDR[8] H6 C394 R846

2E

4E

3E
2C

5C
2B

5B

2D

5D
2A

4A

3A
A10/AP A8 DDR0_ADDR[8]

2
DDR0_DQM_1

PPJ209-0
28 39 DDR0_DQM1 DDR0_DQM_6 0

2E

4E

3E
2C

5C
DDR0_DQM6

2B

5B

2D

5D
R409

2A

4A

3A
28 39 DDR0_ADDR[4]
GND PVCC

A 03- 7071- 094


75

11

12

13

14

15
A0 A7 DDR0_ADDR[7] DDR0_ADDR[0] A0 A7 DDR0_ADDR[7] 2 7
29 38 29 38 DDR0_ADDR[3] ZD743

75
DDR0_VTT DDR0_VTT

16
DDR0_ADDR[1] A1 A6 DDR0_ADDR[6] DDR0_ADDR[2]

10
R842
A1 A6 DDR0_ADDR[6]

9
P701
30 37 30 37 V_SENSE AVCC
3 6 DDR0_ADDR[1]
DDR0_ADDR[2] A2 A5 DDR0_ADDR[5] R373 R379 DDR0_REF 0 . 0 1 uF ZD723
A2 A5 DDR0_ADDR[5] 31 36 75 C358

5
31 36 75 100uF R410 C395
A3 A4 DDR0_ADDR[4] DDR0_ADDR[3] A3 A4 DDR0_ADDR[4] VREF VDDQ 75
32 35 32 35 4 5 A2;A5;B5;B2;H5 DDR0_CSBb
DDR0_ADDR[10]

DDR0_ADDR[0]

DDR0_ADDR[1]

DDR0_ADDR[2]

DDR0_ADDR[3]

VDD_3 VSS_1 VDD_3 VSS_1 C359 A2;A5;B5;B2;H5 DDR0_RASb GND


33 34 33 34
1uF A2;A5;B5;B2;H5 DDR0_WEb

H6
DDR0_DQM3
R372
33 R374 33
A5
DDR0_DQM_3
H6
DDR0_DQM5
R378
33 R380 33
B2
DDR0_DQM_5
C337

0 . 0 1 uF
C357
2 . 2 uF
A2;A5;B5;B2;H5 DDR0_CASb
DDR0_ADDR[5]
DDR0_ADDR[6]
R413
75
0 . 0 1 uF
C396
J700 J702
DDR0_ADDR[7]
B5 H6 D2 DDR0_ADDR[8]
D2.6V H6
DDR0_ADDR[0-12] D2.6V DDR0_DQM_2 DDR0_DQM4 DDR0_DQM_4
DDR0_DQM2 R414
75
A2;A5;B5;B2;H7 DDR0_BA0
A4;D5;D2;H7;I2 C320
100uF
C321
0 . 1 uF
C322
0 . 0 1 uF
C323
0 . 0 4 7 uF
C324
2700pF
C305
470pF C326 C327 C328 C329 C330 C319
A2;A5;B5;B2;H7 DDR0_BA1 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S
100uF 0 . 1 uF DDR0_ADDR[10]
0 . 0 1 uF 0 . 0 4 7 uF 2700pF 470pF
DDR0_ADDR[0]
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
DDR0_CKE
R415 75 FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
B5;B2;D5;D2;H5
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC . DDR INPUT CONNECTOR

RESET NVRAM +5.0V


LVDS OUTPUT(Full HD)
+5.0V ST_5V
ST_5V

L407 ONLY FOR PDP


READY
R513
D3.3V D3.3V L406 READY R936 22 READY
1 : H 1 ; 4 : F1 SCL3_3.3V
D3.3V D3.3V D3.3V D3.3V READY
R506 R512 R514 R516 R947
READY 4.7K READY 22 READY
4.7K 4.7K 4:H3;E3 DISP_EN
READY READY READY R519 H 6 ; 8 : I6
470 R937 22 READY
R502 R507
R508 READY C
INV_ON/OFF 1 : H 1 ; 4 : F1 SDA3_3.3V
100K

LVDS OUTPUT(WXGA)
100K R509
1K

100K READY READY


READY 470
R447

2 : E1 READY B Q404
IC403 R520 52
R433

JTAG_RESET
b
IC401 C 2SC3875
S
H 6 ; 8 : I6
10K

470
INV_ON/OFF_3.3 READY READY C RL_ON R945 1K
3 7 " 4 7 " F Ul l H D : A s se mbl e D3.3V
R431

B Q401 R510 E READY +12.0V


680

1K

AT24C512W-10SI-2.
7 51
1K

H3 2SC3875 S 470 R521 H6;8:H7 READY


R444

B Q405 42" FUll HD(WCG) : NOT Assembl


e
R400

IC400 READY 470 L900


SW400 74LVC14APW E
C 2SC3875
S LIVE_ON
SKHMPWE010 KIA7029AF READY READY ONLY FOR LCD 50
RL_ON_3.3 B C
A0 VCC
1

Q402 R511 E R939


R430
1A VCC
1 8 H3 2SC3875
S 470 B Q406
D3.3V 4.7K LCD 49
Q901
SI4925BDY
330 I O C417 READY C900
1 3 1 14 2SC3875S C901
0 . 1 uF E C R933
5

A1 WP READY 0 . 1 uF 0 . 1 uF R940 48
2 2 7 E 47K L901
C402 LIVE_ON_3.3 B Q403 S1 1 8 D1_2
2

G 1Y 6A
C401 2 13 0 . 1 uF H3 2SC3875
S READY 47 WXGA_LCD_12V A2;E3
10uF R435 1 : A 2 ; 1 : H 1 ; 5 : A 5 ; 9 : E4 READY
READY
NC SCL 22 WXGA_WAFER
VBR_A

3 6 E R903 4.7K G1 2 7 D1_1


SCL2_3.3V 46
2A
3 12
6Y GND FOR PANEL POWER SEQUENCE T1 TIMIN
G C902 C904
P900
8:H6

R436 1 : A 2 ; 1 : H 1 ; 5 : A 5 ; 9 : E4 R935 0 . 1 uF 47uF


GND SDA 4.7K 45

R972
22 4 :F5 ; E5 FI-X30SSL-HF S2 3 6 D2_2 50V 25V
4 5 GND READYR941 0

47K
2Y 5A SDA2_3.3V GND R934 T h i s P o i n t M u s t b e c h e c k e. d
R503 0 0 VBR_B_EXT
4 11 INV_ON/OFF GND READY 44
J 7 ; 8 : I6 8:H6 R942 0 READY G2 4 5 D2_1
R504 0 VBR_B_FHD FOR PANEL POWER SEQUENCE T1 TIMING
RL_ON 43 C
3A 5Y J 7 ; 8 : I6 4:C3;E4 GND LCD R943
9 : B 5 ; 9 : E5

SYS_RESET 5 10 R505 0 0 READY WXGA_LCD GND R932


J7 ; 8 :H 7 AI_ON/OFF 1 1KB Q900 0 . 1 U / 1 6 V - - > 0 . 1 U / 5 0V
10:AC4 LIVE_ON
LCD Module Only 42 R949 0 4:H3 LVDS_PANEL_CTRL

8200pF
R967 47U/16V --> 47U/25V
3Y 4A 1:B5;A3 LVDS_TX_OUT_TA0- 0 2 2SC3875S

C907
SYS_RESET b 6 9 41 R950 GND

50V
0 R968 E
1 : D 6 ; 2 : B 3 ; 8 : A 3 ; 11 : O 11 1:B4 1:B5;A3 LVDS_TX_OUT_TA0+ 0 3
LVDS_TX_OUT_TB4+ WXGA
8:H6

40 READY
VBR_B_EXT

GND 4Y WXGA_LCD
7 8 R953 R951 0
C418 C419 1:B5 LVDS_TX_OUT_TB4- 4
0 . 1 uF 39 4 :F5 ; B5 VBR_B_EXT
10uF READY 0 R952 0 5
1:B5 LVDS_TX_OUT_TB3+ 8 : H 6 ; 8 : I6VBR_B_HD GND
5V_MNT

38 FOR PANEL POWER SEQUENCE T1 TIMIN


G
WXGA
1:B5 LVDS_TX_OUT_TB3- 6
D403 37
GND 7
1:B5 LVDS_TX_OUT_TB1+ 1:B5;A3 LVDS_TX_OUT_TA2-
R471
C

36
6.8K

1:B5 LVDS_TX_OUT_TB1- 1:B5;A3 LVDS_TX_OUT_TA2+ 8


35
IC404 +3.3V
A2

A1

9
LED_G

34
LED_R

3.3VST_MICOM D e t e c t + 3 . 3 V f o r P o w e r S e q u e n c e ( B C M 1 . 2 V, 2 . 6 V, 3 .)3 V
KDS184
1:B4 LVDS_TX_OUT_TBC+ 1:B4;A3 LVDS_TX_OUT_TAC- 10
ST_5V 33
R475

Ser i a l P o rt
1K
R474

A Z1117H-3.3
3.3K
B2

11
B1

1:B4 LVDS_TX_OUT_TBC- 1:B4;A3 LVDS_TX_OUT_TAC+


32
R478
GND

INPUT 3 1 ADJ/GND
6.8K
12
31
2 1:B5 13
C405 LVDS_TX_OUT_TB2+ 1:B5;A3 LVDS_TX_OUT_TA1-
OUTPUT 30
10uF GND
1:B5 LVDS_TX_OUT_TB2- 1:B5;A3 LVDS_TX_OUT_TA1+ 14
3.3VST_MICOM 29
C425
0 . 1 uF 1:B5 LVDS_TX_OUT_TB0+ 15
C406 28
IC402 GND
22uF C424
10uF
3.3VST_MICOM
1:B5 LVDS_TX_OUT_TB0-
27 1:B5;A4 LVDS_TX_OUT_TA3- 16

P400

GND
D404 R944
D3.3V R938 1K
17
1:B5;A4 LVDS_TX_OUT_TA3+
C

R473

READY 26
6.8K

ADM3232E
ARNZ 1K
HDMI_CEC

GND GND 18
6:L26

C408 25
C407 C1+ VCC 0 . 1 uF
A2

A1

1 16 JP407 JP406
R482 1K 1:B5;E4 LVDS_TX_OUT_TA4+ 1:B5;A4 LVDS_TX_OUT_TA4- 19
0 . 1 uF 0 . 1 uF 1
24
V+ GND RxD KDS184
2 15 6

2 1:B5;E4 LVDS_TX_OUT_TA4- 1:B5;A4 LVDS_TX_OUT_TA4+ 20 +12.0V


C420 23
TxD
C1-
3 14
T1OUT 7
3 3.3VST_MICOM R483 1K 1:B5;E4 LVDS_TX_OUT_TA3+ 0
D3.3V 21
0 . 1 uF 22 READY R969
C2+ R1IN
8
R484 1K SCL2_3.3V
C404
C2-
4

5
13

12
R1OUT 1:H2 C409
220pF
C410
9
4

5
IC405 R466 R481 1K
1:B5;E4

1:B5;E4
LVDS_TX_OUT_TA3-

LVDS_TX_OUT_TA1+
21 AI_ON/OFF
SDA2_3.3V
READY 0 R970
R923 10
WXGA_LPL
WXGA_LCD
R963
22

23
DAC B/D Power
BCM_RX 10
20 100
R452

0 . 1 uF 1:H2 33K
P1.4/DA 3
P1.3/DA 2
P1.2/DA 1
P1.1/DA 0

P4.2/AD 2
10K

C906
P 1 . 0 / E T2

V- T1IN 220pF R964 24


6 11 BCM_TX D401 D402 1:B5;E4 LVDS_TX_OUT_TA1- 100pF 100
R448

SDC15 SDC15 19
C403
47K

T2OUT T2IN A1 A1 JP408 KIA7029AF WXGA READY 1


7 10 C C
25
C 18
A2 A2 A02-0915-10
1 Q400 C426 WXGA_LCD R965
C3 0
P 5 .0
P 5 .1
P 5 .2
P 5 .3

R2IN R2OUT R971 26


VDD

8 9 I O B 0 . 1 uF 1:B4;E4 LVDS_TX_OUT_TAC+ 0
UCOM_RX ST_5V 1 3
2SC3875
S 17 4:H3;A6 DISP_EN 2
WXGA_LCD R966 0
C428 2 1:B4;E4 LVDS_TX_OUT_TAC- READY 27
0 . 1 uF E 16
G
C429 GND
1K

WXGA_LCD_12V 28
A2;I 6 3
R462

0 . 1 uF 15
PDP : 29
READY

1:B5;E5 LVDS_TX_OUT_TA2+
4. 7K
R439

36
35
34
44
43
42
41
40
39
38
37

LCD : GND 14
1:B5;E5 LVDS_TX_OUT_TA2- 30
HSYNC/P1.5 P 5. 4
1K

GND 13
1 33 LVDS_PANEL_CTRL 9:G5
R440

1:B5;E5 LVDS_TX_OUT_TA0+ 31 GIL- G-03-S3T2


GND 12
9 : A 5 ; 9 : E4 AI_ON/OFF
R437 0 VSYNC/P1.6 2 32 P 5. 5 DISP_EN 9 : A 6 ; 9 : E3 GND 32
P901
1:B5;E5 LVDS_TX_OUT_TA0-
11
POD P1.7/SOG I 3 P 5. 6 R498 1K
8:H6 R438
READY
0
M i c o m Op t i o n 3 Pi n - H i g h
31 INV_ON/OFF_3.3 H7
10
33

IC407
Micom Option 3 Pin _ Lo
w
RST P5.7/CL KO2
R441

R496 1K
4 30
OPT

H7
RL_ON_3.3 R946
9
ST_5V 7 : J2
R455 22 HSCL1/P3.0/RX
D 5 29 P7.0/HBLANK AC_DET 8:I6 22 8
DDC_SCL
33K
ST_5V D_EYE
GND P4.3/AD 3 6 28 P4.1/AD 1 R499 7
7:G7
R443 7 : J2 6
4.7K DDC_SDA R457 22 HSDA1/P3.1/TXD 7 27 P7.1/VBLANK R500 1K H7 3.3VST_MICOM
LIVE_ON_3.3 5
R449
HH-1M 2012-121 220 R458 4.7K
P 3 . 2 / I N T0 8 26 P7.2/HCLAMP E 3 ; I6 WXGA_LCD_12V
P401 L400 B2 IR MICOM_RESE
T 5 : A 6 ; 5 : G1 4
GND
P 3 . 3 / I N T1 9 P 6. 7
READY

MTV416GMF
1K

SMW200-12
R459 0 25 C437 68K
R418

UCOM_RX
A4 3
0 . 1 uF R492
READY
JP400 I S D A / P 3 . 4 / T0 10 24 P 6. 6 2
L401
1
KEY2 KEY2 H2 I S C L / P 7 .5 11 23 P 6. 5 1
READY

100
R419

JP401 /W_PROTEC
T FHD
C412 6 : A B 2 8 ; 6 : A B 2 4 ; 6 : A B 2 1 ; 7 : I3
2
12
HSCL2/P7.3 13
X2 14
15
VSS 16
P4.0/AD 0 17
18
19
20
21
22

GND 0 . 1 uF
FI-R51S-HF
R453

JP402 3.3VST_MICOM C431 P903


L402 R463 GND GND
KEY1 3 KEY1 H2 15K
P 6 .1
P 6 .2
P 6 .3
P 6 .4
HSDA2/P7.4

P6.0/CL KO1
4.7K

C411 0.1uF 3.3VST_MICOM


X1

0 . 1 uF R450 1K
4
GND
JP403 R451 1K
L403
IR 5 IR C3 R485 R491 GND
1K 4.7K
GND 3.3VST_MICOM
READY

1K

6
R487

4.7K

GND
JP409 GND
R416
R489

100 B3
7 C414 KEY2
5V_ST R422
C413 0 . 1 uF 4.7K
0 . 1 uF
GND R417

GND
8 3.3VST_MICOM
IC406 R423
100 B2
KEY1 THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S
JP404
L404
4.7K
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
R488

GND
100
LCD

LED R 9 LED_R X400


JP405
L405
F5
AT24C16AN-10SI-2.
7
R469
22
24MHz
C435 C436
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
LED G 10
C415 C416
LED_G F5
R470
C433
22pF
C434
22pF
0 . 1 uF 0 . 1 uF
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
1K

VCC A0
0 . 1 uF 0 . 1 uF 8 1 GND
R464

22
GND 11
V
POWER_CTL_2.6V_1.2 V

C432
POWER_CTL_3.3

0 . 1 uF WP A1
8 : E 1 ; 8 :G3 ; 8 :H 1

7 2
GND 12
GND
SCL A2 GND
6 3
6:AO22
V

MUTE1

MUTE2
SDA3_3.3V

1 : H 1 ; 9 : A6

5:A4
SCL3_3.3
1 : H 1 ; 9 : A6

R445
8:A7

22
SDA GND
5 4
GND R446
22

GND GND GND

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
MICOM, TTL
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .

Copyright©2007 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
P801
7411_DDRM_A[0-12] F14 7411_DDR_A[0-12] X24
DDR_VTT_7412 DDR_VTT_7412

R1045
+6.0V P800
C1024 0 . 0 1 uF P l a c e R e s i s t o r s a d j a c e n t t o 7 4 11 ( B O T T O
) M
Se r i a l Po r t ( 7 4 1 2)

SMW250-10
100 7411_DDRM_A[0]
A3.3V

SMW250-13
7411_DDRM_A[1] D3.3V
DDR_VTT_7412 7411_DDRM_DQ[0-31] S27
7411_DDR_DQ[0-31
] X16
C1026

C1038
0 . 0 1 uF

0 . 1 uF
7411_DDRM_A[2]
7411_DDRM_A[3]
7411_DDRM_A[0]22
7411_DDRM_A[1]
7411_DDRM_A[2]
R1052
7411_DDR_A[0]
7411_DDR_A[1]
7411_DDR_A[2]
IC1003
SC2595STR
D2.6V
D3.3V IC801
R1046 PQ05DZ1U IC804
C1028 0 . 0 1 uF 100 7411_DDRM_A[4] 7411_DDRM_A[3] 7411_DDR_A[3]
22 R1021 C1003

10
100 R1013 C1004

13

12

11

10
C1005 0 . 0 1 uF 7411_DDRM_DQ[0] 7411_DDRM_DQ[0] 7411_DDR_DQ[0] A Z1117H-3.3

1
7411_DDRM_A[5] 10uF

1
R1053 NC VTT L805
7411_DDRM_DQ[1] 7411_DDRM_DQ[1] 7411_DDR_DQ[1] C1029 0 . 0 1 uF 220uF
C1006 0 . 0 1 uF 7411_DDRM_DQ[2] 7411_DDRM_DQ[2] 7411_DDR_DQ[2]
7411_DDRM_A[6]
7411_DDRM_A[7]
7411_DDRM_A[4]22
7411_DDRM_A[5]
7411_DDR_A[4]
7411_DDR_A[5]
1 8
IC1004 VIN VOUT
HH-1M2012-121
7411_DDRM_DQ[3] 7411_DDRM_DQ[3] 7411_DDR_DQ[3] 7411_DDRM_A[6] 7411_DDR_A[6] GND PVCC 1 3 INPUT 3 1 ADJ/GND HH-1M2012-121
C1001 0 . 1 uF R1047 2 7 JP1000 L814 JP801 JP800
C1032 0 . 0 1 uF 7411_DDRM_A[8] 7411_DDRM_A[7] 7411_DDR_A[7] JP802 JP807 JP808
C1008 0 . 0 1 uF
100 R1014 22 R1022 100 ADM3232E
ARNZ JP809 JP811 JP813
7411_DDRM_DQ[4] 7411_DDRM_DQ[4] 7411_DDR_DQ[4] 7411_DDRM_A[9]
R1054
1 2 JP815
7411_DDRM_DQ[5] 7411_DDRM_DQ[5] 7411_DDR_DQ[5] V_SENSE AVCC RxD
C1034 0 . 0 1 uF 7411_DDRM_A[11] 7411_DDRM_A[8]22 7411_DDR_A[8] 3 6 C1+ VCC JP1001 NC VC C809 OUTPUT
C1009 0 . 0 1 uF 7411_DDRM_DQ[6] 7411_DDRM_DQ[6] 7411_DDR_DQ[6] C1007 C1094
1 16
C1097 C802 4 2 C826 JP803 JP816
7411_DDRM_A[12] 7411_DDRM_A[9] 7411_DDR_A[9]
10uF C815

L815
0 . 1 uF 0 . 1 uF 2 JP805

L816
100uF JP804
7411_DDRM_DQ[7] 7411_DDRM_DQ[7] 7411_DDR_DQ[7] DDR_VREF_741
2 0 . 1 uF
V+ GND
0 . 3 3 uF 47uF C816 C831 C843 HU-1M5750-401 JP806 JP814

L817

HH-1M2012-121
7411_DDRM_A[10] 7411_DDRM_A[11] 7411_DDR_A[11] VREF VDDQ 2 15
C1039 0 . 1 uF R1030 100 4 5 JP1002 HH-1M2012-121 JP810 JP812
R1023 7411_DDRM_A[12] 7411_DDR_A[12] C1092 HH-1M2012-121
C1010 0 . 0 1 uF
100 R1015
7411_DDRM_DQ[8] 7411_DDRM_DQ[8]
22
7411_DDR_DQ[8] 7411_DDRM_A[10] 7411_DDR_A[10]
C1062 C1-
3 14
T1OUT TxD
3 5 1K 22uF
1uF
R902 0 . 1 uF 0 . 1 uF GND

HH-1M2012-121
7411_DDRM_DQ[9] 7411_DDRM_DQ[9] 7411_DDR_DQ[9] 0 . 1 uF
22uF C845

L818
C1077 C1070 C2+ R1IN
C1013 0 . 0 1 uF 7411_DDRM_DQ[10] 7411_DDRM_DQ[10] 7411_DDR_DQ[10
] 4 13
2 . 2 uF C1098 C1099 GND 220uF

A 1[ RD]

330uF
A 2[ GN]
0 . 0 1 uF C1095

L819
7411_DDRM_DQ[11] 7411_DDRM_DQ[11] 7411_DDR_DQ[11] AH4

C812
C842

LIVE_ON
C2- R1OUT

4 : H 6 ; 4 : J7
C1000 0 . 1 uF C1036 0 . 0 1 uF R1031 100 R1055 5 12
BCM7411_RXA 220pF 220pF GIL- G-03-S3T2
7411_DDR_DQS[0-3
] X19
100 R1016 22 R1024 H19;H6 R1032 100 7411_DDRM_CS
22 7411_DDR_CS Y20 0 . 1 uF AH4 C862 C813 READY 100uF
C1091 0 . 0 1 uF 7411_DDRM_DQ[12] 7411_DDRM_DQ[12] 7411_DDR_DQ[12
] 7411_DDR_DQS[0
] V- T1IN P1000 R824
H19;H6 C1037 0 . 0 1 uF R1033 100 7411_DDRM_BA0 7411_DDR_BA0 Y22 6 11
BCM7411_TXA C846 100uF 10uF
7411_DDRM_DQ[13] 7411_DDRM_DQ[13] 7411_DDR_DQ[13
]
Y22
7411_DDR_DQS[1
] C1093 0
C1015 0 . 0 1 uF 7411_DDRM_DQ[14] 7411_DDRM_DQ[14] 7411_DDR_DQ[14
]
H18;H5 7411_DDRM_BA1 7411_DDR_BA1
7411_DDR_DQS[2
]
T2OUT
7 10
T2IN AI 4 0 . 1 uF
BCM7411_TXB D802
7411_DDRM_DQ[15] 7411_DDRM_DQ[15] 7411_DDR_DQ[15
] 7411_DDR_DQS[3
] AI 4
C1040 0 . 0 1 uF R1034 100 R1056 R2IN R2OUT
POWER_CTL_3.3
V
22 R1025 +1.2V 8 9
BCM7411_RXB +3.3V

C
100 22
GND 100uF

R826
C1016 0 . 0 1 uF R1017 H22 R1035 100 7411_DDRM_DQS
0 JP1003
7411_DDRM_DQ[16] 7411_DDRM_DQ[16] 7411_DDR_DQ[16
] D2.6V
7411_DDRM_DQ[17] 7411_DDRM_DQ[17] 7411_DDR_DQ[17
] H20 C1042 0 . 0 1 uF R1036 100 7411_DDRM_DM0
7411_DDR_DM[0]
7411_DDR_DM[1]
7411_DDR_DM[0-3] X20 +1.2V
1 +12.0V GND +6.0V
C861 C841

0
P20 R1037 100 7411_DDRM_DM1
C1017 0 . 0 1 uF 7411_DDRM_DQ[18] 7411_DDRM_DQ[18] 7411_DDR_DQ[18
]
P22 C1088 4 . 7 uF
7411_DDRM_DQS
1
7411_DDR_DM[2]
D3.3V
RxD JP1004
C839
1uF GND
7411_DDRM_DQ[19] 7411_DDRM_DQ[19] 7411_DDR_DQ[19
] 7411_DDR_DM[3]
C1087 4 . 7 uF
100 22 R1026
C1043 0 . 0 1 uF R1038 100
22
R1057
JP1005
2
+19.0V 0 . 1 uF
R1018 H9 R1039 100 7411_DDRM_DQS
2

L1001

L1002

L1000
C1018 0 . 0 1 uF 7411_DDRM_DQ[20] 7411_DDRM_DQ[20] 7411_DDR_DQ[20
] 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF
TxD
7411_DDRM_DQ[21] 7411_DDRM_DQ[21] 7411_DDR_DQ[21
] H7
Q7
C1046 0 . 0 1 uF R1040 100 7411_DDRM_DM2 C1067 C1071 C1073 C1075 3 GND
C1019 0 . 0 1 uF 7411_DDRM_DQ[22] 7411_DDRM_DQ[22] 7411_DDR_DQ[22
] R1041 100 7411_DDRM_DM3
M u st b e p l a c e d o n t h e tpo C840

5V_MNT
+6.0V

AC_DET
POD

INV_ON/OFF

RL_ON
7411_DDRM_DQ[23] 7411_DDRM_DQ[23] 7411_DDR_DQ[23
] Q9 7411_DDRM_DQS
3 C1053 C1054 C1055 C1056 C1058 0 . 1 uF
C1144 C1143
ST_5V

4:C3
0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF

4 : H 6 ; 4 : J7
C1048 0 . 0 1 uF R1042 100 R1058
22 R1027 220pF 220pF
100 22
GND

0 . 1 uF

0 . 1 uF

0 . 1 uF
C1064

C1065

C1066
C1020 0 . 0 1 uF R1019 H20;H7 R1043 100 7411_DDRM_RAS 7411_DDR_RAS Y18 C1080 C1086 GIL- G-03-S3T2
7411_DDRM_DQ[24] 7411_DDRM_DQ[24] 7411_DDR_DQ[24
]
H20;H7 4 . 7 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 10uF
7411_DDRM_DQ[25] 7411_DDRM_DQ[25] 7411_DDR_DQ[25
] C1050 0 . 0 1 uF R1044 100 7411_DDRM_CAS 7411_DDR_CAS Y18 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF P1001 R920
C1078 C1083 C1085
C1021 0 . 0 1 uF H20;H7 7411_DDRM_WE 7411_DDR_WE Y18 C1068 C1072 C1074 C1076 BCMPWM_VBR_B 6.8K
7411_DDRM_DQ[26]
7411_DDRM_DQ[27]
7411_DDRM_DQ[26]
7411_DDRM_DQ[27]
7411_DDR_DQ[26
]
7411_DDR_DQ[27
]
GND
R1049 22 +6.0V +5.0V
IC800
100 22 R1028 C1057 C1059 C1060 C1061 C1063
R1020 7411_DDRM_CLK 7411_DDR_C
LK C1069

4 : H 6 ; 4 : J7
C1022 0 . 0 1 uF 7411_DDRM_DQ[28] 7411_DDRM_DQ[28] 7411_DDR_DQ[28
] P20;Q7 Y21 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF C1011
C1079

4: F5

4:H3
R1050 22 10uF 47uF
7411_DDRM_DQ[29] 7411_DDRM_DQ[29] 7411_DDR_DQ[29
] P20;Q7 7411_DDR_C
LK Y21 10uF 0 . 1 uF 0 . 1 uF 0 . 1 uF BCMPWM_VBR_A R921
7411_DDRM_CLK
C1023 0 . 0 1 uF 7411_DDRM_DQ[30] 7411_DDRM_DQ[30] 7411_DDR_DQ[30
] R1051 22
C1084 C1089 C1090 6.8K
7411_DDRM_DQ[31] 7411_DDRM_DQ[31] 7411_DDR_DQ[31
] P20;Q7 7411_DDRM_CKE 7411_DDR_CKE Y21 PQ05DZ1U

R1075 10K
1K
C865 C866
R1076 10uF 10uF
10K +5.0V IC809 +3.3V_HDMI

R1074
VIN VOUT R909 R910 R911 R912 R913 R914
A Z1117H-3.3 1 3
22 22 22 22 22 22
TU_+5.0V READY READY READY READY READY READY
R824 R826
INPUT 3 1 ADJ/GND NC VC

For LCD_HD/LCD_FHD_42_4
7
D3.3V C821 4 2 LCD X O
C828
2

7
47uF PDP O X

LCD_FHD_42_4
L803
0 . 3 3 uF

M13
M16

P19

P18

P16

F16
H10
H11
H12
H13

K13
K16

N10
N11
N12
N13

N19

N18

K19

K18

N16

G16

H16
R16
E10
E11
E12
E16

L13
L16

T10
T11
T12
T16

T13
T14
T15

E13
E14
E15
J13
J16

M5
M8

M1

M3
M2

7
H8
H9

K5
K8

N8
N9

N5

G5

H5

N1

N4

K2
K1

N2
N3
R5
E5
E9

L5
L8

T5
T9

T6
T7
T8

E6
E7
E8

L4

L2
L3
L1
C811 OUTPUT 5

P5

F5

P3
P4
P2
C825

For LCD_FHD_3
J5
J8

For V668
10K
10uF

VBR_B_FHD

VBR_B_FHD
D2.6V
22uF

VBR_A

VBR_A
TU801 R809

For LCD_HD
VBR_B_HD

VBR_B_HD
F ul l H D 3 7 " " R913 On
l y be st u f f ed

For V668
1K GND

4 : F 6 ; H6
NC_7

NC_6
NC_2
NC_1
NC_4
NC_5
NC_3
NC_9
NC_8
NC_14
NC_13

NC_11
NC_12
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
UMX-NT-076

VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23
VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
VDD_32
VDD_33
VDD_34
VDD_35
VDD_36
VDD_37
VDD_38
VDD_39
VDD_40

VSS_PLL_1

VSS_PLL_2

VSS_PLL_3

VDD25_1
VDD25_2
VDD25_3
VDD25_4
VDD25_5
VDD25_6
VDD25_7
VDD25_8
VDD25_9

VDD33_1
VDD33_2
VDD33_3
VDD33_4
VDD33_5
VDD33_6
VDD33_7
VDD33_8
VDD33_9
VDD25_10
VDD25_11
VDD25_12

VDD33_10
VDD33_11
VDD33_12
VDD_PLL_1

VDD_PLL_2

VDD_PLL_3
R1060

VIDO_CLKI_B

VIDO_FIELD_B

H6;9:B5
VIDO_EXT_VSYNC_B

H6;9:E5
H6;9:B5
I 6 ; 9: E5
Full HD 42"47" R 9 11 , R 9 1 2 b e s t u f d
fe

4 : F 6 ; H6
SW
C1012 C1025 C1033
E18 CSI_AFULL_A 1
2700pF 2700pF
C1030
0 . 0 4 7 uF 0 . 1 uF G20 CSI_CLK_A
1:H3
0 . 0 1 uF 1:A7 HSX_CLK HD 32", 37", 42" R 9 0 9 , R 9 1 2 b e s t u fdf e
C1041
1:A6 HSX_DATA
G19 CSI_DATA_A RF_SWITCH_CTR
L
R1000 1K F17 CSI_ERROR_A B+
G17 CSI_SYNC_A M u s t b e s e p a r a t e l y f i l t e rde 2
1:A6 HSX_SYNC V668 R 9 1 0 , R 9 1 4 b r s t u fd
fe
G18 CSI_VALID_A

J20 CSI_AFULL_B GND


IC1001 3 C823
R1001 1K H20 CSI_CLK_B C822
HY5DU281622FTP-
5 R1002 1K H19 CSI_DATA_B AUDO_CLK_A U20 47uF
R1003 1K F18 CSI_ERROR_B AUDO_DATA_ A V20 4
7411_DDRM_DQ[0-31] G40 0 . 1 uF
R1004 1K H17 CSI_SYNC_B AUDO_FS256_A U19
VDD_1 VSS_3
1 66 R1005 1K H18 CSI_VALID_B AUDO_LEFT_A V19
+1.8V
7411_DDRM_DQ[0] DQ0 DQ15 7411_DDRM_DQ[15] SHIELD +6.0V TU_+5.0V +3.3V
IC810
2 65
R1006 1K U18 AUDI_CLK AUDO_CLK_B R20
VDDQ_1 VSSQ_5
3 64 R1007 1K V17 AUDI_DAT A AUDO_DATA_ B T20
7411_DDRM_DQ[1] DQ1 DQ14 7411_DDRM_DQ[14] R1008 1K U16 AUDI_LEFT AUDO_FS256_B R19 IC807
4 63
AUDO_LEFT_B T19 PQ05DZ1U +9V
7411_DDRM_DQ[2] DQ2 DQ13 7411_DDRM_DQ[13] D3.3V AZ1117H-1.8TRE1(EH13A
) IC806
5 62 7411_DDR_A[0] U7 DDR_AD_2 +12.0V
VSSQ_1 VDDQ_5 7411_DDR_A[1] V8 DDR_AD_3 AUDO_SPDIF W20 KA7809ERTM
6 61
7411_DDR_A[2] U8 DDR_AD_4 INPUT ADJ/GND
7411_DDRM_DQ[3] DQ3 DQ12 7411_DDRM_DQ[12]
V9 J1 R1086 33 VIN VOUT 3 1
7 60 V41 7411_DDR_A[0-12]
7411_DDR_A[3] DDR_AD_5 VIDO_VBLANK_A_ N BCM7411_DVI_VSYNC 11:K11 1 3
7411_DDRM_DQ[4] DQ4 DQ11 7411_DDRM_DQ[11] 7411_DDR_A[4] U11 DDR_AD_6 VIDO_HBLANK_A_N J2 R1087 33 I 1 3 O
8 59 BCM7411_DVI_HSYNC 11:H16 2
7411_DDR_A[5] V11 DDR_AD_7 VIDO_FIELD_A K4 R1077 10K
VDDQ_2 VSSQ_4 OUTPUT 2
9 58 7411_DDR_A[6] U12 DDR_AD_8 VIDO_EXT_VSYNC_A F4 R1078 10K TU_+5.0V NC VC C849
7411_DDRM_DQ[5] DQ5 DQ10 7411_DDRM_DQ[10] 7411_DDR_A[7] V12 DDR_AD_9 VIDO_CLKO_A H4 R1088 33 4 2 G C847
10 57
V13 K3
BCM7411_DVI_CLK 11:H17 C844 C857 C832 0 . 3 3 uF
7411_DDR_A[8] DDR_AD_10 VIDO_CLKI_A R1079 10K C858 0 . 1 uF
7411_DDRM_DQ[6] DQ6
11 56
DQ9 7411_DDRM_DQ[9]
7411_DDR_A[9] U14 DDR_AD_11 L802 0 . 3 3 uF 47uF 10uF
0 . 1 uF
VSSQ_2 VDDQ_4 7411_DDR_A[10] V7 DDR_AD_12 VIDO_DATA_A_0/VIDO_DVI_DATA_ 0 H3 BCM7411_DVI_OUT[0] 5 C851
12 55
7411_DDR_A[11] V14 DDR_AD_13 VIDO_DATA_A_1/VIDO_DVI_DATA_ 1 J3 BCM7411_DVI_OUT[1] C859
DDR_VREF_741
2
7411_DDRM_DQ[7] DQ7
13 54
DQ8 7411_DDRM_DQ[8]
7411_DDR_A[12] U15 DDR_AD_14 VIDO_DATA_A_2/VIDO_DVI_DATA_ 2 H2 BCM7411_DVI_OUT[2] C805 0 . 1 uF 22uF
R4 G1 BCM7411_DVI_OUT[3] BCM7411_DVI_OUT[0-19] 11:D14 C864 C804 C803 GND
NC_1 NC_7 DDR_AD_15 VIDO_DATA_A_3/VIDO_DVI_DATA_ 3
14 53
VIDO_DATA_A_4/VIDO_DVI_DATA_ 4 F1 BCM7411_DVI_OUT[4] 47uF
VDDQ_3 VSSQ_3 U37 7411_DDR_BA0 V6 DDR_BA0 0 . 0 1 uF
15 52 VIDO_DATA_A_5/VIDO_DVI_DATA_ 5 F2 BCM7411_DVI_OUT[5]
0 . 1 uF
U36 7411_DDR_BA1 U6 DDR_BA1
LDQS UDQS C1044 C1045 C1081 VIDO_DATA_A_6/VIDO_DVI_DATA_ 6 E1 BCM7411_DVI_OUT[6]
16 51 470pF 0 . 0 4 7 uF 22uF
R36 7411_DDRM_DQS
0 7411_DDRM_DQS
1 VIDO_DATA_A_7/VIDO_DVI_DATA_ 7 F3 BCM7411_DVI_OUT[7] 4 . 7 uF
U10 DDR_CK

IC1000
NC_2 NC_6 R35 U33
17 50 7411_DDR_C
LK VIDO_DATA_A_8/VIDO_DVI_DATA_ 8 E2 BCM7411_DVI_OUT[8]
U32
V10 DDR_CK_N
VDD_2 VREF 7411_DDR_C
LK VIDO_DATA_A_9/VIDO_DVI_DATA_ 9 D1 BCM7411_DVI_OUT[9]
18 49
VIDO_DATA_A_10/VIDO_DVI_DATA_1 0 G3 BCM7411_DVI_OUT[10] +2.5V
NC VSS_2 Pl a c e R esi st o r s ad j a c en t
U32 V15 DDR_CKE_N
19 48 t o D D R p i n 4 5 , 4 6 a t t h eD D R
7411_DDR_CKE VIDO_DATA_A_11/VIDO_DVI_DATA_1 1 G4 BCM7411_DVI_OUT[11]
LDM UDM c h i p f u r t h e s t f r o m t h e 7 4 1.1 VIDO_DATA_A_12/VIDO_DVI_ENA G2 BCM7411_DVI_OUT[12]
R36 7411_DDRM_DM0 20 47 7411_DDRM_DM1 R35 U37 7411_DDR_CS U5 DDR_CS_
N
VIDO_DATA_A_1 3 C1 BCM7411_DVI_OUT[13] L809 D2.6V A2.6V
/WE /CK
7411_DDRM_WE 21 46 7411_DDRM_CLK Q7;R32 7411_DDR_DM[0] W3 DDR_MSK_0 VIDO_DATA_A_1 4 D2 BCM7411_DVI_OUT[14]
H7;R33

BCM7412KPB1G IC803
/CAS CK
R1029
240
Z36 7411_DDR_DM[0-3] 7411_DDR_DM[1] Y3 DDR_MSK_1 VIDO_DATA_A_1 5 E3 BCM7411_DVI_OUT[15] TU800
7411_DDRM_CAS 22 45
W13 E4 BCM7411_DVI_OUT[16] C808 C869
H7;R34
/RAS CKE 7411_DDRM_CLK Q7;R33
7411_DDR_DM[2] DDR_MSK_2 VIDO_DATA_A_1 6 VA1G5BR2003 0 . 1 uF
+3.3V
H7;R34 7411_DDRM_RAS 23 44 7411_DDRM_CKE Q7;R32
7411_DDR_DM[3] W14 DDR_MSK_3 VIDO_DATA_A_1 7 D3 BCM7411_DVI_OUT[17]
4 . 7 uF D3.3V
/CS NC_5 VIDO_DATA_A_1 8 C2 BCM7411_DVI_OUT[18]
24 43 7411_DDR_DQS[0
] V2 DDR_DQS_
0
H6;R37 7411_DDRM_CS
Z37 VIDO_DATA_A_1 9 B1 BCM7411_DVI_OUT[19]
D3.3V L810 SC1566I5M-2.5TR
T
NC_3 NC_4 7411_DDRM_A[12] 7411_DDR_DQS[0-3
] 7411_DDR_DQS[1
] W4 DDR_DQS_
1
25 42
Y13 BB
7411_DDR_DQS[2
] DDR_DQS_
2 A3 1
BA0 A11 7411_DDRM_A[11]
Y15 H_IF_SEL R1080 10K
L807
H6;R37 7411_DDRM_BA0 26 41 7411_DDR_DQS[3
] DDR_DQS_
3 A4
PCI_ENABLE R1081 1K B1 C810
BA1 A9 7411_DDRM_A[9]
V4 C9 2 C871 HH-1M2012-121
H5;R36 7411_DDRM_BA1 27 40 DDR_VREF_741
2
U34 7411_DDR_CAS DDR_CAS_
N PCI_STOP_N R1082 10K VIN VO
V5 DDR_RAS_
N PCI_REQ_N C15 4 . 7 uF 1 5
7411_DDRM_A[10]
A10/AP
28 39
A8 7411_DDRM_A[8] U34 7411_DDR_RAS B2 0 . 1 uF A1[RD]
A8 C R828 330

R907
PCI_PERR_N R1083 10K 3

5.6K
7411_DDRM_A[0]
A0 A7 7411_DDRM_A[7]
T4 DDR_WE_N PCI_IRDY_N A9 R1084 10K +1.2V A2[GN]
A1
29 38
A6 7411_DDRM_A[6]
U33 7411_DDR_WE
PCI_GNT_N A16 R1085 10K
B3 TU_+5.0V IC811 +2.5V EN ADJ
7411_DDRM_A[1] 30 37 4 2 4
R1 DDR_REF_
0 D805 AZ1117H-2.5TR/E1
7411_DDRM_A[2]
A2
31 36
A5 7411_DDRM_A[5]
Y19 DDR_REF_
1 PCI_CLK/H_CLK A17 B4 L811 SAM2333 C834 C837 C838 C854
C1051 C1052
B9
BCM3553_CLK_OUT 1:D3 5 C836
A3 A4 7411_DDRM_A[4] 0 . 0 4 7 uF 470pF PCI_DEVSEL_N/H_CS_ N EBI_CS1b 3 0 . 1 uF
7411_DDRM_A[3] 32 35 1:D2 INPUT OUTPUT

R908
U3 A10 RESET 1 : D 6 ; 2 : B 3 ; 4 : B 6 ; 11 : O 11 3 2 0 . 1 uF 4 . 7 uF

4.7K
7411_DDR_DQ[0] DDR_DQ_0 PCI_FRAME_N/H_RD_ N EBI_RDb 1 : D 1 ; 1 : F6 C807 4 . 7 uF 4 . 7 uF
VDD_3 VSS_1
V1 DDR_DQ_1 PCI_IDSEL/H_AS_N A13 6 SYS_RESET
b
33 34 7411_DDR_DQ[1] C873
7411_DDR_DQ[2] U2 DDR_DQ_2 PCI_INTA/H_INT_N B16 BCM7411_INTb 1:D3 SDA 22 R900 1:H2 4 . 7 uF
0 . 1 uF
SAM2333 D3.3V 1
GND
U1 DDR_DQ_3 PCI_PAR/H_WR_N D9 7 SDA0_3.3V D806
7411_DDR_DQ[3]
T3 D10
EBI_WE1b 1 : D 6 ; 1 : D1
C814 ADJ/GND C817
J 40 7411_DDR_DQ[0-31
]
7411_DDR_DQ[4] DDR_DQ_4 PCI_TRDY_N/H_WAIT_N SCL R899 1:H2 10uF
7411_DDR_DQ[5] T2 DDR_DQ_5
EBI_TAb 1:D1
8 22
SCL0_3.3
V
R825
A1[RD] 22uF
T1 A5 1K C
7411_DDR_DQ[6] DDR_DQ_6 PCI_CBE_
0 RSEDRF
R3 B8
EBI_ADDR16/PCI_CBE
0 1 : D 7 ; 1 : D3 0 A2[GN]

POWER_CTL_2.6V_1.2
DDR_DQ_7 PCI_CBE_
1

V
7411_DDR_DQ[7] 9
EBI_ADDR17/PCI_CBE
1 1 : D 3 ; 1 : G7
7411_DDR_DQ[8] Y8 DDR_DQ_8 PCI_CBE_
2 B10
D2.6V EBI_ADDR18/PCI_CBE
2 1 : D 6 ; 1 : D3 SBYTE R802
7411_DDR_DQ[9] W8 DDR_DQ_9 PCI_CBE_
3 C12 10 22 R803
7411_DDR_DQ[10
] W7 DDR_DQ_10
EBI_ADDR19/PCI_CBE3
EBI_DATA/PCI_AD[0-15]
1 : D 6 ; 1 : D3 TU2BCM3553_SYN
C
C1002 C1014 C1027 C1031 C1035 7411_DDR_DQ[11] Y6 DDR_DQ_11 PCI_AD_0/H_DATA_0 A2 EBI_DATA/PCI_AD[0 ] GND
2700pF 2700pF 0 . 0 4 7 uF 0 . 1 uF
W6 D5 EBI_DATA/PCI_AD[1 ] 11
0 . 0 1 uF 7411_DDR_DQ[12
] DDR_DQ_12 PCI_AD_1/H_DATA_1
7411_DDR_DQ[13
] Y5 DDR_DQ_13 PCI_AD_2/H_DATA_2 B3 EBI_DATA/PCI_AD[2 ] SPBVAL
IC1002 7411_DDR_DQ[14
] Y4 DDR_DQ_14 PCI_AD_3/H_DATA_3 B4 EBI_DATA/PCI_AD[3 ] 12 TU_+5.0V
HY5DU281622FTP-
5 7411_DDR_DQ[15
] W5 DDR_DQ_15 PCI_AD_4/H_DATA_4 C4 EBI_DATA/PCI_AD[4 ] SRDT
R41 7411_DDRM_A[0-12]
Y12 C5 13 22 R804
7411_DDR_DQ[16
] DDR_DQ_16 PCI_AD_5/H_DATA_5 EBI_DATA/PCI_AD[5 ]
TU2BCM3553_SDAT
A
7411_DDR_DQ[17
] W12 DDR_DQ_17 PCI_AD_6/H_DATA_6 D6 EBI_DATA/PCI_AD[6 ]
SRCK L801
VDD_1 VSS_3
W11 DDR_DQ_18 PCI_AD_7/H_DATA_7 B5 EBI_DATA/PCI_AD[7 ] 14 33 R925
1 66 7411_DDR_DQ[18
]
Y11 D7 EBI_DATA/PCI_AD[8 ]
TU2BCM3553_SCL
K
7411_DDRM_DQ[16] DQ0 DQ15 7411_DDRM_DQ[31] 7411_DDR_DQ[19
] DDR_DQ_19 PCI_AD_8/H_DATA_8 AFT
2 65
7411_DDR_DQ[20
] W10 DDR_DQ_20 PCI_AD_9/H_DATA_9 C6 EBI_DATA/PCI_AD[9 ] 0
VDDQ_1 VSSQ_5
15
3 64 7411_DDR_DQ[21
] Y10 DDR_DQ_21 PCI_AD_10/H_DATA_10 B6 EBI_DATA/PCI_AD[10]
W9 A6 EBI_DATA/PCI_AD[11 ] SIF R800

R893

R808
7411_DDRM_DQ[17] DQ1 DQ14 7411_DDRM_DQ[30] 7411_DDR_DQ[22
] DDR_DQ_22 PCI_AD_11/H_DATA_11 16

470
4 63

12K
7411_DDR_DQ[23
] Y9 DDR_DQ_23 PCI_AD_12/H_DATA_12 D8 EBI_DATA/PCI_AD[12] C806
7411_DDRM_DQ[18] DQ2 DQ13 7411_DDRM_DQ[29]
7411_DDR_DQ[24
] W18 DDR_DQ_24 PCI_AD_13/H_DATA_13 C7 EBI_DATA/PCI_AD[13] VIDEO R895 0 . 0 1 uF
5 62
17 OPT +1.2V D1.2V A1.2V
VSSQ_1 VDDQ_5 7411_DDR_DQ[25
] Y18 DDR_DQ_25 PCI_AD_14/H_DATA_14 B7 EBI_DATA/PCI_AD[14]
6 61
7411_DDR_DQ[26
] W17 DDR_DQ_26 PCI_AD_15/H_DATA_15 C8 EBI_DATA/PCI_AD[15] SIF 6:X8 +3.3V
7411_DDRM_DQ[19] DQ3 DQ12 7411_DDRM_DQ[28] READY +3.3V

0 . 2 2 uF
Y17 D11

0 . 2 2 uF
7 60 7411_DDR_DQ[27
] DDR_DQ_27 PCI_AD_16/H_ADDR_0 18 C801 E D800 D803
V16 C10

C820
7411_DDR_DQ[28
] DDR_DQ_28 PCI_AD_17/H_ADDR_1 EBI_ADDR/PCI_AD[17] 0 . 0 1 uF

C835
7411_DDRM_DQ[20] DQ4 DQ11 7411_DDRM_DQ[27] KDS226
8 59
W16 A11 EBI_ADDR/PCI_AD[18] L804 KDS226 L806 L808
7411_DDR_DQ[29
] DDR_DQ_29 PCI_AD_18/H_ADDR_2 2SA1504S
VDDQ_2 VSSQ_4
7411_DDR_DQ[30
] W15 DDR_DQ_30 PCI_AD_19/H_ADDR_3 B11 19 3.3uH 3.3uH HH-1M2012-121
9 58 NC TU_+5.0V B Q800 A
7411_DDRM_DQ[21] DQ5 DQ10 7411_DDRM_DQ[26] D3.3V 7411_DDR_DQ[31
] Y16 DDR_DQ_31 PCI_AD_20/UNUSED D12 AC A AC
10 57
C11 SHIELD R894
PCI_AD_21/UNUSED C C C

MBRS340

MBRS340
7411_DDRM_DQ[22] DQ6 DQ9 7411_DDRM_DQ[25] 10K
11 56 PCI_AD_22/UNUSED A12 EBI_ADDR/PCI_AD[17-18]
VSSQ_2 VDDQ_4 R1009 1K K17 JTAG_TCK PCI_AD_23/UNUSED B12 L800

D801

D804
12 55
R1010 1K J19 JTAG_TDI PCI_AD_24/UNUSED B13 IC802 IC805

40V

40V
7411_DDRM_DQ[23] DQ7 DQ8 7411_DDRM_DQ[24]
L17 JTAG_TDO PCI_AD_25/UNUSED D13
13 54
SC4519STRT SC4519STRT

PLL_BYP_ENA_A
PLL_BYP_ENA_B
NC_1 NC_7 R1011 1K K20 JTAG_TMS PCI_AD_26/UNUSED C13

K
14 53

DDR_TEST_CL
J17 A14

ST
ST
R1012 1K JTAG_TRST_
N PCI_AD_27/UNUSED C818 R812 C829 R917

K
VDDQ_3 VSSQ_3 C830 C852 C855

SP_TEST_CL
J18 D14

CLK_200_TE
CLK_400_TE
15 52 R1059 10K JTAG_DBG PCI_AD_28/UNUSED
IC808 C853 C856
TEST_MODE

DDR_VREF_741
2 0 . 1 uF

UART_RX_A

UART_RX_B
UART_TX_A

UART_TX_B

READY
22 47uF 33uF 22 47uF 0 . 1 uF

R919
PCI_AD_29/UNUSED B14 BST SYNC 33uF 68uF

4.7K
LDQS UDQS BST SYNC
16 51
DBG_ENA

N
1 8

SPI_IRDY
R35 7411_DDRM_DQS
2 7411_DDRM_DQS
3 R34 C14 1 8
PCI_AD_30/UNUSED

SPI_CS_
E

SPI_CLK
FMS6400CS1
X
TEST_S

VCX0_A
VCX0_B

NC_2 NC_6
B15

SPI_DO
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7

17 50 PCI_AD_31/UNUSED

SPI_DI
RESET

NC_10

16V
VSS_10

VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_11
VDD_2 VREF
TEST

R897

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
18 49 IN COMP
CLK

IN COMP
NC VSS_2 C1047 C1049 C1082 YI N YOUT 18 2 7 2 7
1 8
LDM
19 48
UDM
470pF 0 . 0 4 7 uF 22uF
TU_CVBS 6:Y10
C800

READY

R807
20 47

R801
R35 7411_DDRM_DM2 7411_DDRM_DM3 R34 0 . 1 uF ASEL VCC SW FB
P20

P17

F20
F19

J10
J11
J12
C819 SW FB

J4
J9

P1
C833
T17

E17

L19

L18

T18

E20
E19

L9
L10
L11
L12
L20
R2

A1
A7

B2

C3

D4

H1

K9

M4
M9

U4
U9

V3

W1
W2

Y1
Y2
Y7
B17
C16

B18
C17

R17

R18

B20
C19

C20

B19

C18
/WE /CK
A18

D15
A19

D16

D18

D20

D19

A15
A20

D17

K10
K11
K12

N17
N20

U13
U17

V18

Y14
Y20
M20

M19

M18
M17

M10
M11
M12

W19
P20;R32

56
7411_DDRM_CLK 2 7 3 6

82
H20;R33 7411_DDRM_WE 21 46
4 . 7 uF 3 6
/CAS CK R1048 READY 4 . 7 uF
H20;R34 7411_DDRM_CAS 22 45 240 0
/RAS CKE 7411_DDRM_CLK P20;R33 GND CVOUT
23 44 3 6 GND EN C827 GND EN C850
H20;R34 7411_DDRM_RAS 7411_DDRM_CKE P20;R32 GND 4 5 0 . 0 1 5 uF 4 5
/CS NC_5 R904 C824 C848 0 . 0 1 5 uF
H19;R37 7411_DDRM_CS 24 43 R813 R918
CIN COUT 560pF
NC_3 NC_4 7411_DDRM_A[12] 4 5 1K 560pF
25 42 1K
BA0 A11 7411_DDRM_A[11]
READY R811
H19;R37 7411_DDRM_BA0 26 41
C867 R905
R916

1K

1K
BA1 A9 7411_DDRM_A[9]
1K
1K
1K

1K

1K

1K
1K

1K
1K

1K

H18;R36 7411_DDRM_BA1 27 40
0 . 1 uF 0 6.8K 6.8K
7411_DDRM_A[10] A10/AP A8 7411_DDRM_A[8] D3.3V
28 39

R1071

R1072
R1061
R1062
R1063

R1064

R1065

R1066
R1067

R1068
R1069

R1070

7411_DDRM_A[0] A0
29 38
A7 7411_DDRM_A[7] 0
7411_DDRM_A[1] A1 A6 7411_DDRM_A[6]
30 37 R806
7411_DDRM_A[2] A2 A5 7411_DDRM_A[5] R1073 READY
31 36
10K
4:G1;G3;H1 POWER_CTL_2.6
V_1.2V 4:G1;E1;G3 POWER_CTL_2.6
V_1.2V
7411_DDRM_A[3] A3 A4 7411_DDRM_A[4]
32 35
VDD_3 VSS_1
BCM7411_27M_CLK

BCM7411_RXB
BCM7411_TXB

33 34
BCM7411_RXA
BCM7411_TXA
T
4:B6 SYS_RESE

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S


BA37
BA37

BA36
BA36

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.


1:H3

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS


S
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.

ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR


THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
MPEG4
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
TUNER, POWER
+9V
+5.0V
R664

+5.0V
1:H4;G28 R641
1K
HDMI_POWER_0 R690
HDMI_HPD_0 1:H4
1K

JP606 2K
IC602 BCM_L_OUT

A1

A2
R682 R684 R639 E
AT24C02BN-10SU-1.
8
10V
VR601

C611 KDS184 AJ16 470 3.6K 200


Q603
0 . 1 uF D600 2SA1504S

M12
KRC102S C B Q606

C
BCM_L_OUT1
4:H2;A B24;A B21;7:I3 A0 VCC C623
GND B
HDMI_POWER_0 C
E8;AI24
E8;AI23

1:H4;AG29 3.3VST_MICOM /W_PROTEC T 1 8 0 . 0 1 uF 1200pF


22
R602 C618 C621
1K 0 . 1 uF
E A1 WP
10V
VR607

19
H5
H5

H6
H6

H6
H7

2 7
H4
H4

4.7K
R620

4.7K
R623
+3.3V_HDMI GND GND
G

18 R605 F26;N23
SDA_HDMI_1
SCL_HDMI_1

A2 SCL
HB-1M1608-102J

GND +9V
TMDS1_RXC+
TMDS1_RX2+

TMDS1_RX1+

TMDS1_RX0+

TMDS1_RXC-

R614 22
TMDS1_RX2-

TMDS1_RX1-

TMDS1_RX0-

68K GND 3 6
MMBD301LT1G

17 SCL_HDMI_0
ST_5V
SDA_HDMI_0 N24;AI26
L607

+5.0V F27;N24
16 GND SDA R615 22
S

R642
Q600
BSS83
D
B
D603

4 5
SCL_HDMI_0 N23;AI27 SDA_HDMI_0 1K
R665

15 R691
L602

2K
HDMI_POWER_1 +5.0V BCM_R_OUT
14 E
1K

R683 R685 R640


HDMI_CEC 4 : E4 IC603 JP607 1:H4;G9 AJ15 470 3.6K 200
13

A1

A2
0 . 0 1 uF

0 . 0 1 uF

2SA1504S
AT24C02BN-10SU-1.
8 C615
C603

C606

K7
TMDS0_RXC- N23 BCM_R_OUT1 B Q607
12 0 . 1 uF KDS184
10V
VR604

SCL2R638 22

HPD2R635 22

D601 C624
0 . 0 1 uF C
C 1200pF
11 A0 VCC C622
C604 1 8
TMDS0_RXC+ N23 Q604
0 . 0 1 uF
GND_7

C619
VCC_8

VCC_7

10 KRC102S C
HPD3

SDA2

0 . 1 uF
VDD
A24

A23

A22

A21
B24

B23

B22

B21

TMDS0_RX0- N22 4:H2;A B28;A B21;7:I3 A1 WP


9 GND B 2 7
/W_PROTECT
4.7K
R621

4.7K
R624

BCM_L_OUT2
GND GND
8
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49

E A2 SCL E8;T26 C
TMDS0_RX0+ N22 R616 22
R630 22 3 6
7 SDA3 1 48 A14 SCL_HDMI_1 Q609 B R770
F27;AI26 SDA_HDMI_0 TMDS2_RX2+ H13
TMDS0_RX1- N22 R631 22 SCL3 47 B14 GND 2SC3875
S
SCL_HDMI_0 2
6 F26;AI27 TMDS2_RX2- H13 GND SDA R617 22 E8;T26 2K
GND_1 3 46 VCC_6 +5.0V 4 5
SDA_HDMI_1 E
5 B31 A13
R666

H25 TMDS0_RXC- 4 45 0 . 0 1 uF
TMDS0_RX1+ C609 TMDS2_RX1+ H14
N22 A31 5 44 B13 HDMI_POWER_2
4 H25 TMDS0_RXC+ TMDS2_RX1- H14 GND
C600 VCC_1 IC601 GND_6
1K

TMDS0_RX2- 6 43 +5.0V
N21 JP608 1:H4;G19
3 0 . 0 1 uF B32 7 42 A12
H24 TMDS0_RX0- TMDS351PAG TMDS2_RX0+ H15 IC604 BCM_R_OUT2
A32 41 B12
A1

A2

H24 TMDS0_RX0+ 8
2 TMDS2_RX0- H15 A T24C02BN-10SU-1.8 C616
GND_2 9 40 VCC_5 C
TMDS0_RX2+ N21 0 . 1 uF KDS184
1 B33 10 39 A11 0 . 0 1 uF D602 R772

E
H24 TMDS0_RX1- TMDS2_RXC+ H16 Q610 B
C610 MUTE2
C

H23 A33 11 38 B11 2SC3875


S
20 TMDS0_RX1+ TMDS2_RXC- H16 A0 VCC 2K
C601 VCC_2 SCL1 Q605 1 8 Q611
12 37 E17;AI21 C694
SCL_HDMI_2 KRC102S C620 E
21 0 . 0 1 uF B34 SDA1 R632 22 C KRA102S

B
H23 TMDS0_RX2- 13 36 E17;AI20 0 . 1 uF
R634 22 SDA_HDMI_2 0 . 1 uF
A34 35 HPD1 B A1 WP
H22 TMDS0_RX2+ 14 2 7 GND
+3.3V_HDMI /W_PROTECT
4.7K
R622

4.7K
R625

GND_3 15 34 EQ
GND
GND GND
3.9K VSADJ 33 S2 GND
16 4:H2;A B28;A B24;7:I3 E E17;W21
R613

A2 SCL R618 22 +5.0V


J 6 02 GND 3 6
R606 SCL_HDMI_2
1K
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

DC1R019WDH
GND SDA R619 22 E17;W21
GND 4 5
S1
Z4

Z3

Z2

Z1
Y4

Y3

Y2

Y1

READY
VCC_3

VCC_4

SCL_SINK

R608
GND_4

GND_5

SDA_HDMI_2
SDA_SINK
HPD_SINK

R637

HDMI_HPD_2 1:H4 R744


200

R604 0 5 .1
HDMI_SEL_1 1:H3
VR600

R603 0
HDMI_SEL_0 1:H3 C
10V

0 . 0 1 uF GND
0 . 0 1 uF
C605 C607
+3.3V_HDMI B Q608
GND 2SC3875
S
22 HDMI_POWER_2 1:H4;AG23
IC100 C690
E
100uF
BCM3553
ZD600
10V
VR606

3.3V

19 R601
4.7K
R610

4.7K
R611

0 . 0 1 uF 1uF
1K C693 C692
18
GND AK33 AH24
17 DS_AGCT_CTL I2S_CLK_IN CS5340_I2S_SCLK_OUT 5:D2
R745

AJ33 AJ24
22

SDA_HDMI_2 W21;AI2 0 DS_AGCI_CTL I2S_DATA_IN CS5340_I2S_DATA_OU


T 5:D2
TMDS_RXC+_BCM
TMDS_RX2+_BCM

TMDS_RX1+_BCM

TMDS_RX0+_BCM

TMDS_RXC-_BCM
TMDS_RX2-_BCM

TMDS_RX1-_BCM

TMDS_RX0-_BCM

16 DDC_SDA_BCM AJ13 AJ30 AK24


EDSAFE_AVSS_1 I2S_LR_IN CS5340_I2S_LRCLK_OU
T 5:D1
AK32 AK25 22 R627
15 SCL_HDMI_2 W21;AI2 1 EDSAFE_AVSS_2 I2S_CLK_OUT T
BCM3553_I2S_SCLK_OU
DDC_SCL_BCM AJ13 AL34 AL25 22 R628 5:A5
A1.2V BCM3553_I2S_DATA_OUT
EDSAFE_AVSS_3 I2S_DATA_OUT
14 A2.6V AK31 AJ25 22 R629 5:A5
EDSAFE_AVSS_4 I2S_LR_OUT BCM3553_I2S_
L RCLK_OUT 5:A5
AJ31 AP28 C675 0 . 1 uF
13 EDSAFE_DVDD1P2 AUD_LEFT_N
0 . 1 uF AL32 AN28
W22 C666 EDSAFE_AVDD2P5_1 AUD_LEFT_P BCM_L_OUT1 AK28
12 TMDS2_RXC- AL33 AM29
10V
VR605

EDSAFE_AVDD2P5_2 AUD_VDDO2P5
AJ11
AJ11

AJ12
AJ12

AJ12
AJ12

AJ12
AJ13

AL31 AL28
11
AM33
EDSAFE_AVDD2P5_3 AUD_VSSO
AN29 C674 0 . 1 uF
A2.6V
TMDS2_RXC+ W22 EDSAFE_IF_P AUD_RIGHT_N
10 AM34 AP29
0 . 1 uF C656 EDSAFE_IF_N AUD_RIGHT_P BCM_R_OUT1 AK26
TMDS2_RX0- W22 4 . 7 uF AM32 AP11 R626 22
9 C655 PLL_DS_AVDD1P2 AUD_SPDIF BCM3553_SPDIF_OU
T
GND C664 C668 AN32 AK12
L605 PLL_DS_AGND SPDIF_AVDD2P5 5 : G 7 ; 5 : H2
0 . 1 uF 4 . 7 uF AJ12
8 +5.0V C682
SPDIF_AVSS
TMDS2_RX0+ W22 7 : E4 RGB_R C635 0 . 1 uF AK16 AM11 C672 0 . 1 uF 0 . 1 uF
7 SD_R SPDIF_IN_N
7: F4 RGB_G C636 0 . 1 uF AN15 AN11 C695 0 . 1 uF
TMDS2_RX1- W23 SD_G SPDI F_IN_P
6 7: F4 RGB_B C637 0 . 1 uF AM15
0 . 1 uF SD_B
HB-1M1608-102J
T AH16 AP3
5 L606 7:G3 RGB_HS RGB_HSYNC HDMI_RX_0_CEC_RES
C626 AJ16 AL5 A2.6V
TMDS2_RX1+ W23 TP607 7:G3 RGB_VS RGB_VSYNC HDMI_RX_0_CEC_DAT
4 AL15 AL3
34 SD_INCM_RGB HDMI_RX_0_HTPLG_IN
TMDS2_RX2- W23 1.5M 0 . 1 uF C638 0 . 1 uF AM21 AL2
R693
3 R695 7:A4 COMP1_Y AL21
SD_Y1 HDMI_RX_0_HTPLG_OU
T
AL1 22 R633
C639 0 . 1 uF
C627 7:B4 COMP1_Pr SD_PR1 HDMI_RX_0_DDC_SCL DDC_SCL_BCM V17
2 R651 C640 0 . 1 uF AN21 AK4 22 R636
R647 E 1.5M 7:A4 COMP1_P b SD_PB1 HDMI_RX_0_DDC_SDA DDC_SDA_BCM V17
1K 34 AM20 AL4
TMDS2_RX2+ W24 30K R696
1 TP608
Q613 R694 SD_INCM_COMP1 HDMI_RX_0_RESREF R737 499
C C628 0 . 1 uF AN22 AM1
B 2SA1504S 7:C4 COMP2_Y SD_Y2 HDMI_RX_0_CLK_N TMDS_RXC-_BCM S18
20 TP602
R644 Q602 C629 0 . 1 uF AL22 AM2
B 7:D4 COMP2_Pr SD_PR2 HDMI_RX_0_CLK_P TMDS_RXC+_BCM S18
BCM_L_OUT
TP606
2SC3875
S C C630 0 . 1 uF AP22 AN1
21 AO29 0 TP613 7:C4 COMP2_Pb SD_PB2 HDMI_RX_0_DATA0_N TMDS_RX0-_BCM S18 A1.2V
R656 AM22 AN2
C617 BCM_L_OUT2
3 . 3 uF E TP612
SD_INCM_COMP2 HDMI_RX_0_DATA0_P TMDS_RX0+_BCM S18
R653 0 C633 0 . 1 uF C648 0 . 1 uF AL17 AM3
50V 7:C7 S-VIDEO1_L SD_L1 HDMI_RX_0_DATA1_N TMDS_RX1-_BCM R18
C662 C649 0 . 1 uF AL16 AM4
TP609 3 . 3 uF 7:C7 S-VIDEO1_C SD_C1 HDMI_RX_0_DATA1_P TMDS_RX1+_BCM R18
R648 1.5K 50V R701 1.5M AP16 AP2
J 6 01 15K 34 R706 SD_INCM_LC1 HDMI_RX_0_DATA2_N TMDS_RX2-_BCM R18
R652 7:G5 S-VIDEO2_L
C659 0 . 1 uF AN18 AN3 A3.3V
DC1R019WDH GND SD_L2 HDMI_RX_0_DATA2_P TMDS_RX2+_BCM Q18 HB-1M1608-102J
T
470 C660 0 . 1 uF AM18 AK6
7:G6 S-VIDEO2_C L601
SD_C2 HDMI_RX_0_VDD3P3
AM17 AJ7
1:H4 SD_INCM_LC2 HDMI_RX_0_VDD1P2
AL19 AK5
HDMI_HPD_1 0 . 1 uF C641 34 0 . 1 uF R718 SD_L3 HDMI_RX_0_VDD2P5
R654 C647 AP19 AG8
R713 1.5M SD_C3 HDMI_RX_0_PLL_AVDD 1P2
0 34 1.5M AN19 AJ8
SD_INCM_LC3 HDMI_RX_0_AVSS C676 C613 C678 C680 C683
10V

R703
VR602

READY R708 C658 0 . 1 uF AN16 AG7 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF


8:C2 TU_CVBS SD_CVBS1 HDMI_RX_0_PLL_AVSS 10uF
+5.0V 7:C6 COMPOSITE1_I
N C651 0 . 1 uF AN17 AJ4
SD_CVBS2 HDMI_RX_1_CEC_RES
GND GND C652 0 . 1 uF AM19 AK3
1:H4;AG26 7:G6 COMPOSITE2_I
N
22 AP20
SD_CVBS3 HDMI_RX_1_CEC_DAT
AG4 A2.6V
R600 HDMI_POWER_1
SD_CVBS4 HDMI_RX_1_HTPLG_IN
1K AN24 AF8
10V
VR608

HB-1M1608-102J
T SD_CVBS5 HDMI_RX_1_HTPLG_OU
T
19 AM16 AG6
L604 SD_INCM_CVBS1 HDMI_RX_1_DDC_SCL
TP604 AP17 AG5 R738
18 GND SD_INCM_CVBS2 HDMI_RX_1_DDC_SDA
C642 0 . 1 uF AL18 AH6 499
SD_INCM_CVBS3 HDMI_RX_1_RESREF
17 34 AN20 AH2
R704 1.5M SD_INCM_CVBS4 HDMI_RX_1_CLK_N
SDA_HDMI_1 T26;AI23 R645 R709 R726 C665 AM24 AH1
16 R612 SD_INCM_CVBS5 HDMI_RX_1_CLK_P
1K E 10 0 . 1 uF AN23 AH3
SCL_HDMI_1 T26;AI24 30K 8:C2 S IF SD_SIF1 HDMI_RX_1_DATA0_N A1.2V
15 TP603 Q612 AL23 AH4
C SD_SIF2 HDMI_RX_1_DATA0_P
TP600 B 2SA1504S AP23 AJ1
14 BCM_R_OUT R609 B Q601 C645 0 . 1 uF SD_INCM_SIF1 HDMI_RX_1_DATA1_N
C TP611 AM23 AJ2
TP601 2SC3875
S R655 34 1.5M SD_INCM_SIF2 HDMI_RX_1_DATA1_P A3.3V
13 0 R607 AH22 AJ3
C608 TP610 R711
E R716 1.5M SD_V1_AVSS HDMI_RX_1_DATA2_N
TMDS1_RXC- T26 3 . 3 uF 0 BCM_R_OUT2 AH20 AK2 HB-1M1608-102J
T
VR603

12 50V SD_V2_AVSS HDMI_RX_1_DATA2_P L600


R649 C650 AH23 AH7
10V

TP605
3 . 3 uF SD_V3_AVSS HDMI_RX_1_VDD3P3
11 R643 1.5K 50V AH21 AJ5
15K A2.6V A1.2V
AK23
SD_V4_AVSS HDMI_RX_1_VDD1P2
AH5
TMDS1_RXC+ S26 R646 C653 0 . 1 uF
10 SD_V5_AVSS HDMI_RX_1_VDD2P5
470 34 AJ17 AJ6
TMDS1_RX0- S26 SD_V6_AVSS HDMI_RX_1_PLL_AVDD 1P2
9 R719 1.5M AG23 AH8
GND R724 C612 C679 C681 C684
L603 SD_CLKTST HDMI_RX_1_AVSS C614
C646 0 . 1 uF AJ18 AK7 0 . 1 uF 0 . 1 uF 0 . 1 uF 0 . 1 uF
8 SD_V1_AVDD2P5 HDMI_RX_1_PLL_AVSS 10uF
R650 C632 0 . 1 uF AJ22
TMDS1_RX0+ S26 SD_V2_AVDD2P5
7 C625 C644 0 . 1 uF AJ19
0 SD_V3_AVDD2P5
TMDS1_RX1- R26 READY C643 0 . 1 uF 4 . 7 uF AJ23
6 READY SD_V4_AVDD2P5
0 . 1 uF C631 0 . 1 uF READY AJ21
R692 C602 SD_V5_AVDD2P5
5 1.5M C634 0 . 1 uF AJ20
GND 34 SD_V6_AVDD2P5
TMDS1_RX1+ R699 C671 0 . 1 uF AK20
R26 R743
4 SD_V1_AVDD1P2 1.5K 7: F7
C667 0 . 1 uF AK21
TMDS1_RX2- R26 SD_V2_AVDD1P2 BCM_L_OUT2 MNT_L_OUT
3 C663 0 . 1 uF AK17 S12;AN24
SD_V3_AVDD1P2
C661 0 . 1 uF AK19
2 SD_V4_AVDD1P2 R740
C657 0 . 1 uF AK22 1.5K 7: F7
TMDS1_RX2+ R26 SD_V5_AVDD1P2 BCM_R_OUT2 MNT_R_OUT
1 C654 0 . 1 uF AK18
SD_V6_AVDD1P2 Q7;AN22
C643, C602 R EADY
470K

470K

20
R739

F o r P C N o i s e S o l u t in
o
R742

21

J 6 00
DC1R019WDH GND

THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATE S


SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC .
VIDEO EXT. INPUT
Copyright©2007 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
PRINTED CIRCUIT BOARD

MAIN (TOP) MAIN (BOTTOM)

IR/LED(TOP)
SIDE A/V (TOP) SIDE A/V (BOTTOM) CONTROL B/D(TOP)

IR/LED(BOTTOM)
CONTROL B/D(BOTTOM)

Copyright©2007 LG Electronics. Inc. All right reserved. LGE Internal Use Only
Only for training and service purposes
Dec., 2007
P/NO : MFL41546701 Printed in Korea

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