Display of r550 on PMU

n959.25 = 4
15 14 13 12 11 10 9 8

Control word 1
r550
Control word 1 •
7 6 5 4 3 2 1 0
Bit No. Meaning K0030

Src ON/OFF1 P554.B (22/22) 0=OFF1, Shutdown via ramp-function generator, to sequence control 1)
Src1 OFF2(coast) P555.B (1/20)
B Bit 0 followed by pulse disable, to braking control [470.1]
B
1=ON, operating condition (edge-controlled) to setpoint processing [300.5]
Src2 OFF2(coast) P556.B (1/1) 0=OFF2, pulse disable, motor coasts down to sequence control 1)
Bit 1
B 1=Operating condition to braking control [470.1]
Src3 OFF2(coast) P557.B (1/1)
B
& Bit 2
0=OFF3, quick stop
1=Operating condition
to sequence control 1)
to braking control [470.1]
to setpoint processing [318.3], [328.3]
Src InvRelease P561.B (1/1)
1=Inverter enable, pulse enable
"Safe OFF" 2) B Bit 3 to sequence control 1)
0=Pulse disable
Src RampGen Rel P562.B (1/1)
Src1 OFF3(QStop) P558.B (1/1) 1=Ramp-function generator enable
B Bit 4 to setpoint processing [317.6], [327.6]
B 0=Set ramp-function generator to 0

Src2 OFF3(QStop) P559.B (1/1) Src RampGen Stop P563.B (1/1) 1=Start ramp-function generator
B
& Src Setp Release
B

P564.B (1/1)
Bit 5
0=Stop ramp-function generator
to setpoint processing [317.6], [327.6]

Src3 OFF3(QStop) P560.B (1/1) 1=Setpoint enable

B Bit 6 to setpoint processing [317.1], [327.1]
B 0=Setpoint disable
B0094 Fault acknowl. 3)
Src1 Fault Reset P565.B(2107)
Bit 7 0 =>1 Edge fault acknowledgement to sequence control 1)
B
Src Inching Bit0 P568.B (0/0) to sequence control 1)
Src2 Fault Reset P566.B (0/0) to setpoint processing
B Bit 8 1=Inching bit0
B [316.1], [318.2], [326.1], [328.2]

Src3 Fault Reset P567.B (0/18)

B
1 Src Inching Bit1 P569.B (0/0)
B Bit 9 1=Inching bit1
to sequence control 1)
to setpoint processing
[316.1], [318.2], [326.1], [328.2]
1=Control requested Note:This bit must be set in the first PZD word of the
from PMU [50.7] Bit 10 telegram received from serial interfaces, so that the
0=No control requested converter will accept the process data as being valid
Src FWD Speed P571.B (1/1) (compare USS, PROFIBUS, etc.)
1=Clockwise phase sequence enable
B Bit 11 to setpoint processing [316.4], [326.4]
0=Clockwise phase sequence disable
1) The sequence control is the internal Src REV Speed P572.B (1/1)
1=Counter-clockwise phase sequence
control (software) for realizing the B Bit 12 to setpoint processing [316.4], [326.4]
enable 0=Counter-clockwise phase sequence disable
drive status (r001)
Src MOP UP P573.B (8/0)
Pre-assignment of the BICO parameters: B Bit 13 1=Raise mot. potentiometer to setpoint processing [300.1]
1. Binector valid for BICO data set 1
2. Binector valid for BICO data set 2 Src MOP DOWN P574.B (9/0)
B Bit 14 1=Lower mot. potentiometer to setpoint processing [300.1]
2) "OPTION" / With Kompact PLUS devices [92.6]
Src No ExtFault1 P575.B (1/1)
0=External fault 1 to sequence control 1)
3) The signal remains high on acknowledgement for B Bit 15
1=No external fault to fault processing
T10 (= 204.8 ms with 5 kHz pulse frequency).

1 2 3 4 5 6 7 8
Control word 1 fp_vc_180_e.vsd Function diagram
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24.07.01 MASTERDRIVES VC