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Digital Electronics
(EC25554)
SESSION JAN-JUNE 2019
A Report on
“DESIGNING OF 4 X 1 MULTIPLEXER”
Submitted to :- Submitted by
We take this opportunity to express our profound gratitude and deep regards to Prof. Amit Naik
for their exemplary guidance, monitoring and constant encouragement throughout the course of
this report.
We also take this opportunity to express a deep sense of gratitude to all the teachers of SGSITS,
for their cordial support, valuable information and guidance, which helped us in completing this
task through various stages.
Lastly, we thank almighty, our parents and friends for their constant encouragement without
which this assignment would not be possible.
Although there may be many who remain unacknowledged in this humble note of gratitude but
there are none who remain unappreciated.
Certificate
Introduction
Designing of a Multiplexer (MUX)
Block diagram of a Multiplexer:-
General Block diagram of a MUX
4 X 1 Block diagram of a MUX
Advantages of designing with Multiplexer
Application of Multiplexer
Circuit Diagram of 4 X1 Multiplexer
Circuit implemented / Stimulated on Software (Proteus)
Inputs Provided and Output Received for the given circuit :-
Result
Time diagram for the given circuit
Conclusion
Bibliography
Introduction
The input–output relationship: Zi (k) = fj {x1 (tk), x2 (tk),. . . xn (tk)} ……. Eq(i)
i = 1, 2, . . . m
j = 1, 2, . . . n
as input and output may not be always same.
Sj determines the nature of the function.
The behavior of a combinational circuit is described by the output function as given by above
equation Eq (i) whereas in sequential circuit some output is fed back to the input. In sequential
circuit we get two types of outputs. Zi {tk} is called the output function and the other yi {tk} is
called the state function.
Zi (tk) = gi {x1{tk} … xu{tk}; y1{tk} … ys {tk} ……. Eq . (ii)
where i varies from 1 to v.
So we have u number of outputs.
And yj (tk) = hj {x1{tk} … xu{tk}; y1{tk} … ys {tk} ……. Eq . (iii)
where j = 1, 2 … s
Designing of a Multiplexer :-
Multiplexer is a special type of combinational circuit. This includes large memory array,
complex microprocessor, and microcomputer chips. Type of multiplexer or a data selector is a
very important special combinational circuit (made with MSI devices) with gate complexity of
MSI devices. Generally a (n : 1) multiplexer or a data selector contains the following
1. n number of inputs of the multiplexer
2. only one output of the multiplexer
3. m select/Address lines
4. one strobe/enable input (optional)
All inputs and outputs should be purely logical or binary input. For n : 1 multiplexer , each input
will be selected at the single output at any instant of time, depends upon the input applied to the
select/address inputs. Switching circuit connects a particular input to the output. Here m and n
are related by 2^m = n So for a 4 : 1 multiplexer, the number of inputs is 4 and m = 2 (2^2 = 4).
Let us consider, a 4 : 1 multiplexer having 4 inputs, 2 select lines, one output one strobe inputs.
Strobe inputs should be grounded for enabling the multiplexer and can perform its intended
function. Commercial multiplexers will be 2 : 1, 4 : 1, 8 : 1, 16 : 1, ….
m = 1, m = 2, m = 3, m = 4
The corresponding function of the multiplexer can be verified using the data given in Table
Multiplexers are also considered as many to one device (cable TV channels) that is out of
manyinputs, we select only one input at a time at the output, G = 0 always for enabling the
multiplexer. If G = 1, whatever be the value of S1 and S0, the output is always 0. By observing
the truth table of 4:1 multiplexers, the logical expression for the output of the multiplexer can be
written as:
That is when the strobe input is connected to the logical high voltage or logical = 1, the
multiplexer is not enabled that is disabled and cannot perform. So, the G input has to be
connected to the ground always to enable the multiplexer.
1. The given logic function or the truth table need number to be minimized that is the
minimization of the logic function or truth table is not required.
2. Logic design is simplified.
3. It reduces the IC package-count as only 1 IC instead of 4 ICs are required for FA.
4. The layout of the circuit is simpler.
5. It requires less number of wiring or interconnection.
6. Cost of realization is minimum.
7. Reliability of designing with MUX is more.
Application of a Multiplexer :-
1. It can be used to realize any given LF and TT without minimizing it.
2. It can be used as a universal logic gate.
3. It can be used for parallel to serial converter.
4. It can be used for the design of the sequence generator.
By cascading lower order multiplexer we can realize higher order multiplexers. This is called
multiplexer tree. Realize 4 : 1 multiplexer by using 2 : 1 multiplexers and other gates required (if
any)
Application of Multiplexer