Department of Industrial and Production Engineering

Jessore University of Science and Technology

1st Year 2nd Semester Examination-2018
Course Title: Electrical Circuits and Electronics Time: 3 hours
Course Code: EEE 1201 Full Marks: 72
N.B. There are eight questions, answer any six questions.
The figures shown in the margin indicate full marks.

1. a) State and explain Ohm’s law with it's limitation. 2

b) Find the number of branches and nodes in each of the circuits of figure 1(b). 3

Figure 1(b)
c) State KVL and KCL. Calculate I and Vab in the circuit of figure 1(c) 3

Figure 1(c) Figure 1(d)

d) Find the equivalent resistance Rab in the circuit of figure 1(d). 4

2. a) R∆ 4
For balanced Y and ∆ network, show that R Y = .
3

b) Using mesh analysis, find i0 in the bridge network shown in figure 2(b). 4

Figure 2(b) Figure 2(c)

c) Define supernode. From the RLC circuit in figure 2(c) find (i) i, vC and iL (ii) the energy 4
stored in capacitor and inductor under dc condition.

3. a) Prove that maximum power is transferred to the load when the load resistance and Thevenin 4
resistance as seen from the load are equal. Also derive the maximum power transfer equation.

Sourav Roy
Asst. Professor, Dept. of EEE, JUST
 b) State superposition theorem. Find vx in the circuit of figure 3(b) by using superposition 4
theorem.

Figure 3(b) Figure 3(c)

c) State Norton’s Theorem. Find the Norton equivalent circuit of the circuit in figure 3(c) at 4
terminals a-b.

4. a) What is a p-n junction? How do the depletion region width and contact potential across a p-n 4
junction vary with the applied bias voltage?
b) With a neat circuit diagram and waveforms explain the working of full wave bridge rectifier 4
and calculate the efficiency as 81.2%.
c) In the bridge type circuit shown in fig. 4(c), find (i) dc output voltage and (ii) peak inverse 4
voltage. Assume primary to secondary turns to be 4.

Fig. 4(c)

5. a) Obtain the power factor and the apparent power of a load whose impedance is Z = 60 + j40 Ω 4
when the applied voltage is 𝑣(𝑡) = 160 cos(377𝑡 + 10˚)V.
b) Find the effective value of the waveform shown in figure 5(b). Also calculate the form factor 4
of the signal.

Figure 5(b)
c) Calculate i0 in the circuit shown in figure 5(c). 4

Figure 5(c)

6. a) “Current through a pure inductor lags the voltage across it by 90˚ whereas current through a 3
pure capacitor leads the voltage across it by 90˚”- Justify the statement.
b) “A transistor works as an amplifier and inverter”, Justify this statement. 4
Sourav Roy
Asst. Professor, Dept. of EEE, JUST
 c) Compare between common base, common emitter and common collector configuration of 3
transistor. How can you identify the leads of a transistor?
d) Define current amplification factor (γ) and base current amplification factor (β). Show that, 2
1
𝛾=
1−𝛼

7. a) Write down some key points on op-amp. Derive the equation of voltage gain for non-inverting 4
amplifier and integrator.
b) What is faithful amplification? Explain the conditions to be fulfilled to achieve faithful 4
amplification in a transistor amplifier.
c) Compare voltage and power amplifier. With a neat circuit diagram, explain the working of a 4
transformer-coupled class A power amplifier. How does it give excellent performance in
impedance matching?

8. a) You are given a number 153.6875 in decimal format. Convert the number in octal and proof 4
by reconverting to decimal.
b) Draw the AND, OR, NOT, NOR, NAND, EX-OR and EX-NOR logic gates. Also write down 4
their truth table.
c) Justify this statement, “A full-adder can be implemented with two half adders and an OR 4
gate”.

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Sourav Roy
Asst. Professor, Dept. of EEE, JUST