The Digital Computer Accepts - Data As Input

Computer Fundamentals
1. The digital computer accepts ____ data as input.

a. Binary
b. Count
c. Numeric
d. Text
(Ans:a)
2. The following are included in graphics data, except

a. Music
b. Charts
c. Drawing
d. Photographs
(Ans:a)
3. Which of the following has highest speed?

a. CPU
b. Main memory
c. Input/output devices
d. All have same speed
(Ans:a)
4. The speed imbalance between the main memory and central processor is avoided by
using
a. Cache memory
b. Flash memory
c. Secondary memory
d. All of the above
(Ans:a)
5. Which of the following is not an input/output device?

a. Printer
b. Readers
c. Displays
d. Magnetic tapes
(Ans:d)
6. Which of the following has low speed storage?

a. CD-ROM
b. Extended storage
c. Magnetic disks
d. Magnetic tapes
(Ans:d)
1
7. Who is known as ‘Father of computers’?
a. Vannevar Bush
b. Charles Babbage
c. Howard Aiken
d. John Atansoff
(Ans:b)
8. Which of the following is an output device?

a. Mouse
b. Joystick
c. Plotter
d. Optical mark reader
(Ans:c)
9. Which of the following is an input device?

a. Joystick
b. Printer
c. Plotter
d. Visual display unit
(Ans:a)
10. Which is the main part of Central Processing Unit (CPU)?

a. Arithmetic and logic unit
b. Control Unit
c. Memory unit
d. Input/Output unit
(Ans:b)
11. The addition, subtraction, multiplication and division are performed at

a. Arithmetic and logic unit
b. Control Unit
c. Memory unit
d. Input/Output unit
(Ans:a
12. A sequence of instructions given to a computer to perform a particular task is called

a. ROM
b. RAM
c. Program
d. Operating system
(Ans:c)
13. The programs stored in ROMS, PROMS and EPROMS are called
a. Operating system
2
b. System software
c. Firmware
d. Software
(Ans:c)
14. Esc key is used to

a. To delete the character
b. To move the cursor to the end of the line
c. To insert characters
d. To cancel the command
(Ans:d)
15. One byte consists of ___ bits.

a. 4
b. 8
c. 12
d. 16
(Ans:b)
16. Which of the following is true about RAM (Random access memory)?
a. It is used as read/write memory
b. It is non-volatile memory
c. It is possible to retrieve information randomly
d. It retains information as long as power supply is on
(Ans:b)
17. SDRAM stands for?

a. Synchronous dynamic random access memory
b. Standard dynamic random access memory
c. Synchronous digital random access memory
d. Synchronous dynamic random approach memory
(Ans:a)
18. Which is known as quasi static RAM?

a. SDRAM
b. SGRAM
c. iRAM
d. All of the above
(Ans:c)
19. In EPROM, E stands for

a. Electronic
b. Erasable
c. Electromagnetic
d. Executable
(Ans:b)
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20. Hard disk is used as
a. Primary memory
b. Cache memory
c. Secondary memory
d. All of the above
(Ans:c)
21. Which of the following is/are optical disk(s)?

i. CD-ROM
ii. DVD-ROM
iii. Hard disk
a. i & ii
b. ii & iii
c. I & iii
d. All of these
(Ans:a)
Computer Architecture
Set - 1
Question 1:
Where does a computer add and compare data?
a. Hard disk
b. Floppy disk
c. CPU chip
d. Memory chip
Collection on http://www.cs-mcqs.blogspot.com
Question 2:
Which of the following registers is used to keep track of address of the memory location where
the next instruction is located?
a. Memory Address Register
b. Memory Data Register
c. Instruction Register
4
d. Program Register
Question 3:
A complete microcomputer system consists of
a. microprocessor
b. memory
c. peripheral equipment
d. all of above
Question 4:
CPU does not perform the operation
a. data transfer
b. logic operation
c. arithmetic operation
d. all of above
Question 5:
Pipelining strategy is called implement
a. instruction execution
b. instruction prefetch
c. instruction decoding
d. instruction manipulation
Question 6:
5
A stack is
a. an 8-bit register in the microprocessor
b. a 16-bit register in the microprocessor
c. a set of memory locations in R/WM reserved for storing information temporarily during the
execution of computer
d. a 16-bit memory address stored in the program counter
Question 7:
A stack pointer is
a. a 16-bit register in the microprocessor that indicate the beginning of the stack memory.
b. a register that decodes and executes 16-bit arithmetic expression.
c. The first memory location where a subroutine address is stored.
d. a register in which flag bits are stored
Question 8:
The branch logic that provides decision making capabilities in the control unit is known as
a. controlled transfer
b. conditional transfer
c. unconditional transfer
d. none of above
Question 9:
Interrupts which are initiated by an instruction are
a. internal
b. external
6
c. hardware
d. software
Question 10:
A time sharing system imply
a. more than one processor in the system
b. more than one program in memory
c. more than one memory in the system
d. None of above
Answers:
1. c
2. d
3. d
4. d
5. b
6. c
7. a
8. c
9. d
10. b
SET-2
Question 1:
Processors of all computers, whether micro, mini or mainframe must have
7
a. ALU
b. Primary Storage
c. Control unit
d. All of above
Question 2:
What is the control unit's function in the CPU?
a. To transfer data to primary storage
b. to store program instruction
c. to perform logic operations
d. to decode program instruction
Question 3:
What is meant by a dedicated computer?
a. which is used by one person only
b. which is assigned to one and only one task
c. which does one kind of software
d. which is meant for application software only
Question 4:
The most common addressing techiniques employed by a CPU is
a. immediate
b. direct
c. indirect
d. register
e. all of the above
Question 5:
8
Pipeline implement
a. fetch instruction
b. decode instruction
c. fetch operand
d. calculate operand
e. execute instruction
f. all of abve
Question 6:
Which of the following code is used in present day computing was developed by IBM
corporation?
a. ASCII
b. Hollerith Code
c. Baudot code
d. EBCDIC code
Question 7:
When a subroutine is called, the address of the instruction following the CALL instructions
stored in/on the
a. stack pointer
b. accumulator
c. program counter
d. stack
Question 8:
A microprogram written as string of 0's and 1's is a
a. symbolic microinstruction
b. binary microinstruction
c. symbolic microprogram
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d. binary microprogram
Question 9:
Interrupts which are initiated by an instruction are
a. internal
b. external
c. hardware
d. software
Question 10:
Memory access in RISC architecture is limited to instructions
a. CALL and RET
b. PUSH and POP
c. STA and LDA
d. MOV and JMP
Answers:
1. d 2. d 3. b 4. e 5. f 6. d 7. d 8. d 9. b 10. c
SET-3
Computer Architecture and Organization Set - 3
Question 1:
A collection of 8 bits is called
a. byte
b. word
c. record
Question 2:
The ascending order or a data Hierarchy is
a. bit - bytes - fields - record - file - database
b. bit - bytes - record - field - file - database
c. bytes - bit- field - record - file - database
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d. bytes -bit - record - field - file - database
Question 3:
How many address lines are needed to address each memory locations in a 2048 x 4 memory
chip?
a. 10
b. 11
c. 8
d. 12
Question 4:
A computer program that converts an entire program into machine language at one time is called
a/an
a. interpreter
b. simulator
c. compiler
d. commander
Question 5:
In immediate addressing the operand is placed
a. in the CPU register
b. after OP code in the instruction
c. in memory
d. in stack
Question 6:
Microprocessor 8085 can address location upto
a. 32K
b. 128K
c. 64K
d. 1M
Question 7:
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The ALU and control unit of most of the microcomputers are combined and manufacture on a
single silicon chip. What is it called?
a. monochip
b. microprocessor
c. ALU
d. control unit
Question 8:
When the RET instruction at the end of subroutine is executed,
a. the information where the stack is iniatialized is transferred to the stack pointer
b. the memory address of the RET instruction is transferred to the program counter
c. two data bytes stored in the top two locations of the stack are transferred to the program
counter
d. two data bytes stored in the top two locations of the stack are transferred to the stack pointer
Question 9:
A microporgram is sequencer perform the operation
a. read
b. write
c. execute
d. read and write
e. read and execute
Question 10:
Interrupts which are initiated by an I/O drive are
a. internal
b. external
c. software
d. all of above
Answers:
1. a 2. a 3. b 4. c 5.b 6.c 7.b 8.c 9.e 10.b
Usually ,in MSDOS ,the primary hard disk drives has the drive letter_______
12
A
B
C
D
_____________________________________________________________________________________
P : “Program is a step by step execution of the instructions”. Given P, which of the following is true ?
Program is a subset of an instruction set.

Program is a sequence of a subset of an instruction set.
Program is a partially ordered set of an instruction set.
All of the above
_____________________________________________________________________________________
The most relevant addressing mode to write position independent code
Direct mode
Indirect mode
Relative mode
Indexed mode
_____________________________________________________________________________________
An interface that provides a method for transferring binary information between internal storage and external devices is called
I/O interface
Input interface
Output interface
I/O bus
_____________________________________________________________________________________
An interface that provides I/O transfer of data directly to and form the memory unit and peripheral is termed as
DDA
Serial interface
BR
DMA
_____________________________________________________________________________________
In magnetic disk data organized on the plotter in a concentric sets or rings called
Sector
Track
Head
Block
_____________________________________________________________________________________
In which addressing mode the operand is given explicitly in the instruction
Absolute
Immediate
Indirect
Direct
_____________________________________________________________________________________
The instruction: MOV CL, [BX] [DI] + 8 represents the _____ addressing mode.
Based Relative
Based Indexed
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Indexed Relative
Register Indexed
_____________________________________________________________________________________
A basic instruction that can be interpreted by computer generally has
An operand and an address

A decoder and an accumulator
Sequence register and decoder
An address and decoder
_____________________________________________________________________________________
The two types of main memory are
Primary and secondary

Random and sequential
ROM and RAM
Central and peripheral
_____________________________________________________________________________________
A hardware unit which is used to monitor computer processing is
Console
Dot matrix printer
Mouse
ROM
_____________________________________________________________________________________
On receiving an interrupt from an I/O device, the CPU
halts for predetermined time

branches off to the interrupt service routine after completion of the current
instruction
branches off to the interrupt service routine immediately
hands over control of address bus and data bus to the interrupting device
_____________________________________________________________________________________
ADC
Add to Accumulator using carry Flag

Add to Accumulator
Add Immediate data to Accumulator
Add Immediate data to Accumulator Using carry
_____________________________________________________________________________________
The concept of pipelining is most effective in improving performance if the tasks being performed in different stages
Require different amount of time

Require about the same amount of time
Require different amount of time with time difference between any two tasks
being same
Require different amount with time difference between any two tasks being
different
_____________________________________________________________________________________
Performance of a pipelined processor suffers if
The pipeline stages have different delays
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Consecutive instructions are dependent on each other
The pipeline stages share hardware resources
All of these
_____________________________________________________________________________________
In a k-way set associative cache, the cache is divided into v sets, each of which consists of k lines. The lines of a set are placed in sequence
one after another. The lines in set s are sequenced before the lines in set (s+1). The main memory blocks are numbered 0 onward. The main
memory block numbered j must be mapped to any one of the cache lines from
( j mod v)*k to ( j mod v)*k + (k -1)

( j mod v) to ( j mod v) + (k -1)
( j mod k) to ( j mod k) + (v -1)
( j mod k)* v to ( j mod k)* v + (v -1)
_____________________________________________________________________________________
For a memory system ,the cycle time is
Same as the access time

Longer than the access time
Shorter than the access time
Submultiple of the access time
_____________________________________________________________________________________
Secondary storage device which uses a delivery grooveless surface and is encoded by the laser beam in the form of microscopic pits is called
Laser disk
Compact disk
Photo disk
Video disk
_____________________________________________________________________________________
The addressing mode used in the instruction PUSH B is
Direct
Register
Register indirect
Immediate
_____________________________________________________________________________________
The idea of cache memory is based on
The property of locality of reference

The heuristic 90-10 rule
The fact that only a small portion of a program is referenced relatively frequently
All of these
_____________________________________________________________________________________
Where does a computer add and compare data ?
Hard disk
Floppy disk
CPU chip
Memory chip
_____________________________________________________________________________________
The speed up of a pipeline processing over an equivalent non-pipeline processing is defined by the ratio :
15
A
B
C
D
_____________________________________________________________________________________
The register used as a working area in CPU is
Program counter
Instruction register
Instruction decoder
Accumulator
_____________________________________________________________________________________
The ALU of a microprocessor performs operations on 8 bit two complement operands. What happens when the operation 7A16-A216 is
performed?
Result = D8 16 , overflow and negative flags set

Result = D8 16 , negative flags set
Result = D8 16 ,no flags set
Result = D8 16 , overflow flags set
_____________________________________________________________________________________
An interrupt can be temporarily ignored by the counter is called
Vector interrupt
Non maskable interrupt
Maskable interrupt
Low priority interrupt
_____________________________________________________________________________________
A CPU generally handles an interrupt by executing an interrupt service routine
as soon as an interrupt is raised

by checking the interrupt register at the end of fetch cycle
by checking the interrupt register after finishing the executing the current
instruction
by checking the interrupt register at fixed time intervals
_____________________________________________________________________________________
A single instruction to clear lower 4 bits of the accumulator in 8085 assembly language is
XRI OF H
A NI OH
X RI FOH
ANI OF H
_____________________________________________________________________________________
Which out of the following is not an alternative name for primary memory?
Main memory
Primary memory
Internal storage
Mass storage
_____________________________________________________________________________________
Which of the following is a sequential access device
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Hard disk
Optical disk
Tape
Flash memory
_____________________________________________________________________________________
The ALU of a computer normally contains a number of high speed storage elements called
Semi conductor
Register
Hard disk
Magnetic disk
_____________________________________________________________________________________
The control unit of computer
Performs ALU operations on the data

Controls the operation of the output devices
Is a device for manually operating the computer
Direct the other unit of computers
_____________________________________________________________________________________
WORM stands for
Write Once Read Memory

Wanted Once Read Memory
Wanted Original Read Memory
Write Original Read Memory
_____________________________________________________________________________________
The hardware in which data may be stored for a computer system is called
Register
Memory
Chip
Peripheral
_____________________________________________________________________________________
The Pentium processor was introduced
1991
1992
1993
1994
_____________________________________________________________________________________
The circumferences of the two concentric disks are divided into 100 sections each. For the outer disk, 100 of the sections are painted red
and 100 of the sections are painted blue. For the inner disk, the sections are painted red and blue in an arbitrary manner. It is possible to
align the two disks so that of the sections on the inner disks have their colours matched with the corresponding section on outer disk.
100 or more
125 or more
150 or more
175 or more
_____________________________________________________________________________________
Interrupts which are initiated by an I/O drive are
Internal
17
External
Software
All of above
_____________________________________________________________________________________
Arithmetic shift left operation
Produces the same result as obtained with logical shift left operation
Causes the sign bit to remain always unchanged
Needs additional hardware to preserve the sign bit
Is not applicable for signed 2s complement representation
_____________________________________________________________________________________
Fetch_And_Add(X,i) is an atomic Read-Modify-Write instruction that reads the value of
memory location X, increments it by the value i, and returns the old value of X. It is used in the
pseudocode shown below to implement a busy-wait lock. L is an unsigned integer shared variable
initialized to 0. The value of 0 corresponds to lock being available, while any non-zero value corresponds to the lock being not available.
AcquireLock(L){
while (Fetch_And_Add(L,1))
L = 1;
}
ReleaseLock(L){
L = 0;
}
This implementation
fails as L can overflow

fails as L can take on a non-zero value when the lock is actually available
works correctly but may starve some processes
works correctly without starvation
_____________________________________________________________________________________
A control character is sent at the beginning as well as at the end of each block in the synchronous-transmission in order to
Synchronize the clock of transmitter and receiver

Supply information needed to separate the incoming bits into individual character
Detect the error in transmission and received system.
Both (A) and (C).
_____________________________________________________________________________________
The process of entering data into a storage location
Causes variation in its address number

Adds to the contents of the location
Is called a readout operation
Is destructive of previous contents
_____________________________________________________________________________________
Of the following, which best characterizes computers that use memory-mapped I/O?
The computer provides special instructions for manipulating I/O ports.

I/O ports are placed at addresses on the bus and are accessed just like other
memory locations.
To perform an I/O operation, it is sufficient to place the data in an address register
and call the channel to perform the operation.
Ports are referenced only by memory-mapped instructions of the computer and are
located at hardwired memory locations.
_____________________________________________________________________________________
The desirable characteristic of a memory system is
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Speed and reliability
Low power consumption
Durability and compactness
All of these
_____________________________________________________________________________________
In a k-way set associative cache, the cache is divided into v sets, each of which consists of k lines. The lines of a set are placed in sequence
one after another. The lines in set s are sequenced before the lines in set (s+1). The main memory blocks are numbered 0 onwards. The
main memory block numbered j must be mapped to any one of the cache lines from
( j mod v ) * k to ( j mod v ) * k + (k - 1)
( j mod v ) to ( j mod v ) + (k - 1)
( j mod k ) to ( j mod k ) + (v - 1)
( j mod k ) * v to ( j mod k ) * v + (v - 1)
_____________________________________________________________________________________
Intel 80486 was introduced in
1985
1986
1987
1989
_____________________________________________________________________________________
Which of the following are typical characteristics of a RISC machine?
Highly pipielined
Multiple register sets
Both a and b
None of these
_____________________________________________________________________________________
The amount of ROM needed to implement a 4 bit multiplier is
64 bits
128 bits
1 Kbits
2 Kbits
_____________________________________________________________________________________
On a non-pipelined sequential processor, a program segment, which is a part of the interrupt service routine, is given to transfer 500 bytes
from an I/O device to memory.
Initialize the address register
Initialize the count to 500
LOOP: Load a byte from device
Store in memory at address given by address register
Increment the address register
Decrement the count
If count != 0 go to LOOP
Assume that each statement in this program is equivalent to a machine instruction which takes one clock cycle to execute if it is a non-
load/store instruction. The load-store instructions take two clock cycles to execute. The designer of the system also has an alternate
approach of using the DMA controller to implement the same transfer. The DMA controller requires 20 clock
cycles for initialization and other overheads. Each DMA transfer cycle takes two clock cycles to transfer one byte of data from the device to
the memory. What is the approximate speedup when the DMA controller based design is used in place of the interrupt driven program
based input-output?
3.4
4.3
5.1
6.3
19
_____________________________________________________________________________________
A charge coupled device has
Low cost per bit

High cost per bit
Low density
None of these
_____________________________________________________________________________________
WHAT IS A REGISTER?
MEMORY
ARRAY
COUNTER
NONE
_____________________________________________________________________________________
The bus which is used to transfer data from main memory to peripheral device is
Data bus
Input bus
DMA bus
Output bus
Computer Arithematics Solved MCQs

1) The advantage of single bus over a multi bus is ?
1. low cost
2. flexibility in attaching peripheral devices
3. high operating speed
4. A and B
Collection From: www.cs-mcqs.blogspot.com
Answer = D
Explanation: However single bus costs low and it is easy to attach peripheral devices in single
bus but multibus architecture have a great advantage in speed and of course, will affect
performance also
2) In serial communication, an extra clock is needed ?
1. to synchronize the devices
2. for programmed baud rate control
3. to make efficient use of RS-232
4. None of above
Answer = B
Explanation: No Explanation
3) In which of the following instruction bus idle situation occurs ?
1. EI
2. DAD rp
3. INX H
4. DAA
20
Answer = B
4) The addressing used in an instruction of the form ADD X Y is?
1. absolute
2. immediate
3. indirect
4. index
Answer = A
Explanation: The effective address for an absolute instruction address is the address parameter
itself with no modifications.
5) The speed imbalance between memory access and CPU operation can be reduced by ?
1. cache memory
2. memory interleaving
3. reducing the size of memory
4. A and B
Answer = D
6) Which of the following does not need extra hardware for DRAM refreshing ?
1. 8085
2. Motorola - 6800
3. Z - 80
4. None of these
Answer = C
7) The first operating system used in micro processor is ?
1. Zenix
2. DOS
3. CPIM
4. Multics
Answer = C
8) Instead of counting with binary number a ring counter uses words that have a single
high..... ?
1. bytes
2. gate
3. bit
4. chip
Answer = C
9) The memory cell of a dynamic RAM is simpler and smaller that the memory cell of a ......
RAM ?
21
1. volatile
2. semiconductor
3. static
4. bipolar
5. None of above
Answer =C
10) A multiplexer with a 4 bit data select input is a ?
1. 4 : 1 multiplexer
Answer = D
SET-2
1) Half adder is an example of ?
1. Combinational Circuits
2. Sequential Circuits
3. Asynchronous Circuits
4. None of these
Answer = A
Explanation: Combinational circuits are the circuits whose output depends on the inputs of
the same instant of time.
2) In JK flip flop same input, i.e at a particular time or during a clock pulse, the output will
oscillate back and forth between 0 and 1. At the end of the clock pulse the value of output
Q is uncertain. The situation is referred to as ?
1. Conversion condition
2. Race around condition
3. Lock out state
4. None of these
Answer = B
Explanation:A race around condition is a flaw in an electronic system or process whereby
the output and result of the process is unexpectedly dependent on the sequence or timing of
other events.
3) In a JK flip flop, if j=k, the resulting flip flop is referred to as ?
1. D flip flop
2. T flip flop
3. S-R flip flop
4. None of these
22
Answer = C
Explanation: In JK flip flop if both the inputs are same then the flip flop behaves like SR
flip flop.
4) Master slave flip flop is also referred to as ?

1. Level triggered flip flop
2. Pulse triggered flip flop
3. Edge triggered flip flop
4. None of these
Answer = B
Explanation:The term pulse triggered means the data is entered on the rising edge of the
clock pulse, but the output does not reflect the change until the falling edge of clock pulse.
5) Fetch and decode cycle is required in ?
1. Direct addressing
2. Immediate addressing
3. Indirect addressing
4. None of above
Answer = B
Explanation:Fetch and decode cycle is required in Immediate addressing because it stores
the operand directly on which the operation is performed.
6) Valid bit in each cache is associated with ?
1. Each memory byte in cache
2. Each memory word in cache
3. One bit with the all memory words
4. None of above
Answer = A
Explanation:No explanation
7) In J-K flip flop the function K=J is used to realize ?
1. D flip flop
2. S-R flip flop
3. T flip flop
4. Master slave flip flop
Answer = D
Explanation: T flip flop allows the same inputs. So if in JK flip flop J = K then it will work
as T flip flop.
8) An encoder has 2n input lines and ..... output lines ?

1. 2
2. n
3. 2*n
23
4. n*n
Answer = B
Explanation:No Explanation.
9) ASCII code for alphabet character requires ..... bits ?
1. 16
2. 15
3. 8
4. 7
Answer = D
Explanation:No explanation
10) The basic limitation of FSM is that ?
1. An FSM can remember arbitrary large amount of information
2. An FSM sometimes recognize grammars that are not regular
3. It sometimes fails to recognize grammar that are regular
4. All of the above comments are true
Answer = A
Explanation: FSM stands for Finite State Machine.
SET-3
1) What is the hexadecimal equivalent of a binary number 10101111 ?

1. AF
2. 9E
3. 8C
4. All of above
5. None of above
Answer = A
Explanation:No Explanation
2) A NOR gate recognizes only the input word whose bits are ?
1. 0's and 1's
2. 1's
3. 0's
4. 0's or 1's
5. None of above
Answer = C
3) The operation which is commutative but not associative is ?
1. AND
2. OR
24
3. EX-OR
4. NAND
Answer = D
4) All digital circuits can be realized using only ?
1. EX-OR gates
2. Half adders
3. Multiplexers
4. OR gates
Answer = B
5) The XOR gates are ideal for testing parity because even parity words produces a ......
output and odd parity word produces a ....... output ?
1. low, high
2. high, low
3. odd, even
4. even, odd
5. None of above
Answer = A
6) Flip flop output is always ?

1. Complementary
2. Independent of each other
3. the same
4. same as inputs
5. None of above
Answer = A
7) A half adder adds ..... bits ?
1. 16
2. 10
3. 8
4. 2
5. None of above
Answer = D
8) How many flip - flop circuits are needed to divide by 16 ?
1. Two
2. Four
3. Eight
25
4. Sixteen
Answer = C
9) A flip flop is a ..... elements that stores a 216 binary digits as a low or high voltage ?
1. chip
2. bus
3. I/O
4. memory
5. None of above
Answer = D
10) A positive AND gate is also a negative ?
1. NAND gate
2. AND gate
3. NOR gate
4. OR gate
5. None of these
Answer = D
SET-4
1) Which of the following is a minimum error code ?
1. Octal code
2. Binary code
3. Gray code
4. Excess-3 code
Answer = C
2) In a positive edge triggered JK flip flop, a low J and low K produces ?
1. High state
2. Low state
3. toggle state
4. no change
Answer = D
Explanation: In JK Flip Flop if J = K = 0 then it holds its current state. There will be no
change.
3) Negative numbers can't be represented in ?
1. signed magnitude form
2. 1's complement form
3. 2's complement form
26
4. None of above
Answer = D
4) Which of the following architecture is not suitable for realising SIMD ?
1. Vector processor
2. Array processor
3. Von Neumann
4. All of above
Answer = C
5) The XOR operator + is ?
1. commutative
2. associative
3. distributive over AND operator
4. A and B
Answer = D
Explanation: As A + B = B + A and A + ( B + C) = (A + B ) + C
Hence it is commutative and associative.
6) The binary equivalent of the Gray code 11100 is..... ?
1. 10111
2. 00111
3. 01011
4. 10101
Answer = A
Explanation: The rule for changing the Gray code to binary is that first bit remains the
same and the next bit is obtained by adding the first LSB of binary to the second LSB of
Gray code and so on... So the answer of the question is 10111.
7) An assembler that runs on one machine but produces machine code for another machine
is called ?
1. simulator
2. emulator
3. cross assembler
4. boot strap loader
Answer = C
Explanation: Cross assembler is an assembler which runs on one type of processor and
produces machine code for another.
8) Which of the following unit can be used to measure the speed of a computer ?
1. SYPS
2. MIPS
3. BAUD
27
4. FLOPS
5. B and D
Answer = E
Explanation: MIPS measures the execution speed of computers CPU but not the whole
system. FLOPS is a measure of computer's performance especially in the field of scientific
calculations that makes heavy use of floating point calculations.
9) Which of the following logic families is well suited for high speed operations?
1. TTL
2. ECL
3. MOS
4. CMOS
Answer = B
Explanation: ECL is used for high speed applications because of its price and power
demands.
10) Which of the following comments about half adder are true?
1. It adds 2 bits
2. It is called so because a full adder involves two half adders
3. It does half the work of full adder
4. It needs two inputs and generates two outputs
5. A, B and D
Answer = E
SET-5
1) The term sum - of - product in Boolean algebra means ?

1. The AND function of several OR functions
2. The OR function of several AND functions
3. The OR function of several OR function
4. The AND function of several AND functions
Answer = B
Explanation: Sum-Of-Products expressions lend themselves well to implementation as a set of
AND gates (products) feeding into a single OR gate (sum).
2) The fan out capability of a digital building block can be defined as ?
1. The number of inputs that one output can transmit to
2. The amount of cooling required for fanning the hear out
3. The number of inputs that can transmit to one input
4. The maximum power dissipation that the unit can stand
5. None of above
28
Answer = A
Explanation: N/A
3) The ALE line of an 8085 microprocessor is used to ?

1. Execute an RST by hardware
2. Executes the instruction supplied by external device through the INTA signal
3. Executes an instruction from memory location 20 H
4. Executes a NOP
Answer = A
Explanation: ALE is address latch enable. the lower order address remains only for a
single T satate then ths data is latched and the lower order address bus stores the data.
4) The cost for storing a bit is minimum in ?
1. Cache
2. Register
3. RAM
4. Magnetic tape
Answer = D
Explanation: N/A
5) The index register in a digital computer is used for ?

1. Pointing to the stack address
2. Indirect addressing
3. Keeping track of number of times a loop is executed
4. Address modification
Answer = D
Explanation: An index register in a computer's CPU is a processor register used for
modifying operand addresses during the run of a program, typically for doing vector/array
operations.
6) After reset the CPU begins execution from the memory location ?
1. 0000H
2. 0001H
3. FFEFH
4. 8000H
Answer = A
Explanation: N/A
7) A single register to clear the lower four bits of the accumulator in 8085 assembly
language is ?
1. XRI 0FH
2. ANI FOH
3. XRI FOH
29
4. ANI OFH
Answer = B
Explanation: ANI FOH ANDs the accumulator with immediate. F leaves the high nibble
whatever it is, 0 clears the lower nibble
8) If the total number of states in the fetching and execution phases of an 8085 instruction
is known to be 7; the number of machine cycles is ?
1. 0
2. 1
3. 2
4. 3
Answer = C
Explanation: N/A
9) Von Neumann architecture is ?

1. SISD
2. SIMD
3. MIMD
4. MISD
Answer = A
Explanation: In computing, SISD (single instruction, single data) is a term referring to a
computer architecture in which a single processor, a uniprocessor, executes a single
instruction stream, to operate on data stored in a single memory. This corresponds to the
von Neumann architecture.
10) A typical application of MIMD is?

1. railway reservation
2. weather forecasting
3. matrix multiplication
4. All of above
Answer = A
Explanation: MIMD (multiple instruction, multiple data) is a technique employed to
achieve parallelism.
SET-6
1) The .... is ultraviolet light erasable and electricity programmable.This allows the user to
create and store until programs and data are perfected. ?
1. EPROM
2. PROM
3. ROM
30
4. RAM
Answer = A
Explanation: N/A
2) What table shows the electrical status of digital circuits output for every possible
combination of electrical states in the inputs ?
1. Function Table
2. Truth Table
3. Routing Table
4. ASCII Table
Answer = A
3) The gray code for decimal 7 is ?
1. 0111
2. 1011
3. 0100
4. 0101
Answer = C
Explanation: First convert decimal seven to binary that is 0111 then convert it into gray code.
4) Which of the following electronic component are not found in ordinary ICs?
1. Diodes
2. Transistors
3. Resistors
4. Inductors
Answer = D
Explanation: Inductor is a passive two terminal electronic component that stores energy in its
magnetic field
5) Choose the correct statements ?
1. Bus is a group of information carrying wires
2. Bus is needed to achieve reasonable speed of operation
3. Bus can carry data or address
4. A bus can be shared by more that one device
5. All of above
Answer = E
Explanation: A bus have all the four features.
6) If the memory access takes 20 ns with cache and 110 ns without it,then the hit ratio
(cache uses 10 as memory) is ?
1. 93 %
2. 90 %
3. 87 %
4. 88 %
31
Answer = B
Explanation: If we find what we want in the cache then it is called Hit otherwise it is miss.
7) Any instruction should have at least ?
1. 2 operands
2. 1 operand
3. 3 operands
4. None of above
Answer = D
Explanation: An instruction can be without operand also.
8) The number of clock cycles necessary to complete 1 fetch cycle in 8085 is ?
1. 3 or 4
2. 4 or 5
3. 4 or 6
4. 3 or 5
Answer = C
9) Motorola's 68040 is comparable to ?
1. 8085
2. 80286
3. 80386
4. 80486
Answer = D
Explanation: Motorola 68040 is a microprocessor released in 1970. It is called as oh - four - oh
or oh forty
10) The addressing mode used in the instruction PUSH B ?
1. Direct
2. Register
3. Register Indirect
4. Immediate
Answer = C
Explanation:In register indirect addressing mode the operand is found from the memory whose
address is fetched from the register in the instruction code.
SET-7
1) On receiving an interrupt from an I/O device, the CPU ?

1. halts for a predetermined time
2. hands over control of address bus and data bus to the interrupting device.
3. branches off to the interrupt service routine immediately
4. branches off to the interrupt service routine after the completion of the current
instruction.
32
Answer = D
2) To get boolean expression in the product of sum form from a given Karnaugh map ?
1. don't care condition should not be present
2. don't care conditions if present should be takes as zeros
3. one should cover all the 0's present and complement the resulting expression.
4. one should cover all the 1'a present and complement the resulting expression.
Answer = C
3) The reduced form of the boolean expression (A + B)(A + C) is ?
1. AB + AC
2. AC + B
3. A+B+C
4. A + BC
Answer = D
4) Name the cache also known as internal cache ?
1. L1 cache
2. L2 cache
3. L3 cache
4. L4 cache
Answer = A
Explanation:L1 cache is also known as internal cache and it resides in the CPU. L2 is known as
secondary cache and it is within the motherboard.
5) Which of the following is not a CPU register ?
1. Memory control register
2. Memory data register
3. Memory buffer register
4. Instruction register
Answer = A
Explanation: There is no MCR in the CPU
6) The main task of memory address register is?
1. stores the address of next location in the main memory
2. stores the address of next location in cache memory
3. stores the address of next location in secondary memory
4. stores the address of output device to which the data is sent
Answer = A
7) Which register indicates whether the data register holds the data to be transferred or
not ?
1. MAR
2. MBR
3. MDR
33
4. Status register
Answer = D
8) Which of the following operation represents the machine cycle?
1. Fetch - Execute - Decode - Store
2. Execute - Decode - Store - Fetch
3. Decode - Fetch - Store - Execute
4. Fetch - Decode -Execute - Store
Answer = D
Explanation: In Fetch phase the instruction is brought into the computer, in Decode phase the
instruction in divided into different parts, in Execute phase the decoded instruction is executed
by the CPU and finally the result sent to the output device or main memory.
9) The decoding phase of instruction cycle is also known as ?
1. Translating
2. Interpreting
3. Analyzing
4. Breaking
Answer =B
Explanation:Decoding phase is also known as interpreting as the instruction in interpreted to
determine two key attribute of the instruction , the opcode and the operand.
10) Cache memory is used to transfer data between ?
1. Main memory and secondary memory
2. Processor and main memory
3. Processor and secondary memory
4. Processor and output device
Answer = B
Explanation:Cache is always placed between the main memory and processor in the computer
system.
SET-8
1) Which memory stores the data permanently ?

1. Primary memory
2. Secondary memory
3. Cache memory
4. Registers
Answer = B
Explanation: Secondary memory stores the data permanently until we remove it.
2) Which of the following is the cheapest type of memory ?
34
1. Secondary memory
2. Primary memory
3. Cache memory
4. ROM
Answer = A
Explanation: Secondary memory is the cheapest form because it can not process the data
through the CPU directly. The data must be brought into the primary memory form execution.
Therefore secondary memory is the form of slowest memory.
3) Which of the following is auxiliary memory of the computer system ?
1. ROM
2. SRAM
3. Cache memory
4. Magnetic tape
Answer = A
Explanation:ROM is the secondary memory which stores the data permanently also known as
auxiliary memory.
4) What does IBG stands for ?
1. Intra byte gaps
2. Inter block gaps
3. Inter bit gaps
4. Intra block gaps
Answer = B
Explanation:Inter block gaps is the space between the two consecutive physical blocks of
memory.
5) On what type of ROM data can be written only once ?
1. PROM
2. EPROM
3. EEPROM
4. EROM
Answer = A
Explanation:In Programmable Read Only Memory once the data is written it remains there
forever.
6) In optical storage system which medium is used for reading and recording data ?
1. Laser light
2. Black light
3. High energy visible light
4. Ultraviolet light
Answer = A
Explanation: Optical storage system use the laser light to retrieve as well as to record the data.
7) Which is known as solid state memory ?
1. Parallel serial bus
35
2. Universal parallel bus
3. Universal serial bus
4. Universal computer bus
Answer = C
8) In MO system which of the following temperature is used as a recording medium ?
1. Room temperature
2. Curie temperature
3. Neel temperature
4. Boiling point temperature
Answer = B
Explanation:Curie temperature is used for recording data in Magneto Optical system. Curie
temperature is the temperature at which the material loses its magnetic properties and above this
temperature the material becomes paramagnetic.
9) The amount of space available in the computer system for holding the data is called?
1. Storage space
2. Storage area
3. Storage capacity
4. Storage address
Answer = A
10) Which of the following is not a type of magnetic storage system ?
1. Magnetic tape
2. Floppy disk
3. Compact disk
4. Hard disk
Answer = C
Explanation: Compact disk is the optical storage system not the magnetic storage system.
SET-9
1) Computer use thousands of flip flops. To coordinate the overall action, a common signal
called the ..... is sent to each flip - flop.?
1. latch
2. master
3. clock
4. slave
5. None of above
36
Answer = C
Explanation: To coordinate the overall action, a square wave signal called the clock is sent to
each flip flop. This signal prevents the flip flop from changing states until the right time.
2) Which of the following flip flop is free from race around condition ?
1. SR flip flop
2. T flip flop
3. Master slave flip flop
4. All of above
Answer = C
Explanation: Toggling more that once during a clock cycle is called racing. JK master slave
flip flop avoids racing.
3) Which logic family dissipates the minimum power ?
1. DTL
2. ECL
3. TTL
4. CMOS
5. None of above
Answer = D
Explanation: CMOS dissipates low power. Typically the static power dissipation is 10 nw per
gate which is due to the flow of leakage currents.
4) The functional capacity of SSI devices is ?
1. 1 to 11 gates
2. 12 to 99 gates
3. 100 to 10,000 gates
4. More than 10,000 gates
5. None of above
Answer = A
5) What advantage do ICs have over discrete devices due to their greater complexity ?
1. Smaller size
2. Higher Reliability
3. Lower cost
4. All of above
Answer =D
Explanation: ICs can also combine analog and digital circuits on a single chip to create
functions such as A/D converters and D/A converters. Such circuits offer smaller size and lower
cost, but must carefully account for signal interference.
6) A subtractor is usually not present in computer because ?
1. It is expensive
2. It is not possible to design it
3. The adder will take care of subtraction
4. None of above
37
Answer = C
Explanation: A subtractor can be designed using the same approach as that of an adder.
7) A chip having 150 gates will be classified as ?
1. SSI
2. MSI
3. LSI
4. VLSI
Answer = C
Explanation: Latent semantic indexing (LSI) is an indexing and retrieval method that uses a
mathematical technique called Singular value decomposition (SVD) to identify patterns in the
relationships between the terms and concepts contained in an unstructured collection of text.
8) Pseudo instructions are ?
1. assembler directive
2. instruction in any program that have no corresponding machine code instruction
3. instruction in any program whose presence or absence will not change the output for any
input
4. None of above
Answer = A
Explanation: Pseudo instructions are simply the assembly instructions that do not have a direct
machine language equivalent.
9) Programming in a language that actually controls the path of signals or data within the
computer is called ?
1. micro programming
2. system programming
3. assembly programming
4. machine language programming
Answer = A
10) Which of the following is not typically found in the status register of micro processor ?
1. overflow
2. zero result
3. negative result
4. none of above
Answer = D
Explanation: A status register or flag register is a collection of flag bits for a processor. The
status register is a hardware register which contains information about the state of the processor
SET-10
1) The advantage of single bus over a multi bus is ?

38
1. low cost
2. flexibility in attaching peripheral devices
3. high operating speed
4. A and B
Answer = D
Explanation: However single bus costs low and it is easy to attach peripheral devices in single
bus but multibus architecture have a great advantage in speed and of course, will affect
performance also
2) In serial communication, an extra clock is needed ?
1. to synchronize the devices
2. for programmed baud rate control
3. to make efficient use of RS-232
4. None of above
Answer = B
3) In which of the following instruction bus idle situation occurs ?
1. EI
2. DAD rp
3. INX H
4. DAA
Answer = B
4) The addressing used in an instruction of the form ADD X Y is?
1. absolute
2. immediate
3. indirect
4. index
Answer = A
Explanation: The effective address for an absolute instruction address is the address parameter
itself with no modifications.
5) The speed imbalance between memory access and CPU operation can be reduced by ?
1. cache memory
2. memory interleaving
3. reducing the size of memory
4. A and B
Answer = D
6) Which of the following does not need extra hardware for DRAM refreshing ?
1. 8085
2. Motorola - 6800
3. Z - 80
39
4. None of these
Answer = C
7) The first operating system used in micro processor is ?
1. Zenix
2. DOS
3. CPIM
4. Multics
Answer = C
8) Instead of counting with binary number a ring counter uses words that have a single
high..... ?
1. bytes
2. gate
3. bit
4. chip
Answer = C
9) The memory cell of a dynamic RAM is simpler and smaller that the memory cell of a ......
RAM ?
1. volatile
2. semiconductor
3. static
4. bipolar
5. None of above
Answer =C
10) A multiplexer with a 4 bit data select input is a ?
Answer = D
1. A collection of lines that connects several devices is called …………..
A) bus
B) peripheral connection wires
40
C) Both a and b
D) internal wires
2. A complete microcomputer system consist of ………..
A) microprocessor
B) memory
C) peripheral equipment
D) all of the above
3. PC Program Counter is also called ……………….
A) instruction pointer
B) memory pointer
C) data counter
D) file pointer
4. In a single byte how many bits will be there?
A) 8
B) 16
C) 4
D) 32
5. CPU does not perform the operation ………………
A) data transfer
B) logic operation
C) arithmetic operation
D) all of the above
6. The access time of memory is …………… the time required for performing any single CPU operation.
A) Longer than
B) Shorter than
41
C) Negligible than
D) Same as
7. Memory address refers to the successive memory words and the machine is called as …………
A) word addressable
B) byte addressable
C) bit addressable
D) Terra byte addressable
8. A microprogram written as string of 0’s and 1’s is a ………….
A) Symbolic microinstruction
B) binary microinstruction
C) symbolic microinstruction
D) binary micro-program
9. A pipeline is like ………………..
A) an automobile assembly line
B) house pipeline
C) both a and b
D) a gas line
10. Data hazards occur when …………………
A) Greater performance loss
B) Pipeline changes the order of read/write access to operands
C) Some functional unit is not fully pipelined
D) Machine size is limited
Answers:
1. A) bus
2. D) all of the above
42
3. A) instruction pointer
4. A) 8
5. A) data transfer
6. A) Longer than
7. A) word addressable
8. D) binary microprogram
9. A) an automobile assembly line
10. B) Pipeline changes the order of read/write access to operands
43

The Digital Computer Accepts - Data As Input

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Computer Fundamentals

1. The digital computer accepts ____ data as input.

2. The following are included in graphics data, except

3. Which of the following has highest speed?

5. Which of the following is not an input/output device?

6. Which of the following has low speed storage?

8. Which of the following is an output device?

9. Which of the following is an input device?

10. Which is the main part of Central Processing Unit (CPU)?

11. The addition, subtraction, multiplication and division are performed at

12. A sequence of instructions given to a computer to perform a particular task is called

14. Esc key is used to

15. One byte consists of ___ bits.

17. SDRAM stands for?

18. Which is known as quasi static RAM?

19. In EPROM, E stands for

21. Which of the following is/are optical disk(s)?

Program is a subset of an instruction set.

An operand and an address

Primary and secondary

halts for predetermined time

Add to Accumulator using carry Flag

Require different amount of time

The pipeline stages have different delays

( j mod v)*k to ( j mod v)*k + (k -1)

Same as the access time

The property of locality of reference

Result = D8 16 , overflow and negative flags set

as soon as an interrupt is raised

Performs ALU operations on the data

Write Once Read Memory

fails as L can overflow

Synchronize the clock of transmitter and receiver

Causes variation in its address number

The computer provides special instructions for manipulating I/O ports.

Low cost per bit

Computer Arithematics Solved MCQs

4) Master slave flip flop is also referred to as ?

8) An encoder has 2n input lines and ..... output lines ?

1) What is the hexadecimal equivalent of a binary number 10101111 ?

6) Flip flop output is always ?

1) The term sum - of - product in Boolean algebra means ?

3) The ALE line of an 8085 microprocessor is used to ?

5) The index register in a digital computer is used for ?

9) Von Neumann architecture is ?

10) A typical application of MIMD is?

1) On receiving an interrupt from an I/O device, the CPU ?

1) Which memory stores the data permanently ?

1) The advantage of single bus over a multi bus is ?

1. A collection of lines that connects several devices is called …………..

B) peripheral connection wires

2. A complete microcomputer system consist of ………..

D) all of the above

3. PC Program Counter is also called ……………….

4. In a single byte how many bits will be there?

5. CPU does not perform the operation ………………

D) all of the above

D) Terra byte addressable

8. A microprogram written as string of 0’s and 1’s is a ………….

9. A pipeline is like ………………..

A) an automobile assembly line

10. Data hazards occur when …………………

A) Greater performance loss

( j mod v)k to ( j mod v)k + (k -1)