How to multiply two Matrix in matlab

How to find inverse of anMatrix in matlab

What is difference in edotor and command window

What different data types supported by matlab

How to add two matrices using matlab
Write a code for D-FF in VHDL
How to divide two martices using Matlab
How to define zero matrix in matlab
What is grid on command in matlab

What is disp function how is differs from display

What is simulink
how to plot a cos wav
can we plot tan wav

What is Inf & NaN in matlab

What is monte-Carlo
What is fullform of P-Spice
how to generate Febbonacchi series using matlab

What is fullform of CIS

How to add diiferent diamention matrices
How to extract specific row from matrix
Does 741 opamp has offset in simulation softwares
how to Perform matrix multiplication without using multiplication sign
How to display your own name in matlab
how to plot a circle in matlab ? Can you modify it to elips
what will happen if (" a") is put instead of ('a')
How to display '' on matlab command window
How to change frequency of Vac source in orcad
What is mirror operation in orcad
what are the applications of VHDL
What is 'Entity' in VHDL
What is .* in matlab
can we add element by element of two matrices using .+
what all different softwares falls under orcad 9.1 package
what is maximum and minimum voltage range in Simulation software
what is 'Architecture' in VHDL
What is buffer in VHDL
is VHDL is case sensitve language
is Matlab is case sensitve language
What is HDL how it differs from VHDL
What is FPGA how it is related to HDL

What is kernel
What are the entry modes supportred by active hdl
What different simulations are supported by active HDL
What id EDFI
How sysnthesis of HDL differs from Simulation
What is open Vera
what is PSL
What is system verilog assertion
Create a matrix of 4 by 4 filling all value from 1 to 16 with indirect method
can we find phasors using orcad
how to find remainder after divisition in matlab
what you understand by std_logic
what data types are supported by VHDL
What markers are available in
write a program to find missing nmber from 3,3 matrix

What is VHSIC
if sinW and cosW given can we find W without using inverse function
what will happen if we write disp(' " ');
why IEEE.std_logic_1164.all
directly by using *
Y = inv(X)

There are many different data types, or classes, that you can work with in the MATLAB software. You can build
matrices and arrays of floating-point and integer data, characters and strings, and logical true and false states.
Function handles connect your code with any MATLAB function regardless of the current scope. Structures and cell
arrays, provide a way to store dissimilar types of data in the same array.
directly by using +

A\B
A=Zeroes(m,n) where m is no. of rows,n is columns

disp function only displays the values whereas displa funtion displays d name and
values. For ex disp(A) will only display values of A whereas display(A) will show
"A=…"

Simulink is a software package for modeling, simulating, and analyzing dynamic systems. It supports
linear and nonlinear systems, modeled in continuous time, sampled time, or a hybrid of the two. Systems
can also be multirate, i.e., have different parts that are sampled or updated at different rates.For
modeling, Simulink provides a graphical user interface (GUI) for building models as block diagrams, using
click-and-drag mouse operations. With this interface, you can draw the models just as you would with
pencil and paper (or as most textbooks depict them)
t=0:0.1:1; plot(cos(t));
yes but it wud be discontinuos at infinity values

Inf returns the IEEE arithmetic representation for positive infinity. Infinity results from operations like
division by zero and overflow, which lead to results too large to represent as conventional floating-
point values. NaN returns the IEEE arithmetic representation for Not-a-Number
(NaN). These result from operations which have undefined numerical results.

Personal Simulation program for Integrated circuits emphasis

function f = fibonacci(n)

f = zeros(n,1);
f(1) = 1;
f(2) = 2;
for k = 3:n
f(k) = f(k-1) + f(k-2);
end

write A(rowno,:)
yes it can be set

disp(), display()

error
disp('''''')

mirrors circuit

the entity declaration as the interface to the outside world that defines the input and output signals
element wise multiplication
addition is element by element only Tricky question it should be + only

architecture body contains the description of the entity and is composed of interconnected entities, processes and com
buffer – indicates that the signal is an output of the entity whose value can be read inside the entity’s architecture
no
yes
hardware defination language
In computing, the kernel is the central component of most computer operating systems; it is a bridge
field programmable gate array, d program made in vhdl can b loaded in fpga n tested in real world and then applied in the real s
between applications and the actual data processing done at the hardware level. The kernel's
responsibilities include managing the system's resources (the communication
between hardware andsoftware components).[1] Usually as a basic component of an operating system, a
kernel can provide the lowest-level abstraction layer for the resources (especially processors and I/O
devices) that application software must control to perform its function.
text based ,graphical
VHDL,Verilog,EDFI,SystemC,System Verilog

OpenVera(TM) is an interoperable, open hardware verification language to accelerate innovation in the ve

yes
rem(x,y)

" will get displayed

The IEEE Standard 1164 defines a package design unit that contains declarations that support a uniform
representation of a logic value in aVHDL hardware description. The standardization effort was based on
the donation of the Synopsys MVL-9 type declaration.

The primary data type std_ulogic (standard unresolved logic) consists of nine character literals in the
'U' - uninitialized
'X' - strong drive, unknown logic value
'0' - strong drive, logic zero
'1' - strong drive, logic one
'Z' - high impedance
'W' - weak drive, unknown logic value
'L' - weak drive, logic zero
'H' - weak drive, logic one
'-' - don't care

This system promoted a useful set of logic values that typical CMOS logic design could utilize in the vast
majority of modeling situations. The 'Z' literal makes tri-state buffer logic easy. The 'H' and 'L' weak drives
permit wired-AND and wired-OR logic. Additionally, the 'U' state is the default value for all object
declarations so that during simulations uninitialized values are easily detectable and thus easily corrected
if necessary.

In VHDL, the hardware designer makes the declarations visible via the following library and use statem
put signals

ed entities, processes and components, all operating concurrently,

de the entity’s architecture

orld and then applied in the real scenario

celerate innovation in the verification market