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IET Power Electronics

Research Article

ISSN 1755-4535
Fast and robust voltage control of DC–DC Received on 5th January 2015
Revised on 15th May 2015
boost converter by using fast terminal sliding Accepted on 18th June 2015
doi: 10.1049/iet-pel.2015.0008
mode controller www.ietdl.org

İrfan Yazici ✉, Ersagun Kürşat Yaylaci


Department of Electrical and Electronics, Sakarya University, Esentepe, Sakarya 54187, Turkey
✉ E-mail: iyazici@sakarya.edu.tr

Abstract: In this study, a fast terminal sliding-mode control scheme is proposed as a new approach for the voltage tracking
control of the DC–DC boost converter affected by disturbances, such as the variations in the input voltage and the load
resistance. Some experiments are performed on a test bench to show the effectiveness of the proposed approach. The
fast reference tracking capability with small overshoot and robustness to the disturbances of the designed controller is
verified by the experimental results. Moreover, the results demonstrate that the proposed controller has a better
performance related to conventional sliding mode and proportional–integral controllers in terms of the settling time
and robustness to the disturbances.

1 Introduction results show that the performance of this control concept was
better than PI and conventional SMC (CSMC). The SMC is
The DC–DC boost converter (BC) is a switching power converter investigated for the BC because of its superior properties, such as
with a higher output voltage value than its input voltage. Due to insensitive to external disturbances and parametric uncertainties
their small size, power, and cost efficiency the BCs are used in [29, 30]. Moreover, the SMC is combined with other control
many industrial applications, such as hybrid electric vehicles, techniques, such as fuzzy logic [2], PID [31], PI [32], and H∞
regulated power supplies, fuel cells, AC and DC motor drivers, [33] to have more efficient control for the BC. In these studies, the
and renewable energy systems. Therefore, any enhancement in the CSMC having a linear sliding surface (LSS) is employed for the
performance of the BC profits to all the systems mentioned above. control of the BC. Thanks to the LSS, as the CSMC can provide
To design a controller with an acceptable transient and steady-state asymptotic stability when the system dynamics are in the sliding
performance for the BC is an effortful process because of the mode. Nevertheless, the error signal may not converge to zero in
highly non-linear dynamics and non-minimum phase structure of it finite time because of the asymptotic convergence rate of the LSS
[1–5]. Many kinds of controllers, namely linear, [6–8] non-linear [30–34].
[9–12], and heuristic [2, 13–16] methods have been offered for the The terminal SMC (TSMC), which has a non-linear switching
control of the BC systems. function instead of the LSS, is developed to guarantee finite-time
Although the linear controllers, such as proportional integral (PI) convergence [35]. Moreover, according to the CSMC, the TSMC
and PI derivative (PID) could have been established with an can improve transient performance of the system [36]. However,
acceptable performance around the selected operating point, their the TSMC has some disadvantages, such as the bad convergence
performance might be declined when the operating point of the performance and convergence time if the system state is far away
system is changed [1, 17–19]. To increase the effectiveness of the from the equilibrium point [37]. To remove these disadvantages, a
PI or PID controller devoted for the BC, various kinds of the auto new structure of the TSMC called the fast terminal sliding mode
gain tuning methods were proposed in [16, 20–22]. However, the controller (FTSMC) is proposed. The FTSMC consists of the finite
controller design processes of these methods are more complicated time convergent property of terminal attractor and exponential
than the classical PI/PID control methods. convergent property of the linear system [38] and also reduces the
In several studies, it was demonstrated that the heuristic methods, chattering [39].
such as neural network [13], fuzzy logic [14, 17], queen bee, and This paper proposes the improved form of the FTSMC for the
genetic algorithm [15] dedicated for the control of the BC have a output voltage control of the BC affected by disturbances, such as
suitable performance. On the other hand, it is known that generally the step type variations in the input voltage and the load
the heuristic methods suffer from memory requirements and resistance. The dynamic performance and robustness of the
computational efforts. Moreover, some of the heuristic methods proposed method are investigated experimentally for different
may need experience about the systems and/or extensive trial and operating conditions. Furthermore, the performance of the
error tuning process [2, 23]. proposed FTSMC-based controller is compared with a CSMC and
In addition to the acceptable transient and steady-state behaviour, a PI controller for the same conditions.
the controller devoted to control BC should also be robust to The rest of this paper is organised as follows. First, behavioural
disturbances, such as variations in the load resistance and input and controlled model of the BC are given in Section 2. In Section
voltage which may occur naturally during operation of the BC. 3, the FTSMC is summarised and analysed for the BC. The
Various control methods were offered to achieve a robust BC experimental results are given and discussed in Section 4. Finally,
structure. The robustness of the controller against variation in the the conclusions are given in Section 5.
load and the line disturbances was explored by using linear matrix
inequalities method [24, 25], H2 approach [26] H∞, and
sliding-mode control (SMC) [27, 28] approaches. However, the 2 Modelling of the DC–DC BC
output voltage tracking capability of these methods was not
investigated. A robust controller-based on time-delay concept was The dynamic behaviour model of the DC–DC BC operating in
analysed to regulate the output voltage of the BC in [18]. The continuous conduction mode shown in Fig. 1 can be described for

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The SMC design procedure consists of two basic steps. Firstly, a
switching surface that represents the desired convergence property
should be determined. Secondly, a control law that steers the
system states to reach and stays within the nearby region of the
chosen switching surface should be established [41].
In the CSMC, the state trajectory converge to the equilibrium
point asymptotically, which means the system errors cannot
converge to zero in finite time, due to the asymptotic convergence
property of the LSS that is commonly chosen [30, 42]. When the
SMC is employed as a voltage controller for the BC, the LSS
Fig. 1 Schematic of the single switch BC
which is a linear combination of state variables defined in (7) and
(8) can be expressed as [43]

the switching conditions ON and OFF, respectively, as in [40] S = a x1 + x2 (11)

dVo V where α is a real constant sliding coefficient and must satisfy the
= − o (1) Routh–Hurwitz condition (α > 0) in order to achieve stability.
dt RC
To speed up the convergence rate and obtain finite-time
diL Vi convergence, a TSMC has been presented. The TSMC employs a
= (2) non-linear switching surface which can be expressed as [30]
dt L

and St = ẋ1 + bx1q/p (12)

dV o iL V o where β > 0 and p, q are positive odd integers satisfying p > q.


= − (3)
dt C RC The non-linearity term x1q/p in (12) improves the convergence rate
within the vicinity of the equilibrium point and thus the state
diL V V
=− o+ i (4) trajectory converges the sliding line (St = 0) in finite time.
dt L L However, the TSMC cannot provide with the same convergence
performance when the initial value of the system state trajectory is
where iL is the inductor current, Vo is the output capacitor voltage, L far away from the equilibrium point since the term x1q/p reduces the
is the inductance, C is the capacitance, and R is the load resistance. magnitude of the convergence for large value of x1 [44]. It means
Equations (1)–(4) can be combined as given in the following that the convergence performance of the TSMC is sensitive to the
equations initial conditions.
To overcome this problem, the FTSMC strategy which ensures
dV o iL V o fast transient convergence even if the initial condition of the state
= (1 − u ) − (5)
dt C RC trajectory is far away from the equilibrium point has been adopted.
The FTSMC was presented in [44] as
diL V V
= −(1 − u) o + i (6)
dt L L
Sft = ẋ1 + ax1 + bx1q/p (13)
where u is the control input which takes ‘0’ for the OFF state and ‘1’
for the ON state of the switching device. As it can be realised from (11)–(13), FTSMC is a hybrid form of the
To design the proposed FTSMC-based voltage-mode controller CSMC and TSMC. Therefore, FTSMC combines the advantages of
for the BC, the desired control variables should be obtained by the TSMC and CSMC together so that fast and finite-time
using the BC behaviour model. Therefore, the controlled state convergence can be obtained regardless of the initial condition and
variables are chosen as below higher steady-state precision. From (13), when x1 has a large value
(e.g. at start-up condition for BC, V0 = 0, and x1 = Vref ), the αx1
x1 = V ref − V o (7) term dominates the dynamics, approximately becomes ẋ1 = −ax1
whose fast convergence when far away from zero is understood.
 When x1 is close to equilibrium, the non-linear term (bx1q/p )
V (V o − V i )u
x2 = ẋ1 = −V̇ o = o + dt (8) dominates the dynamics and the approximate dynamics become
RC LC
ẋ1 = −bx1q/p [44].
Note that in (13) for any x1 < 0 the fractional power q/p leads to
where Vref is the reference value of the output voltage and u = 1 − u x1q/p Ó R and thus S ft Ó R. To tackle this problem, an improved
is the inverse logic of the u. The substitution of the BC’s behavioural version of FTSMC which is slightly different from (13) and
model in (5) and (6) into the time differentiation of the controlled guarantees that always Sft ∈ R was presented in [30]. The
state variables gives the dynamical model of the system required improved form of FTSMC, which is used in this paper, can be
for the proposed controller design as in (9) and (10) given as

ẋ1 = x2 (9)  g
Sft = ẋ1 + ax1 + bx1  sign (x1 ) (14)
x2 x V − −V i
ẋ2 = − − 1 u + ref u (10) where 0 < γ < 1.
RC LC LC
For a single switch BC, an appropriate control law satisfying the
hitting condition [45] can be expressed as in the following equation
3 Fast terminal SMC 
1  1 = ‘ON’, Sft . 0
u= 1 + sign (Sft ) = (15)
The SMC is one of the well-known non-linear control methods, 2 0 = ‘OFF’, Sft , 0
thanks to its simplicity, fast dynamic response, and inherent
robustness with respect to both the parameter uncertainties and the where Sft is the state trajectory described in (14) and u is the logic
disturbances. state of the converter’s power switch.

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However, direct implementation of (15) needs the converter to By using (18), the time derivative of (22) can be written as
operate at infinite switching frequency which is not applicable.
Therefore, the following conventional hysteresis modulation  g−1

V̇ (t) = Sft ẋ2 + aẋ1 + bgx1  ẋ1 , 0 (23)


method is employed for experimental applications [45]:

1, Sft . 1 when (23) is solved for u it yields
u= (16)
0, Sft , −1  
LC 1
ueq = a + bg|x1 |g−1 − x +1 (24)
where ɛ is a constant parameter. Vref − x1 − Vi RC 2

3.1 Existence conditions The control function ueq is called the equivalent control that is
required to keep the state trajectory on the sliding line under ideal
The control input generated by using (14) and (16) only ensures that fast terminal sliding mode. However, the equivalent control may
the state trajectory will be forced to the sliding line and must not be able to bring the system states from any initial value to the
eventually reach it, regardless of the initial value [44]. To ensure equilibrium point. Therefore, to design a robust controller, the
that the state trajectory is maintained within the vicinity of the equivalent control law in (24) should be augmented by a
sliding line, the following existence condition derived from supplementary control law usw stated in the following equation:
Lyapunov’s second method must also be obeyed [46]:
usw = Kft sign (Sft ) (25)
 +
Sf t  0 , Ṡ ft , 0
lim Sft Ṡ ft , 0 = (17)
Sft 0 Sft  0− , Ṡ ft . 0 where Kft > 0.
From (24) and (25), the total control input can be written as
where Ṡ ft is the time derivative of the Sft and can be obtained from
(14) as explained in [30, 44] u = ueq + usw
 
 g−1 LC g−1 1
Ṡ ft = ẍ1 + aẋ1 + bgx1  ẋ1 = a + bg|x1 | − x + Kft sign (Sft ) + 1
(18) Vref − x 1 − Vi RC 2
(26)
By substituting (9) and (10) into (18), the following two conditions
can be defined: To investigate the robustness of the controller against parametric
  uncertainties and external disturbances, (10) is rewritten as
1
Sft  0+ , and u = 1, Ṡ ft , 0 a + bg|x1 |g−1 − x ,0    
RC 2 x2 V − x1 Vi
ẋ2 = − + ref u − u + d(t) (27)
(19) RC LC LC
 
1
Sft  0− , and u = 0, Ṡ ft . 0 a + bg|x1 |g−1 − x where d(t) denotes the parametric uncertainties and disturbances.
RC 2 Then, substituting (26) and (27) into (23) yields
x1 Vref − Vi  
− + .0 Vref − x1 − Vi
LC LC V̇ (t ) = Sft Ṡ ft = Sft − Kft sign (St ) + d(t) , 0
(20) LC
(28)
The combination of (19) and (20) gives the general form of the
existing condition as given below As it is seen from (28), if the switching control gain is selected to
  V − Vi

1

V − Vi x 1 satisfy d(t) , o Kft then the bounded disturbances and
0, − a − bg|x1 |g−1 x2 , ref − (21) LC
RC LC LC uncertainties can be completely rejected.

The coefficients β and γ should be selected to satisfy (21) by


considering the minimum value of the load resistance R. However, 4 Experimental results
there is no systematic procedure to obtain the optimum value of
the coefficients in the literature. Therefore, a few trial-and-error The performance of the proposed controller is evaluated by
steps are required to determine the optimal values of the β and γ experiments on a prototype BC with the specification given in
for an acceptable performance. Satisfaction of the condition given Table 1. A photograph of the test bench used in all the
in (21) implies that both Sft and Ṡ ft will tend to be zero when experiments is shown Fig. 2. The real-time implementation of the
t → ∞ and thus the system dynamics remain on the sliding surface. proposed controller is realised by using an Arcon RISC Machine
(ARM)-based microcontroller. The control law given in (26)
should be discretised for implementation on the microcontroller.
3.2 Stability and robustness analysis The discrete time equivalent of the FTSMC-based control law is
In a stable system, the movement of the state trajectory along the
sliding line must be terminated at a stable equilibrium point. Table 1 Parameters of the converter
Therefore, the control law must be designed to satisfy the stability
condition besides the existence condition. The stability and Description Value
robustness issue of the controller is addressed by using the
Lyapunov stability theory as follows: capacitance, C 240 μF
inductance, L 310 μH
Consider the Lyapunov function candidate is load resistance, R [20 Ω, 30 Ω, 60 Ω]
input voltage, Vi 25 V
1 desired output voltage, Vo 40 V
V (t) = Sft2 (22) sampling frequency, fs 20 kHz
2

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Fig. 4 Robustness of the proposed FTSMC versus input voltage variation
(CH1: Vo, 10 V/div and CH2: Vin, 10 V/div)

seen from Fig. 3, the output voltage of the BC controlled by the


Fig. 2 Photograph of the test bench used in the experimental studies proposed controller can track the step changes in the reference
value with very small overshoot and settling time.
1 – power supplies for converter and measurement units, 2 – loads, 3 – relay mechanism
for load switching, 4 – ARM-based microcontroller, 5 – BC, and 6 – oscilloscope The robustness of the controller against the wide variations in the
input voltage is investigated. In this experiment, the input voltage is
decreased from Vin = 25 V to Vin = 15 V and then returned to Vin =
obtained by using Euler’s discretisation method as explained in [47– 25 V while the output voltage reference is constant at Vref = 40V,
49]. The theoretical details and implementation of the Euler’s see Fig. 4. The results shown in Fig. 4 verified that the proposed
discretisation of the TSMC are analysed deeply in [47–49]. In controller has high robustness to line disturbances since the output
experimental studies, the sampling frequency of the proposed voltage value of the BC is not influenced seriously by the
controller is chosen as equal to the switching frequency specified variation in the input voltage up to 40% from its nominal value.
in Table 1. The robustness of the proposed controller with respect to load
The performance and robustness of the suggested FTSMC for the variation is also investigated. For this aim, a simple relay
BC are investigated experimentally for various operating conditions. mechanism shown in Fig. 2 is established to realise the load
The results obtained by the presented method are also compared with variation, R = 60 Ω→R = 30 Ω→R = 60 Ω. Note that from Fig. 5,
a CSMC and a PI controller so as to evaluate efficiency achieved by the output voltage remains constant at reference value, with only a
the proposed controller. The CSMC and PI controllers were also small increase in the voltage ripples, when the load is varied from
realised by using the ARM-based microcontroller and the R = 60 Ω to R = 30 Ω and back to R = 60 Ω. Thus, the high degree
sampling frequency were also chosen as fs = 20 kHz for both of robustness of the proposed controller with respect to load variation
them. is verified experimentally.
As stated above, there is no systematic design procedure to obtain To evaluate the performance of the proposed controller, the results
the controller coefficients for FTSMC and CSMC. Therefore, in the are compared with the CSMC and PI controllers for the same
experimental studies the optimal values of the coefficients are
obtained by a few trial-and-error steps in case of the overshoot,
settling time, and steady-state error. The parameters of the
FTSMC, CSMC, and PI controllers used in the
microcontroller-based real-time experimental studies are given in
Table 2.
First, the reference tracking capability of the proposed FTSMC
controller is investigated. For this aim, the output voltage reference
is increased by nearly 35% namely from 30 to 40 V. As it can be

Table 2 Parameters of the controllers


PI Kp = 0.056 Ki = 0.024
CSMC α = 2.05, ɛ = 0.5 Fig. 5 Robustness of the proposed FTSMC versus load variation
FTSMC α = 2.05, β = 25.0, γ = 0.85, ɛ = 0.5
(CH1: Vo, 10 V/div and CH2: io, 500 mV/div = 500 mA/div)

Fig. 3 Voltage tracking capability of the proposed method Fig. 6 Comparison of the voltage tracking capability of the controllers
(CH1: Vo, 10 V/div and CH2: io, 500 mV/div = 500 mA/div) (CH1: (FTSMC), 10 V/div, R1: (CSMC), 10 V/div and R2: (PI), 10 V/div)

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Fig. 7 Performance of the controllers versus input voltage variation
a PI
b CSMC
(CH1: Vo, 10 V/div and CH2: Vin, 10 V/div)

Fig. 8 Performance of the controllers versus step changes in the load


a PI
b CSMC
c Proposed method (FTSMC)
(CH1: Vo, 10 V/div and CH2: io, 500 mV/div = 500 mA/div)

operating conditions. The transient responses to the step change in to R = 60Ω are given in Fig. 8. The load variation is implemented
the output voltage reference of the three controllers are given in by using the relay mechanism mentioned before. As it is seen
Fig. 6. The results show that the proposed FTSMC has better from Fig. 8, during this experiment the load current is changed
performance in terms of the settling time according to the CSMC from I ≃ 0.67 A to I ≃ 2.0 A and back to I ≃ 0.67A. The results
and the PI controller. show that the FTSMC provides more robust system than the
In the next study, the performances of the CSMC and PI against CSMC and PI controllers against load variations.
the input voltage variations are investigated likewise the FTSMC The experimental results of the FTSMC, CSMC, and PI
given above in Fig. 4. For this aim, the input voltage is decreased controllers are summarised in Table 3 in terms of the settling time
from Vin = 25 V to Vin = 15 V and then returned to Vin = 25 V
while the output voltage reference is constant at Vref = 40 V. The
result given in Fig. 7a demonstrates that the output voltage of the
PI controlled BC is affected seriously by the input voltage Table 3 Performance comparisons of the controllers
variations. Fig. 7b clears out that the CSMC yields more robust FTSMC CSMC PI
structure than PI as it is expected. It should also be noted that the
CSMC has more chattering than the FTSMC when they are reference tracking time (settling time) 6 26 15 ms
compared with each other. maximum variation in the output voltage 4.5 8.7 20 %
Finally, the robustness of the three controllers against the load due to the variation in the input voltage
variations is compared. The performances of the controllers when maximum variation in the output voltage 2.5 6.5 7.5 %
due to the variation in the output load
the load resistance is changed from R = 60Ω to R = 20Ω and back

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6 & The Institution of Engineering and Technology 2015

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