Documente Academic
Documente Profesional
Documente Cultură
Research Article
ISSN 1755-4535
Fast and robust voltage control of DC–DC Received on 5th January 2015
Revised on 15th May 2015
boost converter by using fast terminal sliding Accepted on 18th June 2015
doi: 10.1049/iet-pel.2015.0008
mode controller www.ietdl.org
Abstract: In this study, a fast terminal sliding-mode control scheme is proposed as a new approach for the voltage tracking
control of the DC–DC boost converter affected by disturbances, such as the variations in the input voltage and the load
resistance. Some experiments are performed on a test bench to show the effectiveness of the proposed approach. The
fast reference tracking capability with small overshoot and robustness to the disturbances of the designed controller is
verified by the experimental results. Moreover, the results demonstrate that the proposed controller has a better
performance related to conventional sliding mode and proportional–integral controllers in terms of the settling time
and robustness to the disturbances.
1 Introduction results show that the performance of this control concept was
better than PI and conventional SMC (CSMC). The SMC is
The DC–DC boost converter (BC) is a switching power converter investigated for the BC because of its superior properties, such as
with a higher output voltage value than its input voltage. Due to insensitive to external disturbances and parametric uncertainties
their small size, power, and cost efficiency the BCs are used in [29, 30]. Moreover, the SMC is combined with other control
many industrial applications, such as hybrid electric vehicles, techniques, such as fuzzy logic [2], PID [31], PI [32], and H∞
regulated power supplies, fuel cells, AC and DC motor drivers, [33] to have more efficient control for the BC. In these studies, the
and renewable energy systems. Therefore, any enhancement in the CSMC having a linear sliding surface (LSS) is employed for the
performance of the BC profits to all the systems mentioned above. control of the BC. Thanks to the LSS, as the CSMC can provide
To design a controller with an acceptable transient and steady-state asymptotic stability when the system dynamics are in the sliding
performance for the BC is an effortful process because of the mode. Nevertheless, the error signal may not converge to zero in
highly non-linear dynamics and non-minimum phase structure of it finite time because of the asymptotic convergence rate of the LSS
[1–5]. Many kinds of controllers, namely linear, [6–8] non-linear [30–34].
[9–12], and heuristic [2, 13–16] methods have been offered for the The terminal SMC (TSMC), which has a non-linear switching
control of the BC systems. function instead of the LSS, is developed to guarantee finite-time
Although the linear controllers, such as proportional integral (PI) convergence [35]. Moreover, according to the CSMC, the TSMC
and PI derivative (PID) could have been established with an can improve transient performance of the system [36]. However,
acceptable performance around the selected operating point, their the TSMC has some disadvantages, such as the bad convergence
performance might be declined when the operating point of the performance and convergence time if the system state is far away
system is changed [1, 17–19]. To increase the effectiveness of the from the equilibrium point [37]. To remove these disadvantages, a
PI or PID controller devoted for the BC, various kinds of the auto new structure of the TSMC called the fast terminal sliding mode
gain tuning methods were proposed in [16, 20–22]. However, the controller (FTSMC) is proposed. The FTSMC consists of the finite
controller design processes of these methods are more complicated time convergent property of terminal attractor and exponential
than the classical PI/PID control methods. convergent property of the linear system [38] and also reduces the
In several studies, it was demonstrated that the heuristic methods, chattering [39].
such as neural network [13], fuzzy logic [14, 17], queen bee, and This paper proposes the improved form of the FTSMC for the
genetic algorithm [15] dedicated for the control of the BC have a output voltage control of the BC affected by disturbances, such as
suitable performance. On the other hand, it is known that generally the step type variations in the input voltage and the load
the heuristic methods suffer from memory requirements and resistance. The dynamic performance and robustness of the
computational efforts. Moreover, some of the heuristic methods proposed method are investigated experimentally for different
may need experience about the systems and/or extensive trial and operating conditions. Furthermore, the performance of the
error tuning process [2, 23]. proposed FTSMC-based controller is compared with a CSMC and
In addition to the acceptable transient and steady-state behaviour, a PI controller for the same conditions.
the controller devoted to control BC should also be robust to The rest of this paper is organised as follows. First, behavioural
disturbances, such as variations in the load resistance and input and controlled model of the BC are given in Section 2. In Section
voltage which may occur naturally during operation of the BC. 3, the FTSMC is summarised and analysed for the BC. The
Various control methods were offered to achieve a robust BC experimental results are given and discussed in Section 4. Finally,
structure. The robustness of the controller against variation in the the conclusions are given in Section 5.
load and the line disturbances was explored by using linear matrix
inequalities method [24, 25], H2 approach [26] H∞, and
sliding-mode control (SMC) [27, 28] approaches. However, the 2 Modelling of the DC–DC BC
output voltage tracking capability of these methods was not
investigated. A robust controller-based on time-delay concept was The dynamic behaviour model of the DC–DC BC operating in
analysed to regulate the output voltage of the BC in [18]. The continuous conduction mode shown in Fig. 1 can be described for
dVo V where α is a real constant sliding coefficient and must satisfy the
= − o (1) Routh–Hurwitz condition (α > 0) in order to achieve stability.
dt RC
To speed up the convergence rate and obtain finite-time
diL Vi convergence, a TSMC has been presented. The TSMC employs a
= (2) non-linear switching surface which can be expressed as [30]
dt L
ẋ1 = x2 (9) g
Sft = ẋ1 + ax1 + bx1 sign (x1 ) (14)
x2 x V − −V i
ẋ2 = − − 1 u + ref u (10) where 0 < γ < 1.
RC LC LC
For a single switch BC, an appropriate control law satisfying the
hitting condition [45] can be expressed as in the following equation
3 Fast terminal SMC
1 1 = ‘ON’, Sft . 0
u= 1 + sign (Sft ) = (15)
The SMC is one of the well-known non-linear control methods, 2 0 = ‘OFF’, Sft , 0
thanks to its simplicity, fast dynamic response, and inherent
robustness with respect to both the parameter uncertainties and the where Sft is the state trajectory described in (14) and u is the logic
disturbances. state of the converter’s power switch.
3.1 Existence conditions The control function ueq is called the equivalent control that is
required to keep the state trajectory on the sliding line under ideal
The control input generated by using (14) and (16) only ensures that fast terminal sliding mode. However, the equivalent control may
the state trajectory will be forced to the sliding line and must not be able to bring the system states from any initial value to the
eventually reach it, regardless of the initial value [44]. To ensure equilibrium point. Therefore, to design a robust controller, the
that the state trajectory is maintained within the vicinity of the equivalent control law in (24) should be augmented by a
sliding line, the following existence condition derived from supplementary control law usw stated in the following equation:
Lyapunov’s second method must also be obeyed [46]:
usw = Kft sign (Sft ) (25)
+
Sf t 0 , Ṡ ft , 0
lim Sft Ṡ ft , 0 = (17)
Sft 0 Sft 0− , Ṡ ft . 0 where Kft > 0.
From (24) and (25), the total control input can be written as
where Ṡ ft is the time derivative of the Sft and can be obtained from
(14) as explained in [30, 44] u = ueq + usw
g−1 LC g−1 1
Ṡ ft = ẍ1 + aẋ1 + bgx1 ẋ1 = a + bg|x1 | − x + Kft sign (Sft ) + 1
(18) Vref − x 1 − Vi RC 2
(26)
By substituting (9) and (10) into (18), the following two conditions
can be defined: To investigate the robustness of the controller against parametric
uncertainties and external disturbances, (10) is rewritten as
1
Sft 0+ , and u = 1, Ṡ ft , 0 a + bg|x1 |g−1 − x ,0
RC 2 x2 V − x1 Vi
ẋ2 = − + ref u − u + d(t) (27)
(19) RC LC LC
1
Sft 0− , and u = 0, Ṡ ft . 0 a + bg|x1 |g−1 − x where d(t) denotes the parametric uncertainties and disturbances.
RC 2 Then, substituting (26) and (27) into (23) yields
x1 Vref − Vi
− + .0 Vref − x1 − Vi
LC LC V̇ (t ) = Sft Ṡ ft = Sft − Kft sign (St ) + d(t) , 0
(20) LC
(28)
The combination of (19) and (20) gives the general form of the
existing condition as given below As it is seen from (28), if the switching control gain is selected to
V − Vi
1
V − Vi x 1 satisfy d(t) , o Kft then the bounded disturbances and
0, − a − bg|x1 |g−1 x2 , ref − (21) LC
RC LC LC uncertainties can be completely rejected.
Fig. 3 Voltage tracking capability of the proposed method Fig. 6 Comparison of the voltage tracking capability of the controllers
(CH1: Vo, 10 V/div and CH2: io, 500 mV/div = 500 mA/div) (CH1: (FTSMC), 10 V/div, R1: (CSMC), 10 V/div and R2: (PI), 10 V/div)
operating conditions. The transient responses to the step change in to R = 60Ω are given in Fig. 8. The load variation is implemented
the output voltage reference of the three controllers are given in by using the relay mechanism mentioned before. As it is seen
Fig. 6. The results show that the proposed FTSMC has better from Fig. 8, during this experiment the load current is changed
performance in terms of the settling time according to the CSMC from I ≃ 0.67 A to I ≃ 2.0 A and back to I ≃ 0.67A. The results
and the PI controller. show that the FTSMC provides more robust system than the
In the next study, the performances of the CSMC and PI against CSMC and PI controllers against load variations.
the input voltage variations are investigated likewise the FTSMC The experimental results of the FTSMC, CSMC, and PI
given above in Fig. 4. For this aim, the input voltage is decreased controllers are summarised in Table 3 in terms of the settling time
from Vin = 25 V to Vin = 15 V and then returned to Vin = 25 V
while the output voltage reference is constant at Vref = 40 V. The
result given in Fig. 7a demonstrates that the output voltage of the
PI controlled BC is affected seriously by the input voltage Table 3 Performance comparisons of the controllers
variations. Fig. 7b clears out that the CSMC yields more robust FTSMC CSMC PI
structure than PI as it is expected. It should also be noted that the
CSMC has more chattering than the FTSMC when they are reference tracking time (settling time) 6 26 15 ms
compared with each other. maximum variation in the output voltage 4.5 8.7 20 %
Finally, the robustness of the three controllers against the load due to the variation in the input voltage
variations is compared. The performances of the controllers when maximum variation in the output voltage 2.5 6.5 7.5 %
due to the variation in the output load
the load resistance is changed from R = 60Ω to R = 20Ω and back