Documente Academic
Documente Profesional
Documente Cultură
LED TV
SERVICE MANUAL
CHASSIS : UD74Q
Copyright © 2017 LG Electronics Inc. All rights reserved. Only training and service purposes.
CONTENTS
CONTENTS ............................................................................................... 2
SERVICING PRECAUTIONS..................................................................... 4
SPECIFICATION........................................................................................ 6
SOFTWARE UPDATE............................................................................... 11
1)PAL/SECAM B/G/I/D/K
2 Broadcasting system SECAM L/L’
2)DVB-T/T2, C, S/S2
1 ) Digital TV
-VHF, UHF
-C-Band, Ku-Band
2) Analogue TV
3 Program coverage
-VHF : E2 to E12
-UHF : E21 to E69
-CATV : S1 to S20
-HYPER : S21 to S47
► DVB-T
- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32
- Modulation : Code Rate
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
► DVB-T2
- Guard Interval(Bitrate_Mbit/s)
1/4, 1/8, 1/16, 1/32, 1/128, 19/128, 19/256,
- Modulation : Code Rate
QPSK : 1/2, 2/5, 2/3, 3/4, 5/6
16-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
Analog : Upper Heterodyne 64-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
4 Receiving system
Digital : COFDM, QAM 256-QAM : 1/2, 2/5, 2/3, 3/4, 5/6
► DVB-C
- Symbolrate :
4.0Msymbols/s to 7.2Msymbols/s
- Modulation :
16QAM, 64-QAM, 128-QAM and 256-QAM
► DVB-S/S2
- Symbolrate
DVB-S2 (8PSK / QPSK) : 2 ~ 45Msymbol/s
DVB-S (QPSK) : 2 ~ 45Msymbol/s
- 9 iterbi
DVB-S mode : 1/2, 2/3, 3/4, 5/6, 7/8
DVB-S2 mode : 1/2, 2/3, 3/4, 3/5, 4/5, 5/6, 8/9, 9/10
5 Input Voltage AC 100 ~ 240V 50/60Hz
(4) Click [Check Now]: move to “About This TV” page for (3) Click [DOWNLOAD AND INSTALL]
update. (4) TV is updating
(5) TV is updating.
(6) Turn OFF the TV and On. Check the updated SW Version
and Tool Option
(7) Click [Yes] : TV will be DC OFF -> ON
(8) After TV turned on, Check the updated SW Version and
Tool Option.
P_TS_IN
DDR3 2133 X 32
M1 M0 CI Slot
(512MB X 2EA) P_TS_OUT
SMARTCARD_I/F B-CAS
EPI block B-CAS B-CAS
controller (JAPAN)
Level EPI PMIC I2C 6
shifter (SW50B3A) I2C 4 NVRAM (256Kb)
eMMC (4GB)
Vx1 51P (8 lane) : LGD 60/65/70/75 Toshiba 15nm
Vx1 / EPI Realtek OCP K3L only
1. K3Lp Block Diagram (External)
- 12 -
MAIN Audio AMP HDMI2(ARC) HDMI 6G 4
(DTA2010M) I2C 4
HDMI3
HDMI4 (EEPROM)
TS
Sub Micom TS
X_TAL I2C 1 T2/C/S2 NIM tuner
(RENESAS
BLOCK DIAGRAM
32.768KHz R5F100GEAFB)
Copyright ©
Demode
USB_WIFI
SPDIF OUT
CVBS/YPbPr
ETHERNET
I2C 2 (T/C/S/T2/S2)
RF IC
IR / KEY(1Key)
LOGO LIGHT(Ready) LNB
MAX323
AMP
(DT1805)
WIFI/BT Combo Air/
DVB-S
MTK IC Cable
LAN REAR(H)
Sub Assy
H/P
RS-232
AV/COMP
- 14 -
VX1_MSE
Copyright ©
AGP CTL
AGP_CTL
1/1/0 Reserved
1/1/1 Reserved
[M_ERROR] 14 FE_DEMOD1_TS_ERROR
FE_DEMOD1_TS_CLK AB5 / AB2 [GPIO57_TP0_CLK]
[M_MCLK] 15
FE_DEMOD1_TS_SYNC AB6 / AA3 [GPIO56_TP0_SYC]
[M_SYNC] 16
FE_DEMOD1_TS_VAL AB4 / AC2 [GPIO58_TP0_VAL]
[M_VALID] 17
FE_DEMOD1_TS_DATA [0-7]
FE_DEMOD1_TS_DATA[0-7] 18-25 [GPIO59~66_TP0_D0~TP0_D7]
FE_DEMOD2_TS_ERROR
[S_ERROR] 28 FE_DEMOD1_TS_1_DATA[4]
[S_MCLK] 33 FE_DEMOD1_TS_1_DATA[3]
[S_SYNC]30 FE_DEMOD1_TS_1_DATA[2]
[S_VAL] 31
K3Lp
- 15 -
FE_DEMOD1_TS_1_DATA[1] RTK
[S_DATA]32
+2.5V_Normal
[B4_+2.5V_DEMOD] 29
Copyright ©
TU_JAPAN /TU_RESET2
[/TU_RESET2_TU] 34 AA3 / M2 [VINGP_DEMOD_RESET]
/TU_RESET1
[/TU_RESET1_TU] 10 JAPAN_OPT AB2 / L1 [VINRP_TUNER0_REST]
IF_S_IP
[IF_S_IP_MAIN] 59 AF3 / W2 [IP_1]
IF_S_IN
[IF_S_IN_MAIN] 60 AG1 / W3 [IN_1]
IF_S_QP
[IF_S_QP_MAIN] 62 AG2 / Y2 [QP_2]
[IF_S_QN_MAIN] 61 IF_S_QN AG3 / Y3 [QN_2]
IF_P
[IF_P_TU] 8
AE1 / U2 [IF_P]
IF_N
AV1_CVBS_DET
[H5] AIO1L_AV1_CVBS_DET
COMP1/AV1/DVI_L_IN [M5] AI1L
SPDIF_OUT
COMP1/AV1/DVI_R_IN [M4] AI1R GPIO_6_SPDIF_OUT_0 [E3] SPDIF
[N3] VIN 3P
COMP1_Pb [P3] VIN 5P
COMP1_Pr [P2] VIN 4P
COMP1_Y/CVBS [H4] AI3R_COMP1_DET AUD_SCK
GPIO021_SCLK[C2] [38] CLK_I
5. Video & Audio IN/OUT
Realtek
- 16 -
TU_SIF K3Lp
[V2] SIF
AMP_MUTE
22
Tuner
MICOM
Copyright ©
26
SIDE_HP_MUTE
HP_LOUT_AMP
H/P AMP HP_ROUT_AMP
GPIO_35_HPOL [N5] HP_L/ROUT TPA6138A2
GPIO_36_HPOR [N4] LPF H/P Jack
(IC6300)
AIO2L_HP_DET[J5]
HP_DET
ST_GPIO_23_H0_ARC[AG13]
HDMI1
HDMI_CEC
HDMI2.0_2_5V_DET
ST_GPIO_15_5V_DET_HDMI_1
HDMI2.0_2_HPD
ST_GPIO_14_H1_HPD
ST_GPIO_17_H1_SCL DDC_SCL2 / DDC_SDA2
ST_GPIO_16_H1_SDA
ST_GPIO_23_H0_ARC HDMI_ARC
TMDS2 - D0/D1/D2/CLK
P1_CKN/P_RGB_N/P HDMI2 with ARC
HDMI_CEC
REALTEK
HDMI2.0_3_5V_DET
- 17 -
K3Lp ST_GPIO_10_5V_DET_HDMI_2
HDMI2.0_3_HPD
ST_GPIO_11_H2_HPD
ST_GPIO_13_H2_SCL DDC_SCL3 / DDC_SDA3
ST_GPIO_12_H2_SDA
TMDS3 - D0/D1/D2/CLK
P2_CKN/P_RGB_N/P
HDMI3
Copyright ©
HDMI_CEC
HDMI2.0_4_5V_DET
ST_GPIO_07_5V_DET_HDMI_3
HDMI2.0_4_HPD
ST_GPIO_06_H3_HPD
ST_GPIO_09_H3_SCL DDC_SCL4 / DDC_SDA4
ST_GPIO_08_H3_SDA
TMDS4 - D0/D1/D2/CLK
P3_CKN/P_RGB_N/P
HDMI4
USB2.0_2_DM / DP
HSDM1[AM24] USB1
HSDP1[AL24]
HSDM2[AM25] USB2.0_3_DM / DP
USB2
HSDP2[AL25]
- 18 -
19 IR
7. USB / WIFI / M-REMOTE / UART(Debug)
20
LED_R
23
24 KEY2
DEBUG UART DEBUG_RX / TX [AH5] ST_GPIO_02_VGA_SDA KEY1
Wafer [AG5] ST_GPIO_01_VGA_SCL
(P201)
PHONE JACK
Copyright ©
SOC_RX / TX RS232C
ST_GPIO_25_UART0/1[AH13]
ST_GPIO_24_UART0/1[AG14] (IC7200) DOUT1
RIN1
Wafer
(P200)
MICOM
R5F100GEAFB
SOC_RX / TX (IC3000)
SW50B3A(LGD) I2C_SCL6
SW5253A(BOE) [GPIO_2_TCON_SCL/TC
33 ȳ I2C_SDA6 ON_9]
8. K3Lp I2C Map
1.8k ȳ
1.8k ȳ
I2C_SCL4
[AI3L_AMP_SCL] DTA2010M
I2C_SDA4 100ȳ
[AI2R_AMP_SDA] AMP
+3.3V_NOR
1.8k ȳ
1.8k ȳ
33 ȳ FT24C256A-ESR-T
K3Lp NVRAM
+3.3V_NOR
- 19 -
I2C_SCL_1 I2C_SCL2
Copyright ©
[ST_GPIO_27_MICRO_SCL][GPIO_52_TUNER0_SCL]
R5F100GEAFB#30 DT1805
33 ȳ I2C_SDA_1 [ST_GPIO_26_MICRO_SDA] I2C_SDA2 33 ȳ
MICOM [GPIO_51_TUNER0_SDA] LNB
33 ȳ
1.8 k ȳ
1.8 k ȳ
1.8k ȳ
1.8k ȳ
+3.3V_NOR TDJN-G501D
+3.5V_ST
TUNER
VID_CORE
[VINBN_VIDCORE] CORE DCDC
HW option BIT0~4 [AH16,AH17,AG16,AG17,AJ16]
ADC 1~5
/TU_RESET1
[VINRP_TUNER0_REST]
/TU_RESET2 Tuner
[VINGP_DEMOD_RESET]
AMP_RESET_N
[AI2L_AMP_RESET_N] Audio AMP
PCM_RESET
[GPIO_119_PC_RST]
CI_SLOT CI power PCM_5V_CTL [AIO2R_CMD_VCC_SC] COMP1_DET
enable control [AI3R_COMP1_DET] Component/AV Jack
AV1_CVBS_DET
[AIO1L_AV1_CVBS_DET]
K3Lp
LOCKAn HP_DET
- 20 -
[GPIO_5_VBY_LOCK/EPLOCK] [AIO2L_HP_DET] H/P Jack
Panel
SMARTCARD_PWR_SEL
[VDBSOUT_SC_PWR_SEL] Japan B-CAS
Copyright ©
EPI_GCLK
[GPO_1_TCON_I2C_EN/TCON_2]
PMIC EPI_MCLK [GPIO_4_VBY_HTPD/TCON_14]
PMIC_RESET [GPIO7_PMIC_RESET]
PWM_DIM [GPIO010_PWM_DIM_0]
PWM_DIM2 [GPO011_PWM_DIM_1]
[GPIO_79_USB_PWR0_SD_WP] USB_CTL2
L/DIM_M0_SCLK [GPO012_LD_SPI1_SCK] /USB_OCD2 USB2_2.0 OCP USB2
POWER [RTC_XO_USBOCD0]
L/DIM_M0_MOSI [GPO013_LD_SPI1_SDO]
L/DIM_M0_VS [GPO014_LD_SPI1_SYNC] [GPIO_78_USB_PWR1_SD_CD] USB_CTL3
12507WS-04L
RESET IC POWER_DET
14 [P51/INTP2/SO11] MICOM X-TAL
IC1300 [P124/XT2/EXCLKS] 41
X3000
[P123/XT1] 42
32.768KHz
- 21 -
POWER WAFER MODE_SELECT_PWM1 5 [P31/TI/03/TO03/INTP4] TUxxxx
P1001 36 [P140/PCLBUZ0/INTP6]
RL_ON
EDID_WP HDMI EXT EDID
[P146] 23 IC3401
IR 6 [P75/KR5/INTP9/SCK01/SCL01] BR24G02FJ
EYE_SCL / EYE_SDA 10 [P71/KR1/SI21/SDA21] / 11 [P70/KR0/SIK21/SCL21]
AM_MODE_DET_OLED
BT_WAKEUP_DEVICE 8 [P73/KR3/SO01] [P137/INTP0] 43
Copyright ©
IR / KEY/WIFI/BT WOL/WIFI_POWER_ON 12 [P30/INTP3/RTC1HZ/SCK11/SCL11]] T_CON_SYS_POWER_OFF_OLED
P4000 [P122/X2/EXCLK] 44
COMBO_RESET 24 [P147/ANI18]
BT_WAKEUP_HOST 25 [P27/ANI7] RETENTION_DISABLE
[P121/X1] 45
KEY1 / KEY2 31 [P21/ANI1/AVREFM] / 32 [P20/ANI0/AVREFP]
3D&L_DIM_EN
LED_R 38 [P41/TI07/TO07] [P62] 3 51P VX1 Wafer
GND WIFI_EN
37 [P120/ANI19] * Depending on Model
+3.5V WIFI
DC1_CSB K3L_DDR_0_CON_CS 0
~CS K3L_DDR_0_CON_CS 1
DC1_CSB_1 ~CS
K3L_DDR_0_CON_BA[
DC1_BA [0:2] BA[0:2] BA[0:2]
0:2]
K3L_DDR_0_CLK_ P/N
DC1_CLK / CLKB CK / ~CK CK / ~CK
K3L_DDR_0_CON_CKE
DC1_CKE CKE CKE
K3L_DDR_0_CON_ODT
K3Lp DC1_ODT ODT ODT
K3L_DDR_0_CON_RA 1k ohm
- 22 -
DC1_RAS / CAS SN /CASN RAS/CAS RAS/CAS
K3L_DDR_0_CON_WEN
DC1_WE WEN WEN
Copyright ©
K3L_DDR_0_DQS_0_P/N
DC1_DQS0 / DQS0B LDQS/~LDQS
K3L_DDR_0_DQS_1_P/N
DC1_DQS1 / DQS1B UDQS/~UDQS
K3L_DDR_0_DQS_2_P/N
DC1_DQS2 / DQS2B LDQS/~LDQS
K3L_DDR_0_DQS_3_P/N
DC1_DQS3 / DQS3B UDQS/~UDQS
MICOM
3.5V ST
4A IR h˅
IC2305
RS-232
L311 SoC(STB3V3_1)
12. K3Lp Power Block
FET(Q203) SoC(STB3V3_2)
L6504 Tuner(+3.5V_ST)
1V WOL
1A SoC(Ethernet)
IC2307
FET(Q202) L300 SoC(USB1V0)
L302 SoC(LV1V0)
L305 SoC(HDRX1V0)
D13.2V
1.5V DDR
- 23 -
3.5A SoC(DDR)
IC2303
DDR3(IC401)
L400
DDR3(IC402)
Copyright ©
0.75V, 1.5A DDR VTT
IC410
SoC(CPU1V0)
D1V0
10A
IC2302 SoC(C01V0)
PMIC(IC9200)
SPDIF OUT
Pull up
L306 SoC(D3V3,A3V3)
13. K3Lp Power Block2
FET(Q302) SoC(HDRX3V3)
1.8V
2A L2305 SoC(EMMC1V8)
IC2301 EMMC VCCQ
L6401 BCAS
D13.2V
Demod
Core Tuner Demod
2A
- 24 -
IC6900
*Japan Only
2.5V
2A Tuner 2.5V
IC6800
L6505 Tuner (+3.3V_TU)
Copyright ©
L6503 Tuner (+3.3V_TU)
USB1 OCP
5V NORM
4A USB2 OCP
IC2500
EDID EEPROM
CI OCP & CI IF
400
910
900
800
810
120
121
530
570
411
500
521
700
540
LV1
A9
820
A10
AR2
200P
ARC1
200T
AR1
200A
Optical Sheet
200PPR
POL(Rear)
200SR2
200SR1
Rear Side
200P
200SL2
Ass’y
Panel
200PF
200SL1
200PPF
200PC
POL(Front)
M4*20 4EA
2. Disassemble screw
M3*5.5 13EA
M4*10 6EA
M3*5.5 4EA
6. Disassemble IR
push