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Hardware
Specification and
Interfacing 1
By:
Dr. Ahmed ElShafee
Dr. Ahmed ElShafee, ACU : Spring 2019, ECE404 ‐
1 Microprocessors Design and Interfacing
8088 pin outs and
the pin functions
• The 8088
microprocessor is
housed in a 40‐pin DIP
chip.
• Power is supplied
between the Vcc and
the GND pins. The
voltage at Vcc should be
+5V ±10%.
2 Dr. Ahmed ElShafee, ACU : Spring 2019, ECE404 ‐ Microprocessors Design and Interfacing
• The clock at the CLK pin
provides the basic
timing to the
microprocessor. The
clock must have a 33%
duty cycle.
• The microprocessor is
reset if the RESET pin is
held high for at least
four clock periods..
3 Dr. Ahmed ElShafee, ACU : Spring 2019, ECE404 ‐ Microprocessors Design and Interfacing
• The READY signal is
used to insert wait
states, to enable the
communication
between the
microprocessor and
slower memory or
peripheral devices
4 Dr. Ahmed ElShafee, ACU : Spring 2019, ECE404 ‐ Microprocessors Design and Interfacing
• Interrupts are
supported by the
signals NMI (Non‐
Maskable Interrupt),
INTR (Interrupt
Request) and INTA
(Interrupt
Acknowledge).
• The HOLD and HLDA
(Hold Acknowledge)
signals are used to
enable DMA (Direct
Memory Access).
5 Dr. Ahmed ElShafee, ACU : Spring 2019, ECE404 ‐ Microprocessors Design and Interfacing
• The 8088 can operate in
a minimum mode
(MN/MX=1) or in a
maximum mode
(MN/MX=0). The
maximum mode is used
in multiprocessor
applications or when a
math coprocessor is
used.
• The 8088 has a 20 bit
address bus and an 8‐
bit data bus.
6 Dr. Ahmed ElShafee, ACU : Spring 2019, ECE404 ‐ Microprocessors Design and Interfacing
• The address lines
A0..A7 are multiplexed
with the data lines
D0..D7 on the pins
AD0..AD7.
• The address lines
A16..A19 are
multiplexed with status
lines.
• If the ALE (Address
Latch Enable) signal is
activated (logic 1), the
7
AD0..AD7 pins carry the
Dr. Ahmed ElShafee, ACU : Spring 2019, ECE404 ‐ Microprocessors Design and Interfacing
addresses A0..A7.
• The DEN (Data Enable)
signal is used to enable
the external data bus
buffers.
• The DT/R (Data
Transmit/Receive)
signal is used to specify
the direction of the
external data bus
buffers.
8 Dr. Ahmed ElShafee, ACU : Spring 2019, ECE404 ‐ Microprocessors Design and Interfacing
• The IO/M signal is used
to select between I/O
and memory devices.
• The RD and WR signals
are used in the Read
and Write cycles.
9 Dr. Ahmed ElShafee, ACU : Spring 2019, ECE404 ‐ Microprocessors Design and Interfacing
• Most of the 8086
pins/signals function
the same way as the
8088 pins/signals.
• The main differences
between the 8088 and
the 8086 are:
– The 8086 has a 16‐bit
data bus.
– The address lines
A0..A15 are
multiplexed with the
data lines D0..D15 on
the pins AD0..AD15.
10 Dr. Ahmed ElShafee, ACU : Spring 2019, ECE404 ‐ Microprocessors Design and Interfacing
– The BHE (Bus High
Enable) signal is used to
enable the most
significant data bus bits
(D8 ..D15) during a read
or write operation.
– The IO/M signal is
inverted in the 8086
microprocessor, that is
a memory is enabled if
the IO/M is high, while
an I/O device is
enabled if the IO/M
signal is low.
11 Dr. Ahmed ElShafee, ACU : Spring 2019, ECE404 ‐ Microprocessors Design and Interfacing
Thanks,..
See you next week (ISA),…
Dr. Ahmed ElShafee, ACU : Spring 2019, ECE404 ‐
12
Microprocessors Design and Interfacing