2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems (COMCAS)

Microstrip Non-Foster Circuit High Efficiency High Power Class-J

GaN HEMT Amplifier
Charles Nwakanma Akwuruoha, Zhirun Hu and Yanely Jimenez Licea

School of Electrical and Electronic Engineering, The University of Manchester, Manchester, M13 9PL,
United Kingdom. email: charlesnwakanma.akwuruoha@manchester.ac.uk, Z.Hu@manchester.ac.uk

This paper proposes Microstrip non-Foster circuit (NFC) NFC PAs face challenges such as instability, noise and
enhanced high efficiency high power class-J GaN HEMT power handling capability and therefore requires detail
(gallium nitride high electron mobility transistor) amplifier. The stability analysis and informed choice of PA topology. In
NFC enhances the performance of the power amplifier (PA) by
cancelling the power transistor’s input parasitic capacitance. The this paper, the use of NFC to sustain the 200 MHz
PA was designed based on Cree’s CGHV40030FP GaN HEMT bandwidth and enhance such performance of high power
biased with drain supply voltage of 50 V at quiescent drain-to- Class-J GaN HEMT PA as drain efficiency and PAE is
source current (IDSq) of 15 mA. The NFC is part of the input proposed.
matching network and contains two GaN HEMTs biased with Class-J PA was first proposed by Cripps [8] and aims to
drain supply voltage of 20 V at IDSq of 3 mA. The PA operates
from 2.0 to 2.2 GHz. The NFC negative capacitance at 2.1GHz mitigate the bandwidth limitations of Class AB or B PA by
center frequency stood at -2.4 pF. The NFC PA has output power minimizing the effects of transistor output parasitic
of 43.9 dBm (24.5 W), 69.3% drain efficiency, 66.4% power capacitance on the fundamental load. This often results in
added efficiency (PAE) and transducer power gain of 11.9 dB. sustenance of PA performance at the level of Classes AB or
Index Terms — Class-J, high efficiency high power, B. Class-J PA design using packaged GaN HEMT transistor
Microstrip non-Foster circuit, negative capacitance, GaN have been reported in [9]. However, the reported class-J PA
HEMT power amplifier.
did not consider the use of NFC to cancel the input parasitic
capacitance of the power transistor to enhance the PA
I. INTRODUCTION performance as proposed here. The combination of Class-J
topology and NFC in this work is aimed at counteracting the
Non-Foster circuits find application in microwave circuits
effects of transistor input and output parasitic capacitances in
requiring the cancellation of parasitic capacitance and/or
the PA thereby improving performance. This paper is
inductance to improve circuit performance and enhance
structured as follows. Class- theory is discussed. Section III
bandwidth. The non-Foster circuits violate Foster theorem.
treats NFC theory and design. Section IV discusses the
R. M. Foster in his early paper [1] described Foster circuits
proposed PA circuit design and results. Section V concludes
as those which have positive reactance-frequency slope as
the paper.
well as reflection coefficient which move in clockwise
direction with respect to frequency on Smith chart. The
circuit elements which obey Foster theorem such as positive II. CLASS-J THEORY
capacitor and inductor are referred to as Foster elements.
Class-J power amplifier aims to mitigate the effect of
Non-Foster circuit elements include negative capacitor and
transistor output capacitance (drain-to-source capacitance)
inductor. The non-Foster elements have negative reactance-
on the fundamental load of the PA by the applying reactive
frequency slope as well as reflection coefficient which
terminations at the fundamental and second harmonic
moves in a counter clockwise direction with respect to
thereby changing it from resistive to reactive regime [8]- [9].
frequency on Smith chart. Non-Foster circuits are classified
Class-J theory assumes that higher order even harmonics
into negative impedance converters (NIC) and negative
than the second harmonic do not exist while the third
impedance inverters (NII) [2]. The NIC provides the
harmonic is considered short. The output current and voltage
negative capacitance required to cancel the parasitic
are 45o out of phase. The fundamental and second harmonic
capacitance of the transistor. The implementation of NIC
components of impedance Zfund and Zsec are respectively
using active circuit was first proposed by Linvill [3]. The
related to the load resistance (Rload) by
NIC was described as four-pole network such that the input
Zfund = Rload + j*Rload (1)
current is equal to the output current while having an input
voltage equal to the negative of the output voltage. NIC was
Zsec = - j*3π/8 * Rload (2)
classified as open circuit stable and short circuit stable. In
this paper, NIC will hereafter be referred to as NFC. NFC
have reportedly been used to enhance the bandwidth of
antennas [4]- [5] and Doherty power amplifier (DPA) [6].
NFC was also used as the inter-stage matching network of
GaN pHEMT PA [7].

978-1-5386-3169-0/17/$31.00 ©2017 IEEE

 2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems (COMCAS)

III. NFC THEORY AND DESIGN

A. Theory

The derivatives of reactance (X) and susceptance (B) of

VGS starts from -3 V to 0 V with step of 0.1 V
Foster circuit (FC) and non-Foster circuit (NFC) with ω are 2.5

given by [10]
2.0

VGS NFC:
dXFC / dω > 0 and dBFC / dω > 0 (4) 1.5
VDS = 20 V

IDS (A)
IDS = 3 mA
VGS = -2.9 V
dXNFC / dω < 0 and dBNFC / dω < 0 (5) 1.0
PA:
VDS = 50 V
0.5 IDS = 15 mA
B. Design VGS = -2.9 V

In accordance with (5), the NFC design must provide the 0.0
0 10 20 30 40 50 60
negative reactance-frequency slope to achieve the effective VDS (V)

negative capacitance required to cancel the transistor

parasitic capacitance. The NFC schematic circuit is shown in
Fig. 2. NFC and PA bias points
Fig. 1. The NFC was designed based on Cree’s packaged
transistor CGHV40030FP biased with drain supply voltage
of 20V at quiescent drain-to-source current of 3mA. The bias
points of the GaN HEMTs in the NFC and PA are shown in 45
75
Fig. 2. The NFC consists mainly of distributed transmission 40

lines, and few inductors and capacitors. The dimension of 35 70

the NFC transmission lines (in mm) are shown as

Magnitude of ZIN (Ω)

Imaginary ZIN (Ω)

30
width/length. The NFC provides negative reactance- 65
25
frequency slope as well as negative capacitance across the Imaginary ZIN
Magnitude ZIN
20
200 MHz bandwidth from 2.0 to 2.2 GHz as shown in the 60

magnitude and imaginary part of the input impedance and 15

55
effective capacitance in Figs. 3 and 4, respectively. The 10

effective negative capacitance of the NFC stood at -1.9 to - 2.00 2.05 2.10 2.15 2.20
Frequency (GHz)
6.9 pF from 2.0 to 2.2 GHz. To ensure that the NFC
forestall oscillations, the NFC was stabilized, simulated and Fig. 3. Magnitude and Imaginary part of input
confirmed to be unconditionally stable before before impedance
introducing putting the NFC in the input network of the
class-J PA.
-1

-2
Effective Capacitance (pF)

-3 C

-4

-5

-6

-7

2.00 2.05 2.10 2.15 2.20

Frequency (GHz)

Fig. 4. Effective capacitance

Fig. 1. NFC schematic circuit

 2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems (COMCAS)

50 V
Width / Length (mm)
-2.9 V
εr - 4.6 148 pF

Thickness = 1.6mm 148 pF 1.6 / 1.9

2 / 10 200 nH

200 nH
0.8 / 2.5
1.8 / 3.8
1.5 / 2.5 0.5 pF
1.5 / 1.5
25 Ω 1.5 / 3.7
NFC
200 pF 140 pF
1.5 / 1.5 1.5 / 2.5
10 / 1.2 8.5 pF 1.5 / 2.5
1.6 / 1.7
14 pF 10 / 1.3 28.5 / 1.3 2.3 / 2.5
9 / 6.1
50 Ω
10 / 1.2 50Ω 0.7 / 1.3 30 / 10 0.3 / 1.2 0.3 / 1.2
50 Ω 0.3 / 1.5

Fig. 5. PA schematic circuit

greater than unity and positive, respectively. The

Nyquist stability criterion shown in Fig. 7, indicates
IV. PA CIRCUIT DESIGN AND PERFORMANCE
unconditional stability as the input return loss did not
encircle the origin [12].
A. Circuit design
1.7 1.1
The PA schematic circuit is shown in Fig. 5. The PA 1.6
1.0
was designed based on Cree’s packaged GaN HEMT 1.5 Stability Factor

(CGHV40030FP) biased with drain supply voltage of Stability Measure 0.9

Stability Measure
Stability Factor

1.4
50V at quiescent drain-to-source current of 15 mA as 1.3
0.8

shown in the bias points in Fig. 1. Source and Load pull 1.2
0.7

simulations were used to obtain the respective source 1.1

0.6

and load impedances required to synthesize the input 1.0 0.5

and output matching networks to achieve maximum 0.9 0.4

output power. The NFC forms part of the input network 2.00 2.05 2.10 2.15 2.20

Frequency (GHz)
of the PA. The main components of the PA are
distributed transmission lines and lumped components. Fig. 6. Stability Factor and Stability Measure
The transmission lines width / length (mm) are shown in
the schematic. The PA source and load impedances
stood at 50Ω. The PA was driven with an input power of
32 dBm at 2.1 GHz.

B. Performance

The performance of the PA in this paper will be

discussed in accordance with small signal stability result
as well as large signal simulation result.

(a) Small Signal Simulation

Small signal S-parameter simulation was carried out to Fig. 7. Nyquist Stability Criterion
determine the stability of the PA. The PA was found to
II. Large Signal Simulation
be unconditionally stable as shown in Fig. 6. The
stability considerations in this work are two-fold: the
One-tone harmonic balance simulation carried out on
Rollet stability factor /measure [11] and Nyquist
the PA in two instances. In the first instance, the input
stability criterion. The stability factor and measure are
 2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems (COMCAS)

power was swept from 0 to 32 dBm at 2.1 GHz center TABLE. I

frequency and the results obtained are shown in Figs. 8
and 9. shown in Figs. 8 and 9. The result obtained in Ref. Topology Frequency PAE Pout Gain
the first instance indicates that the PA has 69.8% drain (GHz) (%) dBm (dB)
efficiency, 66.75% PAE, 43.9 dBm (24.5 W) output [6] DPA 1.9-2.2 68 30 -
power and power gain of 11.9 dB. In the second [7] NMPA 6-18 21 37.5 19.1
instance, the frequency was swept from 2.0 to 2.2 GHz [This Class-J 2.0-2.2 66.7 43.9 11.9
at input power of 32 dBm. The result obtained is shown Work]
in Fig. 10 wherein between 2.0 to 2.2 GHz frequency
range, the PA has the following range of results. 68.7 to
60.3% drain efficiency, 66.1 to 55.5% PAE, 44.6 to
V. CONCLUSION
43.9 dBm of output power, and 12.6 to 10.3 dB
transducer power gain. A comparison of the PA A non-Foster circuit enhanced high power class-J GaN
performance with other reported NFC PAs, indicates HEMT amplifier has been proposed, designed and
that the PA compares well with the reported state-of- simulated. The results obtained indicate that high
the-art values as shown in Table. I. efficiency, high output power and gain can be achieved
through the addition of non-Foster circuit to the input
matching network of Class-J power amplifier.
80 17

70
16
60 ACKNOWLEDGEMENT
Drain Efficiency (%)

15
50
The Authors are grateful to Tertiary Education Trust Fund
Gain (dB)

40 14
of Nigeria for sponsoring this work. We also wish to thank
30 DE
Gain 13 Cree Incorporations for providing the model used in this
20
12
work.
10

0 11
0 5 10 15 20 25 30
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PIN (dBm)

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Frequency (GHz)

Fig. 10. Drain Efficiency, output power, PAE and Gain

versus Frequency