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B4-202 CIGRE 2016

Blocking Reactor as Part of an SVC System – A Novel Concept for Harmonics Reduction
and Lowered Operational Losses

J. Aho, S. Kuusinen, T. Nissinen, A. Kahkonen

GE Grid Solutions

M. Spinella, R. Campos
GE Grid Solutions

M. Correia Lima, H. Salvador


A static var compensator (SVC) uses a thyristor controlled reactor (TCR) as an active dynamic element
for controlling reactive power and stabilizing voltage. A novel SVC implementation at Chesf - a Brazilian
transmission and generation utility grid - is described in this document. The operation of a TCR causes
certain drawbacks, the impact of which can be efficiently reduced by the use of the blocking reactor concept
(patent pending). The term “blocking reactor” refers to a set up in which a reactor with relatively high
inductance is connected to the TCR terminals before the medium voltage SVC busbar. The impedance
towards the power grid at the connection point of the TCR is thus increased.

The concept is favourable when optimizing the basic insulation level of the medium voltage components.
In addition, voltage stress on the thyristor valves is lowered at high inductive power ratings, reducing the
number of required series-connected thyristors in the valves. This in turn reduces semiconductor losses. The
blocking reactors reduce the share of harmonic currents generated by the TCRs entering into the grid. As a
result, blocking reactors improve harmonic performance compared to the traditional SVC circuit.

Tauá II SVC (-45 ...+90 Mvar, 230 kV) is used as a case study in which the performance evaluation was
completed via real time digital simulations (RTDS). Simulations were used for tuning the control system
and verifying performance. The basic results are presented in this paper. Due to the low short-circuit levels
at the SVC point of common coupling (PCC) and the presence of resonances associated to the harmonics
higher than the eleventh order, a configuration featuring a series blocking reactor at the SVC medium
voltage sector was selected. The simulations show that the system fulfils the specified requirements.
In addition to SVC step response analysis, tests included the protection functionality, checking the open/
closed loop control systems, and SVC performance during large disturbances of the electrical network.
The test results verify that Tauá II SVC fully complies with the specified requirements and, despite the
rapid technological progress based on voltage source converter (VSC) technology, the use of conventional
FACTS devices still provides satisfactory performance and competitive cost in terms of investment and

Static Var Compensator, SVC, Blocking Reactor, Grid Stability, Automatic Gain Controller, Voltage
Controller, RTDS, Real Time Digital Simulations


The purpose of a SVC is to compensate reactive power or stabilize voltage. A large variety of SVC-topologies
are available including thyristor controlled reactors (TCRs), thyristor switched reactors (TSRs) and even
mechanically switched reactors (MSRs), as well as thyristor switched capacitors (TSCs) or mechanically
switched capacitors (MSCs). This study concentrates on TCRs with filter capacitor banks. In addition to
being a harmonic filter, a MSC acts as a reactive power source. Usually a utility SVC is connected to a
selected point on the transmission grid using a step-down transformer. The step-down transformer typically
has a reactance value in the range 12% to 20%, with a secondary (MV) voltage between 10 and 35 kV.

Figure 1: A single line diagram example of a utility SVC network (Tauá II SVC).
An operating TCR always produces harmonics due to the control of thyristors. While the background
network might also be a harmonic source, usually the TCR is the dominant one. The order of harmonics
depends on the firing angle of the thyristors. The harmonics generated by the TCR cannot be fully filtered,
so a TCR increases the harmonic level at the PCC. One method to reduce the harmonics caused by the TCR
at the PCC is to increase the impedance between the SVC busbar and the PCC. The step-down transformer
has built-in impedance, so adding reactance in series with this transformer increases overall impedance.
Reactance of a transformer can be augmented by increasing the distance between the windings around
the same poles, but the size of the transformer is smaller if an additional external reactor is used. This
external reactor is the blocking reactor. Figure 1 shows the single line diagram of Tauá II SVC. Particular
component values have been added to the main page of the control human machine interface (HMI) to
improve visualization of key elements.

The blocking reactor is connected between SVC BUS 1 and SVC BUS 2. Fixed capacitor banks FC1 and
FC2 are tuned to filter 5th and 7th harmonic current respectively generated by the TCR. TSC1 and TSC2 are
not tuned and are not participating in filtering the TCR harmonics. Thus they are connected to SVC BUS 1.
The reactance of the blocking reactor is set in the same range as the reactance of the step down transformer.


Voltage level at SVC bus optimized to the operation point of TCR

The TCR of the Tauá II SVC installation is rated 97 Mvar, 15 kV. The nominal delta connected valve
current is thus 2.156 kA and phase current 4 kA. Figure 1 shows that the sum of reactance (transformer and
blocking reactor) is 0.826 Ω. The voltage at the SVC2 busbar is lowered by 4 kA x 0.826 Ω = 3.08 kV when
the TCR is operating at maximum power and the earliest possible thyristor firing angle is applied. The stress
on the thyristor valves can thus be reduced for the most critical operating point. This reduces the number of
series connected thyristors needed, which reduces losses.

Fault current level at SVC BUS 2 (Figure 1)

As a result of the blocking reactor reactance, the fault current level at the SVC2 busbar is reduced by
50% from approximately 25 kA to 12 kA as compared to the SVC1 busbar. This beneficially affects the
component dimensioning of the 15 kV components related to the SVC2 bus.

Reduction of harmonic currents entering the grid from the TCR

Harmonics generated in TCRs are partly passed through the harmonic filters and into the background
network. The series-connected blocking reactor impedance efficiently reduces the amount of harmonics
passing through to the background network. Voltage harmonics at the PCC depend on the impedance
ratios; engineering parameters affecting harmonics quantities include the SVC filter bank configuration
and blocking reactor inductance. Standard design transformers are preferred for their cost control and short
delivery time. Bespoke designs will increase both, so from a commercial point of view, it is not practical to
integrate the inductance of the blocking reactor into the SVC transformer.

Optionally, some filter banks may be connected to the SVC1 bus and tuned to particular harmonic frequencies
that appear in the background network. In this example, the TSCs are connected to SVC1 BUS as they are
not filtering particular harmonics. In addition, the voltage level variation on this busbar is smaller than on
the SVC2 BUS, providing a more stable capacitive output power.

The paths of harmonic currents generated by the TCR are shown on the left hand side of Figure 2.
Blocking Transformer
I harmonics
Source Reactor

HF1 HF2 TSC1 TSC2 Grid

Figure 2: Paths of harmonic currents generated by the TCR and the content of different order harmonics as
a function of the firing angle.

The curves on the right hand side show the relative harmonic current values of TCR current as per unit
values related to fundamental current as a function of firing angle of the thyristor valve. The tuning of filter
banks and dimensioning of the main reactor reactance gives several options to match the SVC system to the
harmonics requirements at the PCC.

Figure 3 shows a simulated example of the reduction of the 7th and 13th harmonic currents at the PCC in a
case where the filter capacitor banks are not tuned to these harmonic frequencies.
8.0 1.4
7th harmonic current at PCC, one phase 1.3
13th harmonic current at PCC, one phase
6.0 1.1
With Main Reactor 1.0
IRMS abs h07 [A]

IRMS abs h07 [A]

Without Main Reactor With Main Reactor
4.0 0.7
0.5 Without Main Reactor
1.0 0.2
0.0 0.0
3:40 3:50 4:00 4:10 4:20 4:30 4:40 4:50 5:00 5:10 5:20 5:50 6:00 6:10 6:20 6:30 6:40 6:50 7:00 7:10 7:20
Minute:Second Minute:Second

Figure 3: Graphs showing typical reduction of the share of TCR harmonics passing to the PCC.


Planning studies conducted by EPE, the Brazilian Government Energy Research Company, defined the
installation in Tauá II substation of an SVC rated (-45 to +90 Mvar / 230 kV). The purpose of the installation
is to provide voltage control in steady state, dynamic and transient conditions, ensuring compliance with
EPE planning criteria and National System Operator network procedures. The SVC is needed particularly
during under-voltage conditions in the power grid resulting from 230 kV line outages.

Power grid evolution for Tauá II substation power distribution area presents low short-circuit levels at point
of common coupling (PCC). This produces relationships between the SVC reactive power range and PCC
short circuit levels ranging from 0.50 (in the study’s initial year of 2015, degraded network) to 0.20 (2022
with the complete network) short circuit ratio (SCR). System studies showed that high values of harmonics
will appear at the PCC if a traditional SVC configuration is used. There was also the risk of interactions at
harmonics in the order above 11th. The system study findings led to the adoption of the blocking reactor
solution, which includes the connection of a blocking series reactor between substation main busbar (SVC
BUS 1) and SVC busbar (SVC BUS 2). (Figure 1).
Another option might have been to deploy a VSC-based STATCOM which is associated with high technical
performance but also high operational losses. In this case, a STATCOM solution would have exceeded the
specified maximum accepted losses. In contrast, losses in the selected SVC solution are below accepted
maximum values, especially when applying blocking reactors.1

In this context, real time digital simulator studies were conducted to evaluate the Tauá II SVC performance.
For this purpose, actual SVC cubicles and HMIs were connected to RTDS, where the electrical power
system and other SVC power components (such as the stepdown transformer, thyristor controlled reactors,
filters and thyristor valves) were modeled.

These tests included checking the functionality of protection and open / closed loop control systems in
addition to SVC step response analysis and performance during strong electrical network disturbances. The
test results are presented in this paper.


Tauá II SVC has a 230/15 kV, 90 MVA (3x30 MVA) step-down transformer. The 15 kV busbar is split into
two parts separated by the blocking reactor. Two thyristor switched capacitors are connected to the busbar
on the left side of the reactor. One thyristor controlled reactor and two single tuned filters (STF5 and STF7)
tuned to 5th and 7th order harmonics, respectively, are connected to the right side of the reactor.

During the studies performed to design the Tauá II SVC main circuit, resonances related to harmonic orders
11th, 13th and higher associated with this equipment and the electrical power grid were identified, leading
to harmonic distortion levels above those defined in the specifications.2 Mitigation of such harmonics should
require the installation of additional high order filters, which should in turn lead to increased losses and a
reduction in availability rates due to the increase in installed components. The series reactor was proposed
instead, whose impedance increases with frequency, acting as a blocking reactor and providing adequate
damping to high order harmonics.

With this strategy, the specification requirements were met by Tauá II SVC, reducing the number of
necessary filters as well as their ratings, which contributed to a reduction in overall losses. This solution,
consisting of increasing the impedance between the SVC and the power network, was initially described
in “Main Reactor Concept – a Cost and Performance Efficient SVC Configuration”3, which describes how
the introduction of the blocking series reactor made the use of the traditional SVC technology viable,
considering these constraints at the connection point:
• Reduction in short-circuit levels at the PCC from 725 MVA to 267 MVA in degraded operating
conditions of the power grid
• Resonances between the SVC and the power grid associated with high order harmonics
• Reduced values of specified maximum losses

Furthermore, the introduction of the series reactor produced the following advantages regarding the Tauá
II SVC main circuit design:
• Reduction of the number of series-connected thyristors used in controlled reactors valves
• Reduction of current requirements for TCRs
• Reduction of short-circuit requirements at the SVC medium voltage sector
• Reduction of total SVC losses

For these reasons, the blocking series reactor allows the use of traditional SVC technology at connection
points characterized by low short-circuit levels in a project with strict requirements for maximum losses
that negated the use of traditional VSC technology.

The closed loop control of Tauá II SVC is based on positive sequence voltages and the reactive current
component measurements. Instantaneous voltage and current signals are filtered with a similar set of discrete
infinite impulse response filters tuned for 3rd, 5th and 7th order harmonics. Signals are then converted to
alpha beta domain from which the voltage signal is processed to positive and negative sequence components
where the current signal is converted to D and Q components (rotating coordination). The positive sequence
voltage vector length is fed into averaging and second harmonic filters as well as the reactive component
of the SVC current. The current component is then scaled with the slope and subtracted from the measured
voltage along with the reference set-point. This forms the signal to be fed to the voltage controller. The
function blocks and connections are shown in Figure 3.

Figure 4: Tauá II SVC: Main controller input signal calculation.

As Figure 4 shows, signal VERROR is applied to the set of gains described below. The first gain (block
SCL – gain optimization) corrects the error signal based on the dynamic short-circuit level measured at the
SVC coupling point with the power network (230 kV PCC). This allows the system to achieve the specified
performance parameters defined for the step response test as follows:
• Maximum percentual overshoot of 30%
• Maximum rise time of 33 ms
• Maximum settling time of 100 ms

The gain optimization algorithm is based on the scheduled application of a small disturbance in the
SVC output signal and the measurement of the relationship between voltage and reactive power errors
corresponding to this disturbance. This procedure is known as the “gain test.”

Figure 5: Tauá II SVC: Closed loop control system final stage.

Based on the magnitude and polarity of the SVC output during the gain test, the SCL gain is increased
or decreased. The controller is constructed from proportional and integral paths for which the gains are
adjustable. The controller operation is bypassed in case the control system detects under-voltage at the point
of the connection, resetting the SVC output to zero until the fault has been cleared from the system.

The SVC susceptance request (BSVC) is then reduced to TCR and TSC susceptance requests based on the
connected shunt components. The TSC susceptance is determined using the switching limits given to each
component. The TCR firing angle is linearized to the firing angle before sending it to the thyristor valve.


Figure 7 shows the controls screen of the HMI when setting parameter values and reading control values.

Figure 6: Tauá II SVC: Closed loop control system HMI.

6.1 External Shunt Devices Switching

Tauá II SVC is able to control the operation of up to eight previously selected external elements, such as
shunt reactors and capacitors connected to its 230 kV sector. Shunt reactors are switched on if the SVC
output susceptance reaches its inductive limit for a predetermined time interval, and are switched off if
this susceptance becomes less than this limit. Similarly, shunt capacitors are inserted if the SVC output
susceptance reaches its capacitive limit for a predetermined time interval and switched off when the signal
becomes smaller than this limit.

Currently in the Tauá II substation, there is one 230 kV shunt reactor in the aforementioned scheme. As
shown in Figure 6, the activation or deactivation of this scheme can be made through the HMI.

6.2 Under-Voltage Blocking Scheme

The under-voltage blocking scheme requires Tauá II SVC to operate in 0 Mvar if its terminal voltage drops
below a preset value for a predetermined time interval. For this purpose, both TSCs are blocked and the
TCR is used to compensate the susceptance of both filters, resulting in 0 Mvar at the high voltage side.
The main goal of this function is to prevent SVC operation in strongly capacitive points at fault clearing,
contributing to increase the associated over-voltages, due to the high error values developed at its main
control loop input during the fault.

Detection of the under-voltage blocking scheme operating level is achieved using the 230 kV voltage
positive sequence component for three-phase balanced faults and the minimum true RMS measurement
value of this voltage for unbalanced faults. Tauá II SVC is released to voltage control mode after its terminal
voltage reaches a value higher than the blocking level. To ensure that the thyristor valve firing is always
carried out safely, an under-voltage blocking scheme at 15 kV sector to block the TSCs and TCR when this
voltage drops below 0.6 pu.

6.3 Degraded Modes Operation

Tauá II SVC presents the possibility of automatic operation in degraded modes during the outage of one
or two TSCs, creating a high degree of flexibility and availability to this equipment operation. A valid
degraded mode means a configuration where, although the output power limits are reduced, it is possible
to continuously vary the SVC output power, keeping the harmonics levels below the specified limits. Thus,
a valid degraded mode requires the presence of a TCR and filters. Selection of valid degraded modes is
performed automatically by the SVC control system through the 230 kV circuit breaker and 15 kV motor
switches. This way, if an invalid degraded mode is produced, the SVC automatic reclose is blocked by
protection. This function can be enabled or disabled through the HMI.


7.1 Preliminary Tests

The initial stage of the tests was carried out with simplified power grid modeling, using Thévenin equivalent
sources and impedances corresponding to the maximum and minimum short circuit levels at the PCC and
defined by the specification. Figure 7 presents a single line diagram of the network as it was in the study’s
initial year of 2015, with the indication of the above mentioned equivalent sources. Based on information
from the EPE, the Brazilian Government Energy Research Company, the following values were considered:
• Minimum short-circuit level (267 MVA) corresponding to year 2015, minimum generation, degraded
• Maximum short-circuit level (725 MVA) corresponding to year 2022, maximum generation, complete
power grid configuration

The tests started by checking the performance of Tauá II SVC open loop control and protection functions,
such as start / normal stop, shutdown by protection trip, control modes switching, redundant control systems
switching, and automatic auto reclose. In addition, the following protection functions associated with the
SVC closed loop control system were checked:
• High voltage side under-voltage blocking scheme
• SVC output susceptance monitoring
• Forced switching from manual control mode to voltage control mode

SVC voltage/current and voltage/reactive power characteristic curves seen at the 230 kV voltage sector
were also determined. Gain optimizer and gain controller functions were tested.
PIC02T5 13.8
-30.0 8265 MLG 12.3 DT5
PICOS 69 0.0 MLG 230KV MLG 500KV
8262 7932 7920 7921

30.0 0.0
8260 MLG 12.3 YT5 7908
TAD-TAUA 230 0.0
30.0 7995 8345

30.0 7996

-30.0 0.0 TAUA CE 13


PIC04T2 13.8 MLG 05T1 13.

8263 -30.0 7948 0.0

SJI 69 SJI 230
8256 8255

SJI 500

-30.0 G
SJI05T1 13.8

SJI02T5 13.8

Figure 7: Single line diagram of the represented complete network as of 2015.

7.2 Step Response

During the step response tests, the specified performance parameters for all short-circuit levels calculated
in the PCC defined during design stages should be achieved. This way, the step response tests were carried
out for minimum and maximum short-circuit conditions calculated at the PCC, varying the slope values,
step magnitude and reference voltage starting values.

Initially, a simplified representation of the electrical network through the use of Thévenin equivalent sources
and impedances was used, resulting in a minimum short-circuit level of 267 MVA and a maximum level
of 725 MVA. Step response tests were performed considering a power grid with detailed modelling for the
initial (2015) and final (2022) years. During these tests, SVC Milagres (-70...+100 Mvar, 230 kV, MLG
abbreviation according to Figure 7) was considered to be present and operates with fixed gain in manual
and voltage control modes (Figure 6).

7.3 Performance Under Large Disturbances

The performance of Tauá II SVC during the large network disturbances detailed below was analyzed.
Complete grid models of years 2015 and 2022 (planned) were used in analysis and real time simulations.
• 230/69 kV, 100 MVA transformer energization in Tauá II substation and 230/69 kV, 50 MVA in Picos substation
• 500/230 kV, 600 MVA transformer energization in Milagres substation
• Single and three-phase faults application in Milagres - Tauá II, Picos - Tauá II, Picos - S.J. Piauí (230
kV) and Milagres - S.J. Piauí 500 kV transmission lines (Figure 6), cleared in 100 ms with line opening,
with the under-voltage blocking scheme enabled and disabled, varying the fault application terminal
• Single and three-phase faults application in the Tauá II 69kV busbar cleared in 100 ms with total load
rejection, considering Tauá II SVC under-voltage blocking scheme enabled and disabled.
The Tauá II SVC 230kV under-voltage blocking scheme was adjusted to block the SVC for 0.7 pu voltage dips
with a 5 ms delay for blocking and releasing. Figure 8 presents the RTDS simulation of a single-phase fault
on the Milagres - Tauá II 230 kV transmission line that cleared in 100 ms with line opening, Tauá II terminal,
year 2022. In these conditions, Milagres SVC operates in voltage control mode with a fixed gain value.

Immediately after applying a fault, Tauá II SVC tries to reach its capacitive limit switching in TSC1 and
reducing TCR current. However, the voltage dip due to the fault leads to operation of the 230 kV under-
voltage blocking scheme, forcing this equipment to operate in 0 Mvar through TSC1 blocking. (TSC2 was
already blocked just before fault application and remains in this state.) Then the Tauá II SVC 15 kV under-
voltage blocking scheme is activated, blocking TSC1 and TCR, keeping only the filters connected.

Signal 1: 230 kV busbar voltages

Signal 2: SVC 15 kV busbar voltages

Signal 3: SVC 230 kV currents

Signal 4: SVC reactive power measurements

Signal 5: Power grid frequency

Signal 6: SVC susceptance

Signal 7: TCR firing angle (degrees from voltage zero

crossing susceptance

Signal 8: SVC gain, per unit value

Time scale: seconds

Figure 8: Milagres - Tauá II 230kV transmission line single phase fault, Tauá II terminal, year 2022.

At fault clearing with Milagres - Tauá II 230kV line opening, TSC1 and 2 are switched in as an attempt to
fight against the over-voltages associated with this event. These over-voltages also cause TCR switching.
The interaction between the TCR, TSC1 and TSC2 produces oscillations at the Tauá II SVC output signal,
leading to gain supervisor operation (block KGC of Figure 4), which reduces the SVC gain until these
oscillations are satisfactorily damped. This control loop monitors the Tauá II SVC control output signal and
reduces its gain if oscillations higher than a preset value are detected for a time interval defined during the
design stages.

During the fault, Milagres SVC moves to a strongly capacitive operating point, as the reduction at its
terminal voltage does not cause under-voltage blocking scheme operation. With Tauá II and Milagres SVCs
performance described herein, a stable steady state is reached after fault clearing, with a voltage level in the
Tauá II 230 kV busbar slightly lower than its pre-fault value due to the Milagres - Tauá II 230 kV line opening.

The use of a blocking reactor in an SVC scheme connected between the TCR and the busbar next to a
step-down transformer results in several economical, engineering and performance related advantages as
compared to a traditional SVC scheme without a main reactor. Advantages include reduced losses, improved
harmonic performance, partly reduced basic insulation level requirement, and reduced operational losses.

The blocking reactor concept was applied in the Tauá II SVC project. The main performance tests results
conducted in real time simulations are described in this work. Performance analysis during both small and
large disturbances is considered. Tauá II SVC performed satisfactorily, meeting the specification requirements
in all conditions analyzed in the factory acceptance tests. The blocking series reactor configuration used in
the Tauá II SVC example demonstrates the viability of applying traditional SVC technology based on line
commutated thyristor controlled devices in points characterized by low short-circuit levels.


[1] G. Pilz, D. Langner, M. Battermann, H. Schmitt. “Line - or self-commutated Static Var Compensators
(SVC) – Comparison and application with respect to changed system conditions” (Cigré Colloquium
HVDC and Power Electronics to Boost Network Performance, October 2rd-3th 2013, Brasil).

[2] Tauá SVC (+90Mvar cap, -45Mvar ind, 230kV, 60Hz) Study of SVC Main Equipment, Version 2,
26.08.2013, Tampere, Finland.

[3] J. Aho, N. Thomson, A. Kähkönen, K. Kaasalainen, “Main Reactor Concept – a Cost and Performance
Efficient SVC Configuration”, (The 16th European Conference on Power Electronics Application –
EPE’14 ECCE Europe Procedures, Lappeenranta, Finland, August 26th to 28th 2014).