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1 2 3 4 5 6 7 8

PCB STACK UP
LX6/7 (Liverpool) BLOCK DIAGRAM 01
6L Dis.
VRAM DDR3*8
DDR3 800,1066,1333 MT/s (512Mb,1Gb,2Gb)
LAYER 1 : TOP DDR3-SODIMM1
A
LAYER 2 : SGND PAGE 12
Intel Clarksfield PAGE 19-20 A

LAYER 3 : IN1(High) Arrandale HDMI CON HDMI


LAYER 4 : IN2(Low) HDMI (1920*1200)
DDR3 800,1066,1333 MT/s
DDR3-SODIMM2 CPU 45Watt ATI Park XT PAGE 31
LAYER 5 : SVCC PCI-Express
PAGE 13 35Watt (64bit)
LAYER 6 : BOT Gen2 X 16
Madison Pro
4 Core (128bit)
( rPGA 989 ) (FCBGA) CRT CRT PAGE 23
962p 29X29mm LVDS Mux
PAGE 3-6
PAGE 14-18 LCD CONN for
PAGE 21
BCLK133M 32.768KHz dual channel
DMI*4 DMI100M 27MHz
(15.6",17")
DP120M 14.318MHz
PAGE 22 HDMI
SATA0 300MB/s 100M PCIE Dual Channel LVDS
SATA - 1st HDD
133M BCLK
Level
PAGE 30 PCH 3.5Watt CLOCK GEN Shifter
100M PCIE
B B
SATA0 300MB/s 96M DOT 9LRS3197 USB2.0 Port X2 USB2.0 Port PAGE 31
SATA - 2nd HDD Platform REF CLK POWER LED POWER LED
PAGE 30 PAGE 02
Controller HDD LED HDD LED
SATA0 300MB/s Hub CRT Form 17" Form 15"
SATA - CD-ROM LVDS PAGE 28 PAGE 28
PAGE 30 PAGE 7-11 iGPU HDMI 8,9 7
USB2.0 48M
E-SATA/USB Port (1)
SATA0 300MB/s
2 0 6 4 10 12 11 3
PAGE 28
Fingerprint USB2.0 Port BlueTooth Webcam w/ Mic USB2.0 Port Touchscreen
PAGE 28 PAGE 28 PAGE 28 PAGE 22 Card Reader Form 15" PAGE 28
Accelerometer SMBUS
PCI-E 100M PAGE 28
HP302DLTR8 Realtek
DDR III SMDDR_VTERM and PAGE 26 RTS5159
GPU+1.5V/+1.0V(RT8207G) Azalia
X1 X1
PAGE 40 PAGE 24
SPI ROM half size
PAGE 7 LAN mini-card
C
BATTERY SELECTOR LPC Realtek (Wireless LAN C
5-in-1
PAGE 42 Audio PCIE-LAN Shirley Peak flash media
RTL8111(D) 802.11a/b/g/n) slot(SD/MS/MMC/
IDT92HD80 GigaLAN
XD/MSP)
PAGE 33
SYSTEM CHARGER(P2806) PAGE 25 PAGE 29 PAGE 24
PAGE 41 32.768KHz

25MHz
SYSTEM POWER RT8206B Keyboard Touch Pad
PAGE 35 Light Sensor
PAGE 32 ENE KBC RJ45
Amplifier PAGE 29
+1.05V_VTT and GPU
+1.8V/+3V(VT358) GMT G9931P1U KB3926 D2 TPA3111D1
SYSTEM FAN
PAGE 38 PAGE 27
PAGE 33 PAGE 32
VCCP +1.05V/+1.8V(RT8204)
BIOS
PAGE 36 (SYSTEM BIOS)
D
PAGE 32 D

VGACORE/VDDCI(RT8208/RT9018A) Audio Jack Jack to Jack to


PAGE 39
DMIC (Headphone/MIC) Speaker Sub-Woofer
PAGE 22 PAGE 26 PAGE 25 PAGE 27 PROJECT : LX6_LX7
Quanta Computer Inc.
CPU CORE (ADP3212)
Size Document Number Rev
PAGE 37 Custom 1A
NB5 BLOCK DIAGRAM
Date: Tuesday, February 02, 2010 Sheet 1 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

25mA 150mA 150mA


02
+3V +VDDCORE_CLK Y2
+1.05V +VDDIO_CLK +3V +VDDSE_CLK L19 XTAL_IN 1 2XTAL_OUT +3V
L20 L22 1 2 C325 4.7U/6.3V_6
1 2 C322 0.1U/10V_4 1 2 C389 4.7U/6.3V_6 HCB1608KF-181T15_6

1
HCB1608KF-181T15_6 C342 0.1U/10V_4 HCB1608KF-181T15_6 C375 0.1U/10V_4 C338 0.1U/10V_4 14.318MHZ
C349 10U/6.3V_6S C344 0.1U/10V_4 C360 0.1U/10V_4 C377 C378 R218
A A
C323 *10U/6.3V_8S C365 0.1U/10V_4 33P/50V_4 33P/50V_4 *10K/F_4

2
Place each 0.1uF cap close to pin Place each 0.1uF cap close to pin Place each 0.1uF cap close to pin CPU_SEL

R217
10K/F_4

0 1

CPU_SEL CPU0/1=133MHz CPU0/1=100MHz


(default)
Place within 0.5"
U15
of C/G
5 23 CLK_BUF_BCLK_P_R 4 3
+VDDSE_CLK VDD_LCD CPU-0 CLK_BUF_BCLK_P 8
29 22 CLK_BUF_BCLK_N_R 2 1 CLK_BUF_BCLK_N 8
VDD_REF CPU-0# RP22 0_4P2R_4
+VDDCORE_CLK 1 20
VDD_USB CPU-1
17 VDD_SRC CPU-1# 19
24

+VDDIO_CLK 18
VDD_CPU

VDD_CPU_IO
9LRS3197 DOT96T_LPR
3 CLK_BUF_DREFCLK_R RP23 2 1 0_4P2R_4 CLK_BUF_DREFCLK 8
+3V
B 15 4 CLK_BUF_DREFCLK#_R 4 3 B
VDD_SRC_IO DOT96C_LPR CLK_BUF_DREFCLK# 8
31 13 CLK_BUF_PCIE_3GPLL_R RP20 2 1 0_4P2R_4
8,12,13,26,33 CGDAT_SMB SDATA SRC-1 CLK_BUF_PCIE_3GPLL 8
8,12,13,26,33 CGCLK_SMB 32 14 CLK_BUF_PCIE_3GPLL#_R 4 3 CLK_BUF_PCIE_3GPLL# 8 R220
SCLK SRC-1#
1K/F_4
R198 10K/F_4 16 10 CLK_BUF_DREFSSCLK_R RP19 2 1 0_4P2R_4
+3V CPU_STOP# SATA CLK_BUF_DREFSSCLK 8
8 CLK_ICH_14M CLK_ICH_14M R216 33_4 CPU_SEL 30 11 CLK_BUF_DREFSSCLK#_R 4 3 CLK_BUF_DREFSSCLK# 8
C384 *10P/50V_4 REF_0/CPU_SEL SATA# CK_PWRGD_R
CK_PWRGD_R 25 6 CLK_VGA_27M_NOSS R201 33_4 CLK_27M_NONSS 16
CK_PWRGD/PD#_3.3 27MHz_nonSS CLK_VGA_27M_SS R194 33_4
Place R8044 within 0.5" of C/G 7 CLK_27M_SS 16
27MHz_SS

3
XTAL_OUT 27 Q11
XTAL_IN XOUT 2N7002E
28 33
9
XIN QFN32 GND
26 R219
2
VSS_SATA
VSS_USB
VSS_REF
VSS_CPU 21 FOR SG/DIS 37 VR_PWRGD_CLKEN# 2 100K/F_4
8 VSS_LCD VSS_SRC 12

9LRS3197

1
C C
+1.05V 7,8,9,11,36,37,43
+1.5V 33,41
+3V 3,7,8,9,10,11,12,13,21,22,23,24,25,26,27,28,29,30,31,32,33,34,37,40,41

HOLE CPU H7 H6
*H-TC276BC197D150P2

H9 H4 H19 H18 H16 H3


H-C217D126P2 H-C217D126P2 *H-TC315BC354D118P2
GPU H20 H2 *H-TC236BC354D130P2
*H-TC276BC197D150P2 *H-TC236BC354D130P2

1
H14 H10 H13
*H-TC315BC354D118P2 *H-TC315BC354D118P2 *H-TC315BC354D118P2 *H-TC276BC197D150P2 *H-TC276BC197D150P2
1

H11
H12

1
*H-TC276BC197D150P2
1

D *H-TC276BC197D150P2 D

1
H1 H15 H5 H17 H8 *H-TC276BC197D150P2

1
*H-TC315BC354D118P2 *H-TC315BC354D118P2 *H-TC315BC335D118P2
PAD1 PAD2

*H-TC315BC354D118P2 *H-TC315BC354D118P2 *pad-re236x394np *pad-re236x394np


PROJECT : LX6_LX7
1

SPAD-RE118X197NP SPAD-RE118X197NP Quanta Computer Inc.


Size Document Number Rev
Custom Clock Gen(9LRS3197)/HOLES 1A
NB5
Date: Tuesday, February 02, 2010 Sheet 2 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

DIS SG/UMA

9 DMI_TXN0 A24
U25A

DMI_RX#[0]
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
B26 PEG_COMP R270
A26
B27
49.9/F_4
Ra
Rb
Rc
NA 0 ohm
0 ohm NA
0 ohm NA
03
9 DMI_TXN1 C23 A25 PEG_RBIAS R269 750/F_4
DMI_RX#[1] PEG_RBIAS
9 DMI_TXN2 B22 PEG_RX#[0..15] 14
DMI_RX#[2] PEG_RX#0 U25B
9 DMI_TXN3 A21 K35
DMI_RX#[3] PEG_RX#[0] PEG_RX#1 R400 20/F_4 H_COMP3 AT23
J34 A16 CLK_CPU_BCLK 10
PEG_RX#[1] PEG_RX#2 R401 20/F_4 H_COMP2 AT24 COMP3 BCLK
9 DMI_TXP0 B24 J33 B16 CLK_CPU_BCLK# 10
DMI_RX[0] PEG_RX#[2] PEG_RX#3 R24 49.9/F_4 H_COMP1 G16 COMP2 BCLK#
A 9 DMI_TXP1 D23
B23
DMI_RX[1] PEG_RX#[3]
G35
G32 PEG_RX#4 R405 49.9/F_4 H_COMP0 AT26 COMP1 MISC AR30
A
9 DMI_TXP2 DMI_RX[2] PEG_RX#[4] COMP0 BCLK_ITP
9 DMI_TXP3 A22 F34 PEG_RX#5 AH24 AT30 CLK_PCIE_3GPLL 8
DMI_RX[3] PEG_RX#[5] PEG_RX#6 SKTOCC# BCLK_ITP#
F31 CLK_PCIE_3GPLL# 8
PEG_RX#[6] PEG_RX#7
D24 D35
CLOCKS PEG_CLK E16 Rc
9
9
DMI_RXN0
DMI_RXN1 G24
DMI_TX#[0]
DMI_TX#[1]
DMI PEG_RX#[7]
PEG_RX#[8]
E33 PEG_RX#8
PEG_RX#9
H_CATERR# AK14
CATERR# PEG_CLK#
D16
DREFSSCLK_R
R274 *0_4
9 DMI_RXN2 F23
DMI_TX#[2] PEG_RX#[9]
C33
PEG_RX#10
10 H_PECI AT15
PECI R273 3
Ra
9 DMI_RXN3 H23 D32 32,37 H_PROCHOT# AN26 THERMAL A18 40_4P2R_4 DREFSSCLK 8
DMI_TX#[3] PEG_RX#[10] PEG_RX#11 PROCHOT# DPLL_REF_SSCLK
B32 10,32 PM_THRMTRIP# AK15 A17 1 2 DREFSSCLK# 8
PEG_RX#[11] PEG_RX#12 THERMTRIP# DPLL_REF_SSCLK#
9 DMI_RXP0 D25
DMI_TX[0] PEG_RX#[12]
C31
PEG_RX#13 C801 *0.1U/10V_4
Rb
DREFSSCLK#_R R272 *0_4
9 DMI_RXP1 F24 B28
DMI_TX[1] PEG_RX#[13] PEG_RX#14 DDR3_DRAMRST#_C
9 DMI_RXP2 E23 B30 T4 AP26 F6 DDR3_DRAMRST#_C 12
DMI_TX[2] PEG_RX#[14] PEG_RX#15 RESET_OBS# SM_DRAMRST#
9 DMI_RXP3 G23 A31 9 PM_SYNC AL15
DMI_TX[3] PEG_RX#[15] PM_SYNC
PEG_RX0
PEG_RX[0..15] 14 AN14
VCCPWRGOOD_1 DDR3 SM_RCOMP[0] AL1 SM_RCOMP_0 R396 100/F_4
J35 10 H_PWRGOOD AN27 AM1 SM_RCOMP_1 R397 24.9/F_4
PEG_RX[0] VCCPWRGOOD_0
2.7GT/s data rate PEG_RX[1]
H34
H33
PEG_RX1
PEG_RX2
9 PM_DRAM_PWRGD AK13
SM_DRAMPWROK MISC SM_RCOMP[1]
SM_RCOMP[2]
AN1 SM_RCOMP_2 R398
R426
130/F_4
10K/J_4
9 FDI_TXN[7:0] PEG_RX[2] +1.05V_VTT
FDI_TXN0 E22 F35 PEG_RX3 T5 AM26 AN15 PM_EXT_TS#0 R427 *0/short_4 PM_EXTTS#0 12
FDI_TXN1 FDI_TX#[0] PEG_RX[3] PEG_RX4 TAPPWRGOOD PM_EXT_TS#[0]
D21 G33 AP15 PM_EXT_TS#1 R424 *0/short_4 PM_EXTTS#1 12,13
FDI_TXN2 FDI_TX#[1] PEG_RX[4] PEG_RX5 H_VTTPWRGD AM15 PM_EXT_TS#[1] R425 10K/J_4
D19 E34 +1.05V_VTT
FDI_TXN3 FDI_TX#[2] PEG_RX[5] PEG_RX6 CPU_PLTRST# AL14 VTTPWRGOOD
D18 F32 9,29,32,33,34 PLTRST#
FDI_TXN4 FDI_TX#[3] PEG_RX[6] PEG_RX7 R108 1.5K/F_4 RSTIN#
G21 D34 AT28 T20
FDI_TXN5 FDI_TX#[4] PEG_RX[7] PEG_RX8 PRDY# XDP_PREQ#
E19 F33 AP27
FDI_TXN6 F21
FDI_TX#[5]
Intel(R) FDI PEG_RX[8]
B33 PEG_RX9 R107 750/F_4
PWR MANAGEMENT
PREQ#
AN28 XDP_TCLK T6

PCI EXPRESS -- GRAPHICS


FDI_TXN7 FDI_TX#[6] PEG_RX[9] PEG_RX10 TCK
G18 D31
FDI_TX#[7] PEG_RX[10] PEG_RX11 XDP_TMS
A32 AP28 T8
PEG_RX[11] PEG_RX12 TMS
9 FDI_TXP[7:0] C30
FDI_TXP0 PEG_RX[12] PEG_RX13 XDP_TRST#
D22 A28 AT27

B
FDI_TXP1
FDI_TXP2
C21
D20
FDI_TX[0]
FDI_TX[1]
FDI_TX[2]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
B29
A30
PEG_RX14
PEG_RX15
AJ22
AK22
BPM#[0]
BPM#[1]
JTAG & BPM TRST#

TDI
AT29 XDP_TDI_R
T19

T9 B
FDI_TXP3 C18 PEG_TX#[0..15] 14 AK24 AR27 XDP_TDO_R T11
FDI_TXP4 FDI_TX[3] C_PEG_TX#0 C538 0.1U/10V_4 PEG_TX#0 BPM#[2] TDO XDP_TDI_M
G22 L33 AJ24 AR29 T10
FDI_TXP5 FDI_TX[4] PEG_TX#[0] C_PEG_TX#1 C532 0.1U/10V_4 PEG_TX#1 BPM#[3] TDI_M XDP_TDO_M
E20 M35 AJ25 AP29 T7
FDI_TXP6 FDI_TX[5] PEG_TX#[1] C_PEG_TX#2 C526 0.1U/10V_4 PEG_TX#2 BPM#[4] TDO_M
F20 M33 AH22
FDI_TXP7 FDI_TX[6] PEG_TX#[2] C_PEG_TX#3 C519 0.1U/10V_4 PEG_TX#3 BPM#[5]
G19 M30 AK23
FDI_TX[7] PEG_TX#[3] C_PEG_TX#4 C515 0.1U/10V_4 PEG_TX#4 BPM#[6]
L31 AH23 AN25 XDP_DBRESET# 9
PEG_TX#[4] C_PEG_TX#5 C504 0.1U/10V_4 PEG_TX#5 BPM#[7] DBR#
9 FDI_FSYNC0 F17 K32
FDI_FSYNC[0] PEG_TX#[5] C_PEG_TX#6 C493 0.1U/10V_4 PEG_TX#6 IC,AUB_CFD_rPGA,R1P0
9 FDI_FSYNC1 E17 M29
FDI_FSYNC[1] PEG_TX#[6] C_PEG_TX#7 C489 0.1U/10V_4 PEG_TX#7
J31
PEG_TX#[7] C_PEG_TX#8 C484 0.1U/10V_4 PEG_TX#8
9 FDI_INT C17 K29
FDI_INT PEG_TX#[8] C_PEG_TX#9 C476 0.1U/10V_4 PEG_TX#9
H30
PEG_TX#[9] C_PEG_TX#10C472 0.1U/10V_4 PEG_TX#10
9 FDI_LSYNC0 F18 H29
FDI_LSYNC[0] PEG_TX#[10] C_PEG_TX#11C466 0.1U/10V_4 PEG_TX#11 +1.05V_VTT
9 FDI_LSYNC1 D17 F29
FDI_LSYNC[1] PEG_TX#[11] C_PEG_TX#12C463 0.1U/10V_4 PEG_TX#12
E28
PEG_TX#[12] C_PEG_TX#13C459 0.1U/10V_4 PEG_TX#13 XDP_TDO_R R97 51/F_4
D29
PEG_TX#[13] C_PEG_TX#14C456 0.1U/10V_4 PEG_TX#14 H_CATERR# R76 49.9/F_4
D27
PEG_TX#[14] C_PEG_TX#15C450 0.1U/10V_4 PEG_TX#15 H_PROCHOT# R86 56.2/F_4
C26
PEG_TX#[15] CPU_PLTRST# R109 *68/J_4
PEG_TX[0..15] 14 +3V
L34 C_PEG_TX0 C534 0.1U/10V_4 PEG_TX0 XDP_TMS R94 *51/J_4
PEG_TX[0] C_PEG_TX1 C529 0.1U/10V_4 PEG_TX1 XDP_TDI_R R93 *51/J_4
M34
PEG_TX[1] C_PEG_TX2 C520 0.1U/10V_4 PEG_TX2 U30 XDP_PREQ# R95 *51/J_4
M32

5
PEG_TX[2] C_PEG_TX3 C516 0.1U/10V_4 PEG_TX3
L30
PEG_TX[3] C_PEG_TX4 C507 0.1U/10V_4 PEG_TX4 MC74VHC1G08DFT2G R421 XDP_TCLK R91 *51/J_4
M31 2
PEG_TX[4] C_PEG_TX5 C498 0.1U/10V_4 PEG_TX5 HWPG_1 H_VTTPWRGD
K31 4
PEG_TX[5] C_PEG_TX6 C491 0.1U/10V_4 PEG_TX6 HWPG 2K/F_4 C1006 100P/50V_4
M28 1
PEG_TX[6] C_PEG_TX7 C486 0.1U/10V_4 PEG_TX7 H_PROCHOT#
PEG_TX[7]
H31 MV Add
K28 C_PEG_TX8 C478 0.1U/10V_4 PEG_TX8

3
PEG_TX[8] C_PEG_TX9 C473 0.1U/10V_4 PEG_TX9 R417
G30
PEG_TX[9] C_PEG_TX10 C467 0.1U/10V_4 PEG_TX10 1K/F_4
C G29 C
PEG_TX[10] C_PEG_TX11 C464 0.1U/10V_4 PEG_TX11
F28
PEG_TX[11] C_PEG_TX12 C460 0.1U/10V_4 PEG_TX12
E27
PEG_TX[12] C_PEG_TX13 C457 0.1U/10V_4 PEG_TX13
D28
PEG_TX[13] C_PEG_TX14 C452 0.1U/10V_4 PEG_TX14
C27
PEG_TX[14] C_PEG_TX15 C449 0.1U/10V_4 PEG_TX15
C25
PEG_TX[15] JTAG MAPPING
IC,AUB_CFD_rPGA,R1P0
FOR DIS ONLY FOR SG/DIS XDP_TRST#

R28 1K/F_4 FDI_INT MV Change


R25 *0_4 FDI_FSYNC0 MV Modify +3VS5 R394
R26 *0_4 FDI_FSYNC1 U45 SI2 Modidy 51/F_4
R27 *0_4 FDI_LSYNC0 *MC74VHC1G08DFT2G

5
R21 1K/F_4 FDI_LSYNC1
32,35,36,38,39,40,43 HWPG 2
FDI_FSYNC can 4
gang all these 1
+1.5VSUS_L
4 signals
together and

3
R662
tie them with
*1.5K/F_4
only one 1K Scan Chain STUFF -> Ra, Rc, Re
resistor to GND R422
*1.1K/F_4
(Default) NO STUFF -> Rb, Rd
( Check list R663
1.0 ).
SI Del R416,R393,R407,R406,R395,Q31,Q30,Q32 PM_DRAM_PWRGD HWPG_1 CPU Only STUFF -> Ra, Rb
NO STUFF -> Rc, Rd, Re
1.5K/F_4
D D
R423 R664 GMCH Only STUFF -> Rd, Re
*3K/F_4 750/F_4 NO STUFF -> Ra, Rb, Rc

PROJECT : LX6_LX7
+3V 2,7,8,9,10,11,12,13,21,22,23,24,25,26,27,28,29,30,31,32,33,34,37,40,41 Quanta Computer Inc.
+1.05V_VTT 5,10,11,32,37,38,43
+1.5VSUS_L 5,41
+3VS5 8,9,10,11,41 Size Document Number Rev
Custom 1A
NB5 PROCESSER 1/4(HOST&PEX)
Date: Tuesday, February 02, 2010 Sheet 3 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)


04
A A
13 M_B_DQ[63:0]
12 M_A_DQ[63:0] U25C U25D
M_A_DQ0 A10 AA6 M_A_CLK0 12 M_B_DQ0 B5 W8 M_B_CLK0 13
M_A_DQ1 C10 SA_DQ[0] SA_CK[0] M_B_DQ1 SB_DQ[0] SB_CK[0]
AA7 M_A_CLK0# 12 A5 W9 M_B_CLK0# 13
M_A_DQ2 SA_DQ[1] SA_CK#[0] M_B_DQ2 SB_DQ[1] SB_CK#[0]
C7 P7 M_A_CKE0 12 C3 M3 M_B_CKE0 13
M_A_DQ3 SA_DQ[2] SA_CKE[0] M_B_DQ3 SB_DQ[2] SB_CKE[0]
A7 B3
M_A_DQ4 SA_DQ[3] M_B_DQ4 SB_DQ[3]
B10 Y6 M_A_CLK1 12 E4 V7 M_B_CLK1 13
M_A_DQ5 D10 SA_DQ[4] SA_CK[1] M_B_DQ5 SB_DQ[4] SB_CK[1]
Y5 M_A_CLK1# 12 A6 V6 M_B_CLK1# 13
M_A_DQ6 SA_DQ[5] SA_CK#[1] M_B_DQ6 SB_DQ[5] SB_CK#[1]
E10 P6 M_A_CKE1 12 A4 M2 M_B_CKE1 13
M_A_DQ7 SA_DQ[6] SA_CKE[1] M_B_DQ7 SB_DQ[6] SB_CKE[1]
A8 C4
M_A_DQ8 SA_DQ[7] M_B_DQ8 SB_DQ[7]
D8 AE2 M_A_CS#0 12 D1 AB8 M_B_CS#0 13
M_A_DQ9 SA_DQ[8] SA_CS#[0] M_B_DQ9 SB_DQ[8] SB_CS#[0]
F10 AE8 M_A_CS#1 12 D2 AD6 M_B_CS#1 13
M_A_DQ10 SA_DQ[9] SA_CS#[1] M_B_DQ10 SB_DQ[9] SB_CS#[1]
E6 F2
M_A_DQ11 SA_DQ[10] M_B_DQ11 SB_DQ[10]
F7 AD8 M_A_ODT0 12 F1 AC7 M_B_ODT0 13
M_A_DQ12 SA_DQ[11] SA_ODT[0] M_B_DQ12 SB_DQ[11] SB_ODT[0]
E9 AF9 M_A_ODT1 12 C2 AD1 M_B_ODT1 13
M_A_DQ13 SA_DQ[12] SA_ODT[1] M_B_DQ13 SB_DQ[12] SB_ODT[1]
B7 M_A_DM[7:0] 12 F5 M_B_DM[7:0] 13
M_A_DQ14 SA_DQ[13] SB_DQ[13]
E7 B9 M_A_DM0 M_B_DQ14 F3 D4 M_B_DM0
M_A_DQ15 SA_DQ[14] SA_DM[0] SB_DQ[14] SB_DM[0]
C6 D7 M_A_DM1 DM signals are not present on Clarkfield M_B_DQ15 G4 E1 M_B_DM1 DM signals are not present on Clarkfield
M_A_DQ16 H10 SA_DQ[15] SA_DM[1] SB_DQ[15] SB_DM[1]
H7 M_A_DM2 processor. All DM signal can be left as M_B_DQ16 H6 H3 M_B_DM2 processor. All DM signal can be left as
M_A_DQ17 G8 SA_DQ[16] SA_DM[2] SB_DQ[16] SB_DM[2]
M7 M_A_DM3 NC on Clarkfield and connect directly to M_B_DQ17 G2 K1 M_B_DM3 NC on Clarkfield and connect directly to
M_A_DQ18 SA_DQ[17] SA_DM[3] SB_DQ[17] SB_DM[3]
K7 AG6 M_A_DM4 GND on So-DIMM side for Clarkfield M_B_DQ18 J6 AH1 M_B_DM4
GND on So-DIMM side for Clarkfield
M_A_DQ19 SA_DQ[18] SA_DM[4] SB_DQ[18] SB_DM[4]
J8 AM7 M_A_DM5 M_B_DQ19 J3 AL2 M_B_DM5
M_A_DQ20 G7 SA_DQ[19] SA_DM[5]
AN10 M_A_DM6
design only M_B_DQ20 G1
SB_DQ[19] SB_DM[5]
AR4 M_B_DM6 design only
M_A_DQ21 G10 SA_DQ[20] SA_DM[6] SB_DQ[20] SB_DM[6]
AN13 M_A_DM7 M_B_DQ21 M_B_DM7

DDR SYSTEM MEMORY A


G5 AT8

DDR SYSTEM MEMORY B


M_A_DQ22 SA_DQ[21] SA_DM[7] M_B_DQ22 SB_DQ[21] SB_DM[7]
J7 M_A_DQS#[7:0] 12 J2 M_B_DQS#[7:0] 13
M_A_DQ23 J10 SA_DQ[22] SB_DQ[22]
C9 M_A_DQS#0 M_B_DQ23 J1 D5 M_B_DQS#0
M_A_DQ24 SA_DQ[23] SA_DQS#[0] M_A_DQS#1 M_B_DQ24 SB_DQ[23] SB_DQS#[0] M_B_DQS#1
L7 F8 J5 F4
M_A_DQ25 M6 SA_DQ[24] SA_DQS#[1] M_A_DQS#2 M_B_DQ25 SB_DQ[24] SB_DQS#[1] M_B_DQS#2
J9 K2 J4
M_A_DQ26 M8 SA_DQ[25] SA_DQS#[2] SB_DQ[25] SB_DQS#[2]
B N9 M_A_DQS#3 M_B_DQ26 L3 L4 M_B_DQS#3 B
M_A_DQ27 SA_DQ[26] SA_DQS#[3] SB_DQ[26] SB_DQS#[3]
L9 AH7 M_A_DQS#4 M_B_DQ27 M1 AH2 M_B_DQS#4
M_A_DQ28 SA_DQ[27] SA_DQS#[4] SB_DQ[27] SB_DQS#[4]
L6 AK9 M_A_DQS#5 M_B_DQ28 K5 AL4 M_B_DQS#5
M_A_DQ29 SA_DQ[28] SA_DQS#[5] SB_DQ[28] SB_DQS#[5]
K8 AP11 M_A_DQS#6 M_B_DQ29 K4 AR5 M_B_DQS#6
M_A_DQ30 SA_DQ[29] SA_DQS#[6] SB_DQ[29] SB_DQS#[6]
N8 AT13 M_A_DQS#7 M_B_DQ30 M4 AR8 M_B_DQS#7
M_A_DQ31 SA_DQ[30] SA_DQS#[7] M_B_DQ31 SB_DQ[30] SB_DQS#[7]
P9 M_A_DQS[7:0] 12 N5 M_B_DQS[7:0] 13
M_A_DQ32 AH5 SA_DQ[31] SB_DQ[31]
C8 M_A_DQS0 M_B_DQ32 AF3 C5 M_B_DQS0
M_A_DQ33 AF5 SA_DQ[32] SA_DQS[0] M_A_DQS1 M_B_DQ33 SB_DQ[32] SB_DQS[0] M_B_DQS1
F9 AG1 E3
M_A_DQ34 AK6 SA_DQ[33] SA_DQS[1] SB_DQ[33] SB_DQS[1]
H9 M_A_DQS2 M_B_DQ34 AJ3 H4 M_B_DQS2
M_A_DQ35 AK7 SA_DQ[34] SA_DQS[2] SB_DQ[34] SB_DQS[2]
M9 M_A_DQS3 M_B_DQ35 AK1 M5 M_B_DQS3
M_A_DQ36 AF6 SA_DQ[35] SA_DQS[3] SB_DQ[35] SB_DQS[3]
AH8 M_A_DQS4 M_B_DQ36 AG4 AG2 M_B_DQS4
M_A_DQ37 AG5 SA_DQ[36] SA_DQS[4] SB_DQ[36] SB_DQS[4]
AK10 M_A_DQS5 M_B_DQ37 AG3 AL5 M_B_DQS5
M_A_DQ38 AJ7 SA_DQ[37] SA_DQS[5] SB_DQ[37] SB_DQS[5]
AN11 M_A_DQS6 M_B_DQ38 AJ4 AP5 M_B_DQS6
M_A_DQ39 AJ6 SA_DQ[38] SA_DQS[6] SB_DQ[38] SB_DQS[6]
AR13 M_A_DQS7 M_B_DQ39 AH4 AR7 M_B_DQS7
M_A_DQ40 AJ10 SA_DQ[39] SA_DQS[7] M_B_DQ40 SB_DQ[39] SB_DQS[7]
M_A_A[15:0] 12 AK3 M_B_A[15:0] 13
M_A_DQ41 AJ9 SA_DQ[40] M_A_A0 M_B_DQ41 SB_DQ[40] M_B_A0
Y3 AK4 U5
M_A_DQ42 AL10 SA_DQ[41] SA_MA[0] M_A_A1 M_B_DQ42 SB_DQ[41] SB_MA[0] M_B_A1
W1 AM6 V2
M_A_DQ43 AK12 SA_DQ[42] SA_MA[1] M_A_A2 M_B_DQ43 SB_DQ[42] SB_MA[1] M_B_A2
AA8 AN2 T5
M_A_DQ44 AK8 SA_DQ[43] SA_MA[2] M_A_A3 M_B_DQ44 SB_DQ[43] SB_MA[2] M_B_A3
AA3 AK5 V3
M_A_DQ45 AL7 SA_DQ[44] SA_MA[3] M_A_A4 M_B_DQ45 SB_DQ[44] SB_MA[3] M_B_A4
V1 AK2 R1
M_A_DQ46 AK11 SA_DQ[45] SA_MA[4] M_A_A5 M_B_DQ46 SB_DQ[45] SB_MA[4] M_B_A5
AA9 AM4 T8
M_A_DQ47 AL8 SA_DQ[46] SA_MA[5] M_A_A6 M_B_DQ47 SB_DQ[46] SB_MA[5] M_B_A6
V8 AM3 R2
M_A_DQ48 AN8 SA_DQ[47] SA_MA[6] M_A_A7 M_B_DQ48 SB_DQ[47] SB_MA[6] M_B_A7
T1 AP3 R6
M_A_DQ49 AM10 SA_DQ[48] SA_MA[7] M_A_A8 M_B_DQ49 SB_DQ[48] SB_MA[7] M_B_A8
Y9 AN5 R4
M_A_DQ50 AR11 SA_DQ[49] SA_MA[8] M_A_A9 M_B_DQ50 SB_DQ[49] SB_MA[8] M_B_A9
U6 AT4 R5
M_A_DQ51 AL11 SA_DQ[50] SA_MA[9] M_A_A10 M_B_DQ51 SB_DQ[50] SB_MA[9] M_B_A10
AD4 AN6 AB5
M_A_DQ52 AM9 SA_DQ[51] SA_MA[10] M_A_A11 M_B_DQ52 SB_DQ[51] SB_MA[10] M_B_A11
T2 AN4 P3
M_A_DQ53 AN9 SA_DQ[52] SA_MA[11] M_A_A12 M_B_DQ53 SB_DQ[52] SB_MA[11] M_B_A12
U3 AN3 R3
M_A_DQ54 AT11 SA_DQ[53] SA_MA[12] M_A_A13 M_B_DQ54 SB_DQ[53] SB_MA[12] M_B_A13
AG8 AT5 AF7
M_A_DQ55 AP12 SA_DQ[54] SA_MA[13] M_A_A14 M_B_DQ55 SB_DQ[54] SB_MA[13] M_B_A14
C T3 AT6 P5 C
M_A_DQ56 AM12 SA_DQ[55] SA_MA[14] M_A_A15 M_B_DQ56 SB_DQ[55] SB_MA[14] M_B_A15
V9 AN7 N1
M_A_DQ57 AN12 SA_DQ[56] SA_MA[15] M_B_DQ57 SB_DQ[56] SB_MA[15]
AP6
M_A_DQ58 AM13 SA_DQ[57] M_B_DQ58 SB_DQ[57]
AP8
M_A_DQ59 AT14 SA_DQ[58] M_B_DQ59 SB_DQ[58]
AT9
M_A_DQ60 AT12 SA_DQ[59] M_B_DQ60 SB_DQ[59]
AT7
M_A_DQ61 AL13 SA_DQ[60] M_B_DQ61 SB_DQ[60]
AP9
M_A_DQ62 AR14 SA_DQ[61] M_B_DQ62 SB_DQ[61]
AR10
M_A_DQ63 AP14 SA_DQ[62] M_B_DQ63 SB_DQ[62]
AT10
SA_DQ[63] SB_DQ[63]
12 M_A_BS#0 AC3 13 M_B_BS#0 AB1
SA_BS[0] SB_BS[0]
12 M_A_BS#1 AB2 13 M_B_BS#1 W5
SA_BS[1] SB_BS[1]
12 M_A_BS#2 U7 13 M_B_BS#2 R7
SA_BS[2] SB_BS[2]
12 M_A_CAS# AE1 13 M_B_CAS# AC5
SA_CAS# SB_CAS#
12 M_A_RAS# AB3 13 M_B_RAS# Y7
SA_RAS# SB_RAS#
12 M_A_WE# AE9 13 M_B_WE# AC6
SA_WE# SB_WE#
IC,AUB_CFD_rPGA,R1P0 IC,AUB_CFD_rPGA,R1P0

D D

PROJECT : LX6_LX7
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NB5 PROCESSER 2/4(DDR)
Date: Tuesday, February 02, 2010 Sheet 4 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+VCORE
C94
C24
22U/6.3V_8S
22U/6.3V_8S
AG35
AG34
U25F
VCC1
VCC2
VTT0_1
VTT0_2
AH14
AH12
C560
18A
+1.05V_VTT
10U/6.3V_8 Rc
DIS
NA
SG/UMA
470
05
AG33 VCC3 VTT0_3 AH11
C581 22U/6.3V_8S C543 10U/6.3V_8
C23 22U/6.3V_8S
AG32
AG31
VCC4 VTT0_4 AH10
J14 C511 10U/6.3V_8 Rd NA 0 ohm
C124 22U/6.3V_8S VCC5 VTT0_5 C423 10U/6.3V_8
AG30 J13
C98 22U/6.3V_8S AG29
VCC6 VTT0_6
H14 C86 10U/6.3V_8 Re NA 0 ohm
C95 22U/6.3V_8S VCC7 VTT0_7 C509 10U/6.3V_8
AG28 H12
C164 22U/6.3V_8S AG27
VCC8 VTT0_8
G14 C510 10U/6.3V_8 U25G Rf NA NA
A
C559 22U/6.3V_8S VCC9 VTT0_9 C574 22U/6.3V_8S
A
AG26 VCC10 VTT0_10 G13
C113 22U/6.3V_8S AF35 G12 C63 22U/6.3V_8S AT21
C111 22U/6.3V_8S VCC11 VTT0_11 C553 22U/6.3V_8S VAXG1

SENSE
LINES
AF34 VCC12 VTT0_12 G11 AT19 VAXG2 VAXG_SENSE AR22 VCC_AXG_SENSE 43
C22 22U/6.3V_8S AF33 F14 AT18 AT22 VSS_AXG_SENSE 43
C573 10U/6.3V_8 VCC13 VTT0_13 VAXG3 VSSAXG_SENSE
AF32 F13 AT16
C139 10U/6.3V_8 VCC14 VTT0_14 VAXG4
AF31 VCC15 VTT0_15 F12 AR21 VAXG5
C126 10U/6.3V_8 AF30 F11 AR19
C91 10U/6.3V_8 VCC16 VTT0_16 VAXG6
AF29 E14 AR18
VCC17 VTT0_17 VAXG7

GRAPHICS VIDs
C137 10U/6.3V_8 AF28 E12 AR16 AM22 GFXVR_VID_0 43
C93 10U/6.3V_8 VCC18 VTT0_18 VAXG8 GFX_VID[0]
AF27 VCC19 VTT0_19 D14 AP21 VAXG9 GFX_VID[1] AP22 GFXVR_VID_1 43
C25 10U/6.3V_8 AF26 D13 AP19 AN22 GFXVR_VID_2 43
C165 10U/6.3V_8 VCC20 VTT0_20 VAXG10 GFX_VID[2]
AD35 VCC21 VTT0_21 D12 AP18 VAXG11 GFX_VID[3] AP23 GFXVR_VID_3 43
C112 10U/6.3V_8 AD34 D11 AP16 AM23

1.1V RAIL POWER


VCC22 VTT0_22 VAXG12 GFX_VID[4] GFXVR_VID_4 43
C167 10U/6.3V_8 AD33 C14 AN21 AP24 GFXVR_VID_5 43
C166 10U/6.3V_8 VCC23 VTT0_23 VAXG13 GFX_VID[5]
AD32 VCC24 VTT0_24 C13 AN19 VAXG14 GFX_VID[6] AN24 GFXVR_VID_6 43

GRAPHICS
C26 10U/6.3V_8 AD31 C12 AN18 SI2 change
C92 10U/6.3V_8 VCC25 VTT0_25 VAXG15 GFX_VR_EN R402 470_4
AD30
VCC26 VTT0_26
C11 Please note that +VCC_GFX_CORE AN16
VAXG16 Rc
C138 10U/6.3V_8 AD29 B14 should be 1.05V in Auburndale AM21 AR25 GFXVR_EN 43
C584 10U/6.3V_8 VCC27 VTT0_27 VAXG17 GFX_VR_EN R101 0_4
C168 10U/6.3V_8
AD28 VCC28 VTT0_28 B12 AM19 VAXG18 GFX_DPRSLPVR AT25 Rd R383 0_4
GFXVR_DPRSLPVR 43
AD27 VCC29 VTT0_29 A14 AM18 VAXG19 GFX_IMON AM24 Re GFXVR_IMON 43
C161 0.1U/10V_4 AD26 A13 +VGACORE_IGPU AM16 Rf R399 *1K/J_4
C159 0.1U/10V_4 VCC30 VTT0_30 C569 22U/6.3V_8S VAXG20 +1.5VSUS
AC35 VCC31 VTT0_31 A12 AL21 VAXG21
AC34 A11 C570 22U/6.3V_8S AL19
VCC32 VTT0_32 C572 10U/6.3V_8 VAXG22 +1.5VSUS_L Q1
AC33 VCC33 AL18 VAXG23 2A

5
AC32 C571 10U/6.3V_8 AL16 AON6426L
VCC34 VAXG24
AC31 VCC35 Rb AK21 VAXG25 VDDQ1 AJ1 D
AC30 AF10 +1.05V_VTT AK19 AF1 C432 1U/6.3V_4 G

- 1.5V RAILS
VCC36 VTT0_33 VAXG26 VDDQ2 C429 1U/6.3V_4 MAIND
AC29 AE10 AK18 AE7 41 MAIND 4
VCC37 VTT0_34 C65 22U/6.3V_8S VAXG27 VDDQ3 C425 1U/6.3V_4 S
AC28 AC10 AK16 AE4
VCC38 VTT0_35 DIS SG/UMA VAXG28 VDDQ4
CPU CORE SUPPLY

POWER
B AC27 AB10 C64 22U/6.3V_8S AJ21 AC1 C434 1U/6.3V_4 B

1
2
3
VCC39 VTT0_36 VAXG29 VDDQ5 C5 1U/6.3V_4 C6
AC26
VCC40 VTT0_37
Y10
Ra 0 ohm NA AJ19
VAXG30 VDDQ6
AB7 SI2 Add
AA35 W10 AJ18 AB4 C21 22U/6.3V_8S *0.1U/10V_4
VCC41 VTT0_38 VAXG31 VDDQ7 C16 22U/6.3V_8S
AA34 VCC42 VTT0_39 U10 VTT Rail Values are AJ16 VAXG32 VDDQ8 Y1 SI Del BOM +1.5VSUS

+
AA33 T10 AH21 W7
AA32
VCC43 VTT0_40
J12
Auburndal VTT=1.05V Rb NA STUFF AH19
VAXG33 VDDQ9
W4 C11 330U_2.5V_7343
VCC44 VTT0_41 Clarksfield VTT=1.1V VAXG34 VDDQ10
POWER

AA31 VCC45 VTT0_42 J11 AH18 VAXG35 VDDQ11 U1


AA30 J16 AH16 T7
VCC46 VTT0_43 VAXG36 VDDQ12
AA29
VCC47 VTT0_44
J15 Ra VDDQ13
T4
AA28 R345 *0_4 P1
VCC48 VDDQ14
AA27 N7

DDR3
VCC49 VDDQ15 C974 C973 C972 C971
AA26 AN33 H_PSI# 37 N4
VCC50 PSI# VDDQ16 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
Y35 L1
VCC51 VDDQ17

FDI
Y34 +1.05V_VTT J24 H1
VCC52 C67 22U/6.3V_8S VTT1_45 VDDQ18 +1.5VSUS_L
Y33 VCC53 VID[0] AK35 CPU_VID0 37 J23 VTT1_46
Y32 AK33 CPU_VID1 37 C514 22U/6.3V_8S H25
VCC54 VID[1] VTT1_47
Y31 VCC55 VID[2] AK34 CPU_VID2 37
Y30 AL35 CPU_VID3 37
VCC56 VID[3]
Y29 AL33 P10
CPU VIDS

VCC57 VID[4] CPU_VID4 37 VTT0_59 +1.05V_VTT


Y28 AM33 CPU_VID5 37 +1.05V_VTT K26 N10 C525 10U/6.3V_8
VCC58 VID[5] VTT1_48 VTT0_60

PEG & DMI


Y27 AM35 CPU_VID6 37 C422 22U/6.3V_8S J27 L10 C535 10U/6.3V_8
VCC59 VID[6] C413 22U/6.3V_8S VTT1_49 VTT0_61 C513 22U/6.3V_8S
Y26 AM34 DPRSLPVR 37 J26 K10
VCC60 PROC_DPRSLPVR C411 22U/6.3V_8S VTT1_50 VTT0_62 C512 22U/6.3V_8S
V35 J25 J22

1.1V
VCC61 C66 22U/6.3V_8S VTT1_51 VTT1_63
V34 VCC62 H27 VTT1_52 VTT1_64 J20
V33 G28 J18 C984 100u_6.3V_3528
VCC63 VTT1_53 VTT1_65

+
V32 G15 H_VTTVID1 38 G27 H21 1 2
VCC64 VTT_SELECT VTT1_54 VTT1_66
V31 G26 H20
VCC65 VTT1_55 VTT1_67
V30 VCC66 H_VTTVID1=Low, 1.1V F26 VTT1_56 VTT1_68 H19
V29 VCC67 H_VTTVID1=High, 1.05V E26 VTT1_57 PV Add
V28 E25
C VCC68 VTT1_58 C
V27 L26 +1.8V

1.8V
VCC69 VCCPLL1 C68 22U/6.3V_8S
V26 VCC70 VCCPLL2 L27
U35 M26 C69 4.7U/6.3V_6
VCC71 VCCPLL3 C52 2.2U/6.3V_6
U34 VCC72
U33 AN35 C51 1U/6.3V_4
SENSE LINES

VCC73 ISENSE I_MON 37


U32 IC,AUB_CFD_rPGA,R1P0 C59 1U/6.3V_4
VCC74
U31 VCC75 VTT_SENSE B15 VTT_SENSE 38
U30 A15 VSS_SENSE_VTT 38
VCC76 VSS_SENSE_VTT
U29 VCC77
U28 CPU_VID0 R362 1K/J_4
VCC78 +1.05V_VTT
U27 R83 100/F_4 +VCORE R363 *1K/J_4
VCC79 CPU_VID1 R360 1K/J_4
U26 AJ34 VCCSENSE 37
VCC80 VCC_SENSE R361 *1K/J_4
R35 VCC81 VSS_SENSE AJ35 VSSSENSE 37
R34 R84 100/F_4 CPU_VID2 R366 1K/J_4
VCC82 R367 *1K/J_4
R33 VCC83
R32 CPU_VID3 R369 *1K/J_4
VCC84 R370 1K/J_4
R31 VCC85
R30 CPU_VID4 R372 *1K/J_4
VCC86 R373 1K/J_4
R29 VCC87
R28 CPU_VID5 R384 1K/J_4
VCC88 R385 *1K/J_4
R27
VCC89 CPU_VID6 R375 *1K/J_4
R26
VCC90 R376 1K/J_4
P35 VCC91
P34 DPRSLPVR R379 1K/J_4
VCC92 R380 *1K/J_4
P33 VCC93
P32 H_PSI# R382 *1K/J_4
VCC94 R381 1K/J_4
P31 VCC95
P30 VCC96
P29 VCC97
D P28 VCC98 HFM_VID : Max 1.4V D
P27
P26
VCC99 LFM_VID : Min 0.65V
VCC100
IC,AUB_CFD_rPGA,R1P0

PROJECT : LX6_LX7
3,41 +1.5VSUS_L Quanta Computer Inc.
37 +VCORE
3,10,11,32,37,38,43 +1.05V_VTT
12,13,39,40,41 +1.5VSUS Size Document Number Rev
Custom PROCESSER 3/4(POWER) 1A
10,11,21,36,41 +1.8V NB5
Date: Tuesday, February 02, 2010 Sheet 5 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

AUBURNDALE/CLARKSFIELD PROCESSOR (GND)


U25H U25I
AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)
U25E
06
K27
VSS161
AT20 AE34 K9 12 DDR_VREF_DQ0 J17 AT2
VSS1 VSS81 VSS162 SA_DIMM_VREF RSVD_NCTF_41
AT17 AE33 K6 13 DDR_VREF_DQ1 H17 AT3
VSS2 VSS82 VSS163 SB_DIMM_VREF RSVD_NCTF_42
AR31 AE32 K3 AR1
VSS3 VSS83 VSS164 CFG0 RSVD_NCTF_43
A AR28 AE31 J32 AM30 AL28 A
VSS4 VSS84 VSS165 CFG[0] RSVD45
AR26 AE30 J30 AM28 AL29
VSS5 VSS85 VSS166 CFG[1] RSVD46
AR24 AE29 J21 AP31 AP30
VSS6 VSS86 VSS167 CFG3 CFG[2] RSVD47
AR23 AE28 J19 AL32 AP32
VSS7 VSS87 VSS168 CFG4 CFG[3] RSVD48
AR20 AE27 H35 AL30 AL27
VSS8 VSS88 VSS169 CFG[4] RSVD49
AR17 AE26 H32 AM31 AT31
VSS9 VSS89 VSS170 CFG[5] RSVD50
AR15 AE6 H28 AN29
VSS10 VSS90 VSS171 CFG7 CFG[6]
AR12 AD10 H26 AM32 AT32
VSS11 VSS91 VSS172 CFG[7] RSVD51
AR9 AC8 H24 AK32 AP33
VSS12 VSS92 VSS173 CFG[8] RSVD52
AR6 AC4 H22 AK31 AR33
VSS13 VSS93 VSS174 CFG[9] RSVD53
AR3 AC2 H18 AK28 AT33
VSS14 VSS94 VSS175 CFG[10] RSVD_NCTF_54
AP20 AB35 H15 AJ28 AT34
VSS15 VSS95 VSS176 CFG[11] RSVD_NCTF_55
AP17 AB34 H13 AN30 AP35
VSS16 VSS96 VSS177 CFG[12] RSVD_NCTF_56
AP13 AB33 H11 AN32 AR35
VSS17 VSS97 VSS178 CFG[13] RSVD_NCTF_57
AP10 AB32 H8 AJ32 AR32
VSS18 VSS98 VSS179 CFG[14] RSVD58
AP7 AB31 H5 AJ29 E15
VSS19 VSS99 VSS180 CFG[15] RSVD_TP_59
AP4 AB30 H2 AJ30 F15
VSS20 VSS100 VSS181 CFG[16] RSVD_TP_60
AP2 AB29 G34 AK30
VSS21 VSS101 VSS182 CFG[17]
AN34 AB28 G31 H16 A2
VSS22 VSS102 VSS183 RSVD_TP_86 KEY
AN31 AB27 G20 D15
VSS23 VSS103 VSS184 RSVD62
AN23 AB26 G9 AP25 C15
VSS24 VSS104 VSS185 RSVD1 RSVD63
AN20 AB6 G6 AL25 AJ15 RSVD64_R R418 *0_4
VSS25 VSS105 VSS186 RSVD2 RSVD64
AN17 AA10 G3 AL24 AH15 RSVD65_R R419 *0_4

RESERVED
VSS26 VSS106 VSS187 RSVD3 RSVD65
AM29 Y8 F30 AL22 AA5
VSS27 VSS107 VSS188 RSVD4 RSVD_TP_66
AM27 Y4 F27 AJ33 AA4
VSS28 VSS108 VSS189 RSVD5 RSVD_TP_67
AM25 Y2 F25 AG9 R8
VSS29 VSS109 VSS190 RSVD6 RSVD_TP_68
AM20 W35 F22 M27 AD3
VSS30 VSS110 VSS191 RSVD7 RSVD_TP_69
AM17 W34 F19 L28 AD2
VSS31 VSS111 VSS192 RSVD8 RSVD_TP_70
AM14 W33 F16
VSS32 VSS112 VSS193
B AM11 W32 E35 G25 AA2 B
VSS33 VSS113 VSS194 RSVD11 RSVD_TP_71
AM8 W31 E32 G17 AA1
VSS34 VSS114 VSS195 RSVD12 RSVD_TP_72
AM5 W30 E29 E31 R9
VSS35 VSS115 VSS196 RSVD13 RSVD_TP_73
AM2 W29 E24 E30 AG7
VSS36 VSS116 VSS197 RSVD14 RSVD_TP_74
AL34 W28 E21 B19 AE3
AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W27
W26
E18
E13
VSS198
VSS199
VSS200
VSS R22 *0_4 TP_RSVD17_R
A19
A20
RSVD15
RSVD16
RSVD17
RSVD_TP_75
RSVD_TP_76
RSVD_TP_77
V4
V5
AL20 W6 E11 R23 *0_4 TP_RSVD18_R B20 N2
VSS40 VSS120 VSS201 RSVD18 RSVD_TP_78
AL17 V10 E8 U9 AD5
VSS41 VSS121 VSS202 RSVD19 RSVD_TP_79
AL12 U8 E5 T9 AD7
VSS42 VSS122 VSS203 RSVD20 RSVD_TP_80
AL9 U4 E2
VSS43 VSS123 VSS204
AL6 U2 D33 AC9 W3
VSS44 VSS124 VSS205 RSVD21 RSVD_TP_81
AL3 T35 D30 AB9 W2
VSS45 VSS125 VSS206 RSVD22 RSVD_TP_82
AK29 T34 D26 C1 N3
VSS46 VSS126 VSS207 RSVD_NCTF_23 RSVD_TP_83
AK27 T33 D9 A3 AE5
VSS47 VSS127 VSS208 RSVD_NCTF_24 RSVD_TP_84
AK25 T32 D6 J29 AD9
VSS48 VSS128 VSS209 RSVD26 RSVD_TP_85
AK20 T31 D3 J28
VSS49 VSS129 VSS210 RSVD27
AK17 T30 C34 A34
VSS50 VSS130 VSS211 RSVD_NCTF_28
AJ31 T29 C32 A33
VSS51 VSS131 VSS212 RSVD_NCTF_29
AJ23 T28 C29 C35 AP34
VSS52 VSS132 VSS213 RSVD_NCTF_30 VSS
AJ20 T27 C28
VSS53 VSS133 VSS214
AJ17 T26 C24 B35
VSS54 VSS134 VSS215 RSVD_NCTF_31
AJ14 T6 C22 AJ13
VSS55 VSS135 VSS216 RSVD32
AJ11 R10 C20 AJ12
VSS56 VSS136 VSS217 RSVD33
AJ8 P8 C19 AH25
VSS57 VSS137 VSS218 RSVD34
AJ5 P4 C16 AK26
VSS58 VSS138 VSS219 RSVD35
AJ2 P2 B31 AL26
VSS59 VSS139 VSS220 RSVD36
AH35 N35 B25 AR2
VSS60 VSS140 VSS221 RSVD_NCTF_37
AH34 N34 B21 AJ26
VSS61 VSS141 VSS222 RSVD38
C AH33 N33 B18 AJ27 C
VSS62 VSS142 VSS223 RSVD39
AH32 N32 B17 AP1
VSS63 VSS143 VSS224 RSVD_NCTF_40
AH31 N31 B13
VSS64 VSS144 VSS225 IC,AUB_CFD_rPGA,R1P0
AH30 N30 B11
VSS65 VSS145 VSS226
AH29 N29 B8
VSS66 VSS146 VSS227
AH28 N28 B6
VSS67 VSS147 VSS228
AH27 N27 B4
VSS68 VSS148 VSS229
AH26 N26 A29
VSS69 VSS149 VSS230
AH20 N6 A27
VSS70 VSS150 VSS231
AH17 M10 A23
VSS71 VSS151 VSS232
AH13 L35 A9
VSS72 VSS152 VSS233
AH9 L32
VSS73 VSS153
AH6 L29 AT35
VSS74 VSS154 VSS_NCTF1
AH3 L8 AT1
VSS75 VSS155 VSS_NCTF2
AG10 L5 AR34
UMA SG/DIS
NCTF

VSS76 VSS156 VSS_NCTF3


AF8 L2 B34
VSS77 VSS157 VSS_NCTF4
AF4 K34 B2
AF2
VSS78 VSS158
K33 B1
VSS_NCTF5 R90 NA NA
VSS79 VSS159 VSS_NCTF6
AE35 K30 A35
VSS80 VSS160 VSS_NCTF7 CFG0 R90 *3.01K_NC R77 NA 3.01K
IC,AUB_CFD_rPGA,R1P0 CFG3 R77 3.01K/F_4
IC,AUB_CFD_rPGA,R1P0 CFG4 R79 *3.01K_NC R79 NA NA
CFG7 R87 *3.01K/F_4
R87 NA NA

1 0
CFG[ 1:0 ] - PCI_Epress Configuration Select
D CFG4 Enabled; An external Display port * 11= 1 x 16 PEG D
(Display Port Disabled; No Physical Display Port device is connected to the Embedded * 10= 2 x 8 PEG
Presence) attached to Embedded Diplay Port Display port
The Clarkfield processor's PCI Express interface may
not meet PCI Express 2.0 jitter specifications. Intel CFG0
recommends placing a 3.01K +/- 5% pull down resistor to (PCI-Epress Single PEG Bifurcation enabled
PROJECT : LX6_LX7
VSS on CFG[7] pin for both rPGA and BGA components. Configuration Select) Quanta Computer Inc.
This pull down resistor should be removed when this
issue is fixed. CFG3 Size Document Number Rev
(PCI-Epress Static Normal Operation Lane Numbers Reversed Custom 1A
15 -> 0 , 14 -> 1 NB5 PROCESSER 4/4 (GND)
Lane Reversal) Date: Tuesday, February 02, 2010 Sheet 6 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

07
INTVRMEN - Integrated SUS 1.1V VRM Enable
High - Enable Internal VRs LFRAME#_C
LAD0_C
LAD1_C
LAD2_C
LAD3_C

C719 18P/50V_4 C811 C810 C809 C808 C807


*33P/50V_4 *33P/50V_4 *33P/50V_4 *33P/50V_4 *33P/50V_4
UMA CRT,LVDS&HDMI signals
2
IBEX PEAK-M (HDA,JTAG,SATA)
1
Y5 R494
U37A
IBEX PEAK-M (LVDS,DDI)
32.768KHZ 10M/J_4 SI Add U37D
A A
3
4

RTC_X1 B13 Ibex-M D33 21 PCH_LVDS_BLON T48 Ibex-M BJ46


RTCX1 FWH0 / LAD0 LAD0_C 32,33 L_BKLTEN SDVO_TVCLKINN
C720 18P/50V_4 RTC_X2 D13 1 OF 10 B33 21 PCH_DISP_ON T47 4 OF 10 BG46
RTCX2 FWH1 / LAD1 LAD1_C 32,33 L_VDD_EN SDVO_TVCLKINP
C32
LPC FWH2 / LAD2
FWH3 / LAD3
A32
LAD2_C
LAD3_C
32,33
32,33 21 PCH_DPST_PWM Y48
L_BKLTCTL SDVO_STALLN
BJ48
RTC_RST# C14 C34 BG48
RTCRST# FWH4 / LFRAME# LFRAME#_C 32,33 SDVO_STALLP
LDRQ0# A34 21 PCH_EDIDCLK AB48 L_DDC_CLK
SRTC_RST# D17 F34 R167 10K/J_4 Y45 BF45
SRTCRST# RTC (+3V) LDRQ1# / GPIO23
SERIRQ AB9
+3V
SERIRQ 32
21 PCH_EDIDDATA L_DDC_DATA
SDVO
SDVO_INTN
SDVO_INTP BH45
SM_INTRUDER# A16 SATA_RXN0_C 30 R215 10K/F_4 L_CTRL_CLK AB46
INTRUDER# R222 10K/F_4 L_CTRL_DATA L_CTRL_CLK DPB_CTRL_CLK
SATA0RXN AK7 SATA_RXP0_C 30 HDD +3V V48 L_CTRL_DATA SDVO_CTRLCLK T51
+RTC_CELL R496 330K/J_6 PCH_INVRMEN A14 AK6 T53 DPB_CTRL_DATA
INTVRMEN SATA0RXP SATA_TXN0_C .01U/16V_4 C293 R203 2.37K/F_4 LVDS_IBG SDVO_CTRLDATA
AK11 SATA_TXN0 30 AP39
SATA0TXN SATA_TXP0_C .01U/16V_4 C294 LVDS_VBG LVD_IBG
SATA0TXP AK9 SATA_TXP0 30 AP41 LVD_VBG DDPB_AUXN BG44
SATA_RXN1_C 30 TP11 BJ44

DISPLAY PORT B
ACZ_BCLK DDPB_AUXP DPB_HPD_Q
A30 HDA_BCLK SATA1RXN AH6 SATA_RXP1_C 30 ODD AT43 LVD_VREFH DDPB_HPD AU38
ACZ_SYNC D29 AH5 AT42
HDA_SYNC SATA1RXP SATA_TXN1_C .01U/16V_4 C291 LVD_VREFL DPB_LANE0_N
10,25 ACZ_SPKR P1 AH9 SATA_TXN1 30 BD42
ACZ_RST# SPKR SATA1TXN SATA_TXP1_C .01U/16V_4 C292 DDPB_0N DPB_LANE0_P
C30 AH8 SATA_TXP1 30 LVDS--A BC42

Digital Display Interface


HDA_RST# SATA1TXP DDPB_0P DPB_LANE1_N
25 ACZ_SDIN0 G30 21 PCH_LA_CLK# AV53 BJ42
HDA_SDIN0 LVDSA_CLK# DDPB_1N DPB_LANE1_P
F30 AF11 AV51 BG42
PV Change to Short Pad E32
HDA_SDIN1
HDA_SDIN2
IHDA SATA2RXN
SATA2RXP
AF9
21 PCH_LA_CLK LVDSA_CLK DDPB_1P
DDPB_2N
BB40 DPB_LANE2_N
F32 AF7 21 PCH_LA_DATAN0 BB47 BA40 DPB_LANE2_P
ACZ_SDOUT HDA_SDIN3 SATA2TXN LVDSA_DATA#0 DDPB_2P DPB_LANE3_N
B29 AF6 21 PCH_LA_DATAN1 BA52 AW38
R200 *0_4/S GPIO33 HDA_SDO SATA2TXP LVDSA_DATA#1 DDPB_3N DPB_LANE3_P
32 GPIO33_E H32 21 PCH_LA_DATAN2 AY48 BA38
short0402 J30
HDA_DOCK_EN# / GPIO33 (+3V) AH3 AV47
LVDSA_DATA#2 DDPB_3P
HDA_DOCK_RST# / GPIO13 (+3V_S5) SATA3RXN
AH1
LVDSA_DATA#3
Y49
SATA SATA3RXP
SATA3TXN
AF3 21 PCH_LA_DATAP0 BB48
LVDSA_DATA0
DDPC_CTRLCLK
DDPC_CTRLDATA
AB49
AF1 21 PCH_LA_DATAP1 BA50

DISPLAY PORT C
R453 51_4
PCH_JTAG_TCK SATA3TXP LVDSA_DATA1
M3 21 PCH_LA_DATAP2 AY49 BE44
JTAG_TCK SATA_RXN4_C LVDSA_DATA2 DDPC_AUXN
AD9 SATA_RXN4_C 30 AV48 BD44
R472 *51_4PCH_JTAG_TMS SATA4RXN SATA_RXP4_C LVDSA_DATA3 DDPC_AUXP
+1.05V K3 JTAG_TMS SATA4RXP AD8
SATA_TXN4_C .01U/16V_4
SATA_RXP4_C
C712
30 SATA HDD2 DDPC_HPD AV40
AD6 SATA_TXN4 30 LVDS--B
R449 *51_4PCH_JTAG_TDI SATA4TXN SATA_TXP4_C .01U/16V_4 C711
K1 AD5 AP48 BE40
B
JTAG_TDI JTAG SATA4TXP SATA_TXP4 30 21 PCH_LB_CLK#
21 PCH_LB_CLK AP47
LVDSB_CLK#
LVDSB_CLK
DDPC_0N
DDPC_0P
BD40 B
R464 *51_4PCH_JTAG_TDO J2 AD3 SATA_RXN5_C SATA_RXN5_C 28 BF41
JTAG_TDO SATA5RXN SATA_RXP5_C DDPC_1N
AD1 SATA_RXP5_C 28 21 PCH_LB_DATAN0 AY53 BH41
R473 *51_4PCH_JTAG_RST# SATA5RXP SATA_TXN5_C .01U/16V_4 C713 LVDSB_DATA#0 DDPC_1P
J4
TRST# SATA5TXN
AB3
SATA_TXP5_C .01U/16V_4 C714
SATA_TXN5 28 E-SATA 21 PCH_LB_DATAN1 AT49
LVDSB_DATA#1 DDPC_2N
BD38
SATA5TXP AB1 SATA_TXP5 28 21 PCH_LB_DATAN2 AU52 LVDSB_DATA#2 DDPC_2P BC38
AT53 BB36
LVDSB_DATA#3 DDPC_3N
DDPC_3P BA36
SPI_CLK_R BA2 AF16 21 PCH_LB_DATAP0 AY51
SPI_CLK SATAICOMPO LVDSB_DATA0
21 PCH_LB_DATAP1 AT48 U50
SPI_CS0#_R SATA_COMP R173 37.4/F_4 LVDSB_DATA1 DDPD_CTRLCLK
AV3 AF15 +1.05V 21 PCH_LB_DATAP2 AU50 U52
SPI_CS0# SATAICOMPI LVDSB_DATA2 DDPD_CTRLDATA
21 PCH_CRT_B AT51

DISPLAY PORT D
SPI_CS1# SATA_LED# R232 150/F_4 LVDSB_DATA3
AY3 T3 BC46
TP17 SPI_CS1# SPI SATALED# SATA_LED# 28
21 PCH_CRT_G AA52 CRT_BLUE
DDPD_AUXN
DDPD_AUXP BD46
R231 150/F_4 AB53 AT38
SPI_SI_R CRT_GREEN DDPD_HPD
AY1 21 PCH_CRT_R AD53
SPI_MOSI DGT_STOP# R230 150/F_4 CRT_RED
(+3V) Y9 DGT_STOP# 28 CRT BJ40
SPI_SO SATA0GP / GPIO21 DGT_RESET DDPD_0N
AV1 (+3V_S5) V1 DGT_RESET 28 21 PCH_DDCCLK V51 BG40
SPI_MISO SATA1GP / GPIO19 CRT_DDC_CLK DDPD_0P
21 PCH_DDCDATA V53 CRT_DDC_DATA DDPD_1N BJ38
IbexPeak-M_Rev1_0 BG38
DDPD_1P
21 PCH_HSYNC Y53 CRT_HSYNC DDPD_2N BF37
21 PCH_VSYNC Y51 BH37
CRT_VSYNC DDPD_2P
DDPD_3N BE36
1205 The SATALED# signal is R214 1K/F_4 DAC_IREF AD48 BD36
DAC_IREF DDPD_3P
open-collector and requires a AB51
CRT_IRTN
weak external pull-up (8.2 k IbexPeak-M_Rev1_0
to 10 k ) to +V3.3.

R470 10K/J_4 SATA_LED#

+3V
R156 10K/J_4 DGT_STOP#
R451 10K/J_4 DGT_RESET

R661 10K/J_4 GPIO33_E


C C
SI2 ADD

UMA HDMI signals +3V

DPB_CTRL_CLK R545 *0_4 SDVO_CLK 31 Q12


2

DPB_CTRL_DATA R544 *0_4 SDVO_DATA 31 *2N7002K


DPB_LANE0_N C369 *.1U/10V_4 IN_D2# 31
DPB_LANE0_P C374 *.1U/10V_4 IN_D2 31 DPB_HPD_Q 1 3 HDMI_HPD_CON 31 2,8,9,11,36,37,43 +1.05V
DPB_LANE1_N C362 *.1U/10V_4 IN_D1# 31 2,3,8,9,10,11,12,13,21,22,23,24,25,26,27,28,29,30,31,32,33,34,37,40,41 +3V
DPB_LANE1_P C357 *.1U/10V_4 IN_D1 31 22,28,32,33,34,35,36,39,41,42,43 +3VPCU
DPB_LANE2_N C370 *.1U/10V_4 IN_D0# 31 11 +RTC_CELL
DPB_LANE2_P C373 *.1U/10V_4 IN_D0 31 R234
DPB_LANE3_N C355 *.1U/10V_4 IN_CLK# 31 *100K/F_4 R233 *0_4
DPB_LANE3_P C346 *.1U/10V_4 IN_CLK 31

For AUDIO RTC +RTC_CELL


1mA
4M byte SPI ROM
PV change short pad
+3VPCU RB500V-40 CR2 C388 1U/6.3V_4
U34 Socket: DG008000031
+3VRTC_2 R228 20K/F_4 RTC_RST# +3V 8 1 SPI_CS0# R483 *0_4/S SPI_CS0#_R
R524 33_4 ACZ_RST# RB500V-40 CR1 C368 1U/6.3V_4 VDD CE# SPI_CLK R466short0402 *0_4/S SPI_CLK_R
D 25 ACZ_RST#_AUDIO
R514 33_4 ACZ_SDOUT SCK
6
SPI_SI R455short0402 *0_4/S SPI_SI_R
MXIC AKE39FP0Z00 D
25 ACZ_SDOUT_AUDIO 5
C736 *10P/50V_4 SPI_HOLD# SI SPI_SO_R R475short0402 *0_4/S SPI_SO
1
J2
2
*SHORT_ PAD1 R469 10K/F_4
7
HOLD# SO
2
short0402
WINBOND AKE391P0N00
25 ACZ_SYNC_AUDIO R512 33_4 ACZ_SYNC C710 0.1U/10V_4 4 3 SPI_WP# R467 10K/F_4 +3V
C734 *10P/50V_4 R229 20K/F_4 SRTC_RST# VSS WP#
C372 1U/6.3V_4 W25Q32BVSSIG
25 BIT_CLK_AUDIO R502 33_4 ACZ_BCLK
C723 *10P/50V_4 1 2
J1 *SHORT_ PAD1
PROJECT : LX6_LX7
R227 1M_4 SM_INTRUDER# Quanta Computer Inc.
BT1
R236 1K/F_4 +3VRTC_1 1 2 Size Document Number Rev
Custom 1A
NB5 PCH 1/5 (SATA,HDA,LPC)
BAT_CONN Date: Tuesday, February 02, 2010 Sheet 7 of 44
1 2 3 4 5 6 7 8
5 4 3 2 1

IBEX PEAK-M (GND)


AY7
B11
U37I
VSS[159] VSS[259]
VSS[160] VSS[260]
H49
H5 IBEX PEAK-M (PCI-E,SMBUS,CLK)
08
B15 J24
VSS[161] VSS[261] U37B
B19 K11
VSS[162] VSS[262] +3VS5
B23 K43
VSS[163] VSS[263]
B31 K47 Ibex-M
B35
VSS[164] VSS[264]
VSS[165] VSS[265]
K7 33 PCIE_RXN0 PCIE_RXN0 BG30
PERN1 2 OF 10 SMBus
B39 L14 33 PCIE_RXP0 PCIE_RXP0 BJ30 B9 SMBALERT# 10K/F_4 R489
D VSS[166] VSS[266] C334 0.1U/10V_4 PCIE_TXN0_C PERP1 (+3V_S5) SMBALERT# / GPIO11 PCLK_SMB 2.2K_4 R166
D
B43
VSS[167] VSS[267]
L18 [WLAN] 33 PCIE_TXN0
C340 0.1U/10V_4 PCIE_TXP0_C
BF29
PETN1 SMBCLK
H14
PDAT_SMB 2.2K_4 R486
B47 L2 33 PCIE_TXP0 BH29 C8
VSS[168] VSS[268] PETP1 SMBDATA SMBL0ALERT# 10K/F_4 R172
B7 L22 (+3V_S5) SML0ALERT# / GPIO60 J14
VSS[169] VSS[269] PCIE_RXN1_LAN AW30
BG12 L32 29 PCIE_RXN1_LAN C6 SMB_CLK_ME0 2.2K_4 R478
VSS[170] VSS[270] PCIE_RXP1_LAN BA30 PERN2 SML0CLK SMB_DATA_ME0 2.2K_4 R463
BB12 L36 29 PCIE_RXP1_LAN G8
VSS[171] VSS[271] C350 0.1U/10V_4 PCIE_TXN1_C BC30 PERP2 SML0DATA SML1ALERT# 10K/F_4 R177
BB16
VSS[172] VSS[272]
L40 [LAN] 29 PCIE_TXN1_LAN
C343 0.1U/10V_4 PCIE_TXP1_C BD30 PETN2 (+3V_S5) SML1ALERT# / GPIO74 M14
BB20 L52 29 PCIE_TXP1_LAN (+3V_S5) SML1CLK / GPIO58 E10 SMB_CLK_ME1 4.7K_4 R148
VSS[173] VSS[273] PETP2
BB24 M12 G12 SMB_DATA_ME1 4.7K_4 R161
VSS[174] VSS[274] (+3V_S5) SML1DATA / GPIO75
BB30 M16 AU30
VSS[175] VSS[275] PERN3
BB34 M20 AT30
VSS[176] VSS[276] PERP3
BB38 N38 AU32
VSS[177] VSS[277] PETN3
BB42 M34 AV32
VSS[178] VSS[278] PETP3
BB49 M38 T13
VSS[179] VSS[279] CL_CLK1
BB5
BC10
VSS[180] VSS[280]
M42
M46
BA32
BB32
PERN4 Controller T11
VSS[181] VSS[281] PERP4 CL_DATA1
BC14
BC18
VSS[182] VSS[282]
M49
M5
BD32
BE32
PETN4 Link T9
VSS[183] VSS[283] PETP4 CL_RST1#
BC2 M8
VSS[184] VSS[284] T22
BC22 N24 BF33
VSS[185] VSS[285] T23 PERN5
BC32 P11 BH33
VSS[186] VSS[286] T24 PERP5
BC36 AD15 BG32
VSS[187] VSS[287] T25 PETN5
BC40 P22 BJ32
VSS[188] VSS[288] PETP5
BC44
VSS[189] VSS[289]
P30
PCI-E* PEG
BC52 P32 BA34
VSS[190] VSS[290] PERN6
BH9 P34 AW34 H1 PEG_CLKREQ#
BD48
VSS[191] VSS[291]
P42 BC34
PERP6 (+3V_S5)PEG_A_CLKRQ# / GPIO47 AD43
VSS[192] VSS[292] PETN6 CLKOUT_PEG_A_N CLK_PCIE_VGA# 14
BD49 P45 BD34 AD45 CLK_PCIE_VGA 14
VSS[193] VSS[293] +3V PETP6 CLKOUT_PEG_A_P
BD5 P47 AN4 CLK_PCIE_3GPLL# 3
VSS[194] VSS[294] CLK1_OE# R446 10K/J_4 CLKOUT_DMI_N
C BE12 R2 AT34 AN2 CLK_PCIE_3GPLL 3 C
VSS[195] VSS[295] CLK2_OE# R471 10K/J_4 PERN7 CLKOUT_DMI_P
BE16 R52 AU34
VSS[196] VSS[296] PERP7
BE20 T12 AU36
VSS[197] VSS[297] +3VS5 PETN7
BE24 T41 AV36 AT1 DREFSSCLK# 3
VSS[198] VSS[298] PETP7 CLKOUT_DP_N / CLKOUT_BCLK1_N
BE30 T46 AT3 DREFSSCLK 3
VSS[199] VSS[299] PCIE_CLK_REQ0# R164 10K/J_4 CLKOUT_DP_P / CLKOUT_BCLK1_P
BE34 T49 BG34
VSS[200] VSS[300] PCIE_CLK_REQ3# R487 10K/J_4 PERN8
BE38 T5 BJ34
VSS[201] VSS[301] PCIE_CLK_REQ4# R141 10K/J_4 PERP8
BE42 T8 BG36 AW24 CLK_BUF_PCIE_3GPLL# 2
VSS[202] VSS[302] PCIE_CLK_REQB#_R R170 10K/J_4 PETN8 CLKIN_DMI_N
BE46 U30 BJ36 BA24 CLK_BUF_PCIE_3GPLL 2
VSS[203] VSS[303] PETP8 CLKIN_DMI_P
BE48 U31 AK48
VSS[204] VSS[304] PCIE_CLK_REQ5# R462 10K/J_4 CLKOUT_PCIE0N
BE50 U32 AK47
VSS[205] VSS[305] CLKOUT_PCIE0P
BE6 U34 AP3 CLK_BUF_BCLK_N 2
VSS[206] VSS[306] PCIE_CLK_REQ0# CLKIN_BCLK_N
BE8 P38 P9 AP1 CLK_BUF_BCLK_P 2
VSS[207] VSS[307] PCIECLKRQ0# / GPIO73(+3V_S5) CLKIN_BCLK_P
BF3 V11 AM43

From CLK BUFFER


VSS[208] VSS[308] 33 CLK_PCIE_WLAN# CLKOUT_PCIE1N
BF49 P16 PEG_CLKREQ# R474 10K/J_4 33 CLK_PCIE_WLAN AM45
VSS[209] VSS[309] CLKOUT_PCIE1P
BF51
VSS[210] VSS[310]
V19 MiniWLAN 33 CLK1_OE# CLKIN_DOT_96N
F18 CLK_BUF_DREFCLK# 2
BG18 V20 33 PCIE_CLK_REQ1# U4 E18 CLK_BUF_DREFCLK 2
VSS[211] VSS[311] PCIECLKRQ1# / GPIO18(+3V) CLKIN_DOT_96P
BG24 V22
VSS[212] VSS[312]
BG4 V30 AM47
VSS[213] VSS[313] CLKOUT_PCIE2N
BG50 V31 AM48 AH13 CLK_BUF_DREFSSCLK# 2
VSS[214] VSS[314] CLKOUT_PCIE2P CLKIN_SATA_N / CKSSCD_N
BH11 V32 AH12 CLK_BUF_DREFSSCLK 2
VSS[215] VSS[315] CLK2_OE# CLKIN_SATA_P / CKSSCD_P
BH15 V34 N4
VSS[216] VSS[316] PCIECLKRQ2# / GPIO20(+3V)
BH19
VSS[217] VSS[317]
V35 SI Del L21
BH23 V38 29 CLK_PCIE_LAN# AH42 P41 CLK_ICH_14M 2
VSS[218] VSS[318] CLKOUT_PCIE3N REFCLK14IN
BH31 V43 29 CLK_PCIE_LAN AH41
VSS[219] VSS[319] CLKOUT_PCIE3P C794 *5.6P/50V_4
BH35
VSS[220] VSS[320]
V45 LAN
BH39 V46 29 PCIE_CLK_REQ3# A8 J42 CLK_PCI_FB CLK_PCI_FB 9
VSS[221] VSS[321] PCIECLKRQ3# / GPIO25(+3V_S5) CLKIN_PCILOOPBACK
BH43 V47
VSS[222] VSS[322] Q37 2N7002E
BH47 V49 AM51
VSS[223] VSS[323] SMB_CLK_ME1 CLKOUT_PCIE4N
B BH7 V5 3 1 MBCLK2 12,17,32 AM53 AH51 XTAL25_IN R530 *0_4 DIS only B
VSS[224] VSS[324] CLKOUT_PCIE4P XTAL25_IN
C12 V7 AH53 XTAL25_OUT
VSS[225] VSS[325] PCIE_CLK_REQ4# XTAL25_OUT
C50 V8 M9
VSS[226] VSS[326] PCIECLKRQ4# / GPIO26(+3V_S5)
D51 W2 AF38 XCLK_RCOMP +1.05V
2

VSS[227] VSS[327] XCLK_RCOMP R210 90.9/F_4


E12 W52
VSS[228] VSS[328]
E16 Y11 AJ50
VSS[229] VSS[329] CLKOUT_PCIE5N CLK_FLEX0 T15
E20 Y12 AJ52 T45
E24
VSS[230] VSS[330]
Y15
CLKOUT_PCIE5P (+3V)CLKOUTFLEX0 / GPIO64 P43 CLK_FLEX1 T13
VSS[231] VSS[331] +3V (+3V_S5) (+3V)CLKOUTFLEX1 / GPIO65
E30 Y19 PCIE_CLK_REQ5# H6 T42 CLK_FLEX2 T14
E34
VSS[232] VSS[332]
Y23
PCIECLKRQ5# / GPIO44 (+3V) CLKOUTFLEX2 / GPIO66 N50 CLK_FLEX3
VSS[233] VSS[333] (+3V) CLKOUTFLEX3 / GPIO67 R536 22_4
CLK_48M_CR 24
E38 Y28
VSS[234] VSS[334]
E42 Y30 AK53
2

VSS[235] VSS[335] CLKOUT_PEG_B_N


E46
E48
VSS[236] VSS[336]
Y31
Y32 Q39
AK51
CLKOUT_PEG_B_P Clock Flex
VSS[237] VSS[337] SMB_DATA_ME1 3 PCIE_CLK_REQB#_R
E6 Y38 1 MBDATA2 12,17,32 P13
E8
VSS[238] VSS[338]
Y43 (+3V_S5)
PEG_B_CLKRQ# / GPIO56
VSS[239] VSS[339] 2N7002E
F49 Y46
VSS[240] VSS[340] IbexPeak-M_Rev1_0
F5 P49
VSS[241] VSS[341]
G10 Y5
VSS[242] VSS[342]
G14
VSS[243] VSS[343]
Y6 PV Change to 27P
G18 Y8
G2
VSS[244] VSS[344]
VSS[245] VSS[345]
P24 FOR UMA/SG
G22 T43 Q9 2N7002E XTAL25_IN C750 27P/50V_4
VSS[246] VSS[346] PDAT_SMB
G32 AD51 3 1 CGDAT_SMB 2,12,13,26,33
VSS[247] VSS[347]
G36 AT8
VSS[248] VSS[348]
G40 AD47
VSS[249] VSS[349] R162 R531 Y6
G44 Y47
2

VSS[250] VSS[350] 1M/F_4


G52 AT12 10K/F_4 25MHZ
VSS[251] VSS[351]
AF39 AM6
VSS[252] VSS[352] XTAL25_OUT C751 27P/50V_4
A H16 AT13 A
VSS[253] VSS[353]
H20 AM5 +3V
VSS[254] VSS[354]
H30
VSS[255] VSS[355]
AK45 SI Change footprint
H34 AK39
VSS[256] VSS[356]
H38 AV14
VSS[257] VSS[366] R159
H42 2,7,9,11,36,37,43 +1.05V
VSS[258] 10K/F_4 3,9,10,11,41 +3VS5 PROJECT : LX6_LX7
2

IbexPeak-M_Rev1_0 2,3,7,9,10,11,12,13,21,22,23,24,25,26,27,28,29,30,31,32,33,34,37,40,41 +3V


PCLK_SMB
Q8
3
2N7002E
1
Quanta Computer Inc.
CGCLK_SMB 2,12,13,26,33
Size Document Number Rev
Custom 1A
NB5 PCH 2/5 (PCIE, SMBUS, CK)
Date: Tuesday, February 02, 2010 Sheet 8 of 44
5 4 3 2 1
1 2 3 4 5 6 7 8

IBEX PEAK-M (DMI,FDI,GPIO)


U37C
09
BA18 FDI_TXN0 3
FDI_RXN0
BC24 Ibex-M BH17

A
IBEX PEAK-M (PCI,USB,NVRAM) 3
3
3
DMI_RXN0
DMI_RXN1
DMI_RXN2
BJ22
AW20
DMI0RXN
DMI1RXN 3 OF 10 FDI_RXN1
FDI_RXN2
BD16
BJ16
FDI_TXN1
FDI_TXN2
FDI_TXN3
3
3
3 A
DMI2RXN FDI_RXN3
3 DMI_RXN3 BJ20 BA16 FDI_TXN4 3
U37E DMI3RXN FDI_RXN4
BE14 FDI_TXN5 3
FDI_RXN5
H40
AD0 Ibex-M NV_CE#0
AY9 3 DMI_RXP0 BD24
DMI0RXP FDI_RXN6
BA14 FDI_TXN6 3
+3V N34 5 OF 10 BD1 3 DMI_RXP1 BG22 BC12 FDI_TXN7 3
RP37 AD1 NV_CE#1 DMI1RXP FDI_RXN7
C44 AP15 3 DMI_RXP2 BA20
PCI_PIRQD# AD2 NV_CE#2 DMI2RXP
5 6 A38 BD8 3 DMI_RXP3 BG20 BB18 FDI_TXP0 3
PCI_IRDY# PCI_SERR# AD3 NV_CE#3 DMI3RXP FDI_RXP0
4 7 C36 BF17 FDI_TXP1 3
PCI_STOP# BT_COMBO_EN# AD4 FDI_RXP1
3 8 J34 AV9 3 DMI_TXN0 BE22 BC16 FDI_TXP2 3
PCI_PIRQA# PCI_FRAME# AD5 NV_DQS0 DMI0TXN FDI_RXP2
2 9 A40 BG8 BF21 BG16
PCI_PIRQC# 1 10 +3V D45
AD6
NVRAM NV_DQS1 3
3
DMI_TXN1
DMI_TXN2 BD20
DMI1TXN DMI FDI FDI_RXP3
AW16
FDI_TXP3
FDI_TXP4
3
3
AD7 DMI2TXN FDI_RXP4
E36 AP7 3 DMI_TXN3 BE18 BD14 FDI_TXP5 3
10P8R-8.2K AD8 NV_DQ0 / NV_IO0 DMI3TXN FDI_RXP5
H48 AP6 BB14 FDI_TXP6 3
AD9 NV_DQ1 / NV_IO1 FDI_RXP6
E40 AT6 3 DMI_TXP0 BD22 BD12 FDI_TXP7 3
+3VS5 AD10 NV_DQ2 / NV_IO2 DMI0TXP FDI_RXP7
C40 AT9 3 DMI_TXP1 BH21
RP21 AD11 NV_DQ3 / NV_IO3 DMI1TXP
M48 BB1 3 DMI_TXP2 BC20
USB_OC0# AD12 NV_DQ4 / NV_IO4 DMI2TXP
5 6 M45 AV6 3 DMI_TXP3 BD18 BJ14 FDI_INT 3
USB_OC4# USB_OC1# AD13 NV_DQ5 / NV_IO5 DMI3TXP FDI_INT
4 7 F53 BB3 BF13 FDI_FSYNC0 3
USB_OC5# USB_OC2# AD14 NV_DQ6 / NV_IO6 FDI_FSYNC0
3 8 M40 BA4 BH13 FDI_FSYNC1 3
USB_OC6# USB_OC3# AD15 NV_DQ7 / NV_IO7 FDI_FSYNC1
2 9 M43 BE4 BH25 BJ12 FDI_LSYNC0 3
USB_OC7# AD16 NV_DQ8 / NV_IO8 DMI_COMP DMI_ZCOMP FDI_LSYNC0
1 10 +3VS5 J36 BB6 +1.05V BF25 BG14 FDI_LSYNC1 3
AD17 NV_DQ9 / NV_IO9 R501 49.9/F_4 DMI_IRCOMP FDI_LSYNC1
K48 BD6
10P8R-8.2K AD18 NV_DQ10 / NV_IO10
F40 BB7
AD19 NV_DQ11 / NV_IO11
C42 BC8 System Power Management
+3V AD20 NV_DQ12 / NV_IO12
K46 BJ8 3 XDP_DBRESET# T6 P12 SUSB# 32
RP38 AD21 NV_DQ13 / NV_IO13 SYS_RESET# SLP_S3#
M51 BJ6 M6 H7 SUSC# 32
PCI_PLOCK# AD22 NV_DQ14 / NV_IO14 R500 0_4 SYS_PWROK SLP_S4#
5 6 J52 BG6 37 IMVP_PWRGD B17
REQ3# PCI_PERR# AD23 NV_DQ15 / NV_IO15 R499 *0_4 PCH_PWROK PWROK SLP_M#
4 7 K51 22,32 ECPWROK K5 K8 TP9
PCI_DEVSEL# 3 REQ0# AD24 MEPWROK SLP_M#
8 L34 BD3 NV_ALE 10 N2
PCI_TRDY# PCI_PIRQB# AD25 NV_ALE RSV_ICH_LAN_RST# A10 TP23
B 2 9 F42 AY6 NV_CLE 10 B
INTH# AD26 NV_CLE LAN_RST#
1 10 +3V J40 3 PM_DRAM_PWRGD D9 M1 SUS_PWR_ACK 32
G46
AD27
C16
DRAMPWROK (+3V_S5) SUS_PWR_DN_ACK / GPIO30 P7
AD28 32 RSMRST# RSMRST# (+3V_S5) ACPRESENT / GPIO31 AC_PRESENT 32
10P8R-8.2K F44 AU2 NV_RCOMP R146 32.4/F_4 Y1 CLKRUN# 32
M47
AD29 NV_RCOMP R140 *0/short_4 P5 (+3V) CLKRUN# / GPIO32 P8
H36
AD30
AD31
PCI NV_RB#
AV7
32 DNBSWON# PWRBTN# (+3V_S5) SUS_STAT# / GPIO61
(+3V_S5) SUSCLK / GPIO62
F3
E4 SLP_S5#
TP16
PM_RI#
(+3V_S5) SLP_S5# / GPIO63 PM_BATLOW#
TP15
J50 AY8 F14 (+3V_S5) BATLOW# / GPIO72 A6
C/BE0# NV_WR#0_RE# RI#
G42 AY5 29,33 PCIE_WAKE# J12
C/BE1# NV_WR#1_RE# WAKE#
H47 3 PM_SYNC BJ10 F6
C/BE2# PMSYNCH (+3V_S5) SLP_LAN# / GPIO29
G34 AV11
C/BE3# NV_WE#_CK0
BF5
PCI_PIRQA# NV_WE#_CK1 IbexPeak-M_Rev1_0
G38
PCI_PIRQB# PIRQA#
H51
PCI_PIRQC# PIRQB#
B37 H18
PCI_PIRQD# A44
PIRQC# USBP0N
J18
USBP0-
USBP0+
28
28
Left_USB
PIRQD# USBP0P
A18
REQ0# F51
USBP1N
C18
USBP1-
USBP1+
28
28
E-Sata
BT_COMBO_EN# A46 REQ0# USBP1P
N20
33 BT_COMBO_EN#
REQ2# B45
REQ1# / GPIO50(+5V) USBP2N
P20
USBP2-
USBP2+
28
28
Fingerprint
REQ3# REQ2# / GPIO52(+5V) USBP2P
M53 J20
REQ3# / GPIO54(+5V) USBP3N
L20
USBP3-
USBP3+
28
28
Touchscreen
USBP3P
F48 F20
10
10
GNT0#
GNT1# K45
GNT0# USBP4N
G20
USBP4-
USBP4+
22
22
Webcam +3V
PCI_GNT2# GNT1# / GPIO51(+3V) USBP4P
F36 A20
GNT2# / GPIO53(+3V) USBP5N +3V REQ2# R511 8.25K/F_4
10 GNT3# H53 C20
GNT3# / GPIO55(+3V) USBP5P PIRQE# R509 8.25K/F_4
M22
PIRQE# USBP6N CLKRUN# R460 8.25K/F_4 PIRQF# R537 8.25K/F_4
B41 N22
PIRQF# PIRQE# / GPIO2 (+5V) USBP6P XDP_DBRESET# R153 1K/J_4 PIRQG# R208 8.25K/F_4
K53 B21
PIRQG# PIRQF# / GPIO3 (+5V) USBP7N
C A36 D21 C
INTH# PIRQG# / GPIO4 (+5V) USBP7P
26 INTH# A48 H22 USBP8- 28
PIRQH# / GPIO5 (+5V) USBP8N
J22
K6
USBP8P
E22
USBP8+
USBP9-
28
28
Right_USB 17"/SATA LED
PCIRST# USBP9N
F22
PCI_SERR# E44
USBP9P
A22
USBP9+ 28 Right_USB 15"/SATA LED +3VS5
32 PCI_SERR#
PCI_PERR# E50
SERR#
PERR#
USB USBP10N
USBP10P
C22
G24
USBP10-
USBP10+
33
33 WLAN RSMRST# R497 10K/J_4 PM_RI# R165 10K/J_4
USBP11N USBP11- 28
H24 RSV_ICH_LAN_RST# R490 10K/F_4 PM_BATLOW# R479 10K/J_4
PCI_IRDY# A42
USBP11P
L24
USBP11+
USBP12-
28
24
Right_USB 15" PCH_PWROK R498 10K/J_4 PCIE_WAKE# R147 1K/J_4
IRDY# USBP12N PLTRST# R149 100K/F_4
H44 M24
PCI_DEVSEL# F46
PAR USBP12P
A24
USBP12+
USBP6-
24
28
Card Reaer
PCI_FRAME# DEVSEL# USBP13N SUS_PWR_ACK R142 10K/J_4
C46 C24
FRAME# USBP13P USBP6+ 28 Blue tooth AC_PRESENT R157 10K/J_4
PCI_PLOCK# D49
PLOCK#
B25 USB_BIAS R503 22.6/F_4
PCI_STOP# USBRBIAS#
D41
PCI_TRDY# STOP#
C48 D25
TRDY# USBRBIAS
TP8 PME# M7
PME# USB_OC0#
N16
PLTRST# D5
(+3V_S5)OC0# / GPIO59 J16 USB_OC1#
3,29,32,33,34 PLTRST# PLTRST# (+3V_S5)OC1# / GPIO40 F16 USB_OC2#
R535 33_4 CLK_33M_DEBUG_R N52
(+3V_S5)OC2# / GPIO41 L16 USB_OC3#
33 CLK_33M_DEBUG
32 CLK_33M_KBC CLK_33M_KBC_R P53
CLKOUT_PCI0
CLKOUT_PCI1
(+3V_S5)OC3# / GPIO42
(+3V_S5)OC4# / GPIO43 E14 USB_OC4# FOR SG ONLY
R534 33_4 P46 G16 USB_OC5#
CLK_PCI_FB_C CLKOUT_PCI2 (+3V_S5)OC5# / GPIO9 USB_OC6# R515 0_4 REQ2# R163 0_4 SATA2GP
8 CLK_PCI_FB P51 F12 21 DGPU_SELECT# 32,40 DGPU_PWR_EN SATA2GP 10
R533 22_4 P48
CLKOUT_PCI3 (+3V_S5)OC6# / GPIO10 T15 USB_OC7# R532 0_4 REQ3# R204 0_4 TACH0
CLKOUT_PCI4 (+3V_S5)OC7# / GPIO14 21 EDID_SELECT#
R202 0_4 PCI_GNT2#
32,34,39,40 DGPU_PWROK
R461 0_4 SATA4GP
TACH0 10
21 PWM_SELECT# 34 DGPU_HOLD_RST# SATA4GP 10
D D
IbexPeak-M_Rev1_0

PROJECT : LX6_LX7
Quanta Computer Inc.
2,7,8,11,36,37,43 +1.05V
2,3,7,8,10,11,12,13,21,22,23,24,25,26,27,28,29,30,31,32,33,34,37,40,41 +3V Size Document Number Rev
Custom 1A
3,8,10,11,41 +3VS5 NB5 PCH 3/5 (PCI,ONFI,USB,DMI)
Date: Tuesday, February 02, 2010 Sheet 9 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

IBEX PEAK-M (GND)


BMBUSY#
IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)
Y3
U37F

BMBUSY# / GPIO0 (+3V)


Ibex-M
6 OF 10 CLKOUT_PCIE6N
CLKOUT_PCIE6P
AH45
AH46
AB16
AA19
U37H

VSS[0]
VSS[1]
VSS[80]
VSS[81]
AK30
AK31
9 GNT3#

Swap Override jumper


R539

A16 swap override Strap/Top-Block


*10K/F_4

10
32 SIO_EXT_SMI# C38 AA20 AK32
TACH1 / GPIO1 (+3V) AA22
VSS[2] VSS[82]
AK34
VSS[3] VSS[83]
32 SIO_EXT_SCI# D37
TACH2 / GPIO6 (+3V) AM19
VSS[4] VSS[84]
AK35 Low = A16 swap
AF48 AA24 AK38 override/Top-Block
CLKOUT_PCIE7N VSS[5] VSS[85]
J32 AF47 AA26 AK43 GNT3#
A
28 BT_OFF# TACH3 / GPIO7 (+3V) GPIO CLKOUT_PCIE7P
AA28
VSS[6]
VSS[7]
VSS[86]
VSS[87]
AK46
Swap Override enabled
High = Default A
ACCLED_EN F10 AA30 AK49
28 ACCLED_EN GPIO8 (+3V_S5) MISC GATEA20 32
AA31
VSS[8]
VSS[9]
VSS[88]
VSS[89]
AK5
29,32 LAN_DISABLE# R137 *0_4 LAN_DISABLE_R# K9 U2 AA32 AK8
LAN_PHY_PWR_CTRL / GPIO12 (+3V_S5) A20GATE VSS[10] VSS[90]
CLK_CPU_BCLK# 3 AB11 VSS[11] VSS[91] AL2
33 RF_OFF# T7 AB15 AL52
GPIO15 (+3V_S5) VSS[12] VSS[92]
CLK_CPU_BCLK 3 AB23 AM11
SATA4GP VSS[13] VSS[93]
9 SATA4GP AA2 AM3 AB30 BB44
SATA4GP / GPIO16 (+3V) CLKOUT_BCLK0_N/CLKOUT_PCIE8N R493 *0/short_4 AB31
VSS[14] VSS[94]
AD24
H_PECI 3 VSS[15] VSS[95]
9 TACH0 TACH0 F38 AM1 AB32 AM20
TACH0 / GPIO17(+3V) CLKOUT_BCLK0_P/CLKOUT_PCIE8P VSS[16] VSS[96] SV_SET_UP R155 10K/F_4
MV Add AB39
VSS[17] VSS[97]
AM22 +3V
BIOS_REC Y7 BG10 PCH_PECI_R C991 100P/50V_4 AB43 AM24
SCLOCK / GPIO22 (+3V) PECI VSS[18] VSS[98]
AB47 AM26
GPIO27 VSS[19] VSS[99]
TP10 AB12 GPIO27 (+3V_S5) RCIN# T1 RCIN# 32 AB5 VSS[20] VSS[100] AM28
AB8 BA42
TP_PCH_GPIO28 V13
GPIO28 (+3V_S5)
CPU PROCPWRGD
BE10 H_PWRGOOD 3 AC2
VSS[21]
VSS[22]
VSS[101]
VSS[102]
AM30 SV_SET_UP 1-X High = Strong (Default)
AC52 VSS[23] VSS[103] AM31
9 SATA2GP SATA2GP AB7 BD10 PCH_THRMTRIP#_R PM_THRMTRIP# 3,32 AD11 AM32
SATA2GP / GPIO36 (+3V) THRMTRIP# R158 56.2/F_4 AD12
VSS[24] VSS[104]
AM34
PCH_GPIO37 AB13 VSS[25] VSS[105]
BA22 +1.05V_VTT AD16 AM35
SATA3GP / GPIO37 (+3V) TP1 R168 56.2/F_4 VSS[26] VSS[106]
AW22 AD23 AM38
LCD_BK TP2 VSS[27] VSS[107] GNT0# R213 *1K/F_4
22 LCD_BK P3 BB22 AD30 AM39 9 GNT0#
SDATAOUT0 / GPIO39 (+3V) TP3
AY45 AD31
VSS[28] VSS[108]
AM42
TP4 C980 VSS[29] VSS[109] GNT1# R538 *1K/F_4
AY46 AD32 AU20 9 GNT1#
DDR3_CORL TP5 220P/50V_4 VSS[30] VSS[110]
12,13 DDR3_CORL F1 AV43 AD34 AM46
PCIECLKRQ7# / GPIO46 (+3V_S5) TP6 VSS[31] VSS[111]
AV45 AU22 AV22
SV_SET_UP TP7 VSS[32] VSS[112]
AB6
SDATAOUT1 / GPIO48 (+3V) TP8
AF13 PV Add AD42
VSS[33] VSS[113]
AM49
TP9
M18 AD46
VSS[34] VSS[114]
AM7 Boot BIOS Strap
32 SATA5GP AA4 (+3V) N18 AD49 AA50
SATA5GP / GPIO49 TP10 +3V VSS[35] VSS[115]
RSVD TP11 AJ24 AD7 VSS[36] VSS[116] BB10 PCI_GNT0# GNT#1 Boot BIOS Location
C812 AK41 AE2 AN32
B .047U/25V_4 TP12 RCIN# R458 10K/F_4 VSS[37] VSS[117] B
TP13 AK42 AE4 VSS[38] VSS[118] AN50 0 0 LPC
M32 GATEA20 R447 10K/F_4 AF12 AN52
BOARD_ID0 TP14 VSS[39] VSS[119]
SI Add H10
GPIO24 TP15
N32 Y13
VSS[40] VSS[120]
AP12 0 1 Reserved (NAND)
BOARD_ID1 H3 (+3V_S5) M30 TACH0 R209 10K/F_4 AH49 AP42
BOARD_ID2 PCIECLKRQ6# / GPIO45 (+3V_S5) TP16 SATA4GP R459 10K/F_4 VSS[41] VSS[121]
F8
GPIO57 TP17
N30 AU4
VSS[42] VSS[122]
AP46 1 0 PCI
BOARD_ID3 M11 (+3V_S5) H12 SATA5GP R476 10K/F_4 AF35 AP49
BOARD_ID4 STP_PCI# / GPIO34 (+3V) TP18 BMBUSY# R457 10K/F_4 VSS[43] VSS[123]
V6
SATACLKREQ# / GPIO35 (+3V) TP19
AA23 AP13
VSS[44] VSS[124]
AP5 1 1 SPI
BOARD_ID5 V3 AB45 SIO_EXT_SMI# R207 10K/F_4 AN34 AP8
SLOAD / GPIO38 (+3V) NC_1
AB38 SIO_EXT_SCI# R205 10K/F_4 AF45
VSS[45] VSS[125]
AR2
NC_2 BT_OFF# R199 10K/F_4 VSS[46] VSS[126]
AB42 AF46 AR52
NC_3 LCD_BK R134 10K/F_4 VSS[47] VSS[127]
NC_4 AB41 AF49 VSS[48] VSS[128] AT11
T39 PCH_GPIO37 R169 10K/F_4 AF5 BA12
NC_5 VSS[49] VSS[129]
INIT3_3V# P6 AF8 VSS[50] VSS[130] AH48
C10 AG2 AT32 R488 *1K/F_4 +1.8V
TP24 VSS[51] VSS[131] 9 NV_ALE
AG52 AT36
VSS[52] VSS[132] R491 *1K/F_4
A4 BH2 AH11 AT41 9 NV_CLE
VSS_NCTF_1 VSS_NCTF_16 VSS[53] VSS[133]
A49 BH52 AH15 AT47
A5
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_17
VSS_NCTF_18
BH53 FOR UMA/DIS AH16
VSS[54]
VSS[55]
VSS[134]
VSS[135]
AT7
A50 VSS_NCTF_4 NCTF VSS_NCTF_19 BJ1 AH24 VSS[56] VSS[136] AV12
A52 BJ2 AH32 AV16 Danbury Technology Enabled
A53
VSS_NCTF_5 VSS_NCTF_20
BJ4
SG UMA/DIS AV18
VSS[57] VSS[137]
AV20
VSS_NCTF_6 VSS_NCTF_21 VSS[58] VSS[138]
B2 BJ49 AH43 AV24 High = Enable
B4
VSS_NCTF_7 VSS_NCTF_22
BJ5
R154 NA 10K ohm +3V AH47
VSS[59] VSS[139]
AV30 NV_ALE
VSS_NCTF_8 VSS_NCTF_23 VSS[60] VSS[140]
B52 VSS_NCTF_9 VSS_NCTF_24 BJ50 AH7 VSS[61] VSS[141] AV34 Low = Disable
B53 BJ52 SATA2GP R154 *10K/F_4 AJ19 AV38
VSS_NCTF_10 VSS_NCTF_25 VSS[62] VSS[142]
BE1 VSS_NCTF_11 VSS_NCTF_26 BJ53 AJ2 VSS[63] VSS[143] AV42
BE53
VSS_NCTF_12 VSS_NCTF_27
D1 SI Del BOM AJ20
VSS[64] VSS[144]
AV46
BF1 VSS_NCTF_13 VSS_NCTF_28 D2 AJ22 VSS[65] VSS[145] AV49 DMI Termination Voltage
BF53 VSS_NCTF_14 VSS_NCTF_29 D53 AJ23 VSS[66] VSS[146] AV5
BH1 E1 AJ26 AV8
C VSS_NCTF_15 VSS_NCTF_30 VSS[67] VSS[147] C
VSS_NCTF_31 E53 AJ28 VSS[68] VSS[148] AW14 Set to Vcc when LOW
+3VS5 AJ32 AW18 NV_CLE
IbexPeak-M_Rev1_0 VSS[69] VSS[149]
AJ34 VSS[70] VSS[150] AW2 Set to Vcc/2 when HIGH
+3V ACCLED_EN R150 10K/F_4 AT5 BF9
VSS[71] VSS[151]
AJ4 AW32
RF_OFF# R191 1K/F_4 VSS[72] VSS[152]
AK12 AW36
BIOS_REC R144 10K/F_4 VSS[73] VSS[153]
AM41 AW40
LAN_DISABLE_R# R136 10K/F_4 VSS[74] VSS[154]
BIOS RECOVERY AN19 VSS[75] VSS[155] AW52
HIGH : DISABLE SI Change AK26 VSS[76] VSS[156] AY11
DDR3_CORL R480 10K/F_4 AK22 AY43
LOW : ENABLE
AK23
VSS[77] VSS[157]
AY47
No Reboot Strap
TP_PCH_GPIO28 R174 10K/F_4 VSS[78] VSS[158]
AK28
VSS[79]
IbexPeak-M_Rev1_0
7,25 ACZ_SPKR R135 *1K/F_4 +3V

+3VS5

RU0 RD0
Board ID ID0 ID1 ID2 ID3 ID4 ID5 R139 *10K/F_4 BOARD_ID0 R138 10K/F_4
RU1 RD1
BOARD ID SETTING LX6 0 1 R465 10K/F_4 BOARD_ID1 R450 *10K/F_4

Board ID ID5 ID4 ID3 ID2 ID1 ID0 RU2 RD2 +3V
+1.8V
2,3,7,8,9,11,12,13,21,22,23,24,25,26,27,28,29,30,31,32,33,34,37,40,41
5,11,21,36,41
R143 10K/F_4 BOARD_ID2 R160 *10K/F_4
TBD RD5 (0) RD4 (0) RD3 (0) RD2 (0) RD1 (0) RU0 (1) LX7 1 0 +3V +3VS5 3,8,9,11,41
RU3 RD3 +1.05V_VTT 3,5,11,32,37,38,43
TBD RD5 (0) RD4 (0) RD3 (0) RD2 (0) RU1 (1) RD0 (0) R151 *10K/F_4 BOARD_ID3 R152 10K/F_4
D D
TBD RD5 (0) RD4 (0) RD3 (0) RD2 (0) RU1 (1) RU0 (1) Discrete 0 0 RU4 RD4
R132 *10K/F_4 BOARD_ID4 R133 10K/F_4
TBD RD5 (0) RD4 (0) RD3 (0) RU2 (1) RD1 (0) RD0 (0)
RU5 RD5
TBD RD5 (0) RD4 (0) RD3 (0) RU2 (1) RD1 (0) RU0 (1) UMA 0 1 R448 *10K/F_4 BOARD_ID5 R454 10K/F_4

TBD RD5 (0) RD4 (0) RD3 (0) RU2 (1) RU1 (1) RD0 (0) PROJECT : LX6_LX7
TBD RD5 (0) RD4 (0) RD3 (0) RU2 (1) RU1 (1) RU0 (1) SG 1 0 Quanta Computer Inc.
Size Document Number Rev
Custom 1A
LX7_No Subwoofer 1 1 PV Add option NB5 PCH 4/5 (GPIO & Strap)
Date: Tuesday, February 02, 2010 Sheet 10 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

DIS ONLY
R224 *0_6 +3V
11
DIS SG/UMA
U37G POWER +3V_LDO
Ra 0 ohm NA U37J POWER
+1.05V 1.524A
C335 1U/6.3V_4
AB24
VCCCORE[1] VCCADAC[1]
AE50 C387
C381
10U/6.3V_8
0.1U/10V_4 VCCACLK
Ibex-M
10 OF 10VCCIO[5] 3.208A
VCCCORE[2] Ibex-M
AB26 AP51 V24
A
C329 10U/6.3V_6S AB28 7 OF 10 AE52 C382 0.01U/16V_4 Rb NA 0 ohm TP20 VCCACLK[1]
V26
+1.05V A
VCCCORE[3] VCCADAC[2] VCCIO[6] C324 1U/6.3V_4
AD26 AP53 Y24
AD28
VCCCORE[4]
AF53 Rc 0 ohm NA DCPSUSBYP Y20
VCCACLK[2] VCCIO[7]
Y26
VCCCORE[5] CRT VSSA_DAC[1] C312 0.1U/10V_4 DCPSUSBYP VCCIO[8]
AF26
AF28
VCCCORE[6]
AF51
Rd NA 0 ohm USB V28 0.163A
VCCCORE[7] VSSA_DAC[2] VCCSUS3_3[1] +3VS5
AF30 U28
VCCCORE[8] VCCSUS3_3[2]
AF31
VCCCORE[9] Ra R206 *0_6
VCCSUS3_3[3]
U26 C310 0.1U/10V_4
AH26
VCCCORE[10] VCCALVDS
AH38 Rb R212 0_6 +3V +1.05V AF23
VCCLAN[1] VCCSUS3_3[4]
U24 C336
C332
0.1U/10V_4
*0.033U/10V_4
AH28 AH39 P28
VCCCORE[11] VSSA_LVDS VCCSUS3_3[5]
AH30
VCCCORE[12] LVDS Rc R211 *0_6 AF24
VCCLAN[2] VCCSUS3_3[6]
P26
AH31
VCCCORE[13] VCCTX_LVDS[1]
AP43
C379 10U/6.3V_8
Rd R226 0_6 +1.8V VCCSUS3_3[7]
N28
AJ30 AP45 N26
VCCCORE[14] VCCTX_LVDS[2] C359 0.1U/10V_4 C363 22U/6.3V_8S VCCSUS3_3[8]
AJ31 AT46 AD38 M28
VCCCORE[15] VCCTX_LVDS[3] C367 0.01U/16V_4 VCCME[1] VCCSUS3_3[9]
AT45 M26
VCCTX_LVDS[4] C361 22U/6.3V_8S VCCSUS3_3[10]
VCC CORE AD39
VCCME[2] VCCSUS3_3[11]
L28
L26
+1.05V 3.208A AK24
VCCIO[24] VCC3_3[2]
AB34 0.357A +3V C353 1U/6.3V_4 AD41
VCCME[3]
VCCSUS3_3[12]
VCCSUS3_3[13]
J28
J26
+V1.1LAN_VCCAPLL_EXP C348 1U/6.3V_4 VCCSUS3_3[14]
TP19 BJ24 AB35 AF43 H28
VCCAPLLEXP VCC3_3[3] C347 0.1U/10V_4 VCCME[4] VCCSUS3_3[15]
AN20
HVCMOS AD35 C358 1U/6.3V_4 AF41
VCCSUS3_3[16]
H26
G28
+1.05V 3.208A
C326 10U/6.3V_6S
AN22
AN23
VCCIO[25]
VCCIO[26]
VCC3_3[4]
AF42
VCCME[5] VCCSUS3_3[17]
VCCSUS3_3[18]
G26
F28

Clock and Miscellaneous


C314 1U/6.3V_4 VCCIO[27] VCCME[6] VCCSUS3_3[19]
AN24 F26
C320 1U/6.3V_4 VCCIO[28] VCCSUS3_3[20]
AN26 V39 E28
C319
C316
1U/6.3V_4
1U/6.3V_4
AN28
VCCIO[29]
VCCIO[30] VCCVRM[2]
AT24 0.035A +1.8V
VCCME[7] VCCSUS3_3[21]
VCCSUS3_3[22]
E26
BJ26 V41 C28
C331
C339
0.1U/10V_4
0.1U/10V_4
BJ28
VCCIO[31]
VCCIO[32] VCCDMI[1]
AT16 0.061A +1.05V_VTT
VCCME[8] VCCSUS3_3[23]
VCCSUS3_3[24]
C26
B
C315 0.1U/10V_4
AT26
AT28
VCCIO[33] DMI AU16
V42
VCCME[9] VCCSUS3_3[25]
B27
A28
B
VCCIO[34] VCCDMI[2] C307 1U/6.3V_4 VCCSUS3_3[26]
AU26 Y39 A26
VCCIO[35] VCCME[10] VCCSUS3_3[27]
AU28
VCCIO[36]
AV26 Y41 U23
VCCIO[37] VCCME[11] VCCSUS3_3[28]
AV28
AW26
VCCIO[38] PCI E* VCCPNAND[1]
AM16
AK16 Y42 V23 3.208A
VCCIO[39] VCCPNAND[2] VCCME[12] VCCIO[56] +1.05V
AW28 AK20
BA26
VCCIO[40] VCCPNAND[3]
AK19 0.156A +1.8V +VCCRTCEXT V9 F24 R192 >1mA
100/F_4 +5VS5
VCCIO[41] VCCPNAND[4] C295 0.1U/10V_4 DCPRTC V5REF_SUS
BA28 AK15
VCCIO[42] VCCPNAND[5] D4 RB500V-40 +3VS5
BB26 AK13
BB28
VCCIO[43]
VCCIO[44]
VCCPNAND[6]
VCCPNAND[7]
AM12 C308 0.1U/10V_4 +1.8V 0.072A AU24
VCCVRM[3] C318 1U/6.3V_4
BC26 AM13
VCCIO[45] VCCPNAND[8]
BC28 AM15
BD26
BD28
VCCIO[46]
VCCIO[47]
VCCPNAND[9]
+1.05V 0.073A BB51
BB53
VCCADPLLA[1]
>1mA
VCCIO[48] VCCADPLLA[2]
BE26 NAND / SPI K49 R223 100/F_4 +5V
VCCIO[49] V5REF
BE28
VCCIO[50] C327 1U/6.3V_4 D5 RB500V-40
BG26 AM8 BD51
BG28
BH27
VCCIO[51]
VCCIO[52]
VCCME3_3[1]
VCCME3_3[2]
AM9
AP11
0.085A +3V C328 1U/6.3V_4 BD53
VCCADPLLB[1]
VCCADPLLB[2] PCI/GPIO/LPC
C380 1U/6.3V_4
+3V

AN30
VCCIO[53]
VCCIO[54]
VCCME3_3[3]
VCCME3_3[4]
AP9
C299 0.1U/10V_4
+1.05V 3.208A AH23
VCCIO[21]
0.357A
AN31 +1.05V AJ35 J38 +3V
VCCIO[55] C352 1U/6.3V_4 VCCIO[22] VCC3_3[8]
AH35 L38
+3V 0.357A AN35
VCC3_3[1] C317
+1.05V
1U/6.3V_4
AF34
AH34
VCCIO[23]
VCCIO[2]
VCC3_3[9]
VCC3_3[10]
M36
N36 C345 0.1U/10V_4
C341 1U/6.3V_4 VCCIO[3] VCC3_3[11] C354 0.1U/10V_4
AF32 P36
+1.8V 0.035A AT22
VCCVRM[1]
VCCIO[4] VCC3_3[12]
VCC3_3[13]
U35

+V1.1LAN_VCCAPLL_FDI BJ18
FDI C298 0.1U/10V_4 +VCCSST V12
VCC3_3[14]
AD13
C TP18 VCCFDIPLL DCPSST C

+1.05V 3.208A AM23


VCCIO[1] C311
+V1.1LAN_INT_VCCSUS Y22
0.1U/10V_4 DCPSUS
IbexPeak-M_Rev1_0
P18
PCI/GPIO/LPC VCCSATAPLL[1]
AK3
AK1
3.208A
+V1.1LAN_VCCAPLL
+3VS5 0.163A U19
U20
VCCSUS3_3[29]
VCCSUS3_3[30]
VCCSATAPLL[2] TP14

C333 0.1U/10V_4 VCCSUS3_3[31]


U22 AT20 +1.8V
VCCSUS3_3[32] VCCVRM[4]
V15
V16
VCC3_3[5] VCCIO[9]
AH22
AH19
0.035A +1.05V

+3V 0.357A
C301 0.1U/10V_4
Y16
VCC3_3[6]
VCC3_3[7]
VCCIO[10]
VCCIO[11]
AD20 C304 1U/6.3V_4
AF22
VCCIO[12]
AD19
+1.05V_VTT >1mA
C305 4.7U/6.3V_6
AT18
V_CPU_IO[1]
VCCIO[13]
VCCIO[14]
AF20

C303 0.1U/10V_4
AU18
V_CPU_IO[2] SATA VCCIO[15]
AF19

C313 0.1U/10V_4
CPU VCCIO[16]
AH20
AB19
VCCIO[17]
AB20
UMA/SG +RTC_CELL 2mA A12
VCCIO[18]
AB22
+5V +3V_LDO C7170.1U/10V_4 VCCRTC VCCIO[19]
RTC VCCIO[20]
AD22
U16 C718 0.1U/10V_4
G910T21U
3
Vin Vout
1 +3VS5 6mA L30
VCCSUSHDA VCCME[13]
AA34
Y34
1.998A +1.05V
GND

C337 1U/6.3V_4 VCCME[14]


HDA VCCME[15]
Y35
AA35
C986 C401 VCCME[16]
2

0.1U/10V_4 1U/6.3V_4 C987 0.1U/10V_4


D D
IbexPeak-M_Rev1_0
C990 0.1U/10V_4

PV EMI Request PV EMI Request


2,7,8,9,36,37,43 +1.05V
3,5,10,32,37,38,43 +1.05V_VTT
PROJECT : LX6_LX7
5,10,21,36,41 +1.8V Quanta Computer Inc.
2,3,7,8,9,10,12,13,21,22,23,24,25,26,27,28,29,30,31,32,33,34,37,40,41 +3V
3,8,9,10,41 +3VS5
21,22,23,25,26,28,30,31,33,34,41 +5V Size Document Number Rev
Custom 1A
41 +5VS5 NB5 PCH 5/5 (POWER)
7 +RTC_CELL
Date: Tuesday, February 02, 2010 Sheet 11 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

12
JDIM1A M_A_DQ[63:0] 4
4 M_A_A[15:0]
M_A_A0 98 5 M_A_DQ0
A
M_A_A1 97
A0
A1
DQ0
DQ1
7 M_A_DQ1 +1.5VSUS FOR DIS A

M_A_A2 96 15 M_A_DQ2
M_A_A3 A2 DQ2 M_A_DQ3 DDR_VREF_DQ0 SMDDR_VREF_DQ0
95 17 1 3
M_A_A4 A3 DQ3 M_A_DQ4
92 4
M_A_A5 A4 DQ4 M_A_DQ5 JDIM1B Q3
91 6
M_A_A6 A5 DQ5 M_A_DQ6 *AO3402
90 16 75 44

2
M_A_A7 A6 DQ6 M_A_DQ7 VDD1 VSS16
86 18 76 48
M_A_A8 A7 DQ7 M_A_DQ8 VDD2 VSS17
89 21 81 49
M_A_A9 A8 DQ8 M_A_DQ9 VDD3 VSS18 DDR3_CORL
85 23 82 54
M_A_A10 A9 DQ9 M_A_DQ10 VDD4 VSS19
107 33 87 55
M_A_A11 A10/AP DQ10 M_A_DQ11 VDD5 VSS20
84 35 88 60
M_A_A12 A11 DQ11 M_A_DQ12 VDD6 VSS21
83 22 93 61
SO-DIMMA SPD Address is 0XA0 M_A_A13 A12/BC# DQ12 M_A_DQ13 VDD7 VSS22
119 24 94 65
M_A_A14 A13 DQ13 M_A_DQ14 VDD8 VSS23
SO-DIMMA TS Address is 0X30 80 34 99 66
M_A_A15 A14 DQ14 M_A_DQ15 VDD9 VSS24
78 36 100 71
A15 DQ15 M_A_DQ16 VDD10 VSS25
39 105 72
DQ16 VDD11 VSS26

PC2100 DDR3 SDRAM SO-DIMM


4 M_A_BS#0 109 41 M_A_DQ17 106 127
BA0 DQ17 M_A_DQ18 VDD12 VSS27
108 51 111 128

PC2100 DDR3 SDRAM SO-DIMM


4 M_A_BS#1 BA1 DQ18 VDD13 VSS28
4 M_A_BS#2 79 53 M_A_DQ19 112 133
BA2 DQ19 M_A_DQ20 VDD14 VSS29
4 M_A_CS#0 114 40 117 134
S0# DQ20 M_A_DQ21 VDD15 VSS30
4 M_A_CS#1 121 42 118 138
S1# DQ21 M_A_DQ22 VDD16 VSS31
4 M_A_CLK0 101 50 123 139
CK0 DQ22 M_A_DQ23 VDD17 VSS32
4 M_A_CLK0# 103 52 124 144
CK0# DQ23 M_A_DQ24 VDD18 VSS33
4 M_A_CLK1 102 57 145
CK1 DQ24 M_A_DQ25 VSS34 +1.5VSUS
4 M_A_CLK1# 104 59 +3V 199 150
CK1# DQ25 M_A_DQ26 VDDSPD VSS35
4 M_A_CKE0 73 67 151
CKE0 DQ26 M_A_DQ27 VSS36
4 M_A_CKE1 74 69 77 155
CKE1 DQ27 M_A_DQ28 NC1 VSS37
4 M_A_CAS# 115 56 122 156
CAS# DQ28 M_A_DQ29 NC2 VSS38
B 4 M_A_RAS# 110 58 125 161 B
RAS# DQ29 M_A_DQ30 NCTEST VSS39 R258
4 M_A_WE# 113 68 162
R386 10K/F_4 DIMM0_SA0 WE# DQ30 M_A_DQ31 PM_EXTTS#0 VSS40 1K/F_4
197 70 3 PM_EXTTS#0 198 167
R390 10K/F_4 DIMM0_SA1 SA0 DQ31 M_A_DQ32 EVENT# VSS41
201 129 13 DDR3_DRAMRST# 30 168
SA1 DQ32 M_A_DQ33 R19 1K/F_4 RESET# VSS42 SMDDR_VREF_DQ0
2,8,13,26,33 CGCLK_SMB 202 131 +1.5VSUS 172
SCL DQ33 M_A_DQ34 VSS43
2,8,13,26,33 CGDAT_SMB 200 141 173
SDA DQ34 M_A_DQ35 R263 *0_4 SMDDR_VREF_DQ0 VSS44
143 6 DDR_VREF_DQ0 1 178
DQ35 M_A_DQ36 SMDDR_VREF_DIMM VREF_DQ VSS45
4 M_A_ODT0 116 130 126 179
ODT0 DQ36 M_A_DQ37 VREF_CA VSS46 R261 C421
4 M_A_ODT1 120 132 184
ODT1 DQ37 M_A_DQ38 R12 VSS47 1K/F_4 0.1U/10V_4
4 M_A_DM[7:0] 140 185
M_A_DM0 DQ38 M_A_DQ39 *100K/F_4 VSS48
11 142 2 189
M_A_DM1 DM0 DQ39 M_A_DQ40 VSS1 VSS49
28 147 3 190
M_A_DM2 46
DM1
DM2
DQ40
DQ41
149 M_A_DQ41 FOR DIS 8
VSS2
VSS3
VSS50
VSS51
195
M_A_DM3 M_A_DQ42

(204P)
63 157 9 196
(204P)

M_A_DM4 DM3 DQ42 M_A_DQ43 VSS4 VSS52


136 159 13
M_A_DM5 153
DM4
DM5
DQ43
DQ44
146 M_A_DQ44 14
VSS5
VSS6
FOR SG/UMA
M_A_DM6 170 148 M_A_DQ45 19
M_A_DM7 DM6 DQ45 M_A_DQ46 VSS7
187 158 20
DM7 DQ46 M_A_DQ47 VSS8
4 M_A_DQS[7:0] 160 25
M_A_DQS0 DQ47 M_A_DQ48 VSS9
12 163 26 203 +0.75V_DDR_VTT
M_A_DQS1 DQS0 DQ48 M_A_DQ49 VSS10 VTT1
29 165 31 204
M_A_DQS2 DQS1 DQ49 M_A_DQ50 VSS11 VTT2
47 175 32
M_A_DQS3 DQS2 DQ50 M_A_DQ51 VSS12
64 177 37
M_A_DQS4 DQS3 DQ51 M_A_DQ52 VSS13
137 164 38
M_A_DQS5 DQS4 DQ52 M_A_DQ53 VSS14
154 166 43

GND

GND
M_A_DQS6 DQS5 DQ53 M_A_DQ54 VSS15
171 174
M_A_DQS7 DQS6 DQ54 M_A_DQ55
4 M_A_DQS#[7:0] 188 176
M_A_DQS#0 DQS7 DQ55 M_A_DQ56 DDR3-DIMM0
10 181

205

206
M_A_DQS#1 DQS#0 DQ56 M_A_DQ57
27 183
M_A_DQS#2 DQS#1 DQ57 M_A_DQ58 R18 *0_4
C 45 191 C
M_A_DQS#3 DQS#2 DQ58 M_A_DQ59
62 193
M_A_DQS#4 DQS#3 DQ59 M_A_DQ60
135 180
M_A_DQS#5 DQS#4 DQ60 M_A_DQ61
152 182
M_A_DQS#6 DQS#5 DQ61 M_A_DQ62 DDR3_DRAMRST#_C DDR3_DRAMRST#
169 192 3 DDR3_DRAMRST#_C 1 3
M_A_DQS#7 DQS#6 DQ62 M_A_DQ63
186 194
DQS#7 DQ63
Q4

2
DDR3-DIMM0 R20 BSS138 DDR3_CORL 10,13
100K/F_4

Place these Caps near So-Dimm0. SMDDR_VREF_DIMM 13


Some Projects replace 10UF 0805 by 4.7UF 0603
It can cost down 30% PV Change to Short pad
+1.5VSUS U27 C150 470P/50V_4 R55 *0/s DDR_VTTREF 40
+0.75V_DDR_VTT C598 0.01U/25V_4
C56 10U/6.3V_6S 8,17,32 MBCLK2 MBCLK2 8 1 +3V
C74 10U/6.3V_6S C619 1U/6.3V_4 SCLK VCC DDR_THERMDA R54 *10K/F_4_NC +1.5VSUS
C42 10U/6.3V_6S C637 1U/6.3V_4 8,17,32 MBDATA2 MBDATA2 7 2 R56 *10K/F_4_NC

3
C119 10U/6.3V_6S C636 1U/6.3V_4 SDA DXP Q27
C106 10U/6.3V_6S C616 1U/6.3V_4 PM_EXTTS#0 6 3 C607 2
C130 10U/6.3V_6S C655 *10U/6.3V_8 ALERT# DXN MMBT3904-7-F 13,40,41 +0.75V_DDR_VTT
C41 0.1U/10V_4 C215 *10U/6.3V_8 3,13 PM_EXTTS#1 PM_EXTTS#1 4 5 2200P/50V_4 5,13,39,40,41 +1.5VSUS
1
C73 0.1U/10V_4 C651 10U/6.3V_6S OVERT# GND
D 2,3,7,8,9,10,11,13,21,22,23,24,25,26,27,28,29,30,31,32,33,34,37,40,41 +3V D
C97 0.1U/10V_4 DDR_THERMDC
C107 0.1U/10V_4 G780P81U
C84 0.1U/10V_4 SMDDR_VREF_DQ0
ADDRESS: 98H
C7 0.1U/10V_4
+3V C10 2.2U/6.3V_6
Place these U27 near So-Dimm0(JDIM1A). PROJECT : LX6_LX7
C226
C229
2.2U/6.3V_6
0.1U/10V_4
SMDDR_VREF_DIMM
Quanta Computer Inc.
C129 0.1U/10V_4
PV EMI request C128 2.2U/6.3V_6 Size Document Number Rev
Custom 1A
NB5 DDR3 DIMM-0
Date: Tuesday, February 02, 2010 Sheet 12 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

13
JDIM2A M_B_DQ[63:0] 4
4 M_B_A[15:0] +1.5VSUS
M_B_A0 98 5 M_B_DQ0
M_B_A1 A0 DQ0 M_B_DQ1
A 97 7 A
M_B_A2 A1 DQ1 M_B_DQ2
96 15
M_B_A3 A2 DQ2 M_B_DQ3
95 17 JDIM2B
M_B_A4 A3 DQ3 M_B_DQ4
92 4
M_B_A5 A4 DQ4 M_B_DQ5
91 6 75 44
M_B_A6 A5 DQ5 M_B_DQ6 VDD1 VSS16
90 16 76 48
M_B_A7 A6 DQ6 M_B_DQ7 VDD2 VSS17
86 18 81 49
M_B_A8 A7 DQ7 M_B_DQ8 VDD3 VSS18
89 21 82 54
M_B_A9 A8 DQ8 M_B_DQ9 VDD4 VSS19
85 23 87 55
M_B_A10 A9 DQ9 M_B_DQ10 VDD5 VSS20
107 33 88 60
M_B_A11 A10/AP DQ10 M_B_DQ11 VDD6 VSS21
84 35 93 61
M_B_A12 A11 DQ11 M_B_DQ12 VDD7 VSS22
83 22 94 65
M_B_A13 A12/BC# DQ12 M_B_DQ13 VDD8 VSS23
119 24 99 66
M_B_A14 A13 DQ13 M_B_DQ14 VDD9 VSS24
80 34 100 71
M_B_A15 A14 DQ14 M_B_DQ15 VDD10 VSS25
78 36 105 72
A15 DQ15 M_B_DQ16 VDD11 VSS26
39 106 127
DQ16 VDD12 VSS27

PC2100 DDR3 SDRAM SO-DIMM


109 41 M_B_DQ17 111 128

PC2100 DDR3 SDRAM SO-DIMM


4 M_B_BS#0 BA0 DQ17 VDD13 VSS28
4 M_B_BS#1 108 51 M_B_DQ18 112 133
BA1 DQ18 M_B_DQ19 VDD14 VSS29
4 M_B_BS#2 79 53 117 134
BA2 DQ19 M_B_DQ20 VDD15 VSS30
4 M_B_CS#0 114 40 118 138
S0# DQ20 M_B_DQ21 VDD16 VSS31
4 M_B_CS#1 121 42 123 139
S1# DQ21 M_B_DQ22 VDD17 VSS32
4 M_B_CLK0 101 50 124 144
CK0 DQ22 M_B_DQ23 VDD18 VSS33
4 M_B_CLK0# 103 52 145
CK0# DQ23 M_B_DQ24 VSS34
4 M_B_CLK1 102 57 +3V 199 150
CK1 DQ24 M_B_DQ25 VDDSPD VSS35
4 M_B_CLK1# 104 59 151
CK1# DQ25 M_B_DQ26 VSS36
4 M_B_CKE0 73 67 77 155
CKE0 DQ26 M_B_DQ27 NC1 VSS37
4 M_B_CKE1 74 69 122 156
CKE1 DQ27 M_B_DQ28 NC2 VSS38
4 M_B_CAS# 115 56 125 161
CAS# DQ28 M_B_DQ29 NCTEST VSS39
4 M_B_RAS# 110 58 162
RAS# DQ29 M_B_DQ30 VSS40
B 4 M_B_WE# 113 68 3,12 PM_EXTTS#1 198 167 B
R92 10K/F_4 DIMM1_SA0 197 WE# DQ30 M_B_DQ31 EVENT# VSS41
70 12 DDR3_DRAMRST# 30 168
SA0 DQ31 RESET# VSS42
+3V R96 10K/F_4 DIMM1_SA1 201
SA1 DQ32
129 M_B_DQ32
VSS43
172
2,8,12,26,33 CGCLK_SMB 202 131 M_B_DQ33 173
SCL DQ33 M_B_DQ34 DDR_VREF_DQ1 R7 *0_4 SMDDR_VREF_DQ1 VSS44
2,8,12,26,33 CGDAT_SMB 200 141 6 DDR_VREF_DQ1 1 178
SDA DQ34 M_B_DQ35 VREF_DQ VSS45
143 12 SMDDR_VREF_DIMM 126 179
DQ35 M_B_DQ36 VREF_CA VSS46
4 M_B_ODT0 116 130 184
ODT0 DQ36 M_B_DQ37 VSS47
4 M_B_ODT1 120 132 185
ODT1 DQ37 M_B_DQ38 R6 VSS48
4 M_B_DM[7:0] 140 2 189
M_B_DM0 DQ38 M_B_DQ39 *100K/F_4 VSS1 VSS49
11 142 3 190
SO-DIMMB SPD Address is 0XA4 M_B_DM1 DM0 DQ39 M_B_DQ40 VSS2 VSS50
28 147 8 195
M_B_DM2 DM1 DQ40 M_B_DQ41 VSS3 VSS51
SO-DIMMB TS Address is 0X34 46 149 9 196

(204P)
M_B_DM3 DM2 DQ41 M_B_DQ42 VSS4 VSS52
63 157 13
(204P)

M_B_DM4 DM3 DQ42 M_B_DQ43 VSS5


136 159 14
M_B_DM5 153
DM4
DM5
DQ43
DQ44
146 M_B_DQ44 FOR DIS 19
VSS6
VSS7
M_B_DM6 170 148 M_B_DQ45 20
M_B_DM7 DM6 DQ45 M_B_DQ46 VSS8
187 158 25
DM7 DQ46 M_B_DQ47 VSS9
4 M_B_DQS[7:0] 160 26 203 +0.75V_DDR_VTT
M_B_DQS0 DQ47 M_B_DQ48 VSS10 VTT1
12 163 31 204
M_B_DQS1 29
DQS0
DQS1
DQ48
DQ49
165 M_B_DQ49 FOR SG/UMA 32
VSS11
VSS12
VTT2
M_B_DQS2 47 175 M_B_DQ50 37
M_B_DQS3 DQS2 DQ50 M_B_DQ51 +1.5VSUS VSS13
64 177 38
M_B_DQS4 DQS3 DQ51 M_B_DQ52 VSS14
137 164 43

GND

GND
M_B_DQS5 DQS4 DQ52 M_B_DQ53 VSS15
154 166
M_B_DQS6 DQS5 DQ53 M_B_DQ54
171 174
M_B_DQS7 DQS6 DQ54 M_B_DQ55 DDR3-DIMM1
4 M_B_DQS#[7:0] 188 176

205

206
M_B_DQS#0 DQS7 DQ55 M_B_DQ56 R8
10 181
M_B_DQS#1 DQS#0 DQ56 M_B_DQ57 1K/F_4
27 183
M_B_DQS#2 DQS#1 DQ57 M_B_DQ58
45 191
M_B_DQS#3 DQS#2 DQ58 M_B_DQ59 SMDDR_VREF_DQ1
C 62 193 C
M_B_DQS#4 DQS#3 DQ59 M_B_DQ60
135 180
M_B_DQS#5 DQS#4 DQ60 M_B_DQ61
152 182
M_B_DQS#6 DQS#5 DQ61 M_B_DQ62
169 192
M_B_DQS#7 DQS#6 DQ62 M_B_DQ63 R9 C20
186 194
DQS#7 DQ63 1K/F_4 0.1U/10V_4

DDR3-DIMM1

Place these Caps near So-Dimm1.


FOR DIS
Some Projects replace 10UF 0805 by 4.7UF 0603
It can cost down 30% DDR_VREF_DQ1 1 3 SMDDR_VREF_DQ1
Q2
*AO3402
+1.5VSUS +0.75V_DDR_VTT
2
C100 10U/6.3V_6S C612 1U/6.3V_4 DDR3_CORL 10,12
C31 10U/6.3V_6S C656 1U/6.3V_4
C88 10U/6.3V_6S C604 1U/6.3V_4
C53 10U/6.3V_6S C657 1U/6.3V_4
C123 10U/6.3V_6S C206 *10U/6.3V_8
C60 10U/6.3V_6S C230 10U/6.3V_6S for S3 power reduction 12,40,41 +0.75V_DDR_VTT
C49 0.1U/10V_4 C224 10U/6.3V_6S 5,12,39,40,41 +1.5VSUS
D D
C115 0.1U/10V_4 2,3,7,8,9,10,11,12,21,22,23,24,25,26,27,28,29,30,31,32,33,34,37,40,41 +3V
C35 0.1U/10V_4
C131 0.1U/10V_4 SMDDR_VREF_DIMM
C61 0.1U/10V_4
C140 0.1U/10V_4
C156 2.2U/6.3V_6
PROJECT : LX6_LX7
+3V
SMDDR_VREF_DQ1
Quanta Computer Inc.
C227 2.2U/6.3V_6
C228 *0.1U/10V_4 C19 0.1U/10V_4 Size Document Number Rev
C15 2.2U/6.3V_6 Custom 1A
NB5 DDR3 DIMM-1
Date: Tuesday, February 02, 2010 Sheet 13 of 44
1 2 3 4 5 6 7 8
5 4 3 2 1

U26A
U26H

DP C/D POWER DP A/B POWER


14
PEG_TX15 AA38 Y33 C_PEG_RXP15 C33 .1U/10V_4
3 PEG_TX15 PCIE_RX0P PCIE_TX0P PEG_RX15 3
PEG_TX#15 Y37 Y32 C_PEG_RXN15 C32 .1U/10V_4 +1.8V_DPC_VDD18 AP20 AN24 +1.8V_DPA_VDD18
3 PEG_TX#15 PCIE_RX0N PCIE_TX0N PEG_RX#15 3 DPC_VDD18#1 DPA_VDD18#1
AP21 AP24
DPC_VDD18#2 DPA_VDD18#2
PEG_TX14 Y35 W33 C_PEG_RXP14 C44 .1U/10V_4 ( DPA/B_VDD10 : 1.0V@115mA+115mA) +1.0V_VGA
3 PEG_TX14 PCIE_RX1P PCIE_TX1P PEG_RX14 3
D PEG_TX#14 W36 W32 C_PEG_RXN14 C46 .1U/10V_4 L7 D
3 PEG_TX#14 PCIE_RX1N PCIE_TX1N PEG_RX#14 3
+1.0V_DPC_VDD10 AP13 AP31 +1.0V_DPA_VDD10
DPC_VDD10#1 DPA_VDD10#1
AT13 DPC_VDD10#2 DPA_VDD10#2 AP32
PEG_TX13 W38 U33 C_PEG_RXP13 C47 .1U/10V_4 BLM18PG181SN1D(180,1.5A)_6
3 PEG_TX13 PCIE_RX2P PCIE_TX2P PEG_RX13 3
PEG_TX#13 V37 U32 C_PEG_RXN13 C54 .1U/10V_4 C90 C87 C103
3 PEG_TX#13 PCIE_RX2N PCIE_TX2N PEG_RX#13 3
AN17 AN27 10U/6.3V_8 1U/6.3V_4 .1U/10V_4
DPC_VSSR#1 DPA_VSSR#1
AP16 AP27
PEG_TX12 V35 C_PEG_RXP12 C55 .1U/10V_4 DPC_VSSR#2 DPA_VSSR#2
3 PEG_TX12 PCIE_RX3P PCIE_TX3P U30 PEG_RX12 3 AP17 DPC_VSSR#3 DPA_VSSR#3 AP28
PEG_TX#12 U36 U29 C_PEG_RXN12 C58 .1U/10V_4 AW14 AW24
3 PEG_TX#12 PCIE_RX3N PCIE_TX3N PEG_RX#12 3 DPC_VSSR#4 DPA_VSSR#4
AW16 DPC_VSSR#5 DPA_VSSR#5 AW26

PEG_TX11 U38 T33 C_PEG_RXP11 C62 .1U/10V_4


3 PEG_TX11 PCIE_RX4P PCIE_TX4P PEG_RX11 3
PEG_TX#11 T37 T32 C_PEG_RXN11 C70 .1U/10V_4
3 PEG_TX#11 PCIE_RX4N PCIE_TX4N PEG_RX#11 3

PCI EXPRESS INTERFACE


+1.8V_DPC_VDD18 AP22 AP25 +1.8V_DPA_VDD18
DPD_VDD18#1 DPB_VDD18#1
AP23 DPD_VDD18#2 DPB_VDD18#2 AP26
PEG_TX10 T35 T30 C_PEG_RXP10 C71 .1U/10V_4
3 PEG_TX10 PCIE_RX5P PCIE_TX5P PEG_RX10 3
PEG_TX#10 R36 T29 C_PEG_RXN10 C82 .1U/10V_4
3 PEG_TX#10 PCIE_RX5N PCIE_TX5N PEG_RX#10 3
+1.0V_DPC_VDD10 AP14 AN33
PEG_TX9 C_PEG_RXP9 C85 .1U/10V_4 DPD_VDD10#1 DPB_VDD10#1
3 PEG_TX9 R38 P33 PEG_RX9 3 AP15 AP33
PEG_TX#9 PCIE_RX6P PCIE_TX6P C_PEG_RXN9 C96 .1U/10V_4 DPD_VDD10#2 DPB_VDD10#2
3 PEG_TX#9 P37 P32 PEG_RX#9 3
PCIE_RX6N PCIE_TX6N

PEG_TX8 P35 P30 C_PEG_RXP8 C101 .1U/10V_4 AN19 AN29


3 PEG_TX8 PCIE_RX7P PCIE_TX7P PEG_RX8 3 DPD_VSSR#1 DPB_VSSR#1
PEG_TX#8 N36 P29 C_PEG_RXN8 C104 .1U/10V_4 AP18 AP29
3 PEG_TX#8 PCIE_RX7N PCIE_TX7N PEG_RX#8 3 DPD_VSSR#2 DPB_VSSR#2
AP19 AP30
DPD_VSSR#3 DPB_VSSR#3
AW20 AW30
PEG_TX7 C_PEG_RXP7 C114 0.1U/10V_4 DPD_VSSR#4 DPB_VSSR#4
3 PEG_TX7 N38 PCIE_RX8P PCIE_TX8P N33 PEG_RX7 3 AW22 DPD_VSSR#5 DPB_VSSR#5 AW32
PEG_TX#7 M37 N32 C_PEG_RXN7 C118 0.1U/10V_4
3 PEG_TX#7 PCIE_RX8N PCIE_TX8N PEG_RX#7 3

PEG_TX6 M35 N30 C_PEG_RXP6 C120 0.1U/10V_4 R312 150/F_4 DPCD_CALR AW18 AW28 DPAB_CALR R310 150/F_4
3 PEG_TX6 PCIE_RX9P PCIE_TX9P PEG_RX6 3 DPCD_CALR DPAB_CALR
C PEG_TX#6 L36 N29 C_PEG_RXN6 C127 0.1U/10V_4 C
3 PEG_TX#6 PCIE_RX9N PCIE_TX9N PEG_RX#6 3

DP E/F POWER DP PLL POWER


PEG_TX5 L38 L33 C_PEG_RXP5 C134 0.1U/10V_4 AH34 AU28
3 PEG_TX5 PCIE_RX10P PCIE_TX10P PEG_RX5 3 DPE_VDD18#1 DPA_PVDD
PEG_TX#5 K37 L32 C_PEG_RXN5 C142 0.1U/10V_4 +1.8V_DPE_VDD18 AJ34 AV27
3 PEG_TX#5 PCIE_RX10N PCIE_TX10N PEG_RX#5 3 DPE_VDD18#2 DPA_PVSS
( DPA/B_PVDD : 1.8V@20mA+20mA) +1.8V_VGA
PEG_TX4 K35 L30 C_PEG_RXP4 C143 0.1U/10V_4 L5
3 PEG_TX4 PCIE_RX11P PCIE_TX11P PEG_RX4 3
PEG_TX#4 J36 L29 C_PEG_RXN4 C153 0.1U/10V_4 AL33 AV29 +1.8V_DPB_PVDD
3 PEG_TX#4 PCIE_RX11N PCIE_TX11N PEG_RX#4 3 DPE_VDD10#1 DPB_PVDD
+1.0V_DPE_VDD10 AM33 AR28
DPE_VDD10#2 DPB_PVSS BLM18PG181SN1D(180,1.5A)_6
3 PEG_TX3 PEG_TX3 J38 K33 C_PEG_RXP3 C158 0.1U/10V_4 C43 C503 C500
PCIE_RX12P PCIE_TX12P PEG_RX3 3
3 PEG_TX#3 PEG_TX#3 H37 K32 C_PEG_RXN3 C169 0.1U/10V_4 10U/6.3V_8 1U/6.3V_4 .1U/10V_4
PCIE_RX12N PCIE_TX12N PEG_RX#3 3
AN34 AU18
DPE_VSSR#1 DPC_PVDD
AP39 AV17
PEG_TX2 C_PEG_RXP2 C173 0.1U/10V_4 DPE_VSSR#2 DPC_PVSS
3 PEG_TX2 H35 PCIE_RX13P PCIE_TX13P J33 PEG_RX2 3 AR39 DPE_VSSR#3
PEG_TX#2 G36 J32 C_PEG_RXN2 C183 0.1U/10V_4 AU37 ( DPC/D_PVDD:1.8V@20mA+20mA) +1.8V_VGA
3 PEG_TX#2 PCIE_RX13N PCIE_TX13N PEG_RX#2 3 DPE_VSSR#4
AV19 +1.8V_DPC_PVDD
PEG_TX1 C_PEG_RXP1 C192 0.1U/10V_4 DPD_PVDD
3 PEG_TX1 G38 K30 PEG_RX1 3 AR18
PEG_TX#1 PCIE_RX14P PCIE_TX14P C_PEG_RXN1 C196 0.1U/10V_4 DPD_PVSS
3 PEG_TX#1 F37 PCIE_RX14N PCIE_TX14N K29 PEG_RX#1 3
AF34
+1.8V_DPE_VDD18 DPF_VDD18#1
AG34 DPF_VDD18#2
3 PEG_TX0 PEG_TX0 F35 H33 C_PEG_RXP0 C185 0.1U/10V_4 AM37
PCIE_RX15P PCIE_TX15P PEG_RX0 3 DPE_PVDD
3 PEG_TX#0 PEG_TX#0 E37 H32 C_PEG_RXN0 C189 0.1U/10V_4 AN38
PCIE_RX15N PCIE_TX15N PEG_RX#0 3 DPE_PVSS
AK33
+1.0V_DPE_VDD10 DPF_VDD10#1
AK34 DPF_VDD10#2
CLOCK AL38 ( DPE/F_PVDD1.8V@20mA+20mA) +1.8V_VGA
CLK_PCIE_VGA NC_DPF_PVDD L36
8 CLK_PCIE_VGA AB35 PCIE_REFCLKP NC_DPF_PVSS AM35
CLK_PCIE_VGA# AA36 +1.8V_DPE_PVDD
8 CLK_PCIE_VGA# PCIE_REFCLKN
AF39
B DPF_VSSR#1 BLM18PG181SN1D(180,1.5A)_6 B
AH39
CALIBRATION DPF_VSSR#2 C546 C545 C544
AK39
PCIE_CALRP R78 1.27K/F_4 DPF_VSSR#3 10U/6.3V_8 .1U/10V_4 .1U/10V_4
AJ21 NC#1 PCIE_CALRP Y30 AL34 DPF_VSSR#4
AK21 NC#2 AM34 DPF_VSSR#5
PWRGOOD_BUF AH16 Y29 PCIE_CALRN R80 2K/F_4 +1.0V_VGA
PWRGOOD PCIE_CALRN

R67 *0/sVGA_RST# AA30 R322 150/F_4 DPEF_CALR AM39


34 PEGX_RST# PERSTB DPEF_CALR
R39
10K/F_4
Park Pro/Madison_M2
PV Change to Short Pad Park Pro/Madison_M2

( DPE/F_VDD18 : 1.8V@200mA+200mA) +1.8V_VGA


L37
+1.8V_DPE_VDD18
+1.8V_VGA +1.8V_VGA +1.8V_VGA BLM18PG181SN1D(180,1.5A)_6
( VDD10 M97 1.0V/M96 1.1V)
C556 C555 C557
( DPE/F_VDD10 : 1.0V@115mA+115mA ) +1.0V_VGA 10U/6.3V_8 1U/6.3V_4 .1U/10V_4
L11
+1.0V_DPE_VDD10
C1005 C1004 C1003
.1U/10V_4 .1U/10V_4 .1U/10V_4 BLM18PG181SN1D(180,1.5A)_6
C117 C121 C122 ( DPA/B_VDD18 : 1.8V@200mA+200mA) +1.8V_VGA
10U/6.3V_8 1U/6.3V_4 .1U/10V_4 L30
+3V 2,3,7,8,9,10,11,12,13,21,22,23,24,25,26,27,28,29,30,31,32,33,34,37,40,41
+1.8V_DPA_VDD18
A A
+1.0V_VGA 16,18,34,40
MV EMI Request BLM18PG181SN1D(180,1.5A)_6
+1.8V_VGA 16,18,34,39
C490 C497 C505
SI Del R43,R38,C57 10U/6.3V_6S 1U/6.3V_4 .1U/10V_4
( DPC/D_VDD10 : 1.0V@115mA+115mA) +1.0V_VGA
SI Change +1.8V_VGA
+1.0V_DPC_VDD10
( DPC/D_VDD18 : 1.8V@200mA+200mA)
+1.8V_DPC_VDD18
PROJECT : LX6_LX7
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NB5 ATI M97-M2 (PCIE I/F) 1/5
Date: Tuesday, February 02, 2010 Sheet 14 of 44
5 4 3 2 1
5 4 3 2 1

U26C
DDR2 DDR2
Park, M92M Use Channel B Memory Interface Only
U26D
15
GDDR3/GDDR5 GDDR5/GDDR3 DDR2 DDR2
DDR3 DDR3 GDDR3/GDDR5 GDDR5/GDDR3
VMA_DQ0 C37 G24 VMA_MA0 19
DDR3 DDR3
VMA_DQ1 DQA0_0/DQA_0 MAA0_0/MAA_0 VMB_DQ0
C35 J23 VMA_MA1 19 C5 P8 VMB_MA0 20

MEMORY INTERFACE A
D VMA_DQ2 DQA0_1/DQA_1 MAA0_1/MAA_1 VMB_DQ1 DQB0_0/DQB_0 MAB0_0/MAB_0 D
A35 H24 VMA_MA2 19 C3 T9 VMB_MA1 20
VMA_DQ3 DQA0_2/DQA_2 MAA0_2/MAA_2 VMB_DQ2 DQB0_1/DQB_1 MAB0_1/MAB_1
E34 J24 VMA_MA3 19 E3 P9 VMB_MA2 20

MEMORY INTERFACE B
VMA_DQ4 DQA0_3/DQA_3 MAA0_3/MAA_3 VMB_DQ3 DQB0_2/DQB_2 MAB0_2/MAB_2
G32 DQA0_4/DQA_4 MAA0_4/MAA_4 H26 VMA_MA4 19 E1 DQB0_3/DQB_3 MAB0_3/MAB_3 N7 VMB_MA3 20
VMA_DQ5 D33 J26 VMA_MA5 19 VMB_DQ4 F1 N8 VMB_MA4 20
VMA_DQ6 DQA0_5/DQA_5 MAA0_5/MAA_5 VMB_DQ5 DQB0_4/DQB_4 MAB0_4/MAB_4
F32 H21 VMA_MA6 19 F3 N9 VMB_MA5 20
VMA_DQ7 DQA0_6/DQA_6 MAA0_6/MAA_6 VMB_DQ6 DQB0_5/DQB_5 MAB0_5/MAB_5
E32 G21 VMA_MA7 19 F5 U9 VMB_MA6 20
VMA_DQ8 DQA0_7/DQA_7 MAA0_7/MAA_7 VMB_DQ7 DQB0_6/DQB_6 MAB0_6/MAB_6
D31 H19 VMA_MA8 19 G4 U8 VMB_MA7 20
VMA_DQ9 DQA0_8/DQA_8 MAA1_0/MAA_8 VMB_DQ8 DQB0_7/DQB_7 MAB0_7/MAB_7
F30 DQA0_9/DQA_9 MAA1_1/MAA_9 H20 VMA_MA9 19 H5 DQB0_8/DQB_8 MAB1_0/MAB_8 Y9 VMB_MA8 20
VMA_DQ10 C30 L13 VMA_MA10 19 VMB_DQ9 H6 W9 VMB_MA9 20
VMA_DQ11 DQA0_10/DQA_10 MAA1_2/MAA_10 VMB_DQ10 DQB0_9/DQB_9 MAB1_1/MAB_9
A30 DQA0_11/DQA_11 MAA1_3/MAA_11 G16 VMA_MA11 19 J4 DQB0_10/DQB_10 MAB1_2/MAB_10 AC8 VMB_MA10 20
VMA_DQ12 F28 J16 VMA_MA12 19 VMB_DQ11 K6 AC9 VMB_MA11 20
VMA_DQ13 DQA0_12/DQA_12 MAA1_4/MAA_12 VMB_DQ12 DQB0_11/DQB_11 MAB1_3/MAB_11
C28 DQA0_13/DQA_13 MAA1_5/MAA_13_BA2 H16 VMA_BA2 19 K5 DQB0_12/DQB_12 MAB1_4/MAB_12 AA7 VMB_MA12 20
VMA_DQ14 A28 J17 VMA_BA0 19 VMB_DQ13 L4 AA8 VMB_BA2 20
VMA_DQ15 DQA0_14/DQA_14 MAA1_6/MAA_14_BA0 VMB_DQ14 DQB0_13/DQB_13 MAB1_5/BA2
E28 H17 VMA_BA1 19 M6 Y8 VMB_BA0 20
VMA_DQ16 DQA0_15/DQA_15 MAA1_7/MAA_A15_BA1 VMB_DQ15 DQB0_14/DQB_14 MAB1_6/BA0
D27 DQA0_16/DQA_16 M1 DQB0_15/DQB_15 MAB1_7/BA1 AA9 VMB_BA1 20
VMA_DQ17 F26 A32 VMA_DM0 VMB_DQ16 M3
VMA_DQ18 DQA0_17/DQA_17 WCKA0_0/DQMA_0 VMA_DM1 VMB_DQ17 DQB0_16/DQB_16 VMB_DM0
C26 DQA0_18/DQA_18 WCKA0B_0/DQMA_1 C32 M5 DQB0_17/DQB_17 WCKB0_0/DQMB_0 H3
VMA_DQ19 A26 D23 VMA_DM2 VMB_DQ18 N4 H1 VMB_DM1
VMA_DQ20 DQA0_19/DQA_19 WCKA0_1/DQMA_2 VMA_DM3 VMB_DQ19 DQB0_18/DQB_18 WCKB0B_0/DQMB_1 VMB_DM2
F24 E22 P6 T3
VMA_DQ21 DQA0_20/DQA_20 WCKA0B_1/DQMA_3 VMA_DM4 VMB_DQ20 DQB0_19/DQB_19 WCKB0_1/DQMB_2 VMB_DM3
C24 C14 P5 T5
VMA_DQ22 DQA0_21/DQA_21 WCKA1_0/DQMA_4 VMA_DM5 VMB_DQ21 DQB0_20/DQB_20 WCKB0B_1/DQMB_3 VMB_DM4
A24 A14 R4 AE4
VMA_DQ23 DQA0_22/DQA_22 WCKA1B_0/DQMA_5 VMA_DM6 VMB_DQ22 DQB0_21/DQB_21 WCKB1_0/DQMB_4 VMB_DM5
E24 E10 T6 AF5
VMA_DQ24 DQA0_23/DQA_23 WCKA1_1/DQMA_6 VMA_DM7 VMB_DQ23 DQB0_22/DQB_22 WCKB1B_0/DQMB_5 VMB_DM6
C22 D9 T1 AK6
VMA_DQ25 DQA0_24/DQA_24 WCKA1B_1/DQMA_7 VMB_DQ24 DQB0_23/DQB_23 WCKB1_1/DQMB_6 VMB_DM7
A22 U4 AK5
VMA_DQ26 DQA0_25/DQA_25 GDDR5/DDR2/GDDR3 VMA_RDQS0 VMB_DQ25 DQB0_24/DQB_24 WCKB1B_1/DQMB_7
F22 C34 V6
VMA_DQ27 DQA0_26/DQA_26 EDCA0_0/QSA_0/RDQSA_0 VMA_RDQS1 VMB_DQ26 DQB0_25/DQB_25 GDDR5/DDR2/GDDR3 VMB_RDQS0
D21 D29 V1 F6
VMA_DQ28 DQA0_27/DQA_27 EDCA0_1/QSA_1/RDQSA_1 VMA_RDQS2 VMB_DQ27 DQB0_26/DQB_26 EDCB0_0/QSB_0/RDQSB_0 VMB_RDQS1
A20 D25 V3 K3
VMA_DQ29 DQA0_28/DQA_28 EDCA0_2/QSA_2/RDQSA_2 VMA_RDQS3 VMB_DQ28 DQB0_27/DQB_27 EDCB0_1/QSB_1/RDQSB_1 VMB_RDQS2
F20 DQA0_29/DQA_29 EDCA0_3/QSA_3/RDQSA_3 E20 Y6 DQB0_28/DQB_28 EDCB0_2/QSB_2/RDQSB_2 P3
VMA_DQ30 D19 E16 VMA_RDQS4 VMB_DQ29 Y1 V5 VMB_RDQS3
VMA_DQ31 DQA0_30/DQA_30 EDCA1_0/QSA_4/RDQSA_4 VMA_RDQS5 VMB_DQ30 DQB0_29/DQB_29 EDCB0_3/QSB_3/RDQSB_3 VMB_RDQS4
E18 DQA0_31/DQA_31 EDCA1_1/QSA_5/RDQSA_5 E12 Y3 DQB0_30/DQB_30 EDCB1_0/QSB_4/RDQSB_4 AB5
VMA_DQ32 C18 J10 VMA_RDQS6 VMB_DQ31 Y5 AH1 VMB_RDQS5
VMA_DQ33 DQA1_0/DQA_32 EDCA1_2/QSA_6/RDQSA_6 VMA_RDQS7 VMB_DQ32 DQB0_31/DQB_31 EDCB1_1/QSB_5/RDQSB_5 VMB_RDQS6
A18 D7 AA4 AJ9
C VMA_DQ34 DQA1_1/DQA_33 EDCA1_3/QSA_7/RDQSA_7 VMB_DQ33 DQB1_0/DQB_32 EDCB1_2/QSB_6/RDQSB_6 VMB_RDQS7 C
F18 DQA1_2/DQA_34 AB6 DQB1_1/DQB_33 EDCB1_3/QSB_7/RDQSB_7 AM5
VMA_DQ35 D17 A34 VMA_WDQS0 VMB_DQ34 AB1
VMA_DQ36 DQA1_3/DQA_35 DDBIA0_0/QSA_0B/WDQSA_0 VMA_WDQS1 VMB_DQ35 DQB1_2/DQB_34 VMB_WDQS0
A16 DQA1_4/DQA_36 DDBIA0_1/QSA_1B/WDQSA_1 E30 AB3 DQB1_3/DQB_35 DDBIB0_0/QSB_0B/WDQSB_0 G7
VMA_DQ37 F16 E26 VMA_WDQS2 VMB_DQ36 AD6 K1 VMB_WDQS1
VMA_DQ38 DQA1_5/DQA_37 DDBIA0_2/QSA_2B/WDQSA_2 VMA_WDQS3 VMB_DQ37 DQB1_4/DQB_36 DDBIB0_1/QSB_1B/WDQSB_1 VMB_WDQS2
D15 DQA1_6/DQA_38 DDBIA0_3/QSA_3B/WDQSA_3 C20 AD1 DQB1_5/DQB_37 DDBIB0_2/QSB_2B/WDQSB_2 P1
VMA_DQ39 E14 C16 VMA_WDQS4 VMB_DQ38 AD3 W4 VMB_WDQS3
VMA_DQ40 DQA1_7/DQA_39 DDBIA1_0/QSA_4B/WDQSA_4 VMA_WDQS5 VMB_DQ39 DQB1_6/DQB_38 DDBIB0_3/QSB_3B/WDQSB_3 VMB_WDQS4
F14 C12 AD5 AC4
VMA_DQ41 DQA1_8/DQA_40 DDBIA1_1/QSA_5B/WDQSA_5 VMA_WDQS6 VMB_DQ40 DQB1_7/DQB_39 DDBIB1_0/QSB_4B/WDQSB_4 VMB_WDQS5
D13 DQA1_9/DQA_41 DDBIA1_2/QSA_6B/WDQSA_6 J11 AF1 DQB1_8/DQB_40 DDBIB1_1/QSB_5B/WDQSB_5 AH3
VMA_DQ42 F12 F8 VMA_WDQS7 VMB_DQ41 AF3 AJ8 VMB_WDQS6
VMA_DQ43 DQA1_10/DQA_42 DDBIA1_3/QSA_7B/WDQSA_7 VMB_DQ42 DQB1_9/DQB_41 DDBIB1_2/QSB_6B/WDQSB_6 VMB_WDQS7
A12 DQA1_11/DQA_43 AF6 DQB1_10/DQB_42 DDBIB1_3/QSB_7B/WDQSB_7 AM3
VMA_DQ44 D11 J21 VMA_ODT0 19 VMB_DQ43 AG4
VMA_DQ45 DQA1_12/DQA_44 ADBIA0/ODTA0 VMB_DQ44 DQB1_11/DQB_43
F10 G19 VMA_ODT1 19 AH5 T7 VMB_ODT0 20
VMA_DQ46 DQA1_13/DQA_45 ADBIA1/ODTA1 VMB_DQ45 DQB1_12/DQB_44 ADBIB0/ODTB0
A10 AH6 W7 VMB_ODT1 20
VMA_DQ47 DQA1_14/DQA_46 VMB_DQ46 DQB1_13/DQB_45 ADBIB1/ODTB1
C10 H27 VMA_CLK0 19 AJ4
VMA_DQ48 DQA1_15/DQA_47 CLKA0 VMB_DQ47 DQB1_14/DQB_46
G13 G27 VMA_CLK0# 19 AK3 L9 VMB_CLK0 20
VMA_DQ49 DQA1_16/DQA_48 CLKA0B VMB_DQ48 DQB1_15/DQB_47 CLKB0
H13 DQA1_17/DQA_49 AF8 DQB1_16/DQB_48 CLKB0B L8 VMB_CLK0# 20
VMA_DQ50 J13 J14 VMA_CLK1 19 VMB_DQ49 AF9
VMA_DQ51 DQA1_18/DQA_50 CLKA1 VMB_DQ50 DQB1_17/DQB_49
H11 H14 VMA_CLK1# 19 AG8 AD8 VMB_CLK1 20
VMA_DQ52 DQA1_19/DQA_51 CLKA1B VMB_DQ51 DQB1_18/DQB_50 CLKB1
G10 AG7 AD7 VMB_CLK1# 20
VMA_DQ53 DQA1_20/DQA_52 VMB_DQ52 DQB1_19/DQB_51 CLKB1B
G8 K23 VMA_RAS0# 19 AK9
VMA_DQ54 DQA1_21/DQA_53 RASA0B VMB_DQ53 DQB1_20/DQB_52
K9 DQA1_22/DQA_54 RASA1B K19 VMA_RAS1# 19 AL7 DQB1_21/DQB_53 RASB0B T10 VMB_RAS0# 20
VMA_DQ55 K10 VMB_DQ54 AM8 Y10
DQA1_23/DQA_55 DQB1_22/DQB_54 RASB1B VMB_RAS1# 20
VMA_DQ56 G9 K20 VMA_CAS0# 19 VMB_DQ55 AM7
+1.5V_VGA VMA_DQ57 DQA1_24/DQA_56 CASA0B +1.5V_VGA VMB_DQ56 DQB1_23/DQB_55
A8 K17 VMA_CAS1# 19 AK1 W10 VMB_CAS0# 20
VMA_DQ58 DQA1_25/DQA_57 CASA1B VMB_DQ57 DQB1_24/DQB_56 CASB0B
C8 DQA1_26/DQA_58 AL4 DQB1_25/DQB_57 CASB1B AA10 VMB_CAS1# 20
VMA_DQ59 E8 K24 VMA_CS0# 19 VMB_DQ58 AM6
VMA_DQ60 DQA1_27/DQA_59 CSA0B_0 VMB_DQ59 DQB1_26/DQB_58
A6 K27 AM1 P10 VMB_CS0# 20
VMA_DQ61 DQA1_28/DQA_60 CSA0B_1 VMB_DQ60 DQB1_27/DQB_59 CSB0B_0
C6 DQA1_29/DQA_61 AN4 DQB1_28/DQB_60 CSB0B_1 L10
Ra R117 VMA_DQ62 E6 M13 VMA_CS1# 19 VMB_DQ61 AP3
40.2/F_4 VMA_DQ63 DQA1_30/DQA_62 CSA1B_0 R82 VMB_DQ62 DQB1_29/DQB_61
A5 DQA1_31/DQA_63 CSA1B_1 K16 AP1 DQB1_30/DQB_62 CSB1B_0 AD10 VMB_CS1# 20
Ra 40.2/F_4 VMB_DQ63 AP5 AC10
MVREFDA DQB1_31/DQB_63 CSB1B_1
L18 K21 VMA_CKE0 19
B MVREFSA MVREFDA CKEA0 B
L20 J20 VMA_CKE1 19 U10 VMB_CKE0 20
MVREFSA CKEA1 MVREFDB CKEB0
Y12 AA11 VMB_CKE1 20
R115 243/F_4 R404 MVREFSB MVREFDB CKEB1
L27 MEM_CALRN0 WEA0B K26 VMA_WE0# 19 AA12 MVREFSB
Rb 100/F_4 C242 +1.5V_VGA *243/F_4 R89 N12 L15 VMA_WE1# 19 N10
MEM_CALRN1 WEA1B WEB0B VMB_WE0# 20
.1U/10V_4 243/F_4 R34 AG12 R81 AB11
MEM_CALRN2 +3V_VGA WEB1B VMB_WE1# 20
Rb 100/F_4
*243/F_4 R88 C184 SI Add
GDDR5

M12 H23 VMA_MA13 19


243/F_4 R391 MEM_CALRP1 MAA0_8 .1U/10V_4 TESTEN
M27 J19 AD28 T8

GDDR5
MEM_CALRP0 MAA1_8 TESTEN MAB0_8 VMB_MA13 20
243/F_4 R309 AH12 W8
+1.5V_VGA MEM_CALRP2
ADD A13 Can support 2G TEST_MCLK AK10
CLKTESTA
MAB1_8 R58 Rc *2.2K_4 +1.5V_VGA
- SI-1 Stage R567 TEST_YCLK
AL10 AH11
CLKTESTB DRAM_RST VM_RST# 19,20
+1.5V_VGA R62
AL31 RSVD
*10K/F_4
Rb51/F_4 SI-2 Change
C77 C78
R116 *.1U/10V_4 *.1U/10V_4 R66 C148
Ra 40.2/F_4 10K/F_4 68P/50V_4
Park Pro/Madison_M2 R69
Ra 40.2/F_4 Park Pro/Madison_M2 Ra Ca
For PARK For Madison
19 VMA_DQ[63..0] R68 R48 R49
R114 10K/F_4 *51/F_4 *51/F_4
100/F_4 19 VMA_DM[7..0]
Rb C241 MEM_CALRNP0 stuff For Mannhatton
.1U/10V_4 R74
Designator
19 VMA_WDQS[7..0]
Rb 100/F_4
20 VMB_DQ[63..0]
MEM_CALRNP1 stuff 19 VMA_RDQS[7..0] C155 MV del R567 add R68 in BOM
.1U/10V_4
20 VMB_DM[7..0] Ra 10K
MEM_CALRNP2 stuff 20 VMB_WDQS[7..0]

20 VMB_RDQS[7..0]
Rb 51R

A DDR3/GDDR3 Memory Stuff Option 18,19,20,34,39 +1.5V_VGA Rc DNI A

GDDR5 GDDR3 DDR3 Ca 68pF

+1.5V_VGA 1.5V 1.8V/1.5V 1.5V


PROJECT : LX6_LX7
Ra 40.2R 40.2R 40.2R Quanta Computer Inc.
Size Document Number Rev
Rb 100R 100R 100R Custom 1A
NB5 ATI M97-M2 (MEM I/F) 2/5
Date: Tuesday, February 02, 2010 Sheet 15 of 44
5 4 3 2 1
5 4 3 2 1

U26B U26G

LVDS CONTROL
R47

GPU_DPST_PWM
10K/F_4
16
AU24 AK27 GPU_DPST_PWM 21
TXCAP_DPA3P VARY_BL GPU_DISP_ON
AV23 AJ27 GPU_DISP_ON 21
TXCAM_DPA3N DIGON
AT25 R45 10K/F_4
MUTI GFX TX0P_DPA2P
AR24
DPA TX0M_DPA2N
AU26 AK35 GPU_TXUCLKOUT+ 21
TX1P_DPA1P TXCLK_UP_DPF3P
AV25 AL36 GPU_TXUCLKOUT- 21
TX1M_DPA1N TXCLK_UN_DPF3N

D
AR8 DVPCNTL_MVP_0 TX2P_DPA0P AT27 TXOUT_U0P_DPF2P AJ38 GPU_TXUOUT0+ 21 D
AU8 AR26 AK37 GPU_TXUOUT0- 21
DVPCNTL_MVP_1 TX2M_DPA0N TXOUT_U0N_DPF2N
NC on PARK AP8
DVPCNTL_0
AW8 AR30 N_TXC_HDMI+ 31 AH35 GPU_TXUOUT1+ 21
+1.8V_VGA DVPCNTL_1 TXCBP_DPB3P TXOUT_U1P_DPF1P
AR3 AT29 N_TXC_HDMI- 31 AJ36 GPU_TXUOUT1- 21
DVPCNTL_2 TXCBM_DPB3N TXOUT_U1N_DPF1N
AR1 DVPCLK
R50 10K/F_4 MEM_ID0 AU1 AV31 AG38 GPU_TXUOUT2+ 21
DVPDATA_0 TX3P_DPB2P N_TX0_HDMI+ 31 TXOUT_U2P_DPF0P
R52 *10K/F_4 MEM_ID1 AU3 AU30 AH37 GPU_TXUOUT2- 21
DVPDATA_1 TX3M_DPB2N N_TX0_HDMI- 31 TXOUT_U2N_DPF0N
R53 *10K/F_4 MEM_ID2 AW3 DPB
R51 *10K/F_4 MEM_ID3 DVPDATA_2
AP6 DVPDATA_3 TX4P_DPB1P AR32 N_TX1_HDMI+ 31 TXOUT_U3P AF35
AW5 DVPDATA_4 TX4M_DPB1N AT31 N_TX1_HDMI- 31 TXOUT_U3N AG36
AU5
DVPDATA_5
SI Add for AMD request AR6 DVPDATA_6 TX5P_DPB0P AT33 N_TX2_HDMI+ 31
AW6 AU32 LVTMDP
DVPDATA_7 TX5M_DPB0N N_TX2_HDMI- 31
AU6 DVPDATA_8
R568 *10K/F_4 GPIO24_TRSTB AT7 AU14 AP34 GPU_TXLCLKOUT+ 21
DVPDATA_9 TXCCP_DPC3P TXCLK_LP_DPE3P
AV7 AV13 AR34 GPU_TXLCLKOUT- 21
DVPDATA_10 TXCCM_DPC3N TXCLK_LN_DPE3N
AN7
R569 *10K/F_4 GPIO27_TMS DVPDATA_11
+3V_VGA AV9 AT15 AW37 GPU_TXLOUT0+ 21
DVPDATA_12 TX0P_DPC2P TXOUT_L0P_DPE2P
AT9 AR14 AU35 GPU_TXLOUT0- 21
DVPDATA_13 TX0M_DPC2N TXOUT_L0N_DPE2N
AR10
CLK_27M_NONSS R307 *0_4 GPIO26_TCK DVPDATA_14 DPC
AW10 AU16 AR37 GPU_TXLOUT1+ 21
DVPDATA_15 TX1P_DPC1P TXOUT_L1P_DPE1P
AU10 AV15 AU39 GPU_TXLOUT1- 21
DVPDATA_16 TX1M_DPC1N TXOUT_L1N_DPE1N
AP10
DVPDATA_17
MV del in BOM AV11
DVPDATA_18 TX2P_DPC0P
AT17
TXOUT_L2P_DPE0P
AP35 GPU_TXLOUT2+ 21
AT11 DVPDATA_19 TX2M_DPC0N AR16 TXOUT_L2N_DPE0N AR35 GPU_TXLOUT2- 21
AR12
NC on PARK AW12
DVPDATA_20
AU20 AN36
DVPDATA_21 TXCDP_DPD3P TXOUT_L3P
AU12 AT19 AP37
DVPDATA_22 TXCDM_DPD3N TXOUT_L3N
AP12
DVPDATA_23
TX3P_DPD2P AT21
AR20
TX3M_DPD2N GPU_CRT_R R346 150/F_4
DPD AU22
TX4P_DPD1P GPU_CRT_G R344 150/F_4 Park Pro/Madison_M2
TX4M_DPD1N AV21
I2C AT23 GPU_CRT_B R332 150/F_4
TX5P_DPD0P
TX5M_DPD0N AR22
C
21 GPU_EDIDCLK AK26 C
SCL
21 GPU_EDIDDATA AJ26 SDA DPLL_VDCC M97 1.0V/M96 1.1V
AD39 GPU_CRT_R +1.8V_VGA
GENERAL PURPOSE I/O R GPU_CRT_R 21
RB
AD37 (1.8V@150mA DPLL_PVDD)
17 VGA_GPIO0 AH20
GPIO_0 GPU_CRT_G L10 BLM18PG181SN1D(180,1.5A)_6 +1.8VDPLL_PVDD
17 VGA_GPIO1 AH18 AE36 GPU_CRT_G 21
GPIO_1 G
17 VGA_GPIO2 AN16 GPIO_2 GB AD35
MV Add in BOM AH23
GPIO_3_SMBDATA
AJ23 AF37 GPU_CRT_B
GPIO_4_SMBCLK B GPU_CRT_B 21
32 GPU_PROCHOT R311 0_4 AH17 AE38 C109 C108 C105
GPIO_5_AC_BATT DAC1 BB VGA STRAPS +1.8V_VGA 10U/6.3V_8 1U/6.3V_4 .1U/10V_4
AJ17
GPIO_6
21 GPU_LVDS_BLON AK17 GPIO_7_BLON HSYNC AC36 GPU_HSYNC 17,21
SI-2 Add 17 VGA_GPIO8 VGA_GPIO8 AJ13 AC38
GPIO_8_ROMSO VSYNC GPU_VSYNC 17,21
17 VGA_GPIO9 VGA_GPIO9 AH15 L13 BLM18PG181SN1D(180,1.5A)_6
+1.8V_AVDD
GPIO_9_ROMSI R73 +1.0V_VGA
AJ16
GPIO_10_ROMSCK (DAC1_AVDD: 1.8V@70mA+42mA)
+3V_VGA AK16 AB34 DAC1_RSET 499/F_4 (1.0V@300mA DPLL_VDDC)
17 VGA_GPIO11 GPIO_11 RSET
17 VGA_GPIO12 AL16 GPIO_12 ( A2VDDQ: 1.8V@1mA)
17 VGA_GPIO13 AM16 AD34 +1.8V_AVDD L8 BLM18PG181SN1D(180,1.5A)_6 +1.0VDPLL_VDDC
GPIO_13 AVDD L35
AM14 GPIO_14_HPD2 AVSSQ AE34 +1.8V_A2VDDQ
39 GFX_CORE_CNTRL0 AM13 BLM18PG181SN1D(180,1.5A)_6
R665 R183 *0/s 27M_SSIN GPIO_15_PWRCNTL_0 +VDD1D C523 C530
2 CLK_27M_SS AK14 GPIO_16_SSIN VDD1DI AC33
*10K/F_4 17,32 VGA_ALERT AG30 AC34 C72 C75 C76
GPIO_17_THERMAL_INT VSS1DI 1U/6.3V_4 .1U/10V_4 10U/6.3V_8 1U/6.3V_4 .1U/10V_4
AN14
GPIO_18_HPD3
AM17
GPIO_19_CTF
39 GFX_CORE_CNTRL1 AL13 AC30
VGA_GPIO21_BBEN AJ14 GPIO_20_PWRCNTL_1 R2
GPIO_21_BB_EN R2B AC31
AK13 +1.8V_VGA
17 VGA_GPIO22 GPIO_22_ROMCSB
AN13
GPIO_23_CLKREQB G2
AD30 (1.8V@20mA TSVDD)
TP5 GPIO24_TRSTB AM23 AD31
R666 GPIO25_TDI JTAG_TRSTB G2B L12 BLM18PG181SN1D(180,1.5A)_6 +1.8V_TSVDD
TP2 AN23
GPIO26_TCK JTAG_TDI
*10K/F_4 TP3 AK23 AF30
GPIO27_TMS JTAG_TCK B2 +1.8V_VGA
TP1 AL24 JTAG_TMS B2B AF31
TP4 GPIO28_TDO AM24 (DAC1_VDD1DI:1.8V@100mA)
JTAG_TDO C133 C135
AJ19 GENERICA
TP7 AK19 AC32 L80 +VDD1D 10U/6.3V_8 1U/6.3V_4
GENERICB C BLM18PG181SN1D(180,1.5A)_6
17 GENERICC AJ20 GENERICC Y AD32
B
AK20 GENERICD COMP AF32 B
AJ24 C969 C968 C967
GENERICE_HPD4 DAC2 VGA STRAPS 10U/6.3V_6S 1U/6.3V_4 .1U/10V_4
AH26 GENERICF
AH24 AD29 HSYNC_DAC2 17
GENERICG H2SYNC
V2SYNC AC29 VSYNC_DAC2 17

31 TMDS_HPD AK24
HPD1 SI Add
AG31 VDD2D +1.8V_VGA
+1.8V_VGA VDD2DI
AG32
VSS2DI

PLACE VREFG DIVIDER AND CAP AG33 A2VDD +3V_VGA


R32 A2VDD
CLOSE TO ASIC 499/F_4
A2VDDQ AD33 +1.8V_A2VDDQ
+VGA_VREFG AH13
VREFG
AF33
R33 C38 A2VSSQ
249/F_4 .1U/10V_4 R72
AA29 DAC2_RSET 715/F_4
R2SET

DDC/AUX AM26
DDC1CLK HDMI_SCL 31
PLL/CLOCK AN26
DDC1DATA HDMI_SDA 31
+1.8VDPLL_PVDD AM32
DPLL_PVDD
AN32 AM27
DPLL_PVSS AUX1P
AUX1N AL27 MEM_ID[3:0] Vendor Type Vendor P/N
GND Option If XO_IN/XO_IN2 not used
+1.0VDPLL_VDDC AN31 AM19 0000 Hinyx 64*16-800MHZ H5TQ1G63BFR-12C
For M97, XO_IN and XO_IN2 should be grounded DPLL_VDDC DDC2CLK
DDC2DATA
AL19 GPIO15 GPIO20 +VGACORE 0001 Samsung 64*16-800MHZ K4W1G1646E-HC12
AW34
XO_IN 0010 Samsung 64*16-900MHZ K4W1G1646E-HC11
AW35 XO_IN2 AUX2P AN20 Low Low 1.05V 0011 Reserved
2 CLK_27M_NONSS XTALIN AV33 AM20 0100 Reserved
XTALOUT XTALIN AUX2N
AU34
XTALOUT Low High 0.95V 0101 Reserved
DDCCLK_AUX3P
AL30 0110 Reserved
R316 *1M/F_4 AM30 High Low 0.9V 0111 Reserved
DDCDATA_AUX3N
SI Del BOM 1000 Reserved
DDCCLK_AUX4P
AL29 High High 0.9V 1001 Reserved
A 2 1 17 GFX_THMD+ AF29
DPLUS DDCDATA_AUX4N
AM29 1010 Reserved A
AG29 THERMAL 1011 Reserved
17 GFX_THMD- DMINUS
Y3 *27MHZ AN21 1100 Reserved
C517 C527 DDCCLK_AUX5P
DDCDATA_AUX5N AM21 1101 Reserved
*27P/50V_4 *27P/50V_4 AK32 GPIO6 +VDDCI 1110 Reserved
+1.8V_TSVDD TS_FDO
AJ32
TSVDD DDC6CLK
AJ30 GPU_DDCCLK 21 1111 Reserved
AJ33
TSVSS DDC6DATA
AJ31 GPU_DDCDATA 21 High 1.07V
NC_DDCCLK_AUX7P AK30 Low 1.12V
AK29
NC_DDCDATA_AUX7N
PROJECT : LX6_LX7
Quanta Computer Inc.
14,18,34,40 +1.0V_VGA
Park Pro/Madison_M2 14,18,34,39 +1.8V_VGA Size Document Number Rev
15,17,18,31,34,39 +3V_VGA Custom 1A
NB5 ATI M97-M2 (DISPLAY) 3/5
Date: Tuesday, February 02, 2010 Sheet 16 of 44
5 4 3 2 1
5 4 3 2 1

U26F

AB39
E39
F34
F39
PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
GND#1
GND#2
GND#3
GND#4
A3
A37
AA16
AA18
16

16
VGA_GPIO0

VGA_GPIO1
STRAPS
R65

R57
10K/J_4

10K/J_4
+3V_VGA

17
G33 AA2
PCIE_VSS#5 GND#5 R295 *10K/J_4
G34 AA21 16 VGA_GPIO2
PCIE_VSS#6 GND#6
H31 AA23
PCIE_VSS#7 GND#7 R314 *10K/J_4
H34 AA26 16 VGA_GPIO8
PCIE_VSS#8 GND#8
H39 AA28
D
J31
PCIE_VSS#9