Lab # 3 Implementation of Sequencers in Trilogy

Objectives
To understand the sequencers implementation through ladder logic.

Equipment/Tools required:
PLC(Triangular Research Inc.), PC with TRiLOGI software, connecting leads etc.

Pre Lab

Introduction:

Sequencers in Trilogy:
A sequencer is a highly convenient feature for programming machines or processes which operate
in fixed sequences. These machines operate in fixed, clearly distinguishable step-bystep order,
starting from an initial step and progressing to the final step and then restart from the initial step
again. At any moment, there must be a "step counter" to keep track of the current step number.
Every step of the sequence must be accessible and can be used to trigger some action, such as
turning on a motor or solenoid valve, etc.
i-TRiLOGI Version 5 supports up to eight sequencers of 32 steps each. Each sequencer uses one
of the first eight counters (Counter #1 to Counter #8) as its step counter. Any one or all of the first
eight counters can be used as sequencers "Seq1" to "Seq8".No. of Sequencer supported by PLC
Hardware depends upon its Model.

PLC Special Functions:

Reversible Counter Functions: [DNctr], [Upctr] and [RSctr].
The [DNctr], [UPctr] and [RSctr] functions work together to implement reversible counter
functions on any of the 128 counters supported by i-TRiLOGI.
Decrement Counter [DNctr]
Each time when the execution condition of a [DNctr] function changes from OFF to ON, the
present value of the designated counter is changed as follow:
Increment Counter [Upctr]
Each time when the execution condition of an [Upctr] function changes from OFF to ON, the
present value of the designated counter is affected as follow:
Reset Counter [RSctr]
When the execution condition of this function changes from OFF to ON, the counter will reset
to inactive state. This function is used to reset both a reversible counter and an ordinary down-
counter coil.

Master Reset.
An ON condition to this function clears all mailbox inputs, outputs, relays, timers and counter
bits to OFF, resets all timers counters/sequencers to inactive state, and clears all latched relay bits.
All integer variables will be cleared to zeros and all string variables will be assigned to empty
string.

In Lab

TASK 01 :
Using TRiLOGI software, control 4 LEDs in Sequence of 1 sec. i.e Each LED glow
for 1 Sec after one another.

LADDER LOGIC :

Figure 1 : Ladder logic implementation for the above given LED's sequence .
In this task we implement a pattern of led’s to blink from led 1 uptill led 5 and again follow this
pattern.so we use the sequencers in this task which blink the blink the led’s in sequence and use
the build in clock which gives the delay of 1 sec ,means every led turn on every led after 1 sec.as
we can see we use the latch circuit to on off the above circuit.

Figure 2 : Output simulation of the above implemented ladder logic .

In the above figure we observe the output results in which we see that the LED’s turn on from
LED 1 uptill to LED 5 after 1 sec delay between in each LED and again follow the same pattern.

TASK 02 :

Create the following output pattern using sequencers.

LADDER LOGIC :

Figure 3 : Ladder logic implementation of the above given system .

In the above program we implemented the sequence of 5 LED’s , each LED turn on every 1 sec
so first we made a latch circuit to on off the program and then we use the sequencer to implement
the sequence , in this cas the led’s turn on from LED1 upto LED5 and return back in the reverse
patteren from LED5 to LED1 and this system goes on.

Figure 4 : Output simulation of the above implemented ladder logic .

The above figure represents the output result of the above implemented ladder logic .we observe
that the output pattern is from out1 to out5 and then comeback in the reverse order.the sequencer
blinks the every output avery 1 sec due to usage of clock function.
TASK 03 :
Design Full Step Stepper Motor Controller for forward and reverse Drive.
Step no. in Outputs
forward direction
1 2 3 4

1 1 1 0 0

2 0 1 1 0

3 0 0 1 1

4 1 0 0 1

LADDER LOGIC :

Figure 5 : Ladder logic implementation of the stepper motor and its defined pattern .
In the above figure we implement the defined pattern of stepper motot for the 4 wires. So first we
build the logic for the given sequence then we build the ladder logic.First we create the latch circuit
to on off the circuit then we implemented the sequencer to sequencly implement the logic
.sequencer implements every logic after 1 sec delay due to clock function used in this
implementation.

Figure 6 : Output simulation for the above implemented ladder logic for the stepper motor .

Above figure represents the output results for the given system . as when the value of sequencer is
1 then the wire 1 and wire 2 on and when its value reaches 2 the wire 2 and wire 3 turn on and so
on.after it reaches the value of 4 it return back to wire1 and wire2 in the reverse direction which
this figure describes .

DESCRIPTION :
This lab is basically about the understanding of the sequencers . as we see
in the pre lab portion the sequencer implement the logic in the sequence so if we need any pattern
in implementation of the circuit we use the sequencers .so in the first lab task we implemented a
simple sequence of tuning on the LED’S .we see that as we use the sequencer in the
implementation every led turn on in the sequence means from led 1 to led 5 and goes on .after
previous led turn on and then turn off the next led turn on .in the second task we imnplented the
same led pattern as in task 1 but with little change of the reverse direction ,in this task we have
only to build the logic how we make the pattern in reverse direction after the logic building we
have to perform same operation as in task 1 , we use sequencer to implement the logic sequence
wise but this time the sequencer counter value is twice as in task 1 because we have to go in reverse
direction.in the third and last task in this lab we perform the circuit operation on stepper motor
which have 4 wires and every wire gives the output in the specific manner or pattern , so we use
the sequencers to implement the logic derived for this case.to implement the specific delay in the
defined pattern we use the clock function with the sequencer so the clock give us the desired delay
in the output.
POST LAB :

TASK 1 :
Implement 3 bit ring counter which counts from 000, 001, ……. 111 using sequencers.

LADDER LOGIC :

Figure 7 : Ladder logic implementation of the counting sequence defined in the above question .

Above figure represents the counting sequence.in this system the program counts from 0 to 7 in
binary form which indicated by the led’s .for example for 7 all led’s will be on represents all 1 and
for 0 all leds turned off indicated 0.
 Figure 8 : Output simulation for the above implemented ladder logic .

Above figure represents the output results that we extract from the above ladder logic , as we see
that as the sequencer value is 6 led 1 and 2 blink means representing 1 and out 3 is off represent 0
so we get the binary of 6 as ( 110 ) .

TASK 2 :
Implement two way traffic signal (Red-30s, Green-30s, Yellow-5s)

(Red2) (Red1)

(Yellow2) (Yellow1)

(Green2) (Green1)

Right
lane
LADDER LOGIC:

Figure 9 : Ladder logic implementation of two way traffic signal .

In the above figure we implemented the two way traffic signal , as the one signal turns to red the
other should turn to green and the both yellow lights turn on simultaneously . so we have 30 sec
on time for red and green lights in both signals and 5 sec on time for yellow light.

Figure 10 : Output simulation for the above implemented ladder logic .

In the above figure the output results are shown .we can see that as the red light of any signal turns
on simulatnously the green light of the other signal turns on and the yellow lights turn on at the
same time.this process will continue in the same manner as above defined .

CONCLUSION :
` In this lab we learnt about the sequencers in the TRILOGI software.
Firstly we see that what are the sequencers , how and why we use them in our circuit
implementation.as the sequencers are used to implement the sequence in our system means we
want to get any output in a specific manner then at that place we use sequencers . the sequencers
at the backend uses the counter register memory that’s why it incremented its value automatically
and each incremented value is a kind of specific sequence.so in the lab task we create some patterns
for simple led pattern ,then we implement this sequence in the reverse direction .in both of these
task the working or the main principle of the sequencer remains the same only the logic we create
for them are different .in the third task we implement a specific pattern for the stepper motor.we
have to generate specific output which contain different combination of wires .
` so after this lab we are now able to use sequencer in our circuit and also understand
how we make different types of logics using sequencer very easily.