AIM : To create 8 bit shift register.

INTRODUCTION :
In digital circuits, a shift register is a cascade of flip flops, sharing the same clock, in which the output of each flip-flop is
connected to the "data" input of the next flip-flop in the chain, resulting in a circuit that shifts by one position the "bit
array" stored in it, "shifting in" the data present at its input and 'shifting out' the last bit in the array, at each transition of
the clock input.
More generally, a shift register may be multidimensional, such that its "data in" and stage outputs are themselves bit
arrays; this is implemented simply by running several shift registers of the same bit-length in parallel.
Shift registers can have both parallel and serial inputs and outputs. These are often configured as "serial-in, parallel-out"
(SIPO) or as "parallel-in, serial-out" (PISO). There are also types that have both serial and parallel input and types with
serial and parallel output. There are also "bidirectional" shift registers which allow shifting in both directions: L→R or
R→L. The serial input and last output of a shift register can also be connected to create a "circular shift register". One
register is PIPO (parellar in parellar out),which is very fast,within single clock pulse ,it is giving output.

THEORY :
These are the simplest kind of shift registers. The data string is presented at "Data In", and is shifted right one stage each
time "Data Advance" is brought high. At each advance, the bit on the far left (i.e. "Data In") is shifted into the
first flip-flop's output. The bit on the far right (i.e. "Data Out") is shifted out and lost.
The data is stored after each flip-flop on the "Q" output, so there are four storage "slots" available in this arrangement,
hence it is a 4-bit Register. To give an idea of the shifting pattern, imagine that the register holds 0000 (so all storage
slots are empty). As "Data In" presents 1,0,1,1,0,0,0,0 (in that order, with a pulse at "Data Advance" each time—this is
called clocking or strobing) to the register, this is the result. The right hand column corresponds to the right-most
flip-flop's output pin, and so on.
So the serial output of the entire register is 00001011. It can be seen that if data were to be continued to input, it would
get exactly what was put in (10110000), but offset by four "Data Advance" cycles. This arrangement is the hardware
equivalent of a queue. Also, at any time, the whole register can be set to zero by bringing the reset (R) pins high.
This arrangement performs destructive readout - each datum is lost once it has been shifted out of the right-most bit.

BLOCK DIAGRAM :
Components : To build any register or counters, we need :
1. Flip-Flops.
2. 2. Logic Gates.

3. 3. Wires to connect

OUTPUT :

CONCLUSION : Hence we have created 8 bit shift Register