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Training Manual

60PS11 Plasma Display

Advanced Single Scan Troubleshooting

1080p

Published January, 2010


OUTLINE

Overview of Topics to be Discussed


Section 1

Contact Information, Preliminary Matters, Specifications,


Plasma Overview, General Troubleshooting Steps,
Disassembly Instructions, Voltage and Signal Distribution
Section 2

Circuit Board Operation, Troubleshooting and Alignment of :


• Switch mode Power Supply
• Y-SUS Board Delivers Logic Signals and FG5V to both upper and lower boards.
• Y-Drive Boards (2) Upper and Lower. Either can run separately.
• Z-SUS Output Board (Also uses one Z-SUB board for bottom panel connector)
• Control Board
• X Drive Boards (3)
• Main Board
• Does not use a Main Power Switch.

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Overview of Topics to be Discussed

60PS11 Plasma Display


Section 1
This Section will cover Contact Information and remind the Technician of
Important Safety Precautions for the Customers Safety as well as the Technician
and the Equipment.

Basic Troubleshooting Techniques which can save time and money sometimes
can be overlooked. These techniques will also be presented.

This Section will get the Technician familiar with the Disassembly, Identification and
Layout of the Plasma Display Panel.

At the end of this Section the Technician should be able to Identify the Circuit
Boards and have the ability and knowledge necessary to safely remove and
replace any Circuit Board or Assembly.

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Preliminary Matters (The Fine Print)

IMPORTANT SAFETY NOTICE


The information in this training manual is intended for use by persons possessing an adequate
background in electrical equipment, electronic devices, and mechanical systems. In any attempt
to repair a major Product, personal injury and property damage can result. The manufacturer or
seller maintains no liability for the interpretation of this information, nor can it assume any
liability in conjunction with its use. When servicing this product, under no circumstances should
the original design be modified or altered without permission from LG Electronics. Unauthorized
modifications will not only void the warranty, but may lead to property damage or user injury.
If wires, screws, clips, straps, nuts, or washers used to complete a ground path are removed for
service, they must be returned to their original positions and properly fastened.

CAUTION
To avoid personal injury, disconnect the power before servicing this product. If electrical power
is required for diagnosis or test purposes, disconnect the power immediately after performing
the necessary checks. Also be aware that many household products present a weight hazard.
At least two people should be involved in the installation or servicing of such devices.
Failure to consider the weight of an product could result in physical injury.

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CONTACT INFORMATION
Customer Service (and Part Sales) (800) 243-0000

Technical Support (and Part Sales) (800) 847-7597

USA Website (GCSC) aic.lgservice.com

Customer Service Website us.lgservice.com

LG Web Training lge.webex.com

LG CS Academy lgcsacademy.com http://136.166.4.200


LG Learning Academy
LCD-DV: 32LG40, 32LH30, 37LH55, 42LG60, 42LG70, 42LH20, 42LH40, 42LH50, 47LG90
PLASMA: 42PG20, 42PQ20, 60PS11, 50PG20, 50PS80, 50PS60

Available on the Plasma Panel New Training Materials on


Plasma page Alignment Handbook the Learning Academy site

Published January 2010 by LG Technical Support and Training


LG Electronics Alabama, Inc.
201 James Record Road,
Huntsville, AL, 35813.
5 January 15, 2010 60PS11 Plasma
ESD Notice (Electrostatic Static Discharge)

Today’s sophisticated electronics are electrostatic discharge (ESD) sensitive. ESD can weaken or damage
the electronics in a manner that renders them inoperative or reduces the time until their next failure.
Connect an ESD wrist strap to a ground connection point or unpainted metal in the product. Alternatively,
you can touch your finger repeatedly to a ground connection point or unpainted metal in the product. Before
removing a replacement part from its package, touch the anti-static bag to a ground connection point or
unpainted metal in the product. Handle the electronic control assembly by its edges only. When
repackaging a failed electronic control assembly in an anti-static bag, observe these same precautions.

Regulatory Information
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to
Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful
interference when the equipment is operated in a residential installation. This equipment generates, uses,
and can radiate radio frequency energy, and, if not installed and used in accordance with the instruction
manual, may cause harmful interference to radio communications. However, there is no guarantee that
interference will not occur in a particular installation. If this equipment does cause harmful interference to
radio or television reception, which can be determined by turning the equipment off and on, the user is
encouraged to try to correct the interference by one or more of the following measures: Reorient or relocate
the receiving antenna; Increase the separation between the equipment and the receiver; Connect the
equipment to an outlet on a different circuit than that to which the receiver is connected; or consult the
dealer or an experienced radio/TV technician for help.

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Safety and Handling, Checking Points
Safety & Handling Regulations

1. Approximately 10 minute pre-run time is required before any adjustments are performed.
2. Refer to the Voltage Sticker inside the Panel when making adjustments on the Power Supply, Y-SUS and Z-SUS Boards.
3. Always adjust to the specified voltage level (+/- ½ volt) unless otherwise specified.
4. Be cautious of electric shock from the PDP module since the PDP module uses high voltage, check that the Power Supply
and Drive Circuits are completely discharged because of residual current stored before Circuit Board removal.
4. C-MOS circuits are used extensively for processing the Drive Signals and should be protected from static electricity.
5. The PDP Module must be carried by two people. Always carry vertical NOT horizontal.
6. The Plasma television should be transported vertically NOT horizontally.
7. Exercise care when making voltage and waveform checks to prevent costly short circuits from damaging the unit.
8. Be cautious of lost screws and other metal objects to prevent a possible short in the circuitry.
9. New Panels and Frames are much thinner than previous models. Be Careful with flexing these panels. Be careful
with lifting Panels from a horizontal position. Damage to the Frame mounts or panel can occur.
10. New Plasma models have much thinner cabinet assemblies and mounts.
Be extremely careful when moving the set around as damage can occur.

Checking Points to be Considered


1. Check the appearance of the Replacement Panel and Circuit Boards for both physical damage and part number accuracy.
2. Check the model label. Verify model names and board model matches.
3. Check details of defective condition and history. Example: Y-SUS or Y-Drive Board Failure, Mal-discharge on screen, etc.

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Basic Troubleshooting Steps

Define, Localize, Isolate and Correct

• Define Look at the symptom carefully and determine what circuits could be causing the
failure. Use your senses Sight, Smell, Touch and Hearing. Look for burned parts and check
for possible overheated components. Capacitors will sometimes leak dielectric material and
give off a distinct odor. Frequency of power supplies will change with the load, or listen for
relay closing etc. Observation of the front Power LEDs may give some clues.

• Localize After carefully checking the symptom and determining the circuits to be checked
and after giving a thorough examination using your senses the first check should always be
the DC Supply Voltages to those circuits under test. Always confirm the supplies are not
only the proper level but be sure they are noise free. If the supplies are missing check the
resistance for possible short circuits.

• Isolate To further isolate the failure, check for the proper waveforms with the
Oscilloscope to make a final determination of the failure. Look for correct Amplitude
Phasing and Timing of the signals also check for the proper Duty Cycle of the signals.
Sometimes “glitches” or “road bumps” will be an indication of an imminent failure.

• Correct The final step is to correct the problem. Be careful of ESD and make sure to
check the DC Supplies for proper levels. Make all necessary adjustments and lastly always
perform a Safety AC Leakage Test before returning the product back to the Customer.

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60PS11 PRODUCT INFORMATION SECTION

This section of the manual will discuss the specifications of the


60PS11 Advanced Single Scan Plasma Display Television.

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60PS11 Specifications

1080P PLASMA HDTV


60" Class (59.5" diagonal)
• 1080P Full HD Resolution
For Full Specifications
• 600 Hz sub field driving See the Specification Sheet
• 1,500 cd/m2 Brightness
• XD Engine™
• 2000,000:1 Dynamic Contrast Ratio
• Smart Energy Saving
• 3x HDMI™ V.1.3 with Deep Color (2 Rear, 1 side).
• AV Mode II (Cinema, Sports, Game)
• Clear Voice
• LG SimpLink™ Connectivity
• Invisible Speaker System
• 100,000 Hours to Half Brightness (Typical)
• PC Input
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60PS11 Logo Familiarization Page 1 of 2

FULL HD RESOLUTION 1080P HD Resolution Pixels: 1920 (H) × 1080 (V)


Enjoy twice the picture quality of standard HDTV with almost double the pixel
resolution. See sharper details like never before. Just imagine a Blu-ray disc
or video game seen on your new LG Full HD 1080p TV.

HDMI (1.3 Deep Color) Digital multi-connectivity


HDMI (1.3 Deep color) provides a wider bandwidth (340MHz,
10.2Gbps) than that of HDMI 1.2, delivering a broader range of colors,
and also drastically improves the data-transmission speed.

Invisible Speaker
Personally tuned by Mr. Mark Levinson for LG
TAKE IT TO THE EDGE newly introduces ‘Invisible Speaker’ system,
guaranteeing first class audio quality personally tuned by Mr. Mark
Levinson, world renowned as an audio authority. It provides Full Sweet
Spot and realistic sound equal to that of theaters with its Invisible
Speaker.
Dual XD Engine
Realizing optimal quality for all images
One XD Engine optimizes the images from RF signals as another XD
Engine optimizes them from External inputs. Dual XD Engine presents
images with optimal quality two times higher than those of previous
models.

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60PS11 Logo Familiarization Page 2 of 2

AV Mode "One click" Cinema, THX Cinema, Sport, Game mode.


TAKE IT TO THE EDGE is a true multimedia TV with an AV Mode
which allows you to choose from 4 different modes of Cinema, Sports
and Game by a single click of a remote control.

Clear Voice Clearer dialogue sound


Automatically enhances and amplifies the sound of the human voice
frequency range to provide high-quality dialogue when background
noise swells.

Save Energy, Save Money


It reduces the plasma display’s power consumption.
The default factory setting complies with the Energy Star requirements
and is adjusted to the comfortable level to be viewed at home.
(Turns on Intelligent Sensor).

Save Energy, Save Money


Home electronic products use energy when they're off to power features like clock
displays and remote controls. Those that have earned the ENERGY STAR use as much
as 60% less energy to perform these functions, while providing the same performance at
the same price as less-efficient models. Less energy means you pay less on your energy
bill. Draws less than 1 Watt in stand by.

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600Hz Sub Field Driving
(600 Hz Sub Field Driving)

• 600 Hz Sub Field Driving is achieved by using 10 sub-fields per frame process
(vs. Comp. 8 sub-field/frame)

• No smeared images during fast motion scenes

Original Image 10 Sub Fields Per Frame

Sub Field firing occurs using wall charge and polarity differences between Y-SUS and Z-SUS signals.

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60PS11 Remote Control BOTTOM PORTION
p/n MKJ42519617

TOP PORTION

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60PS11 Rear and Side Input Jacks
Music and
Photos
Software
Upgrades USB

HDMI 3
SIDE
AC In INPUTS

REAR
INPUTS

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60PS11 Dimensions
Power:
There must be at least 4 inches of Clearance on all sides
380W (Typical) 3-1/2"
57-13/16" 88.9mm
0.19W (Stand-By)
1468.1mm

8-13/16"
17-1/8" 224.2mm
435mm 23-5/8"
600mm

40-1/2" 15-3/4" 15-3/4"


1028.7mm 400mm 400mm
Model No.
Serial No.
37-3/8"
Label
949.96mm

Remove 7 screws
to remove stand
for wall mount

3-1/8"
78.74mm

117 lbs with Stand 60-11/16"


Weight: 780mm
104 lbs without Stand 15-5/8"
396.24mm

16
DISASSEMBLY SECTION

This section of the manual will discuss Disassembly, Layout and Circuit
Board Identification, of the 60PS11 Advanced Single Scan Plasma Display Panel.

Upon completion of this section the Technician will have a better


understanding of the disassembly procedures, the layout of the printed
circuit boards and be able to identify each board.

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Removing the Back Cover

To remove the back cover, remove the 36 screws


Indicated by the arrows.
(The Stand does not need to be removed).

PAY CLOSE ATTENTION TO THE TYPE, SIZE AND LENGTH


Of the screws when replacing the back cover.
Improper type can damage the front.

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Circuit Board Layout
Panel Voltage Label
Y-Drive Panel ID Label
Upper
Power Supply
FPC

(SMPS)
FPC

FPC

Z-SUS
FPC

Y-SUS FPC
FPC

Z-SUB
FPC

FPC
Side Input
Control
(part of main)
TCP
FPC

Heat Sink
Main Board
Y-Drive AC In
Lower Left “X”
Center “X” Right “X”

IR/LED
Conductive Tape Under Main Board
Board Keyboard Invisible Speakers

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Disassembly Procedure for Circuit Board Removal
Notes: 1) All Plugs listed are from left to right Pin 1,2, 3, ETC.
2) Remember to be cautious of ESD as some semiconductors are CMOS and prone to static failure.
Switch Mode Power Supply Board Removal
Disconnect the following connectors: P811, P812, P813, P814 and SC101.
Remove the 10 screws holding the SMPS in place.
Remove the board.
When replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label.
Also, re-confirm VSC, -Vy and Z-Bias as well.
After replacing the Y-SUS,
Y-SUS Board Removal check the connectors for solder break.

Disconnect the following connectors: P302, P307 and Ribbon Cable P101.
Remove the 9 screws holding the Y-SUS in place.
Remove the Y-SUS by lifting slightly to clear standoff and slid it to the right, disconnecting the Y-Drives.
When replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label.
Confirm VSC, -Vy and Z-bias as well.
After replacing the Y-Drive, Board Standoff
Y-Drive Boards Removal check the connectors for solder breaks.

Disconnect the following Flexible Ribbon Connectors P101~P104 and/or P201~P204:


Disconnect the following Connectors P114~P116 and/or P214~P216.
Remove the 4 screws holding either of the Y-Drive boards in place.
Remove the Y-Drive by lifting slightly and sliding the board to the left unseating
the connectors from the Y-SUS Board. Collar

Note: Y, Z-SUS and Y-Drive boards are mounted on board stand-offs that have a small collar.
The board must be lifted slightly to clear these collars. Behind each board are “Chocolate” (dense rubber
like material) that act as shock absorbers. They may make the board stick when removing.
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Disassembly Procedure for Circuit Board Removal (2)
Z-SUS Board Removal
Disconnect the following connectors: P100, P101.
Disconnect the following connectors: P102, P104 and P105. These are the FPC cables. Pull the locking
caps to the right. Pull out carefully the Flexible Printed Circuits (FPCs) and slide them out to the right.
Remove the 6 screws holding the Z-SUS in place and the one holding the Z-SUB in place.
Lift the Z-SUS up and remove the board. Remove the Z-SUB by pulling it off the Z-SUS.
When replacing, be sure to readjust the Va/Vs voltages in accordance with the Panel Label.
Confirm VS, -Vy and Z-bias as well.
Main Board Removal
Disconnect the following connectors: P1001, P1003, P1005 and P1006.
Remove the 2screws holding on the decorative plastic piece on the right side.
Remove the 4 screws holding the Main board in place and Remove the board.
Control Board Removal
Disconnect the following connectors: P5 LVDS, P2, P200, P1 Ribbon, P101, P102 and P104 Ribbon by
lifting up the locking tab. Remove the 4 screws holding the Control board in place Remove the board.
Front Key and LED Board Removal
KEY BOARD:
Remove the 2 screws holding the Key board in place. Remove the board by lifting the board upward.
Disconnect P101.
FRONT IR/INTELLIGENT SENSOR and POWER BUTTON:
Remove the 2 screws.
Note; The left hand screw has a Grounding Strap. Remove the Board.
Disconnect P101 and P102.

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X Drive Circuit Board Removal Continued Press
Inward
Make sure AC is removed and Lay the Television down carefully on
a padded surface.
Remove the Back Cover and the Stand.
Carefully remove the LVDS Cable P5 from the Control Board by
pressing the Locking Tabs together and pull the connector straight
back using a rocking motion to remove the cable.
(This prevents possible damage). See illustration to the right. LVDS Cable
Press Connector
Inward

(A) Remove the Stand (7 Screws removed during back removal).


(B) Remove the Stand Metal Support Bracket (8 Screws) 2 Plastic tap
thread and 6 Metal thread. Disconnect the Ground strap and remove
the AC connector to the SMPS. Place bracket off the side. Press
(C) Remove connector P1001 to Front IR board and P1005 to the Speakers. Inward
(D) Remove the 4 screws from the Main Board Mounting Bracket.
Carefully reposition the Main Board and Mounting Bracket up and off to the right side.
(E) Remove the Vertical support Braces marked “E”. Note: There is a Left and a Right brace. (4 Screws per/bracket)
2 Plastic tap thread and 2 Metal thread.
(F) Remove the 15 screws holding the Heat Sink. (Warning: Never run the set with this heat sink removed). Note: There is
a large piece of conductive tape over the right side of the Right X Board that must be removed. Also, note that there is
a long piece of Chocolate heat transfer material attached all the way across the underside of the heat sink.

X-DRIVE LEFT, CENTER AND RIGHT REMOVAL:


Disconnect all TCP ribbon cables from the defective X-Drive board and all other Ribbon cables going to the board.
Remove the 6 screws in either the Left or Right X-Drive board or the 5 screws holding the Center X-Drive in place.
Remove the board. Reassemble in reverse order. Recheck Va / Vs / VScan / -VY / Z-Drive.
Note: There are piece of Chocolate heat transfer material under each TCP. Do not tear or remove.

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Getting to the X Circuit Boards

A
LVDS Cable
Stand should have already be removed

Warning:
Never run the TV with the E E
TCP Heat Sink removed Left Right

F
Heat Sink
Ground C
Strap B
D

Warning Shorting Hazard: Conductive Tape. Do not allow to touch energized circuits.

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Left and Right X Drive Removal
After removing the back cover, the Main board is lifted out of the way, the 15 screws removed from heat sink
covering the TCPs and connectors to the TCPs are removed, the X-Drive boards can be removed.

There may be tape on these connectors. Disconnect connector P121


P110
P210
P310
Are all the P121
same

Remove tape (if present) and Gently pry the


locking mechanism upward and remove the ribbon Va from the Y-SUS to Left X Only
cable from the connector.
Carefully lift the TCP ribbon up and off.
It may stick, be careful not to crack TCP.
Removing Connectors to the TCPs. (See next page for precautions)
Gently lift the locking mechanism
upward on all TCP connectors
Left X: P101~108
Center X: P201~207
Right X: P301~308 Cushion (Chocolate)
TCP

Flexible ribbon cable connector

24 January 15, 2010 60PS11 Plasma


TCP (Tape Carrier Package) Generic Removal Precautions
TCP Connector Removal

Lift up the lock as shown by arrows.


(The Lock can be easily broken.
It needs to be handled carefully.)

The TCP has two small tab on each


side which have to be lifted up
slightly to pull the connector out.
Note: TCP is usually stuck down Pull TCP apart as shown by arrow.
to the Chocolate heat transfer (TCP Film can be easily damaged.
material, be Very careful when Handle with care.)
lifting up on the TCP ribbon cable.

25 January 15, 2010 60PS11 Plasma


Left and Right X Drive Removal

Remove the 6 screws for either left or right board or 5for the center. 13 total for all three.
(The screws between the Left and Center or the Center and Right boards, secures both boards)

The Left X Board drives the right side of the screen vertical electrodes
The Center X Board drives the Center of the screen vertical electrodes
The Right X Board drives the left side of the screen vertical electrodes

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CIRCUIT OPERATION, TROUBLESHOOTING AND CIRCUIT
ALIGNMENT SECTION

60PS11 Plasma Display


This Section will cover Circuit Operation, Troubleshooting and
Alignment of the Power Supply, Y-SUS Board, Y-Drive Boards, Z-SUS
Board, Control Board, Main Board and the X Drive Boards.

At the end of this Section the technician should understand the operation
of each circuit board and how to adjust the controls. The technician
should be able with confidence to troubleshoot a circuit board failure,
replace the defective circuit and perform all necessary adjustments.

27 January 15, 2010 60PS11 Plasma


60PS11 SIGNAL and VOLTAGE DISTRIBUTION DIAGRAM
Y Drive Step 1: RL ON (5V, 12V, 5V Det) Out Display Panel
5VFG (5V) measured Step 2: M5 On (M5V) Out Horizontal
Upper from Floating Ground Step 3: VS On (Va, Vs and 17V) Out
FPCs SMPS OUTPUT VOLTAGES IN RUN Electrodes
VSC (140V) measured SMPS OUTPUT VOLTAGES IN STBY
from Floating Ground
STB5V, +5V, 17V, 12V to Main Board Sustain
P101 STB +5V (also AC Det) Vs, Va and M5V to Y-SUS, Z-SUS Board
Floating
M5V to Control Board
Ground P302 P812 P811
P102 P301 Floating Gnd
P114
P101
5VFG
(FG)
SMPS M5V
Note: Va not used
M5V, Vs, Va M5V, Vs, Va
P103 P103
P115
P306 Data, Clock (i2c)
Note: Board P813
FPCs
Floating Gnd (FG) P101
Va not used
P104
P304 Data, Clock (i2c) by Y-SUS SK101 P814
P104 P116 SMPS Relay On +5V, 12V
Vscan, FG5V
P111 Turn On M5 On M5V
n/c Drive Data
AC
Input Commands VS On 17V, Va, Vs
Z SUS
FPCs n/c
Clock (i2c) Y-SUS Board Filter Board P102

P211
5VFG Z Drive Control Signals
P201 P214 P303 Data, Clock (i2c) P100
Vscan, FG5V
Logic Signals P103
M5V 17V 17V
Display Enable
P101 P1 P200 P2 LVDS Display Enable P106
P202 P105
P215
P305 Data, Clock (i2c)
Floating Gnd (FG) 17V CONTROL P5
Note: 17V not used Set in Video
P203 Floating by Control Board LVDS
Ground Stand By:
P101 3.3V P104 FPCs
P102 STB +5
P216 P308 Floating Gnd (FG) P1006 P1003 Speakers
P204 AC Voltage
P307
Det MAIN Board
Y Drive P1101 3.3V
Va P1005 Key Board
Lower RGB Logic RGB Logic
Signals Signals 5V STBY Pull Up
Display Panel Horizontal IR, Power LED, Control Keys
Electrodes Reset, Sustain 3.3V 3.3V 3.3V Intelligent Sensor Power Button
P210
P121 P110 P310
X-Board-Left P120 P220 X-Board-Center
P232 P211 P311 P331
P221 P320 X-Board-Right
Va Va

P201 P202 P203 P204 P205 P206 P301 P302 P303 P304 P305 P306

Display Panel Vertical Address (Color Address)

28
Panel Label Explanation

(9)
(1)
(10)
(2) (8)
(11)
(3) (12)
(4)
(5) (13)
(7) (14)
(6) (15)

(1) Panel Model Name (9) TUV Approval Mark


(2) Bar Code (10) UL Approval Mark
(3) Manufacture No. (11) UL Approval No.
(4) Adjusting Voltage DC, Va, Vs (12) Panel Model Name
(5) Adjusting Voltage (Set Up / -Vy / Vsc / Ve / Vzb) (13) Max. Watt (Full White)
(6) Trade name of LG Electronics (14) Max. Volts
(7) Manufactured date (Year & Month) (15) Max. Amps
(8) Warning

29 January 15, 2010 60PS11 Plasma


Adjustment Notice All adjustments (DC or Waveform) are adjusted in WHITE WASH.
Customer’s Menu, Select “Options”, select “ISM” select “WHITE WASH”.

It is critical that the DC Voltage adjustments be checked when;


1) SMPS, Y-SUS or Z-SUS board is replaced.
2) Panel is replaced, Check Va/Vs since the SMPS does not come with new panel
3) A Picture issue is encountered
4) As a general rule of thumb when ever the back is removed

ADJUSTMENT ORDER “IMPORTANT”


DC VOLTAGE ADJUSTMENTS
1) POWER SUPPLY: Va Vs (Always do first)
2) Y-SUS: Adjust –Vy, Vscan,
Remember, the Voltage Label MUST be followed,
3) Z-SUS: Adjust Z-Bias (VZB) it is specific to the panel’s needs.
WAVEFORM ADJUSTMENTS
Manufacturer
1) Y-SUS: Set-Up, Set-Down Bar Code

Panel
Set-Up “Rear View”
-VY Vscan Ve Z_BIAS
The Waveform adjustment is only necessary
1) When the Y-SUS board is replaced
2) When a “Mal-Discharge” problem is encountered
All label references are from a specific panel.
3) When an abnormal picture issues is encountered
They are not the same for every panel encountered.

30 January 15, 2010 60PS11 Plasma


SWITCH MODE POWER SUPPLY SECTION

This Section of the Presentation will cover troubleshooting the Switch Mode Power Supply for
the Single Scan Plasma. Upon completion of the section the technician will have a
better understanding of the operation of the Power Supply Circuit and will be able to
locate voltage and test points needed for troubleshooting and alignments.

• DC Voltages developed on the SMPS


• Adjustments VA and VS.

• Always refer to the Voltage Sticker located on the back of the panel, in the upper Left
Hand side for the correct voltage levels for the VA, VS, -VY, Vscan, and Z Bias as these
voltages will vary from Panel to Panel even in the same size category.
• Set-Up and Ve are just for Label location identification and are not adjusted in this panel.

SMPS P/N EAY59547002


Check the silk screen label on the top center of the Power Supply board to identify the correct part
number. (It may vary in your specific model number).

On the following pages, we will examine the Operation of this Power Supply.

31 January 15, 2010 60PS11 Plasma


Switch Mode Power Supply Overview

The Switch Mode Power Supply Board Outputs to the :


VS Drives the Display Panel’s Horizontal Electrodes.

Y-SUS and VA To Y-SUS, fused then to the X-Boards. (Not used by Z-SUS).
Z-SUS Boards Primarily responsible for Display Panel Vertical Electrodes.
M5V Used to develop Bias Voltages on the Y-SUS, X-SUS Boards.

STBY 5V Microprocessor Circuits

17V Audio B+ Supply


Main Board
12V Tuner B+ Circuits

5V Signal Processing Circuits

There are 2 adjustments located on the Power Supply Board VA and VS. The
Adjustments
M5V is pre-adjusted and fixed. All adjustments are made with relation to Chassis
Ground. Use “Full White Raster” 100 IRE

VA RV901

VS RV951

32 January 15, 2010 60PS11 Plasma


Power Supply Board Layout

33 January 15, 2010 60PS11 Plasma


Power Supply Circuit Layout
P812 Primary P811
To Y-SUS
Source To Y-SUS
8Amp/250V

0V Stby
382V Run VA Source
Fuse F801
Circuit
VS Source
PFC

VA VR951

17V Source
VS VR901 P813
To Control

Bridge
Rectifiers
IC701
Sub Micon

STBY 5V
5V, 12V
Source P814
Main Fuse AC Input
RL101 RL103 F101 SC 101 To MAIN
15Amp/250V

34 January 15, 2010 60PS11 Plasma


Power Supply Basic Operation
AC Voltage is supplied to the SMPS Board at Connector SC101 from the AC Input assembly. Standby 5V is developed from
160V source supply (which during run measures 380V measured from the primary fuse F801).
This supply is also used to generate all other voltages on the SMPS.

The STBY5V (standby) is B+ for the Controller (IC701) on the SMPS and output at P814 pins 11 and 23 then sent to the
Main board for Microprocessor (IC1) operation. AC Detection (AC Det) is generated on the SMPS, by rectifying a small
sample of the A/C Line at D102 and associated circuitry and routed to the Controller (IC701) where it outputs at P814 pin 18
and sent to P1006 pin 18 to the Main Board where it is sensed and monitored by the Main Microprocessor (IC1). The AC
Det in this set works differently than most. If AC Det is missing the Microprocessor will turn off the television in about 10
seconds after turn on. This will happen each time turn on is attempted.

When the Microprocessor (IC1) on the Main Board receives an “ON“ Command from either the Power button or the
Remote IR Signal, it outputs a high called RL ON at Pin 19 of P814. This command causes the Relay Circuit to close
both Relays RL101 and RL102 bringing the PFC source up to full power by increasing the 160V standby to 380V run
which can be read measuring voltage at Fuse F801 from “Hot” Ground. At this time the run voltages 12V, and +5V
sources become active and are sent to the Main Board via P814 (12V at pins 5 and 6 and +5V at pins 9,10, and 12).
The 5V detect line from the SMPS Board to the Main Board can be measured at pin 17 of P814. It is not used.

The next step is for the Microprocessor (IC1) on the Main Board to output a high on M5V ON Line to the SMPS at P814 Pin
21 which is sensed by the Controller (IC701) turning on the M5V line and output at P811 pins 9 and 10 to the Z-SUS P101
pins 9 and 10 and P812 pins 9 and 10 and Y-SUS boards P302 pins 9 and 10. It is also sent out P813 pins 1~4 to the
Control board P200 pins 1~4.
Full Power occurs when the Microprocessor (IC1) on the Main Board brings the VS-ON line high at Pin 20 of P814 of the
SMPS Board. VS-ON is routed to the Controller (IC701) which turns on the 17V Audio, VA, and the VS supplies. VA and
VS output at P811 to the Z-SUS board and P812 to the Y-SUS board. (VA pins 6 and 7 and VS pins 1 and 2). The 17V
Audio supply outputs to the Main board at P814 pins 1 and 2 and used for Audio processing and amplification.

AUTO GND Pin 22 of P814: This pin is grounded on the Main board. When it is grounded, the Controller IC701 works in
the normal mode, meaning it turns on the power supply via commands sent from the Main board. When this pin is floated
(opened), it pulls up and turns the Controller IC701 on in the Auto mode. In this state, the Controller turns on the power
supply in stages automatically. A load is necessary to perform a good test of the SMPS if the Main board is suspect.

35 January 15, 2010 60PS11 Plasma


60PS11 POWER SUPPLY START UP SEQUENCE
In Stand-By Primary side is 4.57V
In Run (Relay On) Primary side is 391V 10
M5V
POWER SUPPLY Reg
(SMPS) 9
16 16
AC In 5V/12V Vs
Regulators Reg
Vs
1 Stand
17V 14
By 5V Reg 15
6 Reg Va Va
Reg
15

AC Stand By 5V Det. 5V 12V 17V


Det. 5V Va Vs Va Vs M5V
M5V M5V
15 16 10 15 16 10 10
3 2 7 Relay 8 M5V Vs
On On On Y-SUS PWB Z-SUS PWB Control PWB
Not Va 5VFG 17V 17V 3.3V
Used 6 14 9 14
15 12 11 11 11 13
17V Audio 5V 17V
5V Mnt 12V Video Floating
Gnd
AC Det.
5V MST
+5V HDMI EDID Y DRIVE Upper
If missing, And other input circuits 12
Switch
set turns
Q303 Y DRIVE Lower
off within Power 13
10 sec. Other Switch At point 4 TV is in 13
Stand-By state. It is MAIN
Circuits Energy Star Compliant. PWB 15
X PWB X PWB X PWB
Less than 1 Watt
3.3VST 6
Left Center Right
3.3V Reg 15 15
IC301 2 5V Relay 9
STBY 5V
Mnt On
Reset 4 Microprocessor 14 2 Front IR Remote
Q302 IC1 Power On Board Or Key
5 5

36
Power Supply Va and Vs Adjustments
Example
Important: Use the Panel Label
Voltage Label
Not this book for all voltage adjustments.

Use Full White Raster “White Wash”


VA VS
Voltage Voltage

Va TP Vs TP
P811 P811
Pin 6 or 7 Pin 1 or 2

Vs Adjust:
Place voltmeter on pin 1 or 2
of P811 or P812. Adjust
VR951 until the reading
matches your label.
Va Adjust:
Place voltmeter on pin 6 or 7
of P811 or P812. Adjust
VR901 until the reading
matches your label.
37 January 15, 2010 60PS11 Plasma
60PS11 SMPS STATIC TEST UNDER LOAD
Using two 100 Watt light bulbs, attach one end to Vs and the other end to ground. Apply AC to SC101. If the light bulbs
turn on and VS is the correct voltage, allow the SMPS to run for several minutes to be sure it will operate under load. If
this test is successful and all other voltages are generated, you can be fairly assured the power supply is OK.
Note: To be 100% sure, you would need to read the current handling capabilities of each power supply listed on the silk
screen on the SMPS and place each supply voltage under the appropriate load.

4 or 5 or 8 P811 or P812
Check Pins 6 or 7
Gnd for Va voltage
100W

PFC Hot Ground:


P812 Circuit Represents a Shock
Hazard VR951 P811
100W

Vs P812 VS Adj
IC804
10) M5V
9) M5V P813 P813
Pins 1 or 2 P811
8) Gnd
1) VS Check Pins 1~4
7) VA
2) VS For M5V
6) VA
3) n/c
P811 or P812 5) Gnd F801 4) Gnd
4) Gnd 8A/250V
Check Pins 1 or 2 5) Gnd VR901
3) n/c 391V Run
for Vs voltage 6) VA VA Adj
2) VS 4.57V STBY 7) VA
1) VS IC604 8) Gnd
9) M5V
F101 (AC) 10) M5V
Not Hot 15A/250V IC503 P814
or Cold
IC701
RL101RL102
N L
CN701
SC101 n/c

P814
Any time AC is applied to the SMPS, STBY 5V and AC DET should
be present. Check Pins 11 or 23 for 5V Check Pins 1 or 2 for
If AC Det is missing, the TV will come on, but after 10 seconds the SBY 17V
television will shut off. This will happen each time the TV is turned
on. Check Pin 18 for Check Pins 5 or 6 for
Note: AC Det (5V) 12V
Always test the SMPS under a load using the 2 light bulbs.
Check Pin 9,10,12 for
Abnormal operational conditions may result if not loaded. (+5V)

38
Power Supply Static Test (Forcing on the SMPS in stages)
WARNING: Remove AC when adding
or removing any plug or resistor.

P811 and P812 disconnected from the Y-SUS and Z-SUS boards.
P813 disconnected from the Control board.
P1006 disconnected from the Main board.

Use the holes in the connector P1006 side to insert the resistor or jumper leads.

(A) Ground the Auto Ground (Pin 22) on P814.

(B) When AC is applied, Check P814 AC_Det (Pin 18) for 5V and Stand-By
5V (Pins 11 and 23) for 5V.

(C) 100Ω ¼ watt resistor added from STBY 5V (Pins 12 or 23)


(Note pins 9-10 or 12 are not on yet).
to RL_ON (Pin 19) closes relays RL101 and RL103 turning on
the 5V and 12V Supplies.

(D) 100Ω ¼ watt resistor added from 5V (Pins 9 ~ 12) to M5 ON (Pin 21)
turns on the M5V (P811 or P812 pins 9, 10) and (P813 Pins 1~4) lines.

(E) 100Ω ¼ watt resistor added from STBY 5V (Pins 9~12) to VS ON


(Pin 20) brings the;
• 17V (P814 pins 1 and 2) lines high.
• VA (P811/P812 Pins 6 and 7 Va) lines high.
• VS (P811/P812 pins 1 and 2 Vs) lines high.

39 January 15, 2010 60PS11 Plasma


SMPS Connector P814 Identification, Voltages and Diode Check
P814 CONNECTOR “SMPS" to “Main" P1006

Pin Label STBY Run Diode Mode Pin Label STBY Run Diode Mode
a a
1 17V 0V 17V 2.2V 2 17V 0V 17V 2.2V
3 Gnd Gnd Gnd Gnd 4 Gnd Gnd Gnd Gnd
b b
5 12V 0V 12V 1.89V 6 12V 0V 12V Open
7 Gnd Gnd Gnd Gnd 8 Gnd Gnd Gnd Gnd
b b
9 5V 5V 5V 1.99V 10 5V 5V 5V 1.99V
b
11 Stby 5V 5V 5V 2.17V 12 5V 5V 5V 1.99V
13 Gnd Gnd Gnd Gnd 14 Gnd Gnd Gnd Gnd
15 Gnd Gnd Gnd Gnd 16 Gnd Gnd Gnd Not Used
17 5V Det .15V 5V 1.09V 18 AC Det 5V 5V 2.75V
19 RL On 0V 3.73V Open 20 VS On 0V 3.2V Open
21 M5 ON 0V 3.24V Open 22 Auto Gnd Gnd Gnd 2.78V
c
23 Stby 5V 5V 5V 2.17V 24 Key On 0V 0V Open

aNote: The 17V turns on when the VS On command arrives. cNote: The Key On line is not used in this model.
bNote: The 5V/12V turns on when the RL-On command arrives.

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

40 January 15, 2010 60PS11 Plasma


SMPS Connector SC101 and P811 Identification, Voltages and Diode Check

SC101 AC INPUT

Connector Pin Number Standby Run Diode Mode


SC101 1 and 3 120VAC 120VAC Open

P812 CONNECTOR "Power Supply“ to Y-SUS “P302” P811 CONNECTOR "Power Supply“ to Z-SUS “P101”

Diode Diode
Pin Label STBY Run Pin Label STBY Run
Mode Mode
1, 2 *Vs 0V *196V Open 1, 2 *Vs 0V *196V Open
3 n/c n/c n/c n/c 3 n/c n/c n/c n/c
4, 5 Gnd 0V 0V Gnd 4, 5 Gnd 0V 0V Gnd
6, 7 *Va 0V *68V Open 6, 7 *Va 0V *68V Open
8 Gnd 0V 0V Gnd 8 Gnd 0V 0V Gnd
a a
9, 10 M5V 0V 5V 0.093V 9, 10 M5V 0V 5V 0.093V

* Note: This voltage will vary in accordance with Panel Label


a
Note: The Diode Mode test on the M5V line reads almost a short. This is normal.

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

41 January 15, 2010 60PS11 Plasma


SMPS P813 Connector Pin ID and Voltages and Diode Test
Voltage and Diode Mode Measurements for the Control Board.
Note: There are no voltages in Stand-By mode.

P813 “Power Supply Board” to P200 CONNECTOR "Control Board”

Pin Label Run Diode Mode


P813
1 M5V 5V 0.093V
2 M5V 5V 0.093V 1
3 M5V 5V 0.093V
4 M5V 5V 0.093V
5 Gnd Gnd Gnd
6 Gnd Gnd Gnd
7 Gnd Gnd Gnd
8 Gnd Gnd Gnd

Diode Mode Readings taken with all connectors Disconnected, (Unless Specified). Black lead on Gnd. DVM in Diode Mode.

42 January 15, 2010 60PS11 Plasma


Y-SUS BOARD SECTION (Overview)
Y-SUS Board develops the V-Scan drive signal to the Y-Drive boards.

This Section of the Presentation will cover alignment and troubleshooting the Y-SUS Board
for the Single Scan Plasma. Upon completion of the Section the technician will have a better
understanding of the operation of the circuit and will be able to locate voltage and
Diode mode test points needed for troubleshooting and alignments.
• Adjustments
• DC Voltage and Waveform Checks
• Diode Mode Measurements

Operating Voltages

SMPS Supplied VA VA supplies the Panel Vertical Electrodes (Routed to the Left X-Board)
VS VS Supplies the Panel Horizontal Electrodes.
M5V M5V Supplies Bias to Y-SUS.

Y-SUS Developed -VY VR902 -VY Sets the Negative excursion of the Y-SUS Drive Waveform
VSC VR901 VSC Set the amplitude of the complex waveform.
V SET UP VR602 SET UP sets amplitude of the Top Ramp of the Drive Waveform
V SET DN VR601 SET DOWN sets the Pitch of the Bottom Ramp of the Drive Waveform
17V To the Control Board then routed to the Z-SUS board

Floating Ground FG 5V Used on the Y-Drive boards (Measured from Floating Gnd)
FG 15V Used in the Development of the V-Scan signal (Measured from Floating Gnd)

43 January 15, 2010 60PS11 Plasma


Y-SUS Block Diagram
Distributes Vs and M5V
Power Supply Board - SMPS
Z-SUS Board
Distributes M5V
Simplified Block Diagram of Distributes Vs, Va and M5V
Y-Sustain Board
Distributes
17V

Distributes VA Receive M5V, Va, Vs Distributes 17V


Control Board
from SMPS

Distributes
VA Generates Vsc and -Vy
Circuits generate
from M5V by DC/DC Converters
Y-Sustain Waveform
Also controls Set Up/Down

Generates Floating Ground


Left X Board
5V by DC/DC Converters
FETs amplify Y-Sustain
Waveform

Logic signals needed to scan the panel

Y-Drive Boards
Receive Scan Waveform
Display Panel

Logic signals needed to generate drive waveform

44 January 15, 2010 60PS11 Plasma


Y-SUS Board Layout
P30 VS, VA and M5V
All pins Floating Gnd 1 Input from the SMPS
FS302 (Vs)
6.3A 250V P302
Pins 1 ~4 Logic (Drive)
Signals to the Y-Drive P3
06
Upper board FS301 (VS)
P301 and P308 All Pins
are Floating Ground 10A/125V
Pins 5~6 and 9~12 Logic
(Drive) Signals to the c FS303
Y-Drive Upper board (M5V)
Floating Gnd 5V
10A/125V
Pins 7 and 8 P304
c
Pins 1
and 2

17V (pins 1~4)


to Control for Z-SUS
Pins 11 SET UP
and 12 P303 VR 602 Ribbon
c
Floating Gnd 5V V SET DN Logic Signals from
Pins 5 and 6 VR 601 the Control Board
P305 -VY TP FS901
Pins 1 ~4, 7~8 Logic
(Drive) Signals to the
c -VY ADJ (M5V)
Y-Drive Lower board VR902 5A/125V
P101
Pins 11 ~12 Logic
(Drive) Signals to the
08

Y-Drive Lower board VSC ADJ


P3

VSC TP VR901 Va to Left


P307
R306 X Board
All pins Floating Gnd Pins 5~7

45 January 15, 2010 60PS11 Plasma


Y-SUS Board
Component
Layout Drawing

46 January 15, 2010 60PS11 Plasma


VSC and -VY Adjustments CAUTION: Use the actual panel label and not the book for exact voltage settings.

These are DC level Voltage Adjustments

Set should run for 15 minutes, this is the “Heat Run” mode.
Set screen to “White Wash”.
1) Adjust –Vy to Panel Label voltage (+/- 1V)
2) Adjust VSC to Panel Label voltage (+/- 1V)
-Vy VSC
Bottom of board Just below Heat Sinks

Voltage Reads
P308
Positive
+
-Vy TP Marked VR902
- -Vy Adj

- VR901
VSC TP VSC Adj
R306

47 January 15, 2010 60PS11 Plasma


Y-Drive Signal Overview
Y-Drive Lower Test Point c Overall signal observed 4mS/div
(Center Left of Board)

P202

P215
d Highlighted signal from waveform
above observed 400uS/div

60~106 VRms 514V p/p

NOTE: The Waveform Test


Points are fragile. If by
accident the land is torn and e Highlighted signal from
the run lifted, make sure waveforms above observed
there are no lines left to right 100uS/div
in the screen picture.

There are several other test points on either the


Upper or Lower Y-Drive boards that can be used.
Basically any output pin on any of the FPC
to the panel are OK to use. 100uS

48 January 15, 2010 60PS11 Plasma


Locking on to the Y-Drive Waveform Tip

Note, this TP (VS_DA) can be used as an


External Trigger for scope when locking onto
the Y-Drive (Scan) or the Z-Drive signal.

49 January 15, 2010 60PS11 Plasma


Observing (Capturing) the Y-Drive Signal for Set Up Adjustment
Set must be in “WHITE WASH”
All other DC Voltage adjustments should have already been made.
Fig 1:
As an example of how to lock in to the Y-Drive Waveform. FIG1
Fig 1 shows the signal locked in at 4ms per/div. Outlined 4mS
Note the 2 blanking sections. Area Blanking
The signal for SET-UP is outlined within the Waveform
Area to
be adjusted
Fig 2: FIG2
At 2mSec per/division, the waveform to use for 2mS
SET-UP Is now becoming clear.
Now, the two blanking signal are still present. Blanking

Area to
be adjusted
Fig 3: FIG3
At 100us per/div. the signal for SET-UP is now easier to 100uS
recognize. It is outlined within the Waveform. Blanking
Remember, this is the first large signal to the right of blanking.

Area to
Fig 4: be adjusted
At 400uSec per/division, the adjustment for SET-UP FIG4
can be made. 40uS
It will make this adjustment easier if you use
the “Expanded” mode of your scope.

50 January 15, 2010 60PS11 Plasma


Observing (Capturing) the Y-Drive Signal for Set Up Adjustment
Set must be in “WHITE WASH”
All other DC Voltage adjustments should have already been made.
Fig 1:
As an example of how to lock in to the Y-Drive Waveform. FIG1
Fig 1 shows the signal locked in at 4ms per/div. Outlined 4mS
Note the 2 blanking sections. Area Blanking
The signal for SET-DN is outlined within the Waveform
Area to
be adjusted
Fig 2: FIG2
At 2mSec per/division, the waveform to use for 2mS
SET-DN is now becoming clear.
Blanking
Now the two blanking signals are still present.

Area to
Fig 3: be adjusted FIG3
At 100us per/div. the signal for SET-DN is now easier to 100uS
recognize. It is outlined within the Waveform. Blanking
Remember, this is the first large signal to the right of blanking.

Fig 4:
At 20uSec per/division, the adjustment for FIG4
SET-DN can be made. Area to 20uS
be adjusted
It will make this adjustment easier if you use the
“Expanded” mode of your scope.

51 January 15, 2010 60PS11 Plasma


Set Up and Set Down Adjustments
Set must be in “WHITE WASH”
All other DC Voltage adjustments should have already been made.

Observe the Picture while making these adjustments. Normally, they do not have to be done.

P202

P215
VR602
A
Y-Drive Test Point

Lower Y-Drive

VR601

SET-UP ADJUST:
B 1) Adjust VR602 and set the (A) portion of the signal to
match the waveform above. (20uSec ± 10uSec)

SET-DN ADJUST:
2) Adjust VR601 and set the (B) time of the signal to match
the waveform above. (160uSec ± 5uSec)

ADJUSTMENT LOCATIONS:
Just right of the bottom left heat sink.

52 January 15, 2010 60PS11 Plasma


Set Up Adjustment Too High or Low
Set Up swing is Minimum 280V Max 335V
Panel Waveform Adjustment

100uSec
The center begins to wash out and arc due to SET UP
(SET UP) Too High
Full Counter Clock Wise

100uSec
Very little alteration to the picture, the wave form indicates a
Ramp (SET UP) Too Low distorted SET UP. The peek widens due to the SET UP
Full Clock Wise peeking too quickly.

53 January 15, 2010 60PS11 Plasma


Set Down Adjustment Too High or Low
Set Dn swing is Minimum 73uS Max 166uS+
Panel Waveform Adjustment
100uSec
Normal
169uSec
NOTE: If abnormal settings cause
shutdown, remove the LVDS from
Control board and make necessary
adjustments.
110V off Then reconnect LVDS cable, select
the Floor White Wash and adjust correctly.

Floor
(SET DN) Too High 166uSec
All of the center washes out due to increased SET_DN time.
Full Clock Wise

100uSec

Normal
169uSec

(SET DN) Too Low The center begins to wash out and arc due to decreased SET DN time.
Counter Clock Wise

54 January 15, 2010 60PS11 Plasma


Y-SUS BOARD TROUBLESHOOTING TIP: Use P304 pins 1 or 2 or the Bottom Side of C326 to
test for Y Scan signal if the Y-Drive boards are removed
Y-SUS Board develops the V-Scan drive P/N EBR55492901
signal to the Y-Drive boards.

This Section of the Presentation will cover


troubleshooting the Y-SUS Board for the
Single Scan Plasma.

C326

55 January 15, 2010 60PS11 Plasma


Y-SUS Board P306 to P115 Connector Explained
To Upper Y-Drive P306 Pins 1~4

TIP: Use P304 pins 1 or 2 or the Right Side of C326 to test


for Y Scan signal if the Y-Drive boards are removed

P115 P306

(4mSec per/div)

The signal for all 4 pins looks very similar


due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.

5~12) FGnd Pin 4 (412V p/p) with Y-Drives


4) Data Odd Out
Pin 3 (400V p/p) with Y-Drives
3) Data Even Out
c 2) OC2 T Even Pin 2 (394V p/p) with Y-Drives
1) STB T
Pin 1 (416V p/p) with Y-Drives

Y-Drive Upper Y-SUS Board


P306 Pins 1~4 are Logic (Drive) Signals to the Y-Drive Upper.
Board P304 carries the Y-Drive signals to the upper via pins 1 and 2.

56 January 15, 2010 60PS11 Plasma


Y-SUS P306 Connector Diode Mode Testing

Checking the Y-SUS Board P306


P115 P306 NOTE: Disconnected from the Y-DRIVE boards

Readings from Floating Ground (Pins 5~12)

RED LEAD BLACK LEAD


Blk Lead FG Red Lead FG
Floating Gnd 5~12) FGnd 0V 0V
4) Data Odd Out 1.58V 0.679V
3) Data Even Out 1.58V 0.679V
2) OC2 T Even 1.58V 0.679V
1) STB T 1.58V 0.679V

Meter in the Diode Mode

Y-Drive Board should be


disconnected for this test.

57 January 15, 2010 60PS11 Plasma


Y-SUS Board P304 to P116 Connector Explained Pins 1 and 2 Y-Scan signal
To Upper Y-Drive
TIP: Use P304 pins 1 or 2 or the Bottom Side of C326 to
test for Y Scan signal if the Y-Drive boards are removed

VScan
140V
(from FG)
392V p/p (No Y-Drives)

P116 P304
396V p/p (With Y-Drives)
12) CLK T
11) OC2 T Odd
10) OC1 T B Odd FG5V measured from
c 9) OC1 T B Even Pins 7 or 8 to
8) +5VFG Floating Gnd
7) +5VFG Use any pin on P301
6) Data Out Odd
5) Data Out Even P304 Pins 5~6 and 9~12 are
4) FGnd
Logic (Drive) Signals to the
3) n/c
Y-Drive Upper Y-SUS Board 2) VScan Y-Drive upper.
Board 1) VScan Pins 1~2 carries the Y-Drive
signals to the upper Y-Drive.

58 January 15, 2010 60PS11 Plasma


Y-SUS P304 Diode Mode Testing

Y-Drive Upper Y-SUS Board


Checking the Y-SUS Board P304
P116 P304 NOTE: Disconnected from the Y-DRIVE boards

Readings from Floating Ground (Pin 4)

RED LEAD BLACK LEAD


Blk Lead FG Red Lead FG
12) CLK T 1.59V 0.68V
11) OC2 T Odd 1.59V 0.68V
10) OC1 T B Odd 1.60V 0.66V
9) OC1 T B Even 1.59V 0.68V
8) +5VFG 1.69V 0.534V
7) +5VFG 1.69V 0.534V
6) Data Out Odd Open Open
c 5) Data Out Even Open Open
Floating Gnd 4) FGnd 0V 0V
3) n/c Open Open
2) VScan Open Open
1) VScan Open Open

Y-Drive Board should be


disconnected for this test. Meter in the Diode Mode

59 January 15, 2010 60PS11 Plasma


Y-SUS Board P305 to P215 Connector Explained
To Lower Y-Drive P305 Pins 11~12

TIP: Use P303 pins 1 or 2 or the Bottom Side of C326 to


test for Y Scan signal if the Y-Drive boards are removed

P215 P305

(4mSec per/div)

The signal for both pins looks very similar


due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.

12) OC2 B Even Pin 12 (392V p/p) with Y-Drives


11) STB B
1~10) FGnd Pin 11 (402V p/p) with Y-Drives
c

Y-Drive Upper Y-SUS Board


Board
P305 Pins 11~12 are Logic (Drive) Signals to the Y-Drive Upper.
P303 Pins 11 and 12 carries the Y-Drive signals to the lower.

60 January 15, 2010 60PS11 Plasma


Y-SUS P305 Connector Diode Mode Testing
Y-Drive Lower Y-SUS Board

P215 P305 Checking the Y-SUS Board P305


NOTE: Disconnected from the Y-DRIVE boards

Readings from Floating Ground (Pins 1~10)

RED LEAD BLACK LEAD


Blk Lead FG Red Lead FG
12) OC2 B Even 1.6V 0.68V
11) STB B 1.6V 0.68V
Floating Gnd 1~10) FGnd 0V 0V

Meter in the Diode Mode

Y-Drive Board should be


disconnected for this test.

61 January 15, 2010 60PS11 Plasma


Y-SUS Board P303 to P214 Connector Explained Pins 1 and 2 Y-Scan signal
To Lower Y-Drive
TIP: Use P303 pins 1 or 2 or the Bottom Side of C326 to
test for Y Scan signal if the Y-Drive boards are removed

P214 P303

VScan
140V 392V p/p (No Y-Drives)
(from FG)
396V p/p (With Y-Drives)

All signals for pins 1~4 and 7~8 looks very similar
due to the fact they are read from Chassis Gnd,
12) VScan but they are actually Floating Ground related.
11) VScan They will read about 400V p/p.
10) n/c
9) FGnd FG5V measured from Pins 5 or 6 to
8) Data Out Even Floating Gnd
c 7) Data Out Odd
Use any pin on P308
6) +5VFG
5) +5VFG P303 Pins 1~4 and 7~8 are
4) OC1 T B Odd
Logic (Drive) Signals to the
3) OC1 T B Even
2) CLK B Y-Drive lower.
Y-Drive Lower Y-SUS Board 1) OC2 B Odd Pins 11~12 carries the Y-Drive
signals to the lower Y-Drive.

62 January 15, 2010 60PS11 Plasma


Y-SUS P303 Diode Mode Testing

Y-Drive Lower Y-SUS Board


Checking the Y-SUS Board P303
NOTE: Disconnected from the Y-DRIVE boards

Readings from Floating Ground (Pin 9)


P214 P303
RED LEAD BLACK LEAD
Blk Lead FG Red Lead FG
12) VScan Open Open
11) VScan Open Open
10) n/c Open Open
Floating Gnd 9) FGnd 0V 0V
8) Data Out Even Open Open
7) Data Out Odd Open Open
6) +5VFG 1.69V 0.53V
5) +5VFG 1.69V 0.53V
4) OC1 T B Odd 1.6V 0.68V
3) OC1 T B Even 1.59V 0.68V
c 2) CLK B 1.6V 0.68V
1) OC2 B Odd 1.6V 0.68V

Y-Drive Board should be Meter in the Diode Mode


disconnected for this test.

63 January 15, 2010 60PS11 Plasma


Y-SUS Floating Ground (FG 15V) and (FG 5V) Checks
Voltage Measurements for the Y-SUS Board
Location: Bottom Right
FG 5V Test Point (Floating Ground 5V)
Leaves the Y-SUS board on P304 pins 7 and 8. and P303 pins 5 and 6.
Checked at Q909 or Anode D814
Standby: 0V Run: 5V Diode Check: 1.69V

T901 T902
Floating Ground
checks must be
made from
Floating Ground.
Use any pin on FG 5V
P301 or P216. Test Point

FG 15V
Test Point

Floating
Gnd
Q909
Q908
Floating
Gnd
FG15V Test Point Floating Ground 15V
Checked at Q908 or Anode D913.
Standby: 0V Run: 15.2V Diode Check: 1.5V

64 January 15, 2010 60PS11 Plasma


Y-SUS 17V Generation Checks
Voltage Measurements for the Y-SUS Board
Location: Bottom Right
17V Test Point
Used in the Y-SUS for Waveform Creation and Leaves the
Y-SUS board on P101 pins 45~50 to the Control Board.
Checked at Cathode Side D909 and/or D910.
Standby: 0V Run: 17V Diode Check: 1.18V

17V
Test Point
Cathode Side
D909 and D910

T902

65 January 15, 2010 60PS11 Plasma


Y–SUS P302 to SMPS P812 Plug Information
Voltage and Diode Mode Measurement
P302
P302 CONNECTOR "Y-SUS" to "Power Supply" P812
c
Pin Label Run Diode Mode

1 Vs *196V Open

2 Vs *196V Open

3 n/c n/c n/c

4 Gnd Gnd Gnd

5 Gnd Gnd Gnd

6 Va *68V Open

7 Va *68V Open

8 Gnd Gnd Gnd

9 M5V 5V 1.29V

10 M5V 5V 1.29V

* Note: This voltage will vary in accordance with Panel Label

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

66 January 15, 2010 60PS11 Plasma


Y-SUS P307 to X Drive P121 Plug Information
P307

Voltage and Diode Mode Measurements for the Y-SUS Board

P307 CONNECTOR "Y-SUS" to "X-Drive” Left P121

Pin Label Run Diode Mode c


1 VA *68V Open
2 VA *68V Open
3 VA *68V Open
4 VA *68V Open
5 n/c n/c n/c
6 Gnd Gnd Gnd
7 Gnd Gnd Gnd

* Note: This voltage will vary in accordance with Panel Label

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

67 January 15, 2010 60PS11 Plasma


P101 Y-SUS to Control Board P1 Connector and M5V FS901 Information
Voltage Measurements Location: Right Lower
for the Y-SUS Board Location
P101

FS201
15V Pins 45 through 50

TIP: For Voltage readings,


Use the TP to the left of the connector
FS901
(M5V)
5A/125V

FS901 Diode Check


0.093V (In Circuit) Location: Just Below Bottom
1.29V (No Connectors) Right Heat Sink

FS901 Protects T902 for FG15V and FG5V Creation

68 January 15, 2010 60PS11 Plasma


Y-SUS P101 to Control P111 Plug Voltage Checks
“Y-SUS" P101 CONNECTOR to “Control" P1 There are No Stand By Voltages on this Connector

Pin Label Run Diode Pin Label Run Diode


1 15V 17.8V 1.18V 26 DELTA_VY_ON_OFF 0.7V Open

2 15V 17.8V 1.18V 27 GND Gnd Gnd

3 15V 17.8V 1.18V 28 DELTA_VY1 0.68V Open

4 15V 17.8V 1.18V 29 GND Gnd Gnd

5 15V 17.8V 1.18V 30 SET_UP2 0V Open

6 15V 17.8V 1.18V 31 GND Gnd Gnd

7 NC NC NC 32 SET_UP1 0.1V Open

8 OC2_ODD 2.84V Open 33 GND Gnd Gnd

9 GND Gnd Gnd 34 SET_DN2 4.9V Open

10 OC1_ODD 1.87V Open 35 GND Gnd Gnd

11 GND Gnd Gnd 36 SET_DN1 3.48V Open

12 CLK 0.3V Open 37 CTRL_OE 0V Open

13 GND Gnd Gnd 38 GND Gnd Gnd

14 DATA_ODD 0V Open 39 PASS_TOP 1.4V Open

15 GND Gnd Gnd 40 GND Gnd Gnd

16 DATA_EVEN 0V Open 41 DELTA_VY2 0.7V Open

17 GND Gnd Gnd 42 GND Gnd Gnd

18 GND Gnd Gnd 43 ER_UP 0.2V Open

19 STB 4.3V Open 44 GND Gnd Gnd


Diode Mode Readings
20 GND Gnd Gnd 45 ER_DN 0.1V Open
taken with all connectors
21 OC2_EVEN 2.8V Open Disconnected. 46 GND Gnd Gnd

22 GND Gnd Gnd DVM in Diode Mode. 47 SUS_UP 0.1~0.4V Open

23 GND Gnd Gnd 48 GND Gnd Gnd

24 OC1_EVEN 1.85V Open 49 SUS_DN 4V Open

25 GND Gnd Gnd 50 GND Gnd Gnd

69 January 15, 2010 60PS11 Plasma


Y-SUS How to Check the Output FETs (1 of 2)
Name is printed on the components. Readings “In Circuit”.

Shown: 0.6V Shown: 0.35V Shown: 0.94V


45F122
Q71~Q74
Reverse: 0.64V Reverse: Open Reverse: Open
Q81~Q88
Blk Red Blk Red Red Blk

Shown: 0.69V Shown: 0.5V Shown: 0.46V


51N25
Q41~Q47 Reverse: 0.69V Reverse: Open Reverse: Open

Blk Red Blk Red Red Blk

K3453 Shown: 0.58V Shown: 0.49V Shown: 1.99V


*Q48
Q49 Reverse: 1.77V Reverse: Open Reverse: Open

Blk Red Blk Red Red Blk

RF2001
D41~D42 Shown: Shorted Shown: 0.37V~0.38V Shown: 0.37~0.38V
D71~D74
D81~D82 Reverse: Shorted Reverse: Open Reverse: Open
D708 0.3 Ohms
Blk Red Blk Red Red Blk

70 January 15, 2010 60PS11 Plasma


Y-DRIVE BOARD SECTION (Y-Drive Explained)
TIP: See additional Service Tips beginning on page 131.

Y-Drive Boards work as a path supplying the


Sustain and Reset waveforms which are made
in the Y-Sustain board and sent to the Panel
P103
through Scan Driver IC’s.

P114 The Y-Drive Boards supply a waveform which


selects the horizontal electrodes sequentially
starting at the top and scanning down the
panel.
* 60PS11 uses 12 Driver ICs on 2 Y-Drive Boards

P215

P202
Y-Drive (V Scan) WAVEFORM

Warning: To facilitate scope attachment, solder


a small wire (Stand Off) at this point.
Y-Drive WAVEFORM TEST POINTS Be very careful, these are fragile and can peal off
with excessive heat or stress.

71 January 15, 2010 60PS11 Plasma


Upper Y-Drive Layout
FG5V Volts from the
TIP:
The connectors
Y-SUS board and Logic
to the Y-SUS Signals from the Control
board are very through the Y-SUS
easy to board are supplied to
misalign and the Upper Y-Drive
plugged in. Board on Connectors
The Connector
will be below
P115 and P116.
the actual pins
on the Y-SUS. The Y-Drive signal
Look carefully.
(VSC) from the Y-SUS
See Tip section
page 133-134. board is supplied to the
Upper Y-Drive Board on
Connector P116.

PANEL Y-SUS
SIDE SIDE

72 January 15, 2010 60PS11 Plasma


Y-Drive Board P115 to P306 Connector Explained
Upper Y-Drive P115 Pins 1~4

TIP: Use P304 pins 1 or 2 or the Right Side of C326 to test


for Y Scan signal if the Y-Drive boards are removed

P115 P306

(4mSec per/div)

The signal for all 4 pins looks very similar


due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.

5~12) FGnd Pin 4 (412V p/p) with Y-Drives


4) Data Odd Out
Pin 3 (400V p/p) with Y-Drives
3) Data Even Out
c 2) OC2 T Even Pin 2 (394V p/p) with Y-Drives
1) STB T
Pin 1 (416V p/p) with Y-Drives

Y-Drive Upper Y-SUS Board


P115 Pins 1~4 are Logic (Drive) Signals to the Y-Drive Upper.
Board P116 carries the Y-Drive signals to the upper via pins 1 and 2.

73 January 15, 2010 60PS11 Plasma


Y-Drive Upper P115 Connector Diode Mode Testing

Checking the Y-Drive Board P115


P115 P306 NOTE: Disconnected from the Y-SUS board

Readings from Floating Ground (Pins 5~12)

RED LEAD BLACK LEAD


Blk Lead FG Red Lead FG
Floating Gnd 5~12) FGnd 0V 0V
4) Data Odd Out Open 0.849V
3) Data Even Out Open 0.849V
2) OC2 T Even Open 0.87V
1) STB T Open 0.854V

Meter in the Diode Mode

Y-SUS Board should be


disconnected for this test.

74 January 15, 2010 60PS11 Plasma


Y-Drive Board P116 to P304 Connector Explained Pins 1 and 2 Y-Scan signal
Upper Y-Drive
TIP: Use P304 pins 1 or 2 or the Bottom Side of C326 to
test for Y Scan signal if the Y-Drive boards are removed

VScan
140V
(from FG)
396V p/p with Y-Drives

P116 P304 392V p/p without Y-Drives

12) CLK T
11) OC2 T Odd
10) OC1 T B Odd FG5V measured from
c 9) OC1 T B Even Pins 7 or 8 to
8) +5VFG Floating Gnd
7) +5VFG Use any pin on P114
6) Data Out Odd
5) Data Out Even P116 Pins 5~6 and 9~12 are
4) FGnd
Logic (Drive) Signals to the
3) n/c
Y-Drive Upper Y-SUS Board 2) VScan Y-Drive upper.
Board 1) VScan Pins 1~2 carries the Y-Drive
signals to the upper Y-Drive.

75 January 15, 2010 60PS11 Plasma


Y-Drive Upper P116 Diode Mode Testing

Y-Drive Upper Y-SUS Board


Checking the Y-Drive Upper Board P116
P116 P304 NOTE: Disconnected from the Y-SUS board

Readings from Floating Ground (Pin 4)

RED LEAD BLACK LEAD


Blk Lead FG Red Lead FG
12) CLK T Open 0.85V
11) OC2 T Odd Open 0.87V
10) OC1 T B Odd Open 0.87V
9) OC1 T B Even Open 0.87V
8) +5VFG Open 0.60V
7) +5VFG Open 0.60V
6) Data Out Odd 1.81V 0.39V
c 5) Data Out Even 1.86V 0.40V
Floating Gnd 4) FGnd 0V 0V
3) n/c Open Open
2) VScan Open 0.747V
1) VScan Open 0.747V

Y-SUS Board should be


disconnected for this test. Meter in the Diode Mode

76 January 15, 2010 60PS11 Plasma


Lower Y-Drive Layout
FG5V Volts from the
TIP:
The connectors
Y-SUS board and Logic
to the Y-SUS Signals from the Control
board are very through the Y-SUS
easy to board are supplied to
misalign and the Lower Y-Drive
plugged in. Board on Connectors
The Connector
will be below
P214 and P215.
the actual pins
on the Y-SUS. The Y-Drive signal
Look carefully.
(VSC) from the Y-SUS
See Tip section
page 133-134. board is supplied to the
Upper Y-Drive Board on
Connector P214.

PANEL Y-SUS
SIDE SIDE

77 January 15, 2010 60PS11 Plasma


Y-Drive Board P215 to P305 Connector Explained
To Lower Y-Drive P215 Pins 11~12

TIP: Use P303 pins 1 or 2 or the Bottom Side of C326 to


test for Y Scan signal if the Y-Drive boards are removed

P215 P305

(4mSec per/div)

The signal for both pins looks very similar


due to the fact they are read from Chassis Gnd,
but they are actually Floating Ground related.

12) OC2 B Even Pin 12 (392V p/p) with Y-Drives


11) STB B
1~10) FGnd Pin 11 (402V p/p) with Y-Drives
c

Y-Drive Upper Y-SUS Board


Board
P215 Pins 11~12 are Logic (Drive) Signals to the Y-Drive Upper.
P214 Pins 11 and 12 carries the Y-Drive signals to the lower.

78 January 15, 2010 60PS11 Plasma


Y-Drive Lower P215 Connector Diode Mode Testing
Y-Drive Lower Y-SUS Board

P215 P305 Checking the Y-Drive Lower Board P215


NOTE: Disconnected from the Y-DRIVE boards

Readings from Floating Ground (Pins 1~10)

RED LEAD BLACK LEAD


Blk Lead FG Red Lead FG
12) OC2 B Even Open 0. 875V
11) STB B Open 0.857V
Floating Gnd 1~10) FGnd 0V 0V

Meter in the Diode Mode

Y-SUS Board should be


disconnected for this test.

79 January 15, 2010 60PS11 Plasma


Y-Drive Board P214 to P303 Connector Explained Pins 1 and 2 Y-Scan signal
Lower Y-Drive
TIP: Use P303 pins 1 or 2 or the Bottom Side of C326 to
test for Y Scan signal if the Y-Drive boards are removed

P214 P303

VScan
140V
(from FG) 396V p/p with Y-Drives

392V p/p without Y-Drives


All signals for pins 1~4 and 7~8 looks very similar
due to the fact they are read from Chassis Gnd,
12) VScan but they are actually Floating Ground related.
11) VScan They will read about 400V p/p.
10) n/c
9) FGnd FG5V measured from Pins 5 or 6 to
8) Data Out Even Floating Gnd
c 7) Data Out Odd
Use any pin on P216
6) +5VFG
5) +5VFG P214 Pins 1~4 and 7~8 are
4) OC1 T B Odd
Logic (Drive) Signals to the
3) OC1 T B Even
2) CLK B Y-Drive lower.
Y-Drive Lower Y-SUS Board 1) OC2 B Odd Pins 11~12 carries the Y-Drive
signals to the lower Y-Drive.

80 January 15, 2010 60PS11 Plasma


Y-Drive Lower P214 Diode Mode Testing

Y-Drive Lower Y-SUS Board


Checking the Y-Drive Lower Board P214
NOTE: Disconnected from the Y-DRIVE boards

Readings from Floating Ground (Pin 9)


P214 P303
RED LEAD BLACK LEAD
Blk Lead FG Red Lead FG
12) VScan Open 0.749V
11) VScan Open 0.749V
10) n/c Open Open
Floating Gnd 9) FGnd 0V 0V
8) Data Out Even Open 0.859V
7) Data Out Odd Open 0.859V
6) +5VFG Open 0.60V
5) +5VFG Open 0.60V
4) OC1 T B Odd Open 0.874V
3) OC1 T B Even Open 0.874V
c 2) CLK B Open 0.857V
1) OC2 B Odd Open 0.874V

Y-SUS Board should be Meter in the Diode Mode


disconnected for this test.

81 January 15, 2010 60PS11 Plasma


Y-Drive P111 and P211 Not Used TIP: This is so you will be aware that these connections
are not used and not hunt for a lost connection.

P111 on the Upper Y-Drive and P211 on the Lower Y-Drive is not used, No connection.

Y-Drive Upper

Y-Drive Lower

82 January 15, 2010 60PS11 Plasma


Removing (Panel) Flexible Ribbon Cables from Y-Drive Upper or Lower
Flexible Ribbon Cables shown are from a different model, but process is the same.
To remove the Ribbon Cable from the connector first carefully lift the Locking Tab from
the back and tilt it forward ( lift from under the tab as shown in Fig 1).
The locking tab must be standing straight up as shown in Fig 2.
Lift up the entire Ribbon Cable gently to release the Tabs on each end. (See Fig 3)
Gently slide the Ribbon Cable free from the connector.
Be sure ribbon tab is released
By lifting the ribbon up slightly,
before removing ribbon.
Gently Pry
Up Here

Locking tab in
upright position

Fig 1 Fig 2 Fig 3

To reinstall the Ribbon Cable, carefully slide it back into the slot see ( Fig 3 ), be sure the Tab is seated
securely and press the Locking Tab back to the locked position see ( Fig 2 then Fig 1).

83 January 15, 2010 60PS11 Plasma


Incorrectly Seated Y-Drive Flexible Ribbon Cables

The Ribbon Cable is clearly improperly seated


into the connector. You can tell by observing the
line of the connector compared to the FPC, they
should be parallel.

The Locking Tab will offer a greater resistance to


closing in the case.

Note the cable is crooked. In this case the Tab on


the Ribbon cable was improperly seated at the
top. This can cause bars, lines, intermittent lines
abnormalities in the picture.

Remove the ribbon cable and re-seat it correctly.

84 January 15, 2010 60PS11 Plasma


Y-Drive Buffer Troubleshooting
YOU CAN CHECK FOR A SHORTED BUFFER ICs OUTPUT USING THIS PROCEDURE
BACK SIDE FRONT SIDE
Using the “Diode Test” on the DVM, check
BUFFER IC FLOATING GROUND (FGnd) the pins for shorts or abnormal loads.

RED LEAD On BLACK LEAD On “ANY”


Floating Ground Output Lug Reads 0.80V

Indicated by white outline

Reversing the leads reads Open

FRONT SIDE OF Y-DRIVE BOARD

135 Output Pins per/FPC (Flexible Printed Circuit) 67 on the


front and 68 on the back.
8 Ribbon cables (Horizontal Electrodes) totaling 1080 lines
1080 Total Horizontal Electrodes are actually used controlling
Any of these output lugs can be tested. Vertical resolution
Look for shorts indicating a defective Buffer IC

85 January 15, 2010 60PS11 Plasma


Z-SUS SECTION

This Section of the Presentation will cover troubleshooting the Z-SUS Board Assembly.
Upon completion of this section the Technician will have a better understanding of the circuit and be
able to locate voltage and diode mode test points needed for troubleshooting and all alignments.

Locations • DC Voltage and Waveform Test Points


• Z BIAS Alignment
• Diode Mode Test Points

Operating Voltages Power Supply Supplied VS


M5V
Control Board Supplied
But developed on the Y-SUS 17V

Developed on Z-SUS Z Bias


86 January 15, 2010 60PS11 Plasma
Z-SUS Block Diagram
M5V and VS

Y-SUS Board Power Supply Board


17V

Control Board
M5V and VS

Receives
Logic
17V Z-SUS board receives VS and
Signals
M5V SMPS and 17V from the
Control board

Circuits generate erase, Generates Z Bias 100V


sustain waveforms
Via 3 FPC
Flexible
NO IPMs Printed
Circuits PDP
FET Makes Drive waveform
Display

Simplified Block Diagram of Z-SUS (Sustain) Board Panel


Z-SUB

87 January 15, 2010 60PS11 Plasma


Z-SUS SECTION
P/N EBR55492601

FS102
VS
P104
6.3A/250V
FPC
P101
VS and M5V
Input from No IPMs
Z-SUS
the Y-SUS
Waveform
Z-SUS Test Point
Z-SUS
Output FL103
Waveform
FETs
P101 Development
FS100 FETs
M5V
10A/125V Z-Bias TP
Top of R457
Z-SUS
To Chassis Gnd
Logic Signals from Waveform
the Control board Development P105
Also +15V generated FETs FPC
on the Y-SUS and routed
through the Control Z-Bias
board. VR200

To Z-SUB
P100
FS101
17V P103
2.5A/125V

88 January 15, 2010 60PS11 Plasma


Z-SUS Waveform
The Z-SUS (in combination with the Y-SUS)
generates a SUSTAIN Signal and an ERASE Y-Drive
PULSE for generating SUSTAIN and
DISCHARGE in the Panel.
This waveform is supplied to the panel
through FPC (Flexible Printed Circuit) P102,
P104 and also P103 to the Z-SUB P106 which
connects to the panel via P105.

Z-Drive

Z Drive
Waveform Sustain Oscilloscope Connection Point.
Reset Reset FL103 to check Z Output waveform.
Right Hand side Center.

(Vzb) Z Bias VR201


Blanking
Vzb voltage
100V ± 1V TIP: The Z-Bias (VZB) Adjustment is a
DC level adjustment.
This is only to show the effects
of Z-Bias on the waveform.
50V/div 400uS/div 223V p/p
This Waveform is just for reference to observe the effects of Zbz adjustment

89 January 15, 2010 60PS11 Plasma


VZB (Z-Bias) VR201 Adjustment
Read the Voltage Label on the back of the upper left hand
side of the panel when adjusting VR201.

Z Bias

Bottom Center of Z-SUS Board


VZB (Z-Bias) TP
Top Side R457

VZB (Z Bias)
VR201

Set should run for 15 minutes, this is the “Heat Run” mode.
Set screen to “White Wash” mode or 100 IRE White input.
Measured from Chassis Ground
Adjust VZ (Z-Bias) to Panel Label (± 1V) Lower Right of Z-SUS Board

90 January 15, 2010 60PS11 Plasma


Connector P101 to SMPS P811 Voltages and Diode Checks
Voltage and Diode Mode Measurements
P101 Location: Top Left

P101 CONNECTOR “Z-SUS" to “SMPS" P811


Pin 1
Pin Label Run Diode Mode

1, 2 VS *196V Open
3 n/c n/c n/c

4,5 Gnd Gnd Gnd

6,7 VA *68V Open


8 Gnd Gnd Gnd

9, 10 M5V 5V Open

* Note: This voltage will vary in accordance with Panel Label

There are no Stand-By voltages on this connector

Note: In a Diode Mode test of the M5V


fuse (FS100) the reading are:
In Circuit: 0.093V.
No Connectors: Open

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

91 January 15, 2010 60PS11 Plasma


Connector P100 to Control P2 Voltages and Diode Checks
Voltage and Diode Mode Measurements
P100 Location:
P100 CONNECTOR “Z-SUS" to “Control" P2 Bottom Left hand side
Pin Label Run Diode Mode Pin 1
1 15V (17V) 17V 1.9V
2 15V (17V) 0.05V 1.9V
3 15V (17V) 1.8V 1.9V
4 15V (17V) 1.7V 1.9V
5 CTRL OE 0.06V Gnd
6 ER UP 0.19V Open
7 ER DN 0.22V Open
8 Gnd Gnd Gnd
9 Z Bias 3.16V Open
10 Gnd Gnd Gnd
11 Z SUS Up 0.4V Open
12 Z SUS Dn 0.6V Open FS101 17V Fuse
Diode Check
There are no Stand-By voltages on this connector 0.97V (In Circuit)
1.9V (No Connectors)
Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

92 January 15, 2010 60PS11 Plasma


Z-SUS How to Check the Output FETs
Name is printed on the components. Readings “In Circuit”.

45F122 Shown: A 1.08V


Shown: A Open Shown: 0.355V
B 0.65V
AQ10~Q13
BQ14~17
Reverse: 0.94V
Reverse: 0.59V Reverse: Open
AQ20~Q23

Blk Red Blk Red Blk Red

51N25 Shown: A 1.06V


Shown: Open Shown: A 0.515V
B 0.748V B Short
AQ30~Q31
BQ32 Reverse: A 1.53V
Reverse: A 1.03V B Open Reverse: A Open
B Open B Short
Blk Red Blk Red Blk Red

RF2001
Shown: Short Shown: Open Shown: A 0.367V
AD20~D23 B 0.356V
AD407~D409
Reverse: Short Reverse: 0.354V
AD414~D415
Reverse: Open
BD416~D417 0.1 Ohms
Blk Red Blk Red Blk Red

93 January 15, 2010 60PS11 Plasma


CONTROL BOARD SECTION

This Section of the Presentation will cover troubleshooting the Control Board Assembly. Upon
completion of this section the Technician will have a better understanding of the circuit and be
able to locate voltage and diode mode test points needed for troubleshooting.

• DC Voltage and Waveform Test Points


• Diode Mode Test Points

Signals Main Board Supplied Panel Control and LVDS (Video) Signals
Control Board Generated Y-SUS and Z-SUS Drive Signals (Sustain)
X Board Drive Signals (RGB Address)
Operating Voltages
SMPS Supplied +5V (M5V) Developed on the SMPS
Y-SUS Supplied +17V (Routed to the Z-SUS)

Developed on the Control Board +1.8V for internal use


+3.3V for internal use
+3.3V for the X-Boards (TCPs)

94 January 15, 2010 60PS11 Plasma


Control Board Component Identification

Part
Number
Label

95 January 15, 2010 60PS11 Plasma


Checking the Crystal X2“Clock” on the Control Board
Check the output of the Oscillator (Crystal) X2.
The frequency of the sine wave is 50 MHZ.
Missing this clock signal will halt operation of the panel
drive signals. Osc. Check: 50Mhz

X2

CONTROL
BOARD
CRYSTAL
LOCATION

96 January 15, 2010 60PS11 Plasma


Control Board Signal (Simplified Block Diagram)

The Control Board supplies Video Signals to the TCP (Tape Carrier Package) ICs.
If there is a bar defect on the screen, it could be a Control Board problem.

Control Board to X Board Basic Diagram of Control Board


Address Signal Flow
This Picture shows Signal Flow Distribution to help determine the IC201
failure depending on where the it shows on the screen.
CONTROL BOARD
MCM

DRAM DRAM

Resistor Array X-DRIVE BOARD


MCM
DRAM IC201 16 bit words
PANEL
EEPROM 2 Buffer
Outputs There are 23 total TCPs.
per TCP
5760 Vertical Electrodes
128 Lines per Buffer
1920 Total Pixels (H)
256 Lines output Total
To Center X-Board

97 January 15, 2010 60PS11 Plasma


Control Board Connector P1 to Y-SUS P101 Voltages and Diode Mode Checks
P111 These pins are very close together. When taking Voltage measurements use Caution.

Pin c
P1 Label Silk Screen

Pins 1 through 6
Receive 17V from the Y-SUS.
The +17V is not used by the
Control board, it is routed to the
Z-SUS leaving on P2 Pins 9~12.

All the rest are delivering


Y-SUS Waveform development and
Y-Drive logic signals to the Y-SUS
Board (Y-Drive logic signals are simply
routed right through the Y-SUS to the
Y-Drive boards).

Starting at pin 7 every pin not identified is ground.

98 January 15, 2010 60PS11 Plasma


Control P1 to Y-SUS P101 Plug Information Pin 1 on Control is Pin 50 on Y-SUS.
P1 Connector "Control Board” to “Y-SUS” P101 Note: There are no voltages in Stand-By mode
Pin Label Run Diode Mode Pin Label Run Diode Mode

1 15V 17.8V Open 26 DELTA_VY_ON_OFF 0.7V 1.44V

2 15V 17.8V Open 27 GND Gnd Gnd

3 15V 17.8V Open 28 DELTA_VY1 0.68V 1.44V

4 15V 17.8V Open 29 GND Gnd Gnd

5 15V 17.8V Open 30 SET_UP2 0V 1.44V

6 15V 17.8V Open 31 GND Gnd Gnd

7 NC NC NC 32 SET_UP1 0.1V 1.44V

8 OC2_ODD 2.84V 1.44V 33 GND Gnd Gnd

9 GND Gnd Gnd 34 SET_DN2 4.9V 1.44V

10 OC1_ODD 1.87V 1.44V 35 GND Gnd Gnd

11 GND Gnd Gnd 36 SET_DN1 3.48V 1.44V

12 CLK 0.3V 1.44V 37 CTRL_OE 0V 1.44V

13 GND Gnd Gnd 38 GND Gnd Gnd

14 DATA_ODD 0V 1.44V 39 PASS_TOP 1.4V 1.44V

15 GND Gnd Gnd 40 GND Gnd Gnd

16 DATA_EVEN 0V 1.44V 41 DELTA_VY2 0.7V 1.44V

17 GND Gnd Gnd 42 GND Gnd Gnd

18 GND Gnd Gnd 43 ER_UP 0.2V 1.44V

19 STB 4.3V 1.44V 44 GND Gnd Gnd

20 GND Gnd Gnd 45 ER_DN 0.1V 1.44V

21 OC2_EVEN 2.8V 1.44V 46 GND Gnd Gnd

22 GND Gnd Gnd 47 SUS_UP 0.1~0.4V 1.44V

23 GND Gnd Gnd 48 GND Gnd Gnd

24 OC1_EVEN 1.85V 1.44V 49 SUS_DN 4V 1.44V

25 GND Gnd Gnd 50 GND Gnd Gnd

99 January 15, 2010 60PS11 Plasma


Control Board LVDS Signals Pins are close together.

LVDS Cable P5 on Control board shown.


Press two outside tabs inward to release.

Video Signals from the Main Board to the Control Board are referred
to as Low Voltage Differential Signals or LVDS. The video is
delivered in 20 bib LVDS format. Their presence can be confirmed
with the Oscilloscope by monitoring the LVDS signals with SMPTE
Color Bar input. Loss of these Signals would confirm the failure is on
LVDS the Main Board or the LVDS Cable itself.

Example of LVDS Video Signal

Example of Normal Signals measured at 1V p/p at 10µSec

Pins 12~15, 19~20, 22~25, 28~31,35~36, 38~41.


Pins 16, 17 and 32, 33 are clock signals for the data.

100 January 15, 2010 60PS11 Plasma


Control Board LVDS P5 Connector Voltages and Diode Check
Pins 7~10, 47~51 are n/c
P5 Connector "Control Board” to “Main “P1003” Pins 1, 11, 18, 21, 34, 37, 44~46 are Gnd

PIN LABEL RUN DIODE PIN LABEL RUN DIODE

41 RA1- 1.46V 0.89V 22 RB2+ 1.26V 0.7V 51 P5


40 RA1+ 1.19V 0.94V 20 RC2- 1.27V 0.8V

39 RB1- 1.29V 0.84V 19 RC2+ 1.20V 0.9V


Gnd
38 RB1+ 0V 0.94V 17 RCLK2- 1.22V 0.9V

36 RC1- 1.27V 0.94V 16 RCLK2+ 1.26V 0.9V


40
35 RC1+ 1.20V 0.84V 15 RD2- 1.16V 0.9V 35
33 RCLK1- 0V 0.88V 14 RD2+ 1.29V 0.9V
30
32 RCLK1+ 1.23V 0.9V 13 RE2- 1.18V 0.9V
25
31 RD1- 1.26V 0.9V 12 RE2+ 1.3V 0.9V

30 RD1+ 1.18V 0.9V 6 Module SDA 3.28V Open


20
29 RE1- 1.26V 0.9V 5 2.8V Display Enable 2.8V 0.5V 15
28 RE1+ 1.24V 0.7V 4 Module SCL 3.28V Open
Gnd
25 RA2- 1.0V 0.9V 3 ROM TX 3.28V Open 5
24 RA2+ 1.45V 0.9V 2 ROM RX 0.5V Open

23 RB2- 1.2V 0.8V


2

Blue Pins indicate 24 bit


Note: There are no voltages in Stand-By mode. (12 bit differential) video signal

101 January 15, 2010 60PS11 Plasma


Control Board P2 Connector Pin ID and Voltages
Voltage and Diode Mode Measurements for the Control Board.
Note: There are no voltages in Stand-By mode. P2

P2 CONNECTOR " Control Board” to “Z-SUS Board” P100

Pin Label Run Diode Mode


1 SUS-DN 0.7V 1.49V
17.8V
2 SUS-UP 0.4V 1.49V
1
3 Gnd Gnd 1.49V
4 Z Bias 3V 1.48V
5 Gnd Gnd Gnd
6 ER-DN 0V 1.48V
7 ER-UP 0V 1.48V
P2 Label
8 CTRL-OE 0V 1.4V
9 15V 17.8V 1.32V
10 15V 17.8V 1.32V
11 15V 17.8V 1.32V
12 15V 17.8V 1.32V

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

102 January 15, 2010 60PS11 Plasma


Control Board (EMI Filter) Explained
1
The two EMI Filters just below P200 are surface mount mini
devices which shunt high frequencies to ground. These high
frequencies are generated on the SMPS.
Each EMI filter has 4 pins.
The top and bottom are the B+ route, the two side solder
points are Chassis Gnd. NOTE: The Black wire on
P200 is not pin 1.

P200
FL4 or FL5
(5V EMI filters)

5V

Gnd Gnd

FL4 (5V) FL5 (5V)

5V

103 January 15, 2010 60PS11 Plasma


Control Board P200 Connector Pin ID and Voltages
P200
Voltage and Diode Mode Measurements for the Control Board.
Note: There are no voltages in Stand-By mode.
1

P200 CONNECTOR "Control Board “ to “Power Supply” P813

Diode Mode
Pin Label Run
Disconnected
1 M5V 5V 0.9V
2 M5V 5V 0.9V
NOTE: The Black wire on
3 M5V 5V 0.9V P200 is not pin 1.

4 M5V 5V 0.9V
5 Gnd Gnd Gnd
6 Gnd Gnd Gnd
7 Gnd Gnd Gnd
8 Gnd Gnd Gnd Note: In a Diode Mode test of the M5V
In Circuit: 0.093V.
No Connectors: 0.9V

Diode Mode Readings taken with all connectors Disconnected, (Unless Specified). Black lead on Gnd. DVM in Diode Mode.

104 January 15, 2010 60PS11 Plasma


Control P1 to Y-SUS
Pin 1 on Control is
P101 Plug Information Pin 50 on Y-SUS

Voltage Measurements for


the Control Board.
Note: There are no voltages
in Stand-By mode.

105 January 15, 2010 60PS11 Plasma


P101 Connector "Control Board” to “Left X Board” P110
1~4 pins 3.3V TP
P101 Connector to the Left X-Board P110 1~4
Pin Run Diode Mode Pin Run Diode Mode
5
1~4 3.3V 0.67V 33 1.0V 0.97V Pin 1
6 1.0V 0.97V 34 1.27V 0.97V
7 1.27V 0.97V 36 1.0V 0.97V White hash
marks count
8 1.0V 0.97V 37 1.27V 0.97V
as 5
10
9 1.27V 0.97V 39 1.0V 0.97V
11 1.0V 0.97V 40 1.27V 0.97V
12 1.27V 0.97V 41 1.0V 0.97V 20
13 1.0V 0.97V 42 1.27V 0.97V
14 1.27V 0.97V 44 1.0V 0.97V
15 1.0V 0.97V 45 1.27V 0.97V 30
16 1.27V 0.97V 46 1.0V 0.97V
18 1.0V 0.97V 47 1.27V 0.97V
40
19 1.27V 0.97V 49 1.0V 0.97V
20 1.0V 0.97V 50 1.27V 0.97V
21 1.27V 0.97V 51 1.0V 0.97V 50 60
23 1.0V 0.97V 52 1.27V 0.97V
24 1.27V 0.97V 53 1.0V 0.97V
26 1.0V 0.97V 54 1.27V 0.97V 59
27 1.27V 0.97V 56 1.87V 1.2V
28 1.0V 0.97V 57 1.87V 1.2V 58
29 1.27V 0.97V 58 3.22V 1.2V
57 56
31 1.0V 0.97V 59 0.49V 1.1V
32 1.27V 0.97V 60 0.49V 1.1V Pins with no TP are Gnd.

106 January 15, 2010 60PS11 Plasma


P102 Connector "Control Board” to “Center X Board” P210

White hash marks 5


count as 5

Pin 1

1~4 10 20 30 40 56 60
3.3V TP
50
1ST 4 pins

P102 Connector to the Center X-Board P110


Diode Diode Diode Diode
Pin Run Pin Run Pin Run Pin Run
Mode Mode Mode Mode
1~4 3.3V 0.67V 21 1.27V 0.97V 37 1.27V 0.97V 53 1.0V 0.97V
6 1.0V 0.97V 22 1.0V 0.97V 39 1.0V 0.97V 54 1.27V 0.97V
7 1.27V 0.97V 24 1.0V 0.97V 40 1.27V 0.97V 56 1.0V 1.2V
9 1.0V 0.97V 25 1.27V 0.97V 42 1.0V 0.97V 57 1.27V 1.2V
10 1.27V 0.97V 27 1.0V 0.97V 43 1.27V 0.97V 58 1.0V 1.2V
12 1.0V 0.97V 28 1.27V 0.97V 45 1.0V 0.97V 59 1.27V 1.1V
13 1.27V 0.97V 30 1.0V 0.97V 46 1.27V 0.97V 60 1.0V 1.1V
15 1.0V 0.97V 31 1.27V 0.97V 48 1.0V 0.97V Note:
16 1.27V 0.97V 33 1.0V 0.97V 49 1.27V 0.97V There are no voltages in
Stand-By mode.
18 1.0V 0.97V 34 1.27V 0.97V 51 1.0V 0.97V
19 1.27V 0.97V 36 1.0V 0.97V 52 1.27V 0.97V Pins with no TP are Gnd.

107 January 15, 2010 60PS11 Plasma


P104 Connector "Control Board” to “Right X Board” P310 White hash
marks count
P104 Connector to the Right X-Board P310 60 as 5
Pin Run Diode Mode Pin Run Diode Mode
1~4 3.3V 0.67V 33 1.0V 0.98V
6 1.0V 0.98V 34 1.27V 0.98V
50
7 1.27V 0.98V 36 1.0V 0.98V
8 1.0V 0.98V 37 1.27V 0.98V
9 1.27V 0.98V 39 1.0V 0.98V
40
11 1.0V 0.98V 40 1.27V 0.98V
12 1.27V 0.98V 41 1.0V 0.98V 56
13 1.0V 0.98V 42 1.27V 0.98V
14 1.27V 0.98V 44 1.0V 0.98V
15 1.0V 0.98V 45 1.27V 0.98V 30
16 1.27V 0.98V 46 1.0V 0.98V
18 1.0V 0.98V 47 1.27V 0.98V
20
19 1.27V 0.98V 49 1.0V 0.98V
20 1.0V 0.98V 50 1.27V 0.98V
21 1.27V 0.98V 51 1.0V 0.98V 10 Pin 1
23 1.0V 0.98V 52 1.27V 0.98V
24 1.27V 0.98V 53 1.0V 0.98V
26 1.0V 0.98V 54 1.27V 0.98V 5
27 1.27V 0.98V 56 1.87V 0.49V
1~4
28 1.0V 0.98V 57 1.87V 0.49V
3.3V TP
29 1.27V 0.98V 58 3.22V 3.22V
31 1.0V 0.98V 59 0.49V 1.87V Note:
There are no voltages in Stand-By mode.
32 1.27V 0.98V 60 0.49V 1.87V
Pins with no TP are Gnd.

108 January 15, 2010 60PS11 Plasma


X BOARD (LEFT, RIGHT and CENTER) SECTION
The following section gives detailed information about the X boards.
These boards deliver the Color information signal developed on the
Control board to the TCPs, (Taped Carrier Packages). The TCPs are
attached to the vertical FPCs, (Flexible Printed Circuits) which are
attached directly to the panel. The X boards are the attachment
points for these FPCs.
These boards have no adjustment.

These boards receive their main B+ from the:

• Originally developed on the Switched Mode Power Supply


Va (Voltage for Address) is routed through the Y-SUS board
and then to the Left X board via P121 pins 1~4. Va also
leaves P120 and is sent to the Center X via P220. Then it
leaves on P221 and goes to the Right X P320.
• Control board develops 3.3V and routes to each X board via
ribbon connectors P110, P210 and P310.

109 January 15, 2010 60PS11 Plasma


X Board Additional Information

There are three X boards, the Left, Center and the Right
(As viewed from the rear of the set).
The three X boards have very little circuitry. They are basically signal
and voltage routing boards.
• They route the Va to all of the Taped Carrier Packages (TCPs).
Va is introduced to the Left X board first, then the Left X sends
Va to the Center X and then the Center X sends Va to the Right X.
• They route the Logic (Color) signals from the Control board
to all of the Taped Carrier Packages (TCPs). Including VPP which is
generated on each of the 3 X boards.
The X boards have connectors to 23 TCPs, 8 on the left and right and
7 on the center. The Center X board has connections to 7 TCPs.
There are a total of 23 TCPs and each TCP has 2 buffers. So there
are a total of 46 buffers feeding the panel’s 5760 vertical electrodes.

110 January 15, 2010 60PS11 Plasma


X Board TCP Heat Sink Warning
NEVER run the television with this heat sink removed.
Damage to the TCPs will occur and cause a defective panel.

The Vertical
Address buffers
(TCPs) have one
heat sink
indicated by the
arrow.
It protects all 23
TCPs as.

111 January 15, 2010 60PS11 Plasma


X Board Layout Primary Circuit Diode Check
The three X-Boards have two similar circuit layouts for the connections going to the TCPs., as shown below.

VPP VPP
Gnd
Gnd
Gnd
VPP

3.3V 3.3V

P
VA VA

VP
P
VP

On any Gnd - On any Gnd


+

VA source
- On the below: disconnected from On the below:

+
Left X board
On any Va (0.54V) TCPs connected. On any Va (Open) TCPs connected.
On any Va (0.85V) TCPs disconnected. On any Va (Open) TCPs disconnected.
On 3.3V (0.483V) TCPs connected. On 3.3V (1.3V) TCPs connected.
On 3.3V (0. 562V) TCPs disconnected. On 3.3V (Open) TCPs disconnected.
On any VPP (0.425V) TCPs connected. On any VPP (Open) TCPs connected.
On any VPP (0.426V) TCPs disconnected. On any VPP (Open) TCPs disconnected.

112 January 15, 2010 60PS11 Plasma


TCP (Tape Carrier Package)
This shows the layout of the bottom ribbon cables connecting to the Panel’s Vertical electrodes,
(Address Bus). Note that each ribbon cable has a solid state device called a TCP attached.

X Drive Board
Va
Y-SUS Board
Front panel Horizontal Address
Rear panel Vertical Address

Logic
X_B/D

Control Board
Frame

Chocolate
ctor
Conne
TCP
Taped Carrier 128 lines 256 total lines 128 lines
Package
256 Vertical Con
nect
Electrodes or

Flex
ibl
Cabl e
e
TCP
Attached directly Heat Sink
to Flexible cable Back side of TCP Ribbon

113 January 15, 2010 60PS11 Plasma


TCP Testing Must be checked on flexible cable.

On any Gnd
+

Va Gnd Gnd
- On the below:
3.3V VPP
Look for any TCPs
VPP Gnd being discolored.
On any Va (0.58V) Va Ribbon Damage.
On 3.3V (0.72V)
Cracks, folds
On any VuP (0.729V) n/c n/c
Pinches, scratches,
On any VDn (1.54V)
etc…
1 5 10 15 20 25 30 35 40 45 50
Reverse leads reads Open

114 January 15, 2010 60PS11 Plasma


TCP 3.3V B+ Check Warning: DO NOT attempt to run the set with the
Heat Sink over the TCPs removed.
For Connectors P101, P102
and P104 on the Control Checking IC304 for 3.3V, use center pin.
board, see Control board
section. IC304
0V 3.3V for TCPs
3.3V IC304 on
Red Lead On 3.3V (0.42V)
Black Lead On 3.3V (0.62V) 5V Control Board
This also test IC100, IC200 and IC300

3.3V in on Pins 57 ~ 60 on any connector

Left X Board P110 Center X Board P210 Right X Board P310

All Connectors to All TCPs look very


similar for the 3.3V test point. The
upside down L trace at pins 34 and 35 of
each connector. There will be a small
Surface Mount Cap. for the 3.3V line.
Example here from P303. You can only
check for continuity, you can not run
the set with heat sink removed.

115 January 15, 2010 60PS11 Plasma


TCP Visual Observation. Damaged TCP

Warning: DO NOT attempt to run the set with the Heat Sink over the TCPs removed.
After a very short time, these ICs will begin to self destruct due to overheating.

This damaged TCP can,


a) Cause the Power Supply to shutdown. (VA shorted, 3.3V shorted).
b) Generate abnormal vertical bars, (colored noise).
c) Cause the entire area driven by the TCP to be “All White”
d) Cause the entire area driven by the TCP to be “All Black”
e) Cause a “Single Pixel Width Line” defect. Red, Green or Blue.

“TCP”
Tapped
Carrier
Package

Look for burns, pin


holes, damage, etc.

116 January 15, 2010 60PS11 Plasma


Left X Drive P121 Connector to Y-SUS P307 Information
Voltage and Diode Mode Measurement (No Stand-By Voltages)

P121 CONNECTOR " X-Drive Left Board" to "Y-SUS” P307


Pin Label Run Diode Mode
1 VA *68V Open
2 VA *68V Open
3 VA *68V Open
4 VA *68V Open
5 NC NC NC
6 Gnd Gnd Gnd
7 Gnd Gnd Gnd

* Note: This voltage will vary in accordance with Panel Label.


There are no Stand-By voltages on this connector.

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

117 January 15, 2010 60PS11 Plasma


P110 Connector “Left X Board” to “Control” P101
Leave Connector P310 Connected to the Control Board P104 White hash marks
count as 5
Pin Run Diode Mode Pin Run Diode Mode
1 0.49V 1.1V 29 1.27V 0.97V
57~60 1
2 0.49V 1.1V 30 1.0V 0.97V
3 3.22V 1.2V 32 1.27V 0.97V
4 1.87V 1.2 33 1.0V 0.97V
5 1.87V 1.2V 34 1.27V 0.97V
7 1.27V 0.97V 35 1.0V 0.97V
57~60 pins
3.3V TP
8 1.0V 0.97V 37 1.27V 0.97V
9 1.27V 0.97V 38 1.0V 0.97V
10 1.0V 0.97V 40 1.27V 0.97V
Pins with no TP are Gnd.
11 1.27V 0.97V 41 1.0V 0.97V
56 Gnd
12 1.0V 0.97V 42 1.27V 0.97V
51 Gnd
14 1.27V 0.97V 43 1.0V 0.97V
44 Gnd
15 1.0V 0.97V 45 1.27V 0.97V
39 Gnd
16 1.27V 0.97V 46 1.0V 0.97V
17 1.0V 0.97V 47 1.27V 0.97V
36 Gnd

19 1.27V 0.97V 48 1.0V 0.97V 31 Gnd

20 1.0V 0.97V 49 1.27V 0.97V 26 Gnd


21 1.27V 0.97V 50 1.0V 0.97V 23 Gnd
22 1.0V 0.97V 52 1.27V 0.97V 18 Gnd
24 1.27V 0.97V 53 1.0V 0.97V 13 Gnd
25 1.0V 0.97V 54 1.27V 0.97V 6 Gnd
27 1.27V 0.97V 55 1.0V 0.97V
28 1.0V 0.97V 57~60 3.3V 0.67V

118 January 15, 2010 60PS11 Plasma


P210 Connector "Center X Board“ to ”Control Board” P102
Leave Connector P210 Connected to the Control Board P102
White hash marks
count as 5
Pin Run Diode Mode Pin Run Diode Mode
1 0.49V 1.1V 29 1.27V 0.97V
2 0.49V 1.1V 30 1.0V 0.97V 1
3 3.22V 1.2V 32 1.27V 0.97V
4 1.87V 1.2 33 1.0V 0.97V
5 1.87V 1.2V 34 1.27V 0.97V
7 1.27V 0.97V 35 1.0V 0.97V
57~60 pins
8 1.0V 0.97V 37 1.27V 0.97V 3.3V TP 57~60
9 1.27V 0.97V 38 1.0V 0.97V
10 1.0V 0.97V 40 1.27V 0.97V
Pins with no TP are Gnd.
11 1.27V 0.97V 41 1.0V 0.97V
12 1.0V 0.97V
56 Gnd
42 1.27V 0.97V
14 1.27V 0.97V 43 1.0V 0.97V 51 Gnd

15 1.0V 0.97V 45 1.27V 0.97V 44 Gnd

16 1.27V 0.97V 46 1.0V 0.97V 39 Gnd


17 1.0V 0.97V 47 1.27V 0.97V 36 Gnd
19 1.27V 0.97V 48 1.0V 0.97V 31 Gnd
20 1.0V 0.97V 49 1.27V 0.97V 26 Gnd
21 1.27V 0.97V 50 1.0V 0.97V 23 Gnd
22 1.0V 0.97V 52 1.27V 0.97V 18 Gnd
24 1.27V 0.97V 53 1.0V 0.97V
13 Gnd
25 1.0V 0.97V 54 1.27V 0.97V
6 Gnd
27 1.27V 0.97V 55 1.0V 0.97V
28 1.0V 0.97V 57~60 3.3V 0.67V

119 January 15, 2010 60PS11 Plasma


P310 Connector “Right X Board” to “Control” P104
Leave Connector P310 Connected to the Control Board P104 White hash marks
count as 5
Pin Run Diode Mode Pin Run Diode Mode
57~60 1
1 0.49V 1.1V 29 1.27V 0.97V
2 0.49V 1.1V 30 1.0V 0.97V
3 3.22V 1.2V 32 1.27V 0.97V
4 1.87V 1.2 33 1.0V 0.97V
5 1.87V 1.2V 34 1.27V 0.97V
57~60 pins
7 1.27V 0.97V 35 1.0V 0.97V
3.3V TP
8 1.0V 0.97V 37 1.27V 0.97V
9 1.27V 0.97V 38 1.0V 0.97V Pins with no TP are Gnd.
10 1.0V 0.97V 40 1.27V 0.97V
56 Gnd
11 1.27V 0.97V 41 1.0V 0.97V
51 Gnd
12 1.0V 0.97V 42 1.27V 0.97V
44 Gnd
14 1.27V 0.97V 43 1.0V 0.97V
39 Gnd
15 1.0V 0.97V 45 1.27V 0.97V
36 Gnd
16 1.27V 0.97V 46 1.0V 0.97V
17 1.0V 0.97V 47 1.27V 0.97V
31 Gnd

19 1.27V 0.97V 48 1.0V 0.97V 26 Gnd

20 1.0V 0.97V 49 1.27V 0.97V 23 Gnd


21 1.27V 0.97V 50 1.0V 0.97V 18 Gnd
22 1.0V 0.97V 52 1.27V 0.97V 13 Gnd
24 1.27V 0.97V 53 1.0V 0.97V 6 Gnd
25 1.0V 0.97V 54 1.27V 0.97V
27 1.27V 0.97V 55 1.0V 0.97V
28 1.0V 0.97V 57~60 3.3V 0.67V

120 January 15, 2010 60PS11 Plasma


P120, P220, P221 and P320 X Board Connector Information (Va distribution)
White hash marks count as 5

P120 Left X P220 Center X P221 Center X P320 Right X


16~30 16~30
Gnd Gnd
1~15 1~15
Gnd Gnd

13~15
nc

1~12 19~30 1~12 19~30


Va Va Va Va
13,14,17,19, 7,9,12,14,1 13,14,17,19, 7,9,12,14,1
22,24 nc 7,18 nc 22,24 nc 7,18 nc

On any Gnd - On any Gnd


+

- On any Va (0.54V) TCPs connected. On any Va (Open)

+
On any Va (0.84V) TCPs disconnected. TCPs connected
or disconnected

Note: Va voltage will vary by panel, check your specific panel’s voltage label.

121 January 15, 2010 60PS11 Plasma


MAIN Board SECTION
The following section gives detailed information about the Main board. This board
contains the Microprocessor, Audio section, video section and all input, outputs. It
also receives all input signals and processes them to be delivered to the Control
board via the LVDS cable. The main tuner (VSB, 8VSB and QAM) is located on the
main board. This board is also where the television’s software upgrades are
accomplished through the USB input.

This board has no adjustment.

The Main Board Receives its operational voltage from the SMPS:
DURING STAND-BY: From SMPS
• STBY 5V Distributes STBY 5V to the Front IR Board and drives front Power LEDs

DURING RUN: (STBY 5V remains): From SMPS


• +5V from the Switched Mode Power Supply
• 12V for Tuner (Stepped down to 5V)
• 17V for Audio
• Distributes Key 1 and Key 2 to the Front IR Board then to the Front key board.
• Receives Intelligent Sensor data from the Front IR Board.
• Drives front Power LEDs

122 January 15, 2010 60PS11 Plasma


Main Board Layout and Identification
P1001 P1006 to IC302 IC203 P1003 USB
to Ft IR SMPS +1.2V_VDDC DDR LVDS In
regulator

X501
X1 Micro IC504 Crystal
IC503
Crystal
9V Reg
IC204
Memory IC
PC
Audio IC1 Mstar Micro
IC1001 and Video HDMI
Processor IC504
Audio Tuner
P1005 Amp Controller
Audio
Optical TU501
Audio Tuner
IC805
HDMI
EDID

Rear RF
HDMI RS232 PC Remote S-In
Inputs In

123 January 15, 2010 60PS11 Plasma


Main Board Drawing (Front Side) Component Layout

124 January 15, 2010 60PS11 Plasma


Main Board Back Side (Regulator Checks)
IC304 IC301 IC303
1.8V_MST 3.3V-VST 5V-MST
Regulator Regulator Switch

IC201 IC305
D951 NVRAM Q303
3.3V_MST
Regulator

D801
IC202
D1001
HDCP Q302 IC802/3
Q951 EEPROM HDMI EDID
Q1001 &
Q501 SimpLink
Q502
L502
Q504 IC601
Q891 RS232 D802
Q503 RX/TX IC803

IC505 IC502 +1.2V D628


Tuner PVSB
5V Reg regulator Q601 Q892

IC602 D627 IC802


RS232 D890
Tuner EEPROM
Pin 1 D633

125 January 15, 2010 60PS11 Plasma


Main Board Drawing (From the 11X17 Foldout) Component Locations

126 January 15, 2010 60PS11 Plasma


Main Board Tuner Check (Shield Off) Pins Exposed TDVW-H103F

TU501
Data Pin 9 Clock Pin 8
Only present during
Channel Change

Video Pin 19 Video Test Point

SIF Pin 16 Audio Test Point

DIG IF (-) Pin 13


DIG IF (+) Pin 12
Digital Channel Test Point

Data Pin 9
Clock Pin 8

Pin 4 Tuner B+ (5V)

Main Board

Pin 1

127 January 15, 2010 60PS11 Plasma


Main Board Tuner Video and Note: NTSC Only
SIF Output Check “Video Out” Signal only when
receiving an analog Channel.
USING COLOR BAR SIGNAL INPUT
2.24Vp/p
Pin 19 “Analog
Video” Signal
MAIN Board
Tuner Location

Pin 16 “SIF” 500mV / 10uSec


Signal

450mVp/p

700mVp/p

200mV / 2uSec
Note: Pin 12 and Pin 13
“Dig IF” Signal
8VSB or QAM
Only when receiving a
Digital Channel. 100mV / 1uSec

128 January 15, 2010 60PS11 Plasma


Main Board Crystal X1 and X501 Check X1 (1.5V DC) / (2.4V p/p)
12Mhz

X1 Runs all the time

X501 Runs only when set is on X501 (1.5V DC) / (110mV p/p)
25Mhz
X501
X1

MAIN Board
Crystal Location

129 January 15, 2010 60PS11 Plasma


Main Board P1003 (Removing the LVDS Cable

(1) Using your fingernail, lift up the locking mechanism.


Since the locking tab is very thin and fragile, its best to lift
slightly one end, then work across the locking tab
a little at a time, back and forth until the tab is released.

(2) Pull the Cable from the Connector

130 January 15, 2010 60PS11 Plasma


Main Board P1003 LVDS Video Signal Test Points LVDS Waveform TPs
P1003 LVDS Connector 39
36 40
38
35
37c
Pin
33
30
32
29
P1003 28
Location
24
27
s
P Lo cation
T 22 23

21

MAIN Board 17
14 19 20
16
12 13
Note: These numbers actually indicate the actual 11
pin number on the connector P1003

131 January 15, 2010 60PS11 Plasma


Main Board P1003 LVDS Video Signal Check SMTP Color Bar Signal Input
Pins 11, 12, 16 and 17 Waveform TP see 1 page back

Pin 12 (R1024) Pin 11 (R1023)

Pin 17 (R1020) Pin 16 (R1019)

132 January 15, 2010 60PS11 Plasma


Main Board P1003 LVDS Video Signal Check
Pins 21, 22, 27 and 28 Waveform TP see 2 pages back. SMTP Color Bar Signal Input

Pin 22 (R1016) Pin 21 (R1015)

Pin 28 (R1012) Pin 27 (R1011)

133 January 15, 2010 60PS11 Plasma


Main Board Plug P1003 “LVDS” Voltages
Voltage and Diode Test for the Main Board

Pin c
P1003 “Main Board” Connector to P5 "Control Board”
PIN LABEL RUN DIODE PIN LABEL RUN DIODE
NOTE: This is a 51 pin
11 RA1- 1.46V 0.89V 30 RB2+ 1.26V 0.7V connector.
12 RA1+ 1.19V 0.94V 32 RC2- 1.27V 0.8V
Pins 6-8, 15, 18, 31, 34, 41 and
51 are Ground (Gnd).
13 RB1- 1.29V 0.84V 33 RC2+ 1.20V 0.9V Pins 1-5, 9-10, 25-26, 42-45 are
14 RB1+ 0V 0.94V 35 RCLK2- 1.22V 0.9V No Connection (n/c).

16 RC1- 1.27V 0.94V 36 RCLK2+ 1.26V 0.9V

17 RC1+ 1.20V 0.84V 37 RD2- 1.16V 0.9V

19 RCLK1- 0V 0.88V 38 RD2+ 1.29V 0.9V Blue Pins indicate 20


bit differential video
20 RCLK1+ 1.23V 0.9V 39 RE2- 1.18V 0.9V
signal
21 RD1- 1.26V 0.9V 40 RE2+ 1.3V 0.9V

22 RD1+ 1.18V 0.9V 46 Module SDA 3.28V Open

23 RE1- 1.26V 0.9V 47 2.8V Display Enable 2.8V 0.5V


Note: There are no
24 RE1+ 1.24V 0.7V 48 Module SCL 3.28V Open voltages in Stand-By
mode.
27 RA2- 1.0V 0.9V 49 ROM TX 3.28V Open

28 RA2+ 1.45V 0.9V 50 ROM RX 0.5V Open

29 RB2- 1.2V 0.8V

Diode Mode Check with the Board Disconnected.

134 January 15, 2010 60PS11 Plasma


Main Board Plug P1001 to Ft Keys
Pin c
Voltage and Diode Mode Measurements for the Main Board
P1001 CONNECTOR "MAIN Board" to "Front Keys"
For Voltages when Pin Label STBY Run Diode Check
each Key is
pressed, see the 1 IR 4.86V 3.93V 2V
Key Board section. 2 Gnd Gnd Gnd Gnd
3 Key1 3.27V 3.27V 1.9V
4 Key2 3.27V 3.27V 1.9V
5 P Key Gnd Gnd Gnd
7&8 6 Gnd Gnd Gnd Gnd
Intelligent
Sensor 7 EYEQ-SCL 0V 3.28V 2V
8 EYEQ-SDA 0V 3.28V 2V
9 Gnd Gnd Gnd Gnd
10 STBY 5V 5V 4.9V 1.25V
11 3.3VST 0.34V 5.1V 0.6V
Stand 12 Gnd Gnd Gnd Gnd
By 5V
13 LED R 2.94V 0V 1.87V
14 LED W 0V 2.91V 1.7V
15 PWM Gnd Gnd 0.94V

Diode Mode Readings taken with all connectors Disconnected. DVM in Diode Mode.

135 January 15, 2010 60PS11 Plasma


Main Board Plug P1006 to Power Supply Voltages and Diode Check Pin c front
Diode Mode Check with the Board Disconnected. DVM in the Diode mode.
P1006
* Pins 9, 10, 12: (+5V) Turned on by Relay On Command.
P1006 CONNECTOR "Main" to "SMPS Board" P814
Pin Label STBY Run Diode Mode Pin Label STBY Run Diode Mode
1 17V 0V 17V Open 2 17V 0V 17V Open
3 Gnd Gnd Gnd Gnd 4 Gnd Gnd Gnd Gnd
5 12V 0V 12V Open 6 12V 0V 12V Open
7 Gnd Gnd Gnd Gnd 8 Gnd Gnd Gnd Gnd
9 +5V 0V 5.14V 1.0 V 10 +5V 0V 5.14V 1.0 V
11 Stby 5V 4.94V 5.15V 1.0 V 12 +5V 0V 5.14V 1.0 V
13 Gnd Gnd Gnd Gnd 14 Gnd Gnd Gnd Gnd
15 Gnd Gnd Gnd Gnd 16 n/c n/c n/c Gnd
17* 5V Det 0V 4.7V Open 18* AC Det 4.9V 4.9V Open
19 RL On 0V 3.2V Open 20 VS On 0V 3.2V Open
21 M5 ON 0V 3.2V Open 22 Auto Gnd Gnd Gnd Gnd
23 Stby 5V 4.94V 5V 1.3V 24* Key On Gnd Gnd Open

* Pin 17: 5V Det not used. * Pin 18: AC DET if missing will cause the set to turn
off after 10 seconds.

136 January 15, 2010 60PS11 Plasma


Main Board Speaker Plug P1005

Voltage and Diode Mode Measurements for the Main Board Speaker Plug

P1005 CONNECTOR "Main" to "Speakers"

Pin Label SBY Run Diode Mode


1 R- 0V 8.5V Open
2 R+ 0V 8.5V Open
3 L- 0V 8.5V Open
4 L+ 0V 8.5V Open

Right (-)
Board
P1005
Right (+) Location
Speaker
Connector Left (-)
Left (+)

MAIN Board
Diode Mode Check with the Board Disconnected. DVM in the Diode mode.

137 January 15, 2010 60PS11 Plasma


FRONT IR, POWER LED and SIDE KEY Board SECTION

The following section gives detailed information about the Front IR,
Power LED and Side Key Boards. These boards contains the
Infrared Receiver, Intelligent Sensor, Side Keys and Power LEDs
section.
The front Intelligent Sensor IC communicates with the Main Board
Microprocessor via Clock and Data lines.

These boards have no adjustments.

The Front Control Board (IR and Intelligent Sensor) receives its main
B+ from the Main Board:
• STBY 5V from the Main Board. This voltage is originated
on the Switched Mode Power Supply
• 3.3V generated on the Main Board.
• The Front Power LEDs are driven by 2 separate pins from
the Main board.

138 January 15, 2010 60PS11 Plasma


Front Control (IR and Intelligent Sensor) Board and Power LED Board Location

Ground Strap

Front IR Board

Key Board

Ground Strap

Lower Left Side (As viewed from rear).

139 January 15, 2010 60PS11 Plasma


Front Power LED and IR Board Layout
Ground
snap

Power
LEDs

IR
Sensor

P101
Intelligent
Sensor
P102
On Front
P101

Front IR
Board

140 January 15, 2010 60PS11 Plasma


Front IR and Intelligent Sensor Board Layout
Intelligent Sensor
IC3 IR and Power LED
filter
IC2

P102
P101

d
ove
m
Infrared Sensor
r Re
ve
Co

Power Button
Infrared Sensor

All three switches are the Power


On/Off Switch Assy.

Power Power Plastic Power Button Removed


LED LED
141 January 15, 2010 60PS11 Plasma
Front IR and Intelligent Sensor Board Voltages IC1 IR Receiver
G: Ground G: Ground
IC3 IC2 Intelligent V: 4.8V V: B+
Sensor O: 4.7V O: Output

IR
Receiver

IC3 Q101 Red LED Driver


1: Gnd
2: 3.27V Q102 Green LED Driver
3: 5.14V
Q101 and Q102
B: 0.799V D103 D102
C: 0V Red on Green on Red on Green on
E: Gnd Left Right Left Right
Red On in Stand-By
Power LEDs
Green On in Run

142 January 15, 2010 60PS11 Plasma


Front IR and Intelligent Sensor Board Testing

143 January 15, 2010 60PS11 Plasma


Front Control Board Connector P101 Voltage and Pin Identification
P101 P1 CONNECTOR " Front Control Board" to P1001 "Main Board"
Pin Label STBY Run Diode Check
1 1 IR 4.86V 3.93V Open
2 Gnd Gnd Gnd Gnd
3 Key1 3.27V 3.27V Open
For Voltages when
each Key is 4 Key2 3.27V 3.27V Open
pressed, see the
Key Board section.
5 PKey Gnd Gnd Gnd
6 Gnd Gnd Gnd Gnd
7&8 7 EYEQ-SCL 0V 3.28V Open
Intelligent 8 EYEQ-SDA 0V 3.28V Open
Sensor
9 Gnd Gnd Gnd Gnd
Stand 10 STBY 5V 5V 4.9V Open
By 5V 11 3.3VST 0.34V 5.1V 2V
12 Gnd Gnd Gnd Gnd
13 LED R 2.94V 0V 1.19V
14 LED W 0V 2.91V 1.16V
Not Used
15 PWM Gnd Gnd Open

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

144 January 15, 2010 60PS11 Plasma


Front IR Board Plug P102 to Side Key (Voltages and Pin Identification)
Voltage and Diode Mode Measurements for the Main Board

For Voltages when each Key is pressed, see the Key Board section.

P102 CONNECTOR “Ft IR Board" to "Ft Key“ P101

Pin Label STBY Run Diode Mode


1 Key 1 3.27V 3.27V Open
2 Key 2 3.27V 3.27V Open
3 Gnd Gnd Gnd Gnd
4 Gnd Gnd Gnd Gnd

Diode Mode Readings taken with all connectors Disconnected. Black lead on Gnd. DVM in Diode Mode.

145 January 15, 2010 60PS11 Plasma


SIDE KEY SECTION (Board Layout and Identification)

SW103 SW107 SW108 SW105 SW106 SW104 SW102

P101
To Ft IR Board

146 January 15, 2010 60PS11 Plasma


P101 Resistance Measurements with Key pressed.
Side Key Assembly
Pin 1 measured Pin 2 measured
Resistance and KEY
from Gnd
KEY
from Gnd
Diode Mode CH (Up) 0.61K Ohms Volume (+) 3.6K Ohms
Checks CH (Dn) 9K Ohms Volume (-) 0.62K Ohms
Input 3.66K Ohms Enter 22K Ohms
Menu 9K Ohms
Diode Mode
P101 Voltage Measurements with Key pressed.
Readings taken with
all connectors Pin 1 measured Pin 2 measured
Disconnected. Black KEY KEY
from Gnd from Gnd
lead on Gnd. DVM
in Diode Mode. CH (Up) 0.19V Volume (+) 0.86V
CH (Dn) 1.57V Volume (-) 0.19V
Input 0.88V Enter 2.2V
Menu 1.56V

P101 Connector “Side Key" to “IR/LED Control Board“ J2 (No Key Pressed)
Pin Label STBY Run Diode Mode
1 KEY 1 3.3V 3.3V Open
2 KEY 2 3.3V 3.3V Open
3 Gnd Gnd Gnd Open
4 Gnd Gnd Gnd Open

147 January 15, 2010 60PS11 Plasma


60PS11 SERVICE TIP SECTION

This section give known failure tips to


help isolate the problem quickly.

148 January 15, 2010 60PS11 Plasma


Tip: How to Check the Z-SUS if the Y-SUS Has Failed
When you apply AC to the
Turn the Set On with Remote or disconnect P814. This supplies SMPS, check the Z-Bias
Leave P811 to
VS and 5V to waveform TP
P101 Connected
the Z-SUS 223V P/P signal

17V pins
1 or 2

Jump 17V to
FS101

This supplies Leave P813 to


5V to the P200 Connected
Control board

All this
assumes the
Power supply
and Control
board are Leave 17V is normally made
working P2 to P100 on the Y-SUS.
correctly. Connected
D6 and D7
should be on. This supplies drive
signals Z-SUS

149 January 15, 2010 60PS11 Plasma


60PS11 TIP: Panel has a Brief Flash during start up, then No Picture.
Floating Ground checks must be made from Floating Ground. Use any pin on P204, P203, P205 or P208.

TIP:
SYMPTOM:
The panel indicates a brief flash during start up, then “No Picture” symptom.

CHECKS:
1. Z-SUS does not produce a correct signal. (All voltages check normal except 17V).
2. Y-SUS does not produce a correct signal. (No negative portion).
3. On Y-SUS: 17V starts off at 17V then very quickly drops to 5V.
4. Floating Ground 5V and 15V are not produced. (See pages 60~61 for more details).
5. Removing all connectors on the Z-SUS board (Except the panel connectors) does
not change test results.
6. Removing Y-Drive boards cause all voltages to return to normal.
Including the Y-Drive signal checked on the right side of C213.
7. Reconnecting all connectors on the Z-SUS board shows it is not creating a
correct waveform. Just spikes. (17V now stays up).
8. Using the Diode Checks for the Y-Drive boards do not indicate a problem.
(See pages 67, 70, 71 and 74 for more details).

FIX:
Replacing the Z-SUS board fixed the problems.

150 January 15, 2010 60PS11 Plasma


No Remote Function Service Tip:

TIP:
SYMPTOM:

When the set turns on and a picture appears, the bottom of the picture
shows the Input selection screen.

The Remote did not work.

The Front Function Keys did not work. (Except the Main Power Switch).

CHECKS:
1. Main Board: Reading the Key 1 and Key 2 lines found that Key 2 was at 0.8V.
Key 1 read normal at 3.3V. (See page 124 for more details).
2. Feeling the Function buttons found that the right hand button (as viewed from the
rear) did not feel the same as the others. It was stuck.

FIX:
1. Removing and repositioning the button assembly freed up the button. The set
return to normal function. (See page 116 for more details).

151 January 15, 2010 60PS11 Plasma


½ of the Picture is missing Top or Bottom Tip:
TIP:
SYMPTOM:
When the set turns on, the Top or Bottom ½ of the picture is black. It is possible that
the whole picture could be black if more than one connector is involved.

CHECKS:
1.Look careful the connections between the Y-SUS and Upper and Lower Y-Drive
boards. It is very possible that the can be improperly seated.

FIX: See next page for additional information.


1.Remove and reseat the board correctly.
2.Note: This can happen if this board is replaced or pulled off to perform checks.

Improperly Seated Properly Seated


Connector Connector

Note the pins are Note now the pins are


visible across the not visible across the
top inside of the top inside of the
connector. connector.

152 January 15, 2010 60PS11 Plasma


½ of the Picture is Dimmed Down (Shadowed) Top or Bottom Tip:

TIP:
SYMPTOM:
When the set turns on, either the Top or Bottom ½ of the picture looks like it has a
shadow, (darker). It is possible that the whole picture could be the same if it
involves multiple connectors.

FIX:
1. 12 pin Retainer (P/N EAG61050702), Clip.
2. Note: Place Clip on all Connectors from Y-SUS to the Y-Drive boards.

Clip
(P/N EAG61050702) Clip

Connector Connector
Before After

153 January 15, 2010 60PS11 Plasma


60PS11 INTERCONNECT DIAGRAM SECTION

11 X 17 Foldout Section

This section shows the Interconnect Diagram Drawing.


Use the Adobe Acrobat® version to zoom in for easier reading.

The Interconnect Diagram has a great deal of quick reference


servicing aids. Use this in conjunction with the Training Manual.

For Printing purposes, print to 11X17 paper size.

154 January 15, 2010 60PS11 Plasma


60PS11 (60H3 Panel) CIRCUIT INTERCONNECT DIAGRAM
Waveform TP NOTE: Diode tests are conducted with the board disconnected.
On Either Y-Drive Board Z-SUS Signal
Connect Scope
Y-DRIVE WAVEFORM Step 1: RL On command turns on 5V and 12V. Also 5V Det from SMPS (pins 9, 10, 12) when 5V turns on. between Waveform TP
on Z board and Gnd
Step 2: M5 On command Turns on M5V Use RMS information
VR602 50VAC rms Step 3: Vs On command Turns on Va first then VS
17V turns on with 5V Det from SMPS when
0V just to check for board
Vs On command 5V (9~11) turns on
Set-up “White” activity.
A 59~106VAC rms
20uSec “Picture” SMPS
4mS ± 5uSec VS Adj
P812 POWER SUPPLY P811 39V (AC) rms 400us 234Vp/p
0V Pin Label Diode VR951 P100 Z-SUS P811 SMPS
9,10 M5V 2V F801 P813 to P101 Control to P101 Z-SUS To run the Z-SUS without the
Y-SUS. Jump Audio 17V from
VR601 8 Gnd Gnd 8A/250V 160V STBY VR901 Pin Label Run Diode Pin Label Diode SMPS to pin 1 of P100.
Set-Dn 150uSec 6-7 *Va Open 1 15V (17V) 17V 1.9V
B
± 5uSec
391V RUN VA Adj 1,2 *VS Open

P104
4-5 Gnd Gnd 4.57V STBY 2 15V (17V) 17V 1.9V 3 n/c n/c
100uS 514V P/P nc nc 3 15V (17V) 17V 1.9V
FPC

3 4,5 Gnd Gnd


P101

FS102 Diode Check


*Vs Open 4 15V (17V) 17V 1.9V Open (In Circuit)
1~2 F101 (AC) 6,7 *VA Open Z-Drive
Connect Scope between Waveform TP on Y-Drive and Gnd 5 CTRL OE 0.06V Open
Open (No Connectors)
Use RMS information just to check for board activity. * (Vs) Variable according 15A/250V 8 Gnd Gnd FS102 (VS) Waveform
P814 6 ER UP 0.19V Open
P116~P304 P114~P301 to Panel Label 9,10 M5V 2V 6.3A/250V FL103
12) CLK T All Pins FGnd 7 ER DN 0.22V Open
AC In
11) OC2 T Odd CN701 8 GND Gnd Gnd * (Vs) Variable according
Y-Drive 10) OC1 T B Odd P115~P306 n/c to Panel Label
Upper SC101 9 Z Bias 3.16V Open

P101
9) OC1 T B Even 5~12) FGnd Va is not used by Z-SUS
8) +5VFG 4) Data Odd Out
P814 SMPS to Main 10 GND Gnd Gnd Z-SUS
FPC

Pin Label STBY Run No Load


P102

7) +5VFG 3) Data Even Out Pin Label STBY Run No Load


2) OC2 T Even
11 Z SUS UP 0.4V Open FS100 Diode Check
FS100 (M5V)
6) Data Out Odd
1, 2 17V 0V 17V 17V P813 SMPS to Control Open (In Circuit)
5) Data Out Even 1) STB T 17 5V Det 0V 4.7V 5V 12 Z SUS DN 0.6V Open Open (No Connectors) 10A/125V
4) FGnd FS302 Diode Check 3, 4 Gnd Gnd Gnd Gnd Pin Label Run Diode
VSC
18 AC Det 4.9V 4.9V 5V VZB TP
3) n/c To Check FG5V to the Y Drive, measure Open (In Circuit) 1~4 M5V 5V 2V
(*140V) 2) VScan across capacitor C170/C270 Open (No Connectors) 5, 6 12V 0V 12V 12V 19 RL On 0V 3.2V 0V R457 Top
From FG All Y-Drive voltages measured from FGnd. 5~8 Gnd Gnd Gnd
1) VScan 7, 8 Gnd Gnd Gnd Gnd 20 Vs On 0V 3.2V 0V To Gnd

P102
9, 10 5V 0V 5.14V 5V 21 M5 On 0V 3.2V 0V
SMPS Test – Unplug P814 to Main board.
Waveform
P P Apply AC, all voltage should run.
3 11 Stby 5V 4.94V 4.94V 5V 22 Auto Gnd 0V 0V 5V
1 See “Auto Gen” on the Control board to perform a Panel Test.
P103

Cushion
FPC

0 FS302 (VS)
1 12 5V 0V 5.14V 5V 23 Stby5V 4.94V 4.94V 5V
1 6.3A/250V If all supplies do not run when A/C is reapplied, disconnect P811, VR201
P302
4
VSC
13, 14 Gnd Gnd Gnd Gnd 24 Key On 0V 0V 5V P812, P813 to isolate the excessive load. Use two (100W) light bulbs P100 VZB Adj
FS301 (VA)
+
P 10A/125V
15, 16 Gnd (n/c) Gnd Gnd Gnd/nc in series connected between Vs and Gnd to place SMPS under a load. 17V FS101 (17V)
C170
- P
1 3 2.5A/125V
Y-SUS FS301 Diode Check

Z-Drive Creation Signals


1 0 FS303 FS101 Diode Check
P103
6 (M5V)
Open (In Circuit) P200 Control to SMPS 0.93V (In Circuit) P107
5 Open (No Connectors) Main Back Side Regulators 1.9V (No Connectors) N/C P106
10A/125V Pin Label Run Diode
FS303 Diode Check
FG5V 1~4 M5V 5V 2V
IC201 NV RAM IC202 HDCP IC602, IC802 Main Front Side Regulators
P104
FPC

P P 0.93V (In Circuit)


7,8 1 3 1.29V (No Connectors) 1,2) Gnd 1,2) Gnd 1) 5V IC302 IC804 USB
5~8 Gnd Gnd Gnd 3,4) Gnd 3) 3.29V 2) 4.6V
VSC 1 0 1.3V VDDC REG POWER
1,2 6 4 5,6) 3.29V 4) Gnd 3) 4.6V
P111 Note: IC304 (3.3V Regulator) routed to all X Boards 1) 5.4V 5) 0.9V 1) 5V 4) 0V
M5V 7) Gnd 5,6) 3.29V 4) 3.3V
2) 4.95V 6) 0.9V 2) Gnd 5) 0V

P105
P211 P111
To Check for Y-SUS Drive Waveform With the unit on, if D7 is not on, check 5V supply. 8) 3.29V 7) Gnd 5,6,7,8) Gnd
Not Gnd Gnd 3) 1.3V 7) 4.9V 3) 3.3V 6) 5V
P211 With the Y-Drive boards Disconnected If present replace the Control PCB. 8) 3.3V
Connected 4) Gnd 8) 3.6V
Use the bottom leg of C326. M5V
Or Pins 1~2 of P304 If missing, see (To Test Control Board)
Or Pins 11~12 of P303 P200 Q303 3 LVDS IC804 USB
VSC IC304
392V p/p (Flat bottom) P1 D6 P2 GS IC301 Processor 1) 5.1V 3) 3.2V 5) 0V
FPC

1 23
11,12
P201

P P Pins (45~50) 17V P202 21 2) Gnd 4) 0V 6) 5.1V

2 3
IC306 IC5 L P1001 D IC302 IC203
From D909/D910 Ribbon Cable Pin 1~5 (17V) *FL4*FL5 LVDS Ft IR P102 P101 P1006
C IC804
P101

Q301
FG5V VR602 2
1 0 IC302 IC303 M5V M5V P5 V 1 2 3 B P1003
7/8 SET UP D
E
4 3
Y-SUS and Y Drive Signals
D7
IC7 1 (0V) Intelligent L318
Micro/Video
IC201
LVDS IC202
IC12 S
C270 -
Control 2 (3.3V) Sensor IC305
Processor

VR601 1 (0V) 929Hz 3 (5.0V) Q504


P P FS901 FS901 Diode Check 2 USB
FS901 Protects T902 for 2 (2.5V) X2 IC11 IC503 Analog Digital
+ 2 3 -Vy TP SET DN (M5V) 0.097V (In Circuit) VS-DA And Power SW 9V Reg D1001
Waveform VR902 FG15V and FG5V Creation P101 3 (5.0V)
Reset IC1
IC1 S (0V) S (3.3V) IC204
1.29V (No Connectors) Pin 1-4 is D303 B E G (3.3V) G (0V)
1 0 Top R306 -VY 5A/125V D909/910 Diode Check
Pin 1-4 is IC1 L1012
C A
C X501
D502
P202

Floating Gnd 3.3V to TCP 1 (0V) IC6 3.3V to TCP IC1001 A-C Q302 D (3.3V) D (3.3V)
5 5 D909 Cathode Side A C
FPC

Bottom R640 17V


D910 0.093V (I.C.) Short across pins 1 and from IC304 2 (3.3V) from IC304 P101 Ft Keys R+ C
B
E C
X1 Q504
Out
25Mhz IC504
B EGS HDMI
VSC 1.18V (N.C.) 3 (5.0V) 1 (0V) 2 (3.3V) 3 (5V) Q1002 C
P P T901 T902 2 of P6 Auto Gen to P6 Pin 1-4 is 3.3V to P104 P101 (Ft Keys) to P102 (Ft IR)
Audio E B 12Mhz
MAIN BOARD
Q501
D
IC502
Q502 Q891
P501 IC304 IC16 Amp Q1001 C C
2 3 generate a test pattern. TCP from IC304 P1005 L1013 In Out Gnd EB C 19 Video
R640 FG15V FG5V N/C P3 Pin Label Both Diode Check IC601 Q503 B
C326

E
1 0 R639 (Note: Must Remove AUTO
N/C 1 Key 1 3.3V Open To D802 A A
IC301 IC304 IC305 IC502 IC503 IC505 E B
6 8 C326 IC908 IC909 GEN 4 3 SIF 16
VR901 LVDS Cable). 2 Key 2 3.3V Open Speakers IC803
C Q801
3.3VST 1.8VMST 3.3VMST 1.2VPVSB Reg
Reg Reg Reg On = Digital CH
Tuner Tuner
9V Reg 5V Reg
(5V) 15
IC805
VSC P307 P102 1 2 C=4.7V

(*140V) VSC TP VScan


3, 4 Gnd Gnd Gnd (All Pins BE D628 Gnd 0.6V Gnd Gnd 12V 3.8V
DIF - 13
DIF + 12
1
Across R306 Floating Gnd * If the complaint is no 8.5V)
D805
Q892 C A=0V A=5V
From FG To Test Control board: P1001
C A
A 2 3.3V 1.85V 3.0V In 0V/3.3V Gnd 5.0V D806

Disconnect all connectors except the SMPS. When set video and shorting the C A A
C BE TUNER
P203
FPC

IC802 Out 0V/1.2V


P214~P303 P215~P305 D627 3 5V 3.3V 4.9V 8V 8V
Va points (AutoGen) causes Pin Label STBY Run Pin Label STBY Run BE
A A
12) VScan 12) OS2 B Even turned on, observe Control board LED. If it’s on, most 1 IR 4.86V 4.95V 9 Gnd Gnd Gnd A
Q890 C Q601
TUNER TU501 IC505
Y-Drive (5V) 4

Lower
11) VScan 11) STB B likely Control board is OK. video to appear suspect 2 Gnd Gnd Gnd 10 5VST 5V 5V D804
A C
D633
C C A
TDVW-H103F
2
Tuner
10) n/c 9~1) All FGnd
9) FGnd If M5V is not present on P200 pins 1~4, jump STBY 5V the Main board or LVDS 3 Key 1 3.27V 3.27V 11 3.3VST 0.34V 5.1V
A A
IC602 ZD601
Grayed Out ICs are located on Back
1
3 2 1
5V Reg

fro SMPS P814 Pin 24. 4 Key 2 3.27V 3.27V 12 Gnd Gnd Gnd
8) Data Out Even P216~P308 cable.
7) Data Out Odd All Pins FGnd 5 PKEY 0V 0V 13 LED R 2.94V 0V
6) +5VFG 6 Gnd Gnd Gnd 14 LED W 0V 2.91V
5) +5VFG 3.3V and 7 EyeSCL 0V 3.28V 15 PWM 0V 0V
4) OC1 T B Odd X-Drive 8 EyeSDA 0V 3.28V
P204

3.3V and X-Drive


FPC

3) OC1 T B Even
Left RGB
2) CLK B Center RGB Signals 3.3V and X-Drive Right RGB Signals
1) OC2 B Odd Signals
P121 P307 Y-SUS
P110 P120 Va P210 P221 Va P310
Pin Run Diode Check Pin Run Diode Check P320
3.3V in Va out 3.3V in on Va out on 3.3V in on
1,2,3,4
5
VA Voltage
nc
Open
nc
1,2,3,4
5
VA Voltage
nc
Open
nc on Pins on Pins
P220
Va in on
X-Board Center Pins 57~60 Pins 1~12 Va in on
Pins 19~30 Pins 57~60 X-Board Right
6,7 Gnd Gnd 6,7 Gnd Gnd 57~60 1~12 Pins 19~30
P101 P102 P103 P104 P105 P106 P107 P108 P201 P202 P203 P204 P205 P206 P207 P301 P302 P303 P304 P305 P306 P307 P308
60PS11 LVDS
P1003 LVDS (Pin 11) 5uSec / 718mV P1003 LVDS (Pin 12) 5uSec / 565mV P1003 LVDS (Pin 13) 5uSec / 479mV P1003 LVDS (Pin 14) 5uSec / 594mV
P1003
WAVEFORMS
Connector P1003
Configuration
indicates
signal pins.

2 1

4 3

6 5

8 7

10 9 P1003 LVDS (Pin 11) 2uSec / 718mV P1003 LVDS (Pin 12) 2uSec / 565mV P1003 LVDS (Pin 13) 2uSec / 479mV P1003 LVDS (Pin 14) 2uSec / 594mV
12 11
P1003 LVDS (Pin 15) 5uSec / 648mV P1003 LVDS (Pin 16) 5uSec / 414mV P1003 LVDS (Pin 17) 5uSec / 717mV P1003 LVDS (Pin 18) 5uSec / 624mV
14 13

16 15

18 17

20 19

22 21

24 23

26 25

NOTE: LVDS P1003 P1003 LVDS (Pin 15) 2uSec / 648mV P1003 LVDS (Pin 16) 2uSec / 414mV P1003 LVDS (Pin 17) 2uSec / 717mV P1003 LVDS (Pin 18) 2uSec / 624mV
Information
There are actually 12
pins carrying Video 2 P1003 LVDS (Pin 19) 5uSec / 702mV P1003 LVDS (Pin 20) 5uSec / 563mV P1003 LVDS (Pin 21) 5uSec / 82mV P1003 LVDS (Pin 22) 5uSec / 140mV
pins are carrying clock
signals (17 and 18) to
the Control board. With
high activity video, pins
21 and 22 would have
signals present.

WAVEFORMS:
Waveforms taken using
SMTP Color Bar input. All
readings give their Time
Base related to scope
settings.
All waveforms taken from
the P1003.
P1003 LVDS (Pin 19) 2uSec / 702mV P1003 LVDS (Pin 20) 2uSec / 563mV P1003 LVDS (Pin 21) 2uSec / 82mV P1003 LVDS (Pin 22) 2uSec / 140mV
End of Presentation

This concludes the Presentation

Thank You

156 January 15, 2010 60PS11 Plasma