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In a huge pile of apples and oranges, both ripe and unripe order. (A) The device parasitic capacitances behave like open
mixed together, 15% are unripe fruits. Of the unripe fruits, circuits, whereas coupling and bypass
45% are apples. Of the ripe ones, 66% are oranges. If the S, M, E and F are working in shifts in a team to finish a capacitances behave like short circuits.*
pile contains a total of 5692000 fruits, how many of them project. M works with twice the efficiency (B) The device parasitic capacitances, coupling
are apples? of others but for half as many days as E worked. S and M capacitances and bypass capacitances behave like
(A) 2029198* have 6 hour shifts in a day, whereas E open circuits.
(B) 2467482 and F have 12 hours shifts. What is the ratio of (C) The device parasitic capacitances, coupling
(C) 2789080 contribution of M to contribution of E in the capacitances and bypass capacitances behave like
(D) 3577422 project? short circuits.
(A) 1:1 (B) 1:2* (C) 1:4 (D) 2:1 (D) The device parasitic capacitances behave like short
Michael lives 10 km away from where I live. Ahmed lives circuits, whereas coupling and bypass
5 km away and Susan lives 7 km away from where I live. The Venn diagram shows the preference of the student capacitances behave like open circuits.
Arun is farther away than Ahmed but closer than Susan population forleisure activities
from where I live. From the information provided here, Assume that all the digital gates in the circuit shown in the
what is one possible distance (in km) at which I live from figure are ideal, the resistor � = 10 �Ω
Arun’s place? and the supply voltage is 5 𝑉. The D flip-flops D1, D2, D3,
(A) 3.00 D4 and D5 are initialized with logic
(B) 4.99 values 0,1,0,1 and 0, respectively. The clock has a 30%
(C) 6.02* duty cycle.
(D) 7.01
Consider the following statements for a metal oxide Awire of length 340 mm is to be cut into two parts. One of Which one of the following statements correctly describes
semiconductor field effect transistor the parts is to be made into a square and the other into a the choice of signals to be connected to
(MOSFET): rectangle where sides are in the ratio of 1:2. What is the the inputs I0, I1, I2 and I3 so that the output is Cout?
P: As channel length reduces, OFF-state current length of the side of the square (in mm) such that the (A) I0=0, I1=Cin, I2=Cin and I3=1*
increases. combined area of the square and the rectangle is a (B) I0=1, I1=Cin, I2=Cin and I3=1
Q: As channel length reduces, output resistance MINIMUM? (C) I0=Cin, I1=0, I2=1 and I3=Cin
increases. (A) 30 (B) 40* (C) 120 (D) 180 (D) I0=0, I1=Cin, I2=1 and I3=Cin
R: As channel length reduces, threshold voltage remains
constant. As � varies from −1 to +3, which one of the following The number that least fits this set: (324, 441, 97 and 64)
S: As channel length reduces, ON current increases. describes the behaviour of the function is ________.
Which of the above statements are INCORRECT? �(�) = �3 – 3�2 + 1? (A) 324 (B) 441 (C) 97* (D) 64
(A) P and Q (B) P and S (C) Q and R* (D) R and S (A) �(�) increases monotonically.
(B) �(�) increases, then decreases and increases again.* It takes 10 s and 15 s, respectively, for two trains
The output of the combinational circuit given below is (C) �(�) decreases, then increases and decreases again. travelling at different constant speeds to
(D) �(�) increases and then decreases. completely pass a telegraph post. The length of the first
train is 120 m and that of the second train is
How many distinct values of � satisfy the equation sin(�) 150 m. The magnitude of the difference in the speeds of
= �/2, where � is in radians? the two trains (in m/s) is ____________.
(A) 1 (B) 2 (C) 3* (D) 4 or more (A) 2.0* (B) 10.0 (C) 12.0 (D) 22.0
The Ebers-Moll model of a BJT is valid A straight line is fit to a data set (ln x, y). This line
(A) A+B+C (B) A(B+C) (C) B(C+A)* (D) C(A+B) (A) only in active mode intercepts the abscissa at ln x = 0.1 and has a
(B) only in active and saturation modes slope of −0.02. What is the value of y at x = 5 from the fit?
The functionality implemented by the circuit below is (C) only in active and cut-off modes (A) −0.030* (B) −0.014 (C) 0.014 (D) 0.030
(D) in active, saturation and cut-off modes*
The probability of getting a “head” in a single toss of a
A long-channel NMOS transistor is biased in the linear biased coin is 0.3. The coin is tossed
region with 𝑉𝐷�=50 mV and is used as a repeatedly till a “head” is obtained. If the tosses are
resistance. Which one of the following statements is NOT independent, then the probability of getting
correct? “head” for the first time in the fifth toss is __________
(A) If the device width � is increased, the resistance 0.07-0.08
decreases.
(B) If the threshold voltage is reduced, the resistance The minimum number of 2-input NAND gates required to
decreases. implement a 2-input XOR gate is
(C) If the device length � is increased, the resistance (A) 4* (B) 5 (C) 6 (D) 7
increases.
(D) If 𝑉𝐺� is increased, the resistance increases.*
Assume that the diode in the figure has 𝑉𝑜� = 0.7 𝑉, but
is otherwise ideal.
(A) 2-to-1 multiplexer (B) 4-to-1 multiplexer*
(C) 7-to-1 multiplexer (D) 6-to-1 multiplexer