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Silicon Carbide Diodes
in Power-Factor
Correction Circuits
Device and circuit design aspects
I
by Rahul Radhakrishnan Potera n this article, we review the application of silicon car-
and Timothy Junghee Han bide (SiC) devices, especially diodes, in power-factor
correction (PFC) circuits, and we compare various SiC
diode designs based on their impact on PFC circuits.
Furthermore, we show how device parameters reported
in datasheets can be used to estimate the performance of SiC
Digital Object Identifier 10.1109/MPEL.2018.2886105
diodes in the surge-current conditions of different durations,
Date of publication: 19 February 2019 and we point to how modifications in PFC circuits can
L Dpfc
vac N-Type N-Type N-Type
I(L) +
C RL Vdc
S1 – N Substrate N Substrate N Substrate
FIG 1 A diagram showing the input PFC stage of a boost FIG 2 Illustrations of simplified cross sections of (a) p-i-n,
power supply. (b) Schottky, and (c) MPS diodes.
improve performance. These analyses help the designer in the active power components. Steps should be taken to
combine the efficiency advantages of SiC diodes with cir- limit this loss. In this regard, SiC Schottky diodes rated at
cuit robustness that might suffer if Si diodes are simply 650 V have been a popular choice for replacing correspond-
replaced with SiC diodes. ing Si p-i-n diodes in the boost PFC stage ( D pfc in Figure 1)
of power supplies in the kilowatt range [2]. Even for price-
Requirements of a sensitive products, the near-zero switching loss of the SiC
PFC Boost Diode Schottky diode, which occurs due to its negligible reverse-
Electrical loads rarely consume power with the current recovery charge, reduces the overall circuit bill of materi-
fully in phase with voltage. Traditional loads, such as the als compared to the cheaper Si p-i-n diode. A comparison of
induction motor, draw currents at a significant lag to volt- the two diodes reveals that Schottky Si diodes would have
age. Today’s ubiquitous switched-mode power converters high static losses due to a higher forward-voltage drop, and
introduce phase-change as well as higher-order frequency fast-recovery p-i-n Si diodes would have additional switch-
harmonics. To convert the maximum possible power as ing losses due to residual reverse-recovery charges at 650 V.
well as reduce the harmful characteristics that harmonic Unlike Si devices, SiC Schottky diodes with a combination
distortions introduce to the power mains, power supplies of a higher material band gap and high electron conductiv-
are equipped with PFC circuits at the input stages. A per- ity enable the simultaneous r eduction of static and switch-
fect PFC circuit would enable the mains to see the load ing losses at high frequencies (>100 kHz).
as an ohmic resistance, notwithstanding the load power
factor. Such standards as IEC/EN61000-3-2 and IEC/ SiC Diodes and Surge Current
EN61000-3-12 [7], [8] stringently regulate line-current har- The PFC input stages of power supplies are subjected to
monic content. high surge currents, especially when the device
While correcting for the power factor of input ac power, is turned on and the resulting transient
the PFC converter also must maximize power conversion reduces the effective inductance in the
efficiency. The voluntary “80 Plus” regulation certifies circuit due to core saturation. In Figure 1,
products that deliver at least 80% energy efficiency at 20, D p is typically an Si p-i-n diode capable of
50, and 100% of the rated load and have a power factor of high forward- surge currents added to
0.9 or greater at 100% load. Many organizations adhere bypass the current from D pfc. In a normal
to the “80 Plus Titanium” efficiency specification, which boost operation, when Vdc is greater than the rec-
requires a peak efficiency of 96% at half-load conditions [1]. tified voltage, the bypass diode does not conduct. During
Meeting these opposing objectives of increased efficiency surge events, depending on the rise time and pulsewidth, D p
and compliance with power factor standards requires and D pfc carry different proportions of the surge current. In
more advanced PFC circuit designs and superior active general, short and fast-rising surge events raise the voltage
circuit components. across the inductor and most current flows through D p .
Figure 1 shows the basic components of the boost PFC However, as pulsewidth increases, more current flows
input stage of a power supply. The power loss in the switch through D pfc. Figure 2(a)–(c) shows the basic structure
and diode of the PFC stage is partly static conduction loss of a p-i-n diode, a Schottky diode, and a merged
and partly switching loss. Static conduction loss is indepen- p-i-n–Schottky (MPS) diode. SiC diodes up to
dent of the switching frequency. Switching loss, meanwhile, 1,200 V are either Schottky or MPS, with
is proportional to the switching frequency. To reduce the the former providing lower static losses
size and weight of the passive circuit components, includ- and the latter higher surge-cur-
ing input electromagnetic interference filters and a boost rent capability [3].
inductor, the switching frequency should be increased. In power switches, surge
However, such an increase results in more switching loss current is often associated
The value T f sum is either 8.3 or 10 ms in most data- FIG 4 The variations of (a) surge current and (b) energy density
sheets. Additionally, I f sum is often reported as a half-sine with the pulsewidth.
I 2f sm 8.3 ms
I 2f surge rms Tsurge = # 8.3 ms. (3) Negative Temperature Coefficient Resistance
2
Inrush typically happens when the system is turned on
Such a design rule, with an appropriate margin, can be after a hiatus and, hence, is cold. So a series resistance
used to adapt the forward-surge-current limits reported (Figure 5) with a negative temperature coefficient (NTC)
in datasheets while selecting an SiC diode for a given PFC of resistance can reduce the total inrush current while
circuit design problem. However, when designing for fast adding little parasitic resistance during normal “hot” oper-
pulses with 1100 -ns pulsewidth or ation. NTC resistance can then be
even 1-ns- range electrostatic dis- designed for the constraint in (4).
charge (ESD) events, the circuit de However, NTC resistance alone will
signer might reasonably impose only The challenge of not prevent high inrush current in
a current density limit, as shown in improving both the case of an off–on toggle when the
Figure 4. In the absence of specific NTC resistance is still hot while sub-
measurements using transmission line
efficiency and surge jected to inrush current:
pulses, an SiC diode can be designed performance in diodes V
for a 1-ns- long human body model I Surge Max NTC = R ac .(4)
ESD event to restrict the current den-
is just one part of the NTC Cold