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APPLIED PHYSICS LETTERS VOLUME 81, NUMBER 12 16 SEPTEMBER 2002

Batch-fabricated spin-injection magnetic switches


J. Z. Suna)
IBM T. J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598
D. J. Monsmab)
IBM Almaden Research Center, 650 Harry Road, San Jose, California 95120
D. W. Abraham, M. J. Rooks, and R. H. Koch
IBM T. J. Watson Research Center, P.O. Box 218, Yorktown Heights, New York 10598
共Received 14 May 2002; accepted for publication 22 July 2002兲
A method is developed for the fabrication of sub-100 nm current-perpendicular spin-valve junctions
with low contact resistance. The approach is to use a batch-fabricated trilayer template with the
junction features defined by a metal stencil layer and an undercut in the insulator. The spin-valve
thin film stack is deposited afterwards into the stencil, with the insulator undercut providing the
necessary magnetic isolation. Using this approach, reproducible spin-current-induced magnetic
switching is demonstrated for junctions down to 50 nm⫻100 nm in size. © 2002 American
Institute of Physics. 关DOI: 10.1063/1.1506794兴

Recent development of spin angular momentum transfer 1 describes the fabrication process. First a Pt–SiO2 – Pt
devices1– 8 has opened an active new area for the exploration trilayer was deposited, as shown in Fig. 1共a兲. The top Pt
of magnetic nanostructures. Since the phenomenon is only layer, about 20 nm thick, is then patterned using e-beam
quantifiable for devices with dimensions around 100 nm or lithography, and etched using ion milling to open a hole of
less, methods are being sought to produce such structures critical dimension 共around 50–100 nm兲. The SiO2 is further
reliably and with fast turnaround time to facilitate materials opened up with wet etching, allowing the formation of an
optimization. Common approaches to fabricating such de- undercut, the degree of which one can control by controlling
vices involve mostly a subtractive process 共see, e.g., Ref. 7兲, the etch condition.
in which the thin film stack is deposited first, and e-beam The template structure has an inert bottom electrode sur-
lithography is then used to define a mask on top of the film face, with the critical device dimension defined and ready for
for subsequent etching necessary for the device structure. additive deposition. Next the metal multilayers needed for
This approach produces the most ideal device structure in CPP transport are deposited. The critical stack sequence,
principle, yet it is often too slow for quick materials screen- usually very thin, on the order of tens of nanometers, is de-
ing and exploration of the physics. posited first. The hole is then filled with a thick layer of
An alternative is the additive method, where the critical contact metal, such as copper. As the very last step, the sur-
dimension is first formed on a substrate using e-beam lithog- face of the whole film is coated with an inert metal, such as
raphy. Subsequent thin film deposition is made onto the sub- platinum or gold, for subsequent lithographic processing.
strate with the mask structure already defined. This is com-
mon for lift-off lithography. A slightly different version has
recently also been used with an embedded polymer insulator
layer for fabrication of current-perpendicular 共CPP兲 magnetic
junctions in spin-injection experiments.8 The problem in
their approach is the lack of control over the edges of the
device due to complex edge growth dynamics and the lack of
deep undercuts of the stencil. The use of a polymer stencil
also limits process parameters such as the thin film growth
temperature.
Here we introduce a modified approach to the additive
patterning of CPP magnetic structures. A metal hard mask is
used as a stencil. An inorganic insulator, such as SiO2 , is
used that has a controllable amount of undercut to provide
the necessary isolation and edge definition for the deposited
junction stack.
The process begins with a metal–insulator–metal FIG. 1. Illustration of the junction fabrication process flow. 共a兲 Pt mask
trilayer 共the template film, or the template for short兲. Figure made by typical PMMA e-beam lithography and ion milling process. 共b兲
Wet etching is used to open the insulator and to create an undercut in the
insulator beneath the metal mask. 共c兲 Deposition of magnetic layers into the
a兲
Electronic mail: jonsun@us.ibm.com batch-fabricated stencil, followed by a thick metal fill to create in situ a top
b兲
Current address: Physics Department, Harvard University, 9 Oxford St., contact. The undercut decouples the magnetic stack in the pillar. 共d兲 Optical
Cambridge, MA 02138. lithography for wiring.

0003-6951/2002/81(12)/2202/3/$19.00 2202 © 2002 American Institute of Physics


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Appl. Phys. Lett., Vol. 81, No. 12, 16 September 2002 Sun et al. 2203

FIG. 3. MR and spin-induced switching of a junction 0.05⫻0.10 ␮ m2 in


size. 共a兲 Junction resistance vs easy-axis field sweep. 共b兲 Junction resistance
vs dc bias current at bias field of ⫺248 Oe 关the field position is indicated by
the vertical dashed line in 共a兲兴. A clear current-driven switch between the
resistive-high and -low states is observed. Inset: The two switching current
observed in 共b兲 as a function of the bias field. The slope and intercept for
I c⫹ (H) respectively, are 1.38⫻10⫺5 A/Oe and 5.98 mA; while those for
I c⫺ (H) are 7.11⫻10⫺6 A/Oe and ⫺0.25 mA, respectively. Here I c⫹ repre-
sents the up-sweep switching current, corresponding to an antiparallel 共AP兲
to parallel 共P兲 transition. I c⫺ represents the down-sweep switching current,
FIG. 2. Cross-sectional scanning electron micrograph 共SEM兲 views of the corresponding to the P to AP transition. Data were taken at room tempera-
batch-fabricated magnetic junctions. 共a兲 Batch-fabricated template. The Pt ture.
stencil definition and the SiO2 undercut are shown. 共b兲 The same stencil
after electron-beam evaporation deposition of a film stack of 100Co–10Cu–
3Co. The numbers are the layer thicknesses in nm. This particular stack is The current switching threshold depends on the field ap-
not thick enough to bridge the stencil’s top and bottom layers. 共c兲 The same
layer sequence as in 共b兲, deposited using magnetron sputtering. As expected, plied, as shown in the inset of Fig. 3共b兲. Similar switching
the edge profile of evaporation-grown pillars is better than those of sputter behavior is obtained at reduced temperatures. For the same
grown. junction, dI ⫺ c /dH⬇9.7⫻10
⫺7
A/Oe and a dI ⫹ c /dH⬇6.3
⫺6
⫻10 A/Oe were observed at 13.4 K.
In addition to the current induced switching, resonance-
The sample then goes through a regular optical lithogra-
like features were observed in the junction’s resistance ver-
phy process to further define an insulator for isolating the top
sus bias current data for certain values of applied field. Fig-
and bottom electrodes and for deposition and patterning of
ure 4共a兲 is one such ‘‘resonance peak’’ for the same 0.05
the electrodes. This process has the advantage that all critical ⫻0.10 ␮ m2 junction, whose dependence on the magnetic
dimensions are defined on a template substrate before the field applied is shown in Fig. 4共b兲. The presence of extended
active film stack is deposited, thereby separating the critical magnetic films above the nanostructured pillar may contrib-
lithography step from the rest of deposition and fabrication, ute to these resonance structures which is related to magnon
and allowing large quantities of wafer templates to be pre- excitation.1,6,9,10
pared first using an e-beam 共which is often the limiting step The junction resistance versus junction area for the
in the turnaround兲, thus achieving much shorter processing samples thus prepared show proper scaling. An example is
time from thin film layer deposition to final device testing. shown in Fig. 5共a兲, where the junction resistance–area 共RA兲
Figure 2共a兲 shows a cross-sectional scanning electron product shows little dependence on junction size, except at
micrograph of a template structure with an undercut. Figures the end of the very small junction area, showing perhaps a
2共b兲 and 2共c兲 show, respectively, a cross-sectional view of a reduction of junction yields. Figure 5共b兲 shows junction
film stack deposited into the template by e-beam evaporation magnetoresistance 共MR兲 as a function of RA. The data are
and sputtering. This particular stack is not thick enough to seen to cluster around a 2.5% MR and about 0.018 ⍀ ␮m2, as
make good electrical contact. It illustrates the formation of a expected from a clean CPP structure without parasitic shunt-
thin film junction pillar inside the hole that has good shape ing from the circumference of the junction. These data con-
definition. As expected, e-beam evaporated films show better
edge definition than sputtered films. However, sputtered
films are apparently good enough to yield interesting junc-
tion results, used in this study. For transport study a sample
stack of 15Cu–3Co–10Cu–12Co–200Cu–10Pt was sputter
deposited onto a patterned stencil with the layered structure
of Si–500SiO2 – 100Cu– 30Pt– 50SiO2 – 20Pt-Surface. The
numbers are the film thicknesses in nm.
Current-induced magnetic switching is observed in these
junctions. Figure 3 gives an example of a junction with
nominal dimensions of 0.05⫻0.10 ␮ m2 with an easy-axis
field. Here, unless otherwise specified, junction resistance FIG. 4. Resonance behavior of a 0.05⫻0.10 ␮ m2 junction. 共a兲 R vs bias
current plot at bias field of ⫺880 Oe showing the resonant peak in R around
always refers to the dynamic resistance dV/dI measured us- current of I res⬇⫺10 mA. 共b兲 I res dependence on the value of the field H
ing an ac lock-in technique. applied.
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2204 Appl. Phys. Lett., Vol. 81, No. 12, 16 September 2002 Sun et al.

tance, well below the junction resistance which is on the


order of 1.6⫻10⫺10 ⍀ cm2 . They show an adequate amount
of magnetoresistance 共about 2%–3%, typical of the Co–
Cu–Co system demonstrated兲, and current-induced magnetic
switching.

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