Documente Academic
Documente Profesional
Documente Cultură
O
ur cover article presents three in a compact package, requiring Corporation announced its finan-
devices that simplify amplifier no external gain-setting resistors cial results for its first quarter of
designs by removing the external to establish gain of 2 or unity-gain, fiscal year 2005, ending Septem-
resistors: the LT1990, LT1991, and respectively. ber 26, 2004. According to Robert
LT1995. Each is a fully integrated The superfast performance of the H. Swanson, Chairman of the
functional building block—they may LT6553 and LT6554 satisfies the de- Board and CEO, “Sales grew 6%
be the last amplifiers you ever have mands of the latest high resolution sequentially from the June quarter
to stock—and because they require video equipment. (Page 12) and we continued to be cash flow
no external resistors for precision op- positive and strongly profitable
eration, design and testing is a snap. Sequencing and Tracking for LDOs as evidenced by our 41% return
Simply hook them up for type and gain The LTC2923 power supply tracking on sales.”
and move on. controller is specifically designed to Net sales for the quarter were
work with switching power supplies $253,028,000, an increase of 45%
Featured Devices but it is easily adapted to linear regu- over net sales of $174,077,000 for
Below is a summary of the other de- lators, including popular low-dropout the first quarter of the previous
vices featured in this issue. (LDO) types. Summarized here are year. The Company also reported
several techniques for controlling net income for the quarter of
High Voltage to Low Voltage linear regulators with the LTC2923. $103,476,000 or $0.33 diluted
Converter for High Power CPUs (Page 14) earnings per share, an increase of
The LTC3802 is designed to excel in 49% from the $69,471,000 diluted
generating low output voltages from Space and Power Saving earnings per share reported for the
high input voltages, a common prob- Low Voltage, Adjustable Reference first quarter last year. During the
lem for the power supplies of fast CPUs. The LT6650 is a 0.4V to 18V adjust- quarter, the Company’s cash and
It is the latest in Linear Technology’s able voltage reference that runs short-term investments increased
family of high speed, voltage feedback, from low voltage and consumes only by $48.1 million, net of spend-
synchronous step-down regulator a few µA. It features a low-dropout ing $54.6 million to purchase
controllers. It retains the constant (LDO) characteristic, can source or 1,500,000 shares of common
frequency architecture and Burst sink current, can be configured in stock. A cash dividend of $0.08 will
Mode® operation of the LTC1702A, either series or shunt mode and saves be paid on November 10, 2004 to
while improving on its performance space in the tiny 5-lead ThinSOT-23 stockholders of record on October
and adding features. (Page 5) package. (Page 16) 22, 2004.
+IN 1M P1 450k P1 4k
+ + +
900k 10k 150k 450k P2 2k 4k
P3
GAIN2
40k 40k 100k
1pF 50k 1k
P9 4pF P4 0.3pF
REF REF
REF
Figure 2. The LT1990, LT1991, and LT1995 are ready-to-use op amps with
their own resistors and internal compensation capacitors. Just wire them up.
560kHz, while drawing only 100µA according to the relative admittance There is a whole series of high input
supply current. of the resistor. So the “P9” pin has 9 common mode voltage circuits that can
The resistors are nominally 50k, times the admittance (or force) of the be created simply by just strapping
150k, and 450k. One end of each “P1” pin. The 450k resistors connected the pins. Figure 3 demonstrates the
resistor is connected to an op amp to the M1 and P1 inputs are not diode flexibility of the LT1991 with just a few
input, and the other is brought out to clamped, and can be taken well outside examples of different configurations
a pin. The pins are named “M” or “P” the supply rails, ±60V maximum. and gains. In fact, there are over 300
depending on whether its resistor goes To use the LT1991, simply drive, unique achievable gains in the non-
to the “minus” or “plus” input, and ground or float the P, M, and REF in- inverting configuration alone. Gains
numbered “M1” M3” or “P9” etcetera puts to set the configuration and gain.
VS + VS+ VS+
8 8 8
M9 M9 M9
9 7 9 7 9 7
M3 VCC M3 VCC VIN M3 VCC
10 10 10
M1 M1 M1
6 6 6
LT1991 OUT VOUT LT1991 OUT VOUT LT1991 OUT VOUT
1 REF 1 REF 1 REF
P1 P1 P1
2 5 2 5 2 5
P3 VEE P3 VEE P3 VEE
3 3 3
P9 4 P9 4 P9 4
VS – VS – V S–
VIN VIN
GAIN = 5 GAIN = 14 INVERTING GAIN = –3
VS VS+ 5V
8 VIN– 8 8
M9 M9 M9
9 7 9 7 9 7
M3 VCC M3 VCC M3 VCC
10 10 10
M1 M1 VIN – M1
6 6 6
LT1991 OUT VOUT = VS/2 LT1991 OUT VOUT LT1991 OUT VOUT
1 REF 1 REF VIN + 1 REF
VS P1 P1 P1
2 5 2 5 2 5
P3 VEE P3 VEE P3 VEE
3 VIN+ 3 3
P9 4 P9 4 P9 4
VS – –5V –5V
Figure 3. Non-inverting, inverting, difference amplifiers, and buffered attenuators achieved simply by connecting pins. This illustration shows only
a small sample of the op amp configuration circuits possible with the LT1991, all without requiring external resistors.
set by floating the Gain1 and Gain2 Figure 4. LT1991 applied as an individual battery cell monitor for a 4-cell battery
pins, and a gain of 10 is set by shorting
the Gain1 and Gain2 pins. Bandwidth LT1995 takes its pin names from the cells of a battery through a dual 4:1
is 100kHz in a gain of 1, and 6.5kHz relative admittances of their resis- mux. Because of the high valued
in a gain of 10. The op amp operates tors and the amplifier input polarity: 150kΩ resistors on its M3 and P3
on supplies from 2.7V to 36V with hence “M1”, “M2”, “P4”, etcetera. For inputs, the error introduced by the
rail to rail outputs, on 105µA supply a difference gain of 6, short the M2 multiplexer switch ON-resistance
current. Like the LT1991, it remains and M4 pins, and short the P2 and P4 is negligible. As the mux is stepped
stable while driving capacitive loads pins (2 + 4 = 6). In this example, the through its addresses, the LT1991
up to 500pF. difference amplifier is formed by the takes each cell voltage, multiplies it
minus input of the shorted M2 and by 3, and references it to ground for
The LT1995 for High Speed M4 inputs, and the plus input of the easiest measurement. Note that worst
The LT1995 offers high speed with shorted P2 and P4 inputs. case combinations of very different cell
30MHz bandwidth, 24MHz full power voltages can cause the LT1991 output
bandwidth and 1000V/µs slew rate. It Applications to clip. Connecting the MSB line to the
works on supplies from ±2.5V to ±15V M1 and P1 inputs helps reduce the
drawing 7mA supply current. Accuracy Battery Monitor effect of the wide input common mode
is unusually good for a high speed Many batteries are composed of indi- fluctuations from cell to cell. The low
amplifier, with input offset typically vidual cells with working voltages of supply current of the LT1991 makes it
600µV and guaranteed better than about 1.2V each, as for example NiMH particularly suited to battery powered
4mV. It is pinned out identically to the and NiCd. Higher total voltages are applications. Its 110µA maximum sup-
LT1991, but with different resistor ra- achieved by placing these in series. The ply current specification is about the
tios and values. The resistors are lower reliability of the entire battery pack is same as that of the CMOS mux!
impedance (1k, 2k, and 4k) than those limited by the weakest cell, so battery
in the LT1991 and LT1990 to support designers often like to maintain data on Single-Supply Video Driver
this device’s higher speed. They are as individual cell charge characteristics Most op amps operating from a single
high a quality as you should ever need and histories. supply voltage require several high-
in a high speed application, guarantee- Figure 4 shows the LT1991 con- quality external resistors to generate a
ing 0.25% matching, worst case over figured as a difference amplifier in a local bias voltage—to optimize the DC
temperature. As with the LT1991, the gain of 3, applied across the individual continued on page 35
0
5V –3
–6
–9
GAIN (dB)
8 –12
+ M4
9 7
47µF M2 –15
10
M1 75Ω
6
LT1995 VOUT –18
1
+
P1 f–3dB = 27MHz
2 220µF RL = 75Ω –21
47µF P2 5 10k
3
+
VIN P4 –24
4
–27
1Hz 10Hz 100Hz 1kHz 10kHz 100kHz 1MHz 10MHz 100MHz
FREQUENCY
Figure 5. This single-supply composite video output-port driver requires no DC-biasing or gain-setting resistors
and adding features (see Table 1). Figure 2. In a 20V to 3.3V buck converter,
0.5µs/DIV switching noise couples to the error amplifier
The input supply operating range
Figure 1. Leading edge modulation output after the top gate (TG) turns on; this
is extended from a nominal 5V to the architecture PWM switching waveform would cause unpredictable switching in
entire 3V–30V range. The internal for VIN = 5V, VOUT = 3.3V traditional PWM converters.
reference voltage has decreased, al-
lowing the output to go as low as 4-phase converter. This pin also allows feedback architecture to provide
0.6V. An advanced modulation scheme external synchronization of the switch- exceptional regulation and transient
facilitates these low duty cycles and ing frequency from 330kHz–750kHz, response performance at each of its
fast switching frequencies. The two rather than a fixed 550kHz. Output two outputs. The 10MHz gain-band-
channels are still run 180° out of voltage tracking governs the 2 chan- width feedback op-amps permit loop
phase—effectively doubling the fre- nels’ output slew rate during power up crossover in excess of one-tenth the
quency of the switching pulses seen and power down, to comply with vari- switching frequency, whether that
by the input bypass capacitor and ous power sequencing requirements. frequency is externally synchronized
thereby lowering its RMS current and or running at the default 550kHz.
reducing its required value—but a new Leading Edge Modulation Large integrated gate drivers allow the
PLLIN pin extends these benefits by The LTC3802 uses a high switch- LTC3802 to control multiple MOSFETs
allowing two LTC3802s to control a ing frequency and precision voltage efficiently throughout its range of
switching frequencies.
A typical LTC3802 application down
Table 1. Comparison of the LTC3802 and the LTC1702/LTC1702A
converts a high input voltage source
to two low output voltage supplies
LTC3802 LTC1702/LTC1702A and requires the two channels to run
at low duty cycles. Such an applica-
VIN 3V–30V 3V–7V
tion presents several challenges to
Leading Edge Modulation a traditional PWM controller. First,
Switching
with Line Feedforward Trailing Edge Modulation the controller is forced to make a
Architecture
Compensation decision about pulse width after the
Reference 0.6V ±1% 0.8V ±1%
control switch (top MOSFET) turns
on. The turn-on of the control switch
330kHz–750kHz PLL No in the buck converter is the noisiest
Phase Lock Loop event in the whole switching cycle.
Free Run at 550kHz Free Run at 550kHz
The input supply current jumps from
Ratiometric or Coincident zero current to the loaded current,
Tracking Power Up and Power Down No causing ground bounce; the large
Tracking voltage swing at the inductor flying
Packages GN28 and QFN 32 GN24 node can further induce noise in the
controller. Either event can disrupt
CMPIN1
VOUT1 MUST BE HIGHER THAN VOUT2 TRACK
R11 = R41 = RT4 = R12 = R42 – +
RB1 = R51, RB2 = R52
FBT CMPIN2
10ms/DIV 10ms/DIV
Figure 5. Simplified tracking schematic and associated power-up and power-down waveforms for ratiometric and coincident tracking
+ 0.8V
TG
7µA
10V/DIV
VIN
–VE PGOOD – RUN/SS
RESET CSS
PWM OUTPUT RUN/SS
LATCH
2V/DIV
TG SET
100µA
INDUCTOR
CURRENT
SW 20A/DIV
–1
BG
5µs/DIV
+ + VIN = 12V, VOUT = 3.3V, CSS = 0.01µF,
HILM SILM RIMAX = 47k, L = 1µH (TOKO-FDA1254-1ROM)
÷5 IIMAX
voltages, even at extremely low duty
RIMAX
cycles.
The LTC3802’s current limit scheme
improves on that of the LTC1702A
Figure 7. Simplified LTC3802 current limit circuitry by employing a user-programmable
current limit level. It works by sens-
FBT to be at the same potential as nominal. Figures 6b and 6c show the ing the VDS drop across the bottom
CMPIN2. Setting RT5 = R51 creates output waveforms with ratiometric MOSFET when it is on and comparing
the ratiometric startup, and setting and coincident tracking. Figure 6b that voltage to a programmed voltage
RT5 = R52 produces the coincident shows that for ratiometric tracking, at IMAX.
start-up. The tracking function can if either output is current limited, the The IMAX pin includes a trimmed
be easily disabled by disconnecting other output is pulled low such that 10μA current, enabling the user to
the FBT resistive divider and shorting both outputs maintain their voltage set the IMAX voltage with a single re-
FBT to CMPIN2. ratio. On the other hand, for the coin- sistor, RIMAX, to ground. The current
To have the proper power-down cident Tracking configuration shown comparator reference input is equal to
sequence, ground the PHASEMD pin. in Figure 6c, both channels have the VIMAX divided by 5 (see Figure 7). The
This turns on an internal current same output voltages even if only one current comparator begins limiting
source that slowly discharges the channel is current limited. the output current when the voltage
soft-start capacitor. Once the RUN/ across the bottom MOSFET is larger
SS potential is low enough to control Current Limit than its reference. The current limit
the duty cycle, the tracking amplifier The LTC3802 bottom MOSFET cur- detector is connected to an internal
takes control and servos the tracking rent sensing architecture not only 100μA current source.
feedback loop to produce the selected eliminates the external current sense Once current limit occurs, this
output ramp. Note that in this tracking resistors and the corresponding power current source begins to discharge
scheme, there is no master and slave losses in the high current paths, but the soft-start capacitor at RUN/SS,
assignment; if either output goes low, also allows a wide range of output continued on page 11
the other channel’s output follows.
Figure 5 includes the ratiometric and
coincident tracking waveforms with
10Ω loads.
Figures 6a to 6c show the power up
and power down waveforms with one
of the channels current limited. Figure
6a shows that when FBT is shorted
to CMPIN2, the tracking function is
disabled. The first waveform shows
that when channel 1 is current limited,
channel 2’s output potential is lowered
due to the lower RUN/SS voltage (both
channels share the same RUN/SS pin).
The second photo shows that when
channel 2 is current limited, channel TOP BOTTOM
1’s 3.3V output voltage is lower than Figure 9. An 87W, LTC3802 application circuit occupies less than 6in2
Introduction
Switching DC/DC power supplies Table 1. LTC3736-1’s Switching Frequency
are increasingly popular in modern
electronic devices because of their SSDIS pin FREQ pin Switching Frequency
high efficiency, which reduces heat
dissipation and increases battery run GND Filter Capacitor (e.g., 2200pF)
Spread Spectrum
time. Nevertheless, the rapid switch- (450kHz to 580kHz)
ing of current makes them a potential VIN Floating Constant 550kHz
source of radiated and conducted
electromagnetic interference (EMI). VIN VIN Constant 750kHz
EMI can cause a variety of problems, VIN GND Constant 300kHz
from the relatively benign addition of
noise to a television picture or radio
receiver to the more serious impair- techniques to significantly reduce EMI, frequency of operation (fundamental)
ment of the operation of electronic but few are as simple as using Spread and at the multiples of the operating
devices in critical applications. Spectrum Frequency Modulation frequency (harmonics).
Unfortunately, the amount of EMI (SSFM) in the clocking of a switching One way to knock down the ampli-
generated, and whether it will pro- power supply. tude of the fundamental and harmonic
duce significant interference, is not Switching regulators operate on a noise components is to spread the
easily quantifiable and is often not cycle-by-cycle basis to transfer power operating frequency around. If the
known until the late stages of the to an output. In most cases, the fre- frequency of the switcher is modulated
development. Therefore, it is wise to quency of operation is either fixed or is using spread spectrum frequency
proactively minimize the potential a constant based on the output load. modulation, the energy of the EMI is
sources of EMI to save troubleshoot- This method of conversion creates high spread over many frequencies, instead
ing time later on. There are many amplitude noise components at the of concentrated at one frequency and
68pF
RFB1A RFB1B
59k 187k
CITH1A
L1
47pF
MP1 1.5µH VOUT1
22 21
SW1 SENSE1+ 2.5V
CITH1 23 20 5A
IPRG1 PGND
470pF RITH1 24 19 MN1
22k VFB1 BG1
1 18 Si7540DP COUT1
ITH1 SSDIS
2 17 100µF
IPRG2 TG1
3 16
FREQ PGND
VIN 2200pF 220pF 4 15
SGND TG2
2.75V TO 8V RVIN 10Ω
5 14
CIN VIN RUN/SS
22µF LTC3736EUF-1 13 MN2 COUT2
100k BG2 100µF
CITH2 9 12 Si7540DP
CVIN 470pF PGOOD PGND VOUT2
7 11
1µF VFB2 SENSE2+ 1.8V
8 MP2 5A
ITH2 L2
RITH2 6 10 1.5µH
TRACK SW2
22k
PGND
CSS 25
10nF CITH2A
47pF
Figure 1. 3.3V to 2.5V and 1.8V dual DC/DC converter with spread spectrum frequency modulation (SSFM).
The circuit uses only ceramic capacitors and requires no current sense resistors or Schottky diodes.
EFFICIENCY (%)
60
10mV/DIV ter—the duty cycle is constant. In other VOUT = 2.5V
50
words, there is no duty cycle jitter or SSFM DISABLED
40
SSFM
ENABLED
sub-harmonic instability with SSFM
30
enabled on the LTC3736-1.
20
Figure 5 compares the efficiency of
10
10µs/DIV
the circuit in Figure 1 with and without
0
SSFM enabled. Figure 6 shows load 0 10 100 1k 10k
Figure 4. Output voltage ripple for 1.8V output
using “envelope” oscilloscope function
step transients and Figure 7 shows LOAD CURRENT (mA)
tracking startup waveforms with SSFM Figure 5. Efficiency for circuit of Figure 1.
Figure 4 shows the output voltage enabled. In all cases, the behavior of There is little difference with SSFM enabled
ripple for the circuit of Figure 1 with the LTC3736-1 is unaffected by the
and without SSFM enabled. Note that addition of SSFM. an internal spread spectrum oscillator
since SSFM is constantly changing the that randomly varies the control-
LTC3736-1 switching frequency, it is Conclusion lers’ switching frequency, providing
difficult to show the true behavior of The LTC3736-1 is an easy-to-use a simple solution to reduce power-
SSFM using a still oscilloscope snap- dual synchronous switching DC/DC supply-induced EMI that otherwise
shot—a video would be much more controller that requires few external might require significant and costly
informative. components. Additionally, it features troubleshooting and redesign.
Nonetheless, the scope traces in
Figure 4 have been acquired using VOUT1 =
2.5V
the “envelope” oscilloscope function, AC-COUPLED
VOUT =1.8V
Figure 2. Wide frequency response flow-through layout arrangement Figure 3. Fast pulse response
of circuit in Figure 1 using a compact SSOP-16 package. of circuit in Figure 1
370
46k V+
1k 150
EN IN 370
OUT
V–
DGND
V– V–
The on-chip feedback resistors set All three CFAs have a bias control within 1.3V above the DGND pin.
the closed-loop gain to unity or two, section with a power-down command The typical on-state supply current of
depending on the part. The nominal input. The shutdown function includes 8mA per amplifier provides for ample
feedback resistances are chosen to internal pull-up resistance to provide a cable-drive capacity and ultra-fast
optimize the frequency response for default disable command, which when slew rate performance of 2.5V per
maximal flatness under the antici- invoked, reduces power consumption nanosecond!
pated loading conditions. The LT6553 to less than 100µA for an entire three-
is intended to drive back-terminated channel part. During shutdown mode MUXing Without Switches
50Ω or 75Ω cables (for effective load- the amplifier outputs become high RGB and YPbPr video signals are com-
ing of 100Ω to 150Ω respectively), impedance, though in the case of the monly multiplexed (selections made
while the LT6554 is useful for driving LT6553, the feedback resistor string on an occasional basis) to reduce I/O
ADCs or other high impedance loads to AGND is still present. The parts connector count or otherwise re-use
(characterized with 1kΩ as a reference come into full-power operation when various high-value video signal-
loading condition). the enable input voltage is brought processing sections when selecting
various modes of operation in the
3.3V
end use of the product. This has often
been accomplished with the use of FET
NC7SZ14
1
LT6554
16 switches and buffer amps to route
2 15 the various video channel signals,
R1
3
×1
14 but can alternatively be performed by
4 13 use of the power-down functionality
5 12 included in the LT6553 and LT6554.
G1 ×1
6 11 Figure 5 shows an example circuit
7 10
using LT6554 units cross-controlled
B1
8
×1
9
to allow a single video path to be
75Ω 75Ω 75Ω enabled at any particular time. This
ROUT might be the situation at the input
GOUT
side of a video display or AV receiver
1 16 continued on page 36
SEL LT6554
BOUT
2 15 VIN VOUT = –3V
3V TO 5.5V VIN VOUT
IOUT = UP TO 100mA
3 14 CIN
R0 ×1 LTC1983-3 COUT
10µF
4 13 10µF
OFF ON SHDN GND
5 12
G0 ×1
C+ C–
6 11
7 10
B0 ×1
8 9 CFLY
75Ω 75Ω 75Ω NOTE:
1µF
POWER SUPPLY BYPASS
CAPACITORS NOT SHOWN FOR CLARITY CFLY: TAIYO YUDEN LMK212BJ105
CIN, COUT: TAIYO YUDEN JMK316BJ106ML
–3.3V
Figure 6. Generating a local –3V
Figure 5. Video input multiplexer using LT6554 shutdown feature supply with 4 tiny components
Introduction (see “Versatile Power Supply Tracking monolithic LDOs with the LTC2923 is
The LTC2923 provides simple and without MOSFETs” from Linear Tech- generally very simple:
versatile control over the power-up nology Magazine, February, 2004 ) but ❑ The LTC3020 is a 100mA low
and power-down behavior of switching it is easily adapted to linear regulators, dropout regulator (LDO) that op-
power supplies. It allows several sup- including popular low-dropout (LDO) erates with input supply voltages
plies to track the voltage of a master types. Summarized here are several between 1V and 10V. Since its
supply, so that their relative voltages techniques for controlling linear regu- ADJ pin behaves like the feed-
meet the stringent specifications for lators with the LTC2923. back pin on most switching regu-
the power up of modern digital lators, tracking the LTC3020’s
semiconductors, such as DSPs, mi- Monolithic Regulators output using the LTC2923 is
croprocessors, FPGAs and ASICs. The Table 1 lists three popular monolithic simple. The standard circuits and
LTC2923 is specifically designed to linear regulators that have been tested design procedures shown in the
work with switching power supplies with the LTC2923. Using these three LTC2923 data sheet require no
modification when used with the
Table 1. New monolithic linear regulators LTC3020 (Figures 1 and 2).
❑ The LTC3025 is a 300mA mono-
Regulator IOUT(MAX) (V) VIN(MIN) (V) VIN(MAX) (V) VDROPOUT (V) lithic CMOS LDO that regulates
LT3020 100mA 0.9 10 0.15 input supplies between 0.9V and
5.5V, while a bias supply be-
LTC1844 150mA 1.6 6.5 0.11 tween 2.5V and 5.5V powers the
LTC3025 300mA 0.9 5.5 0.045 part. Similar to the LT3020, the
LTC3025’s ADJ pin is operation-
ally identical to common switch-
3.3V IN OUT VOUT = 2.5V
2.2µF
ers. For that reason, the LTC3025
LT3020-ADJ 232k 2.2µF
3.3V combined with an LTC2923
0.1µF CGATE
0.1µF
SHDN ADJ provides a simple supply track-
GND 20k ing solution for loads less than
VCC GATE RAMP 300mA (Figures 1 and 2).
OFF ON ON FB1
❑ The LTC1844 CMOS LDO drives
LTC2923 3.3V IN OUT VOUT = 1.5V
1µF loads up to 150mA with input
1µF
RAMPBUF
BIAS LTC3025
LTC3025 107k supply voltages between 1.6V and
232k
SDO SHDN ADJ 6.5V. When used in conjunction
TRACK1
107k
GND
39.2k with the LTC2923, a feedforward
107k
TRACK2 FB2 capacitor should be included as
124k GND described in the “Adjustable Op-
eration” section of the LTC1844
Figure 1. An LTC2923 causes the outputs of the LT3020 data sheet. Otherwise, no special
and LTC3025 to track during power-up and power-down. considerations are necessary.
LT1761
3.3V MASTER
2.5V LT1761 OUT GND ADJ VOUT
LT1761 HOLDS 1V/DIV R2
AT 1V
xxLTC2923
FBx
R1
Table 1. LT6650 Performance (Ta = 25°C, VIN = 5V, VOUT = 400mV, CL = 1µF, unless otherwise noted)
VOUT = 1.4V
Dropout Voltage IOUT = 0µA 75 100 mV
IOUT = 200µA sourcing 250 mV
Q18 Q20
Figure 2 shows the simplified sche- R1 R2
matic of the reference. Transistors IN IN 5 OUT
Q1–Q7 form the band-gap-derived R3 R4 I1 I2
400mV reference that is fed to the R5
Q13 Q21
non-inverting input of the error ampli-
fier formed by Q8–Q12. The resistors Q8 Q9 Q14 R8 IN
are driven by Q13–Q19. Resistors Figure 2. LT6650 simplified schematic showing detail of low-dropout topology
R5–R8 and the I2 current generator
establish the gain and quiescent op- with impedance over about 50Ω. The be reduced to where the 1.2nA typi-
erating current of the output stage. output is adjustable from 0.4V up to cal IBIAS becomes relatively significant
In conjunction with the minimum the battery supply by selecting two loading, the relationship between the
recommended output capacitance of feedback resistors (or setting a trimmer resistors then becomes:
1µF, stabilization is assured through potentiometer position) to configure VOUT – 0.4
RF = RG •
Miller compensation inside error am-
plifier Q8–Q12. Pins are ESD protected
the non-inverting gain of the internal
operational amplifier. A feedback (
0.4 – IBIAS • RG )
by diodes D1–D3. resistor RF is connected between the The minimum allowable gain resis-
OUT pin and the FB pin and a gain tor value is 2kΩ established by the
Applications resistor RG is connected from the FB 400mV FB pin voltage divided by the
pin to GND. The resistor values are maximum guaranteed 200µA output
Battery Powered Pocket Reference related to the output voltage by the current sourcing capability. In applica-
The unique pocket reference shown following relationship: tions that scale the reference voltage,
in Figure 3 can operate for years on RF = 2.5 • (VOUT – 0.4) • RG intrinsic noise is amplified along with
a pair of AAA alkaline cells or a single the DC level. To minimize noise ampli-
Lithium coin-cell, as the circuit draws The worst-case FB pin bias current fication, a 1nF feedback capacitor (CN)
just 10µA supply current. An input (IBIAS) can be neglected with an RG as shown in Figure 3 is recommended.
capacitor of 1µF as shown should be of 100kΩ or less. In ultra-low-power Any net load capacitance of 1µF or
used when the LT6650 is operated applications where current in the higher assures amplifier stability.
from small batteries or other sources voltage programming resistors might
Automotive Reference
VOUT = 0.4V • (1 + RF/RG)
VIN
VOUT In the presence of high supply noise,
4 5
RF
1V such as in automotive applications or
CN
CIN
IN OUT
1 1nF
150k
CL DC-DC converters, an RC filter can
LT6650 FB
1F
RG
1µF be used on the VIN input as shown
GND
2
100k in Figure 4. Due to the exceptionally
low supply current of the LT6650, the
input resistor (RIN) of this filter can be
Figure 3. Battery powered pocket voltage reference runs for years on a coin cell. 1kΩ or higher, depending on the differ-
ence in VIN and VOUT. Figure 5 shows
RIN
VOUT = 0.4V • (1 + RF/RG)
supply rejection better than 30dB
1k VIN
VS VOUT over a wide frequency spectrum, for a
4 5
RF
minimum sourcing output current of
IN OUT CN
CIN 1 1nF CL 40µA and an input filter comprising
LT6650 FB 1µF
1µF
GND
RIN = 1kΩ and CIN = 1µF. If even higher
RG
2 rejection is necessary, the input filter
structure presented in Figure 6 effec-
tively eliminates any supply transients
Figure 4. Simple input network for improved supply rejection continued on page 24
Feature Benefits
Wide Input Voltage Range: Operates q Suitable for 12V, 24V and 48V systems
from inputs of 8.5V to 80V, with 100V q Simplifies design because part functions on a semi-regulated supply.
absolute maximum
q Large overvoltage transient range eases design tolerances for transient protection.
8-Bit ADC: ADC monitors current, q Increases reliability.
output voltage and external pin voltage q Board power information provides an early warning of board failure.
and measures off-state current in the
FET to determine FET failures q Verify board is staying within its alloted power
q Allows integrity check of redundant supply paths
I2C/SMBus: Communicates as a read- q Improves integration with the host system. Interface allows the host to configure
write slave device using a 2-wire serial the part, determine which faults are present or have occurred, and read back ADC
interface. measurements
Fast Short Circuit Response: Fast q Protects connector from overcurrent.
(<1µs) current limit response to shorts q Limits the short circuit caused glitch on the input supply.
Alerts Host after Faults: When q Interrupting the host for immediate fault servicing limits system damage.
configured (using I2C), faults activate
an active pull-down on the ALERT pin
CONNECTOR 1
6.8nF
1.74k
4 2 1 24 23
UV VDD SENSE GATE SOURCE
R3 5 18
OV FB
2.67k 7 13
ON ADIN
9 20
SDAI LTC4260GN GPIO
10
SDA SDAO 14
8 BD_PRST
SCL SCL 12
11 TIMER
ALERT ALERT CT
INTVCC ADR0 ADR1 ADR2 GND
68nF
19 15 16 17 6
GND
C3 NC
*DIODES, INC
BACKPLANE PLUG-IN 0.1µF
CARD
Figure 2. This 3A, 48V Hot Swap application resides on the plug-in card.
0.01Ω FDB3632
VIN VOUT
48V 48V
SMAT70B
43.5k
49.9k
10Ω
100k
NC
0.1µF
BACKPLANE PLUG-IN
CARD
Figure 4. This 3A, 48V Hot Swap application resides on the backplane or motherboard
60
limits the time the part is in active line and releases ALERT.
50 current limit. While the LTC4260 is
Collecting Fault
40
Information Aids Diagnosis
30 VOUT
After a board fault occurs, diagnosing
50V/DIV the problem is simplified by checking
20
IOUT
the LTC4260’s onboard fault informa-
5A/DIV tion. The fault and status registers
10
contain a record if faults are present
0
∆VGATE
10V/DIV
or have occurred and can be accessed
0 0.5 1 1.5 2 2.5
FB VOLTAGE (V)
3 3.5 4 through the I2C interface.
TIMER
2V/DIV Three major faults can turn off
Figure 6. To protect against excessive power the pass transistor: overcurrent,
dissipation in the switch, the current limit
folds back or drops as a linear function of the
100µs/DIV undervoltage and overvoltage. An
output voltage, which is sensed at the FB pin. Figure 7. Short circuit waveforms continued on page 38
IOUT(MAX) (A)
voltages. The challenge, of course, 0.9
logic circuits, while many components VIN (V) Figure 2. Fast transient response
require a higher supply voltage. The Figure 1. High current outputs are attainable to load step of 250mA to 500mA
with minimum 2A switch limit.
LTC3426 boost converter meets the
challenge with converter-shrinking The Shutdown input can be driven
features, including a low RDS(ON) mono- a minimum peak current level of 2A, with standard CMOS logic above either
lithic switch, internal compensation the LTC3426 delivers up to 900mA of VIN or VOUT (up to 6V maximum). Qui-
and a 3mm × 3mm × 1mm ThinSOT output current. Figure 1 shows the escent current in shutdown is less than
package. The LTC3426 operates at converters output current capability 1µA. A simple resistive pull-up to VIN
high frequency and therefore works at 5V as a function of VIN with peak configures the LTC3426 for continu-
with small, low cost inductors and inductor current at 2A. An input sup- ous operation when VIN is present.
tiny ceramic capacitors. ply range of 1.6V to 4.3V makes the
The LTC3426 incorporates a LTC3426 ideal for local supplies rang- 3.3V Output
constant frequency current mode ing from 2.5V to 5V. Efficiencies above 800mA Converter
architecture, which is low noise and 90% are made possible by its low 0.11Ω Some applications require local 3.3V
provides fast transient response. With (typ.) RDS(ON) internal switch. supplies which are utilized periodically
There is no need for an external yet are required to deliver high cur-
compensation network because the rents. The LTC3426 is an ideal solution
DESIGN IDEAS LTC3426 has a built-in loop com- which requires minimal board space
1.2MHz, 2A, Monolithic Boost pensation network. This reduces and, when in shutdown, draws less
Regulator Delivers High Power size, lowers overall cost and greatly than 1µA quiescent current. Figure 3
in Small Spaces........................... 22 simplifies the design process. Figure 2 shows a circuit which delivers up to
Kevin Ohlson
shows the VOUT response to a 250mA- 800mA at 3.3V from a 2.5V input.
3-Phase Buck Controller for to-500mA load step in a 1.8V to 3.3V This circuit also works with VIN down
Intel VRM9/VRM10 with
Active Voltage Positioning ........... 23 application. to 1.8V with 750mA output. The out-
by Xiaoyong Zhang put voltage is easily programmed by
Redundant 2-Wire Bus for
L1
2.5µH D1 changing the feedback ratio of R1 and
High Reliability Systems ............. 25 VIN
2.5V
R2 according to the formula:
John Ziegler
R1
–48V Backplane Impedance
SW
VOUT VOUT = 1.22V • 1 +
VIN VOUT 3.3V R2
Analyzer Takes the Guesswork Out C1 R1 800mA
of Sizing Clippers and Snubbers .. 27 10µF LTC3426 75k
1% C2
Mitchell Lee OFF ON SHDN
GND
FB
R2
22µF Lithium-Ion 5V
Compact Power Supply Drives 44.2k
Boost Converter
TFT-LCD and LED Backlight ......... 31 1%
Dongyan Zhou Some portable applications still re-
C1: TDK C1608X5R0J106
C2: TAIYO YUDEN JMK316BJ266 quire a 5V supply. Figure 4 shows a
Tiny, Low Noise Boost and D1: ON SEMICONDUCTOR MBRM120LT3
Inverter Solutions ........................ 33 L1: SUMIDA CDRH5D28-2R5 2 circuit which operates from a single
Eric Young Figure 3. Application circuit for Lithium-Ion battery and delivers at
3.3V output delivers 800mA continued on page 32
VCC
5V
47k
PGOOD 1Ω D1
VID2 IN VID0 IN
VCC ON/OFF VID1 IN VID5 IN
Figure 1. This 3-phase power supply manages the thermal problems inherent in high current Intel VRM10 applications.
100
CL = 10µF CL = 1µF
biasing resistor RB is connected from
CL = 47µF RB
CATHODE CATHODE VS
10 4 5 1nF
RF
=
IN OUT
1 1.4V VZ 18V
LT6650 FB 10µF
30µA IZ 220µA
GND VZ = 0.4V • (1 + RF/RG)
1 RG
10 100 1k 10k 100k 2
ANODE ANODE –VS
FREQUENCY (Hz)
RB
Figure 7. Output impedance is reduced while
sourcing moderate current (40µA). Figure 8. Create you own adjustable micropower “zener” 2-terminal reference.
Introduction is connected to its own 2-wire bus, In this configuration, each master
The effort to achieve high reliability while all of the slaves are connected to can take control of the downstream
in data processing, data storage and a single downstream redundant bus. redundant bus with two Write Byte op-
communication systems has neces- Either master can take control of the erations to its dedicated LTC4302. In
sitated the use of circuitry to monitor redundant bus at any time. the first operation, the master activates
parameters such as temperature, fan Figure 1 shows a circuit using the connection to the downstream
speed, and system voltages. These two LTC4302’s, each dedicated to a redundant bus, and writes both of its
circuits often communicate through master, to allow either master to take GPIO pins low. With the GPIO1 pin
2-wire serial buses, such as SMBus control of a redundant 2-wire bus. low, the other master is disconnected
or I2C. Redundant subsystems are The LTC4302’s GPIO pins default to from the redundant bus and is also
important in high reliability systems, a high impedance state at power-up, prevented from communicating with
and the 2-wire bus subsystem is so that 10K pull-up resistors R5, R6 its LTC4302. In the second operation,
no exception. High reliability 2-wire and R13 set each GPIO voltage high. the master writes a logic high to its
bus systems incorporate two master With each LTC4302’s GPIO1 pin con- GPIO1 pin, so that the other master
controllers in a redundant configura- nected to the CONN pin of the other, is again free to communicate with its
tion, to maintain system operation if both LTC4302’s are active at power-up LTC4302. Using this technique, the
one master fails or is removed. In a and can be accessed via their SDAIN common GPIO2 pin is low whenever
redundant configuration, each master and SCLIN pins. one of the masters is connected to the
VCC
2.7V TO 5.5V
C1
R1 R2 R3 0.01µF R5 R6 R7 R8
10k 10k 8660Ω 10k 10k 10k 10k
VCC
BUS 0 LTC4302-1
SDA_BUS0 SDAIN SDAOUT SDA
SCL_BUS0 SCLIN SCLOUT SCL
REDUNDANT
CONN
BUS
ADDRESS GPIO2
MASTER 0
GND GPIO1
R4
137Ω X1
ADDRESS = 1100 000
N1
OPTIONAL
EXTERNAL
HARDWARE
RESET
CIRCUIT
N2
C2
R9 R10 R11 0.01µF R13
10k 10k 2800Ω 10k
VCC
BUS 1 LTC4302-1
SDA_BUS1 SDAIN SDAOUT
SCL_BUS1 SCLIN SCLOUT
CONN
ADDRESS GPIO2
MASTER 1
GND GPIO1
R12
137Ω X2
ADDRESS = 1100 001
Figure 1. Two LTC4302s in a redundant bus application, with a hardware reset on the CONN pins
C1
R1 R2 R3 0.01µF R5 R6 R7 R8
10k 10k 8660Ω 10k 10k 10k 10k
VCC
BUS 0 LTC4302-1
SDA_BUS0 SDAIN SDAOUT SDA
SCL_BUS0 SCLIN SCLOUT SCL
CONN REDUNDANT
BUS
ADDRESS GPIO2
MASTER 0
R4 GND GPIO1
137Ω X1
ADDRESS = 1100 000
½ CD74AC00
R9
33k
C2
100pF
C2
R10 R11 R12 0.01µF R14
10k 10k 2800Ω 10k
VCC
BUS 1 LTC4302-1
SDA_BUS1 SDAIN SDAOUT
SCL_BUS1 SCLIN SCLOUT
CONN
ADDRESS GPIO2 ½ CD74AC00
MASTER 1
GND GPIO1
R13
137Ω X2 R15
33k
ADDRESS = 1100 001
C4
100pF
Figure 2. Alternate implementation of two LTC4302s in a redundant bus application, with lock-up prevention circuitry.
redundant bus, so that each master control of the redundant bus, and the to the redundant bus and also to
can read its LTC4302 to determine other master cannot access its own force logic lows on both of its GPIO
whether the other master has control LTC4302 because its CONN pin is pins. When its GPIO1 pin transitions
of the redundant bus. low. If the new master is removed from high-to-low, the circuit formed by R9,
Either master can take control the system, or if its 2-wire bus locks C2 and the two two-input NAND gates
of the redundant bus at any time up before it can complete the second generates a negative pulse on the other
except under two conditions. First, if write operation to write a logic high to LTC4302’s CONN pin. The duration of
a master tries to access its LTC4302 its GPIO1 pin, then the other master the pulse is set by the R9 • C2 time
and receives no Acknowledge signal, it is permanently prevented from taking constant and is roughly 3.3µs. Puls-
knows that the other master has com- control of the redundant bus through ing CONN low resets the registers of
pleted the first Write Byte operation, the 2-wire interface. An externally the LTC4302 to their default states,
but has not yet re-written its GPIO1 controlled pull-down device would thereby disconnecting Master 1 from
pin back high. Second, if both masters have to be used to pull the CONN pin the redundant bus. After 1µs, Master
try to connect to the redundant bus of the new master low, as shown by 1’s CONN pin returns high, and Master
within 100ns of each other, both are N-Channel MOSFET transistors N1 1 is again free to take control of the
connected to the bus temporarily, and and N2 in Figure 1. redundant bus.
are then disconnected. Figure 2 shows an alternative The LTC4302 also provides bi-
A disadvantage of this scheme is approach to solve this problem. directional buffering, keeping the
that two separate write operations are Each master can take control of the capacitances of the master buses and
required for a master to take control redundant bus using a single Write the redundant bus isolated from each
of the downstream bus properly. After Byte operation. For example, Master other. Rise time accelerator circuitry
the first operation, the new master has 0 commands its LTC4302 to connect continued on page 32
–48V
RTN
R9 R10 R8
FUSE
10k 10k D3 C8 100
STATUS
1W 1W 3 MOC207 100nF
100V MOC207
RTN
1 4
VA OUT F
8 R7
8 VDD 51k
VB SUPPLY A 1 5%
R4 PWRGD
LTC1921 STATUS 549k
2 MOC207
1% LT4250L
FUSE A 3 7
UV DRAIN
R5 C2
7 5 6.49k 15nF
FUSE B OUT A
1% 2 6 100V
OV GATE R3
SUPPLY B R6 1k
STATUS VEE SENSE 5%
10k
MOC207 1% R2
6 4 5 C1
OUT B 470nF 10Ω
R11 C9 R1
25V 5%
47k 100nF 0.02Ω
3A D1
1/4W 5%
–48V A
3A Q1
D3: DIODES INC. SMAT70A IRF540
–48V B
D2 = DIODES INC. B3100
DC-DC CONVERTER
BRICK
1 9
VIN+ VOUT+ VIN+ VOUT+ 5V
8
SENSE+
2 7 + C7
C3 COMMON- C4 + C5 ON/OFF TRIM 100µF
0.1µF MODE FILTER 0.1µF 100µF C6 16V
100V BLOCK 100V 100V 0.1µF
D4 6
1N4003 100V SENSE–
4 – 5
VIN– VOUT– VIN VOUT–
CASE CASE
3
Figure 1. This 75W, –48V telecom supply monitor and Hot Swap controller includes a clamp (D3) to control
high voltage surges, and a snubber (R8-C8) to eliminate voltage ringing after transient events, like card
insertion. It is important to take the backplane impedance into account when sizing these components.
If the circuit breaker function of Figure 2. The before-and-after of adding clamping and snubbing to a hot swapped card, plugged
the LT4250 is invoked by a sustained into a –48V power distributed bus, under conditions of insertion and circuit breaker action.
overload, the inductance of the –48V
wiring is loaded with ½Li2, which –48V supply bus. Fortunately there of the oscillator comprises C1 and C2,
represents a potentially destructive is an easier risk-free way to get the with the tap at the junction of C1 and
energy. The energy is high enough to required information, using a simple C2 feeding the emitter of Q1. Coupling
drive something, usually the MOSFET, oscillator circuit where the unknown is set to accommodate inductances
into avalanche as shown by the flat- inductance resonates with a known down to ≈100nH. Base components
tened portion of the waveform. Once capacitance. In all but extreme cases provide bias and bypassing, while R3
the input current drops to zero, the this method gives results adequate and R4 establish an emitter current
remaining energy rings off in a manner for quantifying the inductance of the of approximately 11mA, operating
not dissimilar to the insertion phase –48V feed. the transistor in a region of favorable
of operation. frequency. Two resistors are utilized
Simple Test Oscillator in the emitter circuit to distribute dis-
After Figure 3 shows a test circuit that, with sipation and permit use of common
The addition of a clamping diode and the aid of a frequency meter2, can mea- quarter-watt units. A tiny, off-the-shelf
R-C snubber eliminates the afore- sure the inductance of the –48V supply current transformer couples signal
mentioned high voltage transients. line. The circuit is essentially a Colpitts to a 50Ω termination at a frequency
At insertion, ringing is eliminated and oscillator, where both the resonating counter.
overshoot controlled by the R8-C8 inductance and power are furnished Measurements are made by plug-
snubber of Figure 1. Input reaction by the –48V bus. The capacitive arm ging the test circuit into a –48V
during a circuit breaker event is
clamped to a safe level by D3, a tran- T1
MIDCOM 31027
COUNTER
OUTPUT
sient suppression diode. Subsequent –48V RTN
TO 50Ω
ring-off and attendant noise burst is R4
1.5k
C3 TERMINATION
100nF
again controlled by the snubber. 1/4W
To quantify the stored energy and C5
10nF
C4
100nF
R2
100k
R3
1.5k
to optimally size the snubber and 1/4W C2
10nF WIMA MKS2
clamping components, one must know
something about the magnitude of in- Q1 C1
2200pF
2N5400
ductance in the –48V feed. Measuring R1 5%
33k 300V SM
this impedance is problematic, given
the risk inherent in connecting a sen-
sitive, costly piece of test equipment –48V BATT
such as an HP4815A to a multi-kW Figure 3. Test oscillator for evaluating –48V driving point inductance
(RADIANS–2 • 10–15)
10
8 the selection of a clamp.
8
6
6
Conclusion
4 The test oscillator described here is
4
suitable for measuring backplane and
ω2
ω2
1
match the LED currents precisely if VOFF and VON switchers. A built-in PNP 0.7
two strings are used. separates the VON bias supply from its 0.6
All four regulators are synchronized boost regulator output. The PNP is not 0.5
to a 1MHz internal clock, allowing the turned on until the programmable de- 0.4
use of small, low cost inductors and lay set by the CT pin has elapsed. The 0.3
soft-start capability is available for low current state until VON is present. 0.1
both the primary TFT supply and LED This delay gives the column drivers 0
0 5 10 15 20
driver to control the inrush current. and the digital part of the LCD panel LED2 CURRENT (mA)
The LT1942 is available in a tiny 4mm time to get ready before the panel is Figure 2. Typical current matching
× 4mm QFN package. turned on. between LED1 and LED2
L1 M1
22µH D1
PMOS AVDD
VIN
5V
3V TO 4.2V C5 L3 22µH R1 R8 40mA
2.2µF 4.7pF
301k 1M
R5
C3 442k D3 SW3 VCC SW1 C1
0.22µF FB3 FB1 R2 4.7µF
VON 100k 20mA 20mA
16V R6 6.3V
10V PGND14
63.4k
2mA
PGND23 PGOOD C4
R4 4.7µF
C2 VOUT3 SW4 VIN
10k LT1942 L4 33µH 25V
0.22µF NFB2 D4
16V R3 0.1µF 16V
L5 47µH D2 LED1
VOFF 665k C6
–10V SW2 LED2
2mA L2 47µH
VIN SHDN FB4
CTRL4 AGND SS1 SS4 CT
SHUTDOWN
C7 C9 R7
LED CONTROL 0.1µF 0.1µF 4.99 C1 TO C9: X5R OR X7R
C8 D1: ZHCS400 ZETEX SEMICONDUCTOR
PGND14 0.1µF L1: 22µH MURATA LQH32CN220K53
PGND23 L3: 22µH TAIYO YUDEN LB2012T220M
L2, L5: 47µH TAIYO YUDEN LB2012T470M
L4: 33µH SUMIDA CDPH4D19-330MC
M1: Si2301BDS SILICONIX
Figure 1. TFT bias voltages and LED backlight power supply from single Lithium-Ion battery input
LTC3426, continued from page 22 Component Selection current should be greater than 1A.
least 750mA from a VIN as low as 3V. The LTC3426 requires just a few exter- A low forward voltage Schottky diode
When fully charged to 4.2V, over 1A nal components to accomodate various reduces power loss in the converter
can be supplied. The photograph of VIN and VOUT combinations. Selecting circuit.
a demonstration board in Figure 5 the proper inductor is important to
shows just how small the board area optimize converter performance and Conclusion
is for this application, 10mm × 12mm. efficiency. An inductor with low DCR The addition of the LTC3426 to Linear
Tiny ceramic bypass capacitors and increases efficiency and reduces self- Technology’s high performance boost
surface mount inductors keep the heating. Since the inductor conducts converter family allows the designer
design small. the DC output current plus half the to deliver high current levels with
Figure 6 shows efficiency exceeding peak-to-peak switching current, select minimal board space. An on chip
90% and remaining greater than 85% an inductor with a minimum DC rat- switch and internal loop compensation
over a load range from 10mA to 900mA ing of 2A. To minimize VOUT ripple, reduces component count to provide
with a fully charged battery. use low ESR X5R ceramic capacitors. an inexpensive solution for spot regu-
The average Schottky diode forward lation applications.
current is equal to the DC output
current therefore the diode average 100
95
L1
2.2µH D1 90 VIN = 4.2V
VIN
3V TO 4.2V 85
EFFICIENCY (%)
SW 80
VOUT VIN = 3V
VIN VOUT 5V 75
C1 R1 750mA AT 3V
LTC3426 95.3k 70
10µF
1% C2 65
OFF ON SHDN FB
22µF
R2 60
GND 30.9k
1% 55
50
C1: TDK C1608X5R0J475M 1 10 100 1000
C2: TAIYO YUDEN JMK316BJ226ML
D1: ON SEMICONDUCTOR MBR120VLSFT1 LOAD CURRENT (mA)
Figure 5. Photograph of demo
L1: SUMIDA CDRH4D28-2R2 2 Figure 6. Up to 92% efficiency in Lithium-Ion
board of circuit in Figure
Figure 4. Compact application circuit for VOUT at 5V 4—board area is 10mm × 12mm battery to 5V output applications
Introduction L1
C2
2.2µF
L2
VIN 10µH 10µH
The LT3461 and LT3461A are cur- 2.7V
rent mode boost converters which TO 4.2V
making these parts ideal for compact Figure 1. Low profile, 3.3V to –8V, 30mA inverting converter in 50mm2
display or imaging applications.
Everything about these devices fo-
cuses on squeezing high performance –18mA VSW
IOUT 5V/DIV
into the smallest spaces. The ‘A’ parts –30mA
operate at high frequency—LT3461A
boost switches at 3MHz; the LT3462A
inverter at 2.7MHz—which allows the VOUT
VOUT
use of tiny, low profile components. For 20mV/DIV
2mV/DIV
EFFICIENCY (%)
VIN = 3.3V
The 3MHz switching frequency of the
70
VIN = 2.7V
LT3461A also allows the use of tiny,
VOUT low profile components. Figure 4
50mV/DIV
65 shows a circuit that produces a well
regulated 15V supply for CCD bias
25µs/DIV
applications at up to 30mA from 3.3V
60
0 10 20 30 40 using as little as 50mm2 of board area.
Figure 5. The transient response of the 3.3V-
to-15V converter showing less than 120mV
LOAD CURRENT (mA)
All components in this design are also
total deviation with a 50% load step Figure 6. Efficiency of the less than 1mm in height.
3.3V to 15V converter
This circuit uses a low profile
2.2µF ceramic output capacitor for
3.3V using as little as 50mm2 of board impact on output power capability, and well-damped half load step transient
area. All components in this design minimal impact on efficiency. response (Figure 5). The output voltage
are less than 1mm in height. The –8V converter circuit also uses remains well within 1% of the nominal
Board area and profile are usually small (0805) low profile ceramic ca- value during these transient steps. The
dominated by the inductor, which is pacitors for the input, output and flying choice of capacitor also impacts output
usually the tallest component in the capacitors. An oscilloscope trace of the voltage ripple. The output ripple of the
regulator and can occupy more area half load step on the output (Figure 2) circuit in Figure 4 at full load of 30mA
than the IC. Converters designed with shows these capacitors are sufficient is 10mVP-P, or less than 0.07% of the
the LT3462A do not have this limita- to provide a well-damped transient nominal 15V output.
tion because the LT3462A works well response. The output voltage remains Figure 6 shows that efficiency is
with tiny, low profile inductors such within 0.25% of the nominal value better than 70% over a wide range of
as the Murata LQH2 series—with little during the transient steps. Figure 3 supply voltages and load currents.
80
L1
33µH
VIN VIN = 4.2V
3.3V 75
1
SW
EFFICIENCY (%)
6 5 VOUT
C2 VIN VOUT VIN = 3.3V
25V
1µF LT3461A 576k 70
22pF VIN = 2.7V
4 3
OFF ON SHDN FB
GND C2
2 30.1k 2.2µF 65
SW D 22pF
C1 VIN FB VIN = 2.8V
1µF 70
LT3462 C3
31.6k
2.2µF
SDREF
GND 65
33pF
dropout regulators. These devices gate down to about 2.6V, low-threshold 1.5V
LT1006
R1
drive external N-channel MOSFET FETs may not allow the output to fall R –
pass devices for high current/high below a few hundred millivolts. This is
power applications. The LTC3150 acceptable for most applications. LTC2923
FBx
R
Table 3. Drivers for external, high current pass devices
Regulator IOUT(MAX) (V) VIN(MIN) (V) VIN(MAX) (V) VDROPOUT (V) Figure 6. Using an op amp with the LT1963-1.5
allows lower output voltages and removes error
LT3150 10A* 1.4 10 0.13 due to the SENSE pin current.
1M 100k
2
–
RS 6
VOUT
– + 3 1M For RS = 1mΩ:
+ VOUT = 0.5V for IL = 100A
IL VREF = 1.5V
VOUT = 1.5V for IL = 0A
4
VOUT = 2.5V for IL = –100A
10k 5
IN OUT 54.9k 1nF
LT6650 40k 900k
GND FB 40k 100k
20k
–12V VCM 73V
VOUT = VREF ± (10 • IL • RS) 1
1µF
LT6553/4, continued from page 13 is (V+ – V–) – 3.8V. This means a total operation. DC743A includes biasing
that requires selecting between a set supply of about 6V is required for the and AC-coupling components with
of RGB or component video sources. output to swing 2VP–P, as when driving the LT6553 in a single supply con-
A similar circuit using LT6553s pro- cables. For best dynamic range along figuration. DC794A is identical to
vides a means of output selection as with reasonable power consumption, a the DC714A except it has the LT6554
might be the case in a video recorder good choice of supplies would be ±3V installed. All three of these demo
where switching between live feed and for the LT6554 and 5V/–3V for the circuits have high-quality 75Ω BNC
playback would be needed. LT6553. Since many systems today connections for best performance
lack a negative supply rail, a small and include a calibration trace to al-
Operating With the LTC1983-3 solution can be used to low connector effects to be removed
Right Power Supplies generate a simple –3V rail for local use, from network analyzer sweeps of the
The LT6553 and LT6554 require a as shown in Figure 6. The LTC1983- amplifier under evaluation. The demo
total power supply of at least 4.5V, but 3 solution is more cost effective and circuits also illustrate high-frequency
depending on the input and output performs better than AC-coupling layout practices that are important to
swings required, may need more to techniques that might otherwise be realizing the most performance from
avoid clipping the signal. The LT6554, employed. these super-fast parts.
having unity gain, makes the analysis
simple—the output swing is about Demo Circuits Available
(V+ – V-) – 2.5V and only governed by Demonstration boards that use the
for
the output saturation voltages. This LT6553 and LT6554 are available to the latest information
on LTC products,
means a total supply of 5V is adequate simplify evaluation of these parts. To visit
for standard video (1VP–P). For the evaluate the LT6553 ask for DC714A www.linear.com
LTC4260, continued from page 21 current is flowing in the sense resistor The fault register is cleared with any
undervoltage fault occurs when the when the pass transistor is turned off. of the following ways:
UV pin drops below 3.12V while an A FET short fault is reported if the data ❑ Writing zeroes into the fault regis-
overvoltage fault occurs when the OV converter measures a current sense ter bits using I2C bus
pin rises above 3.5V. Each of these voltage greater than or equal to 2mV ❑ An ON pin high to low transition
major faults has an auto-retry control when the FET is off. crossing the 1.235V threshold
bit. If a fault occurs and its auto-re- The Status register contains useful ❑ Writing a high-to-low transition in
try bit is set, then once the fault is information regarding the FET’s on or the FET on bit (control register)
removed, the LTC4260 turns on the off condition, all the major and minor ❑ UV pin brought below 1.235V
pass transistor. Otherwise the part is fault present conditions and the logic ❑ VDD brought below 7.45V
latched off until the fault register is level of the GPIO pin. The Fault register ❑ INTVCC brought below 3.8V
cleared. can be regarded as a running log of ❑ BD_PRST high-to-low transition
There are three minor faults re- past faults. crossing the 1.235V threshold
corded by the fault register that do clears all faults except BD_PRST
not turn off the external FET. They Clearing the Fault Lets changed state fault.
include the power bad, BD_PRST the Output Turn-On
changed state and FET short. As mentioned earlier, the overcurrent, Conclusion
A power bad fault is reported if undervoltage and overvoltage faults, The LTC4260 is a smart power gateway
the FB pin drops below the 3.41V once written into the fault register, for hot swappable circuits. It provides
threshold while the FET is on. The will keep the pass-transistor off if inrush control and fault isolation
board present feature allows detection auto-retry is not selected for these while it closely monitors the power
when downstream cards are inserted faults. This remains true even when through its gates. It logs faults and
or removed. This fault is labeled as the original recorded fault condition can interrupt the host if necessary, all
BD_PRST changed state. The last is no longer present. The fault register while monitoring board power using
minor fault, the FET short, indicates must be cleared to turn on the output. an internal 8-bit ADC.
For more information on parts featured in this issue, see
http://www.linear.com/go/ltmag
Switching Regulator Controllers (Book 2 of 2) — Applications Handbooks schematic capture. Our enhancements to SPICE result
in much faster simulation of switching regulators than is
• DC/DC Controllers Linear Applications Handbook, Volume I — Almost a possible with normal SPICE simulators. SwitcherCAD III
• Digital Voltage Programmers thousand pages of application ideas covered in depth by includes SPICE, macromodels for 80% of LTC’s switching
• Off-Line AC/DC Controllers 40 Application Notes and 33 Design Notes. This catalog regulators and over 200 op amp models. It also includes
Linear Regulators, Charge Pumps, covers a broad range of real world linear circuitry. In models of resistors, transistors and MOSFETs. With this
Battery Chargers — addition to detailed, systems-oriented circuits, this SPICE simulator, most switching regulator waveforms
• Linear Regulators handbook contains broad tutorial content together with can be viewed in a few minutes on a high performance
• Charge Pump DC/DC Converters liberal use of schematics and scope photography. A PC. Circuits using op amps and transistors can also be
• Battery Charging & Management special feature in this edition includes a 22-page section easily simulated. Download at www.linear.com
on SPICE macromodels.
Hot Swap Controllers, MOSFET Drivers, Special FilterCAD™ 3.0 — FilterCAD 3.0 is a computer aided de-
Power Functions — Linear Applications Handbook, Volume II — Continues sign program for creating filters with Linear Technology’s
• Hot Swap Controllers the stream of real world linear circuitry initiated by Volume filter ICs. FilterCAD is designed to help users without
• Power Switching & MOSFET Drivers I. Similar in scope to Volume I, this book covers Applica- special expertise in filter design to design good filters
• PCMCIA Power Controllers tion Notes 40 through 54 and Design Notes 33 through with a minimum of effort. It can also help experienced
• CCFL Backlight Converters 69. References and articles from non-LTC publications filter designers achieve better results by playing “what if”
• Special Power Functions that we have found useful are also included. with the configuration and values of various components
Linear Applications Handbook, Volume III — and observing the results. With FCAD, you can design
Data Converters (Book 1 of 2) — lowpass, highpass, bandpass or notch filters with a
• Analog-to-Digital Converters This 976-page handbook includes Application Notes 55
through 69 and Design Notes 70 through 144. Subjects variety of responses, including Butterworth, Bessel,
Data Converters (Book 2 of 2) — include switching regulators, measurement and control Chebychev, elliptic and minimum Q elliptic, plus custom
• Analog-to-Digital Converters circuits, filters, video designs, interface, data converters, responses. Download at www.linear.com
• Digital-to-Analog Converters power products, battery chargers and CCFL inverters. SPICE Macromodel Library — This library includes LTC
• Switches & Multiplexers An extensive subject index references circuits in Linear op amp SPICE macromodels. The models can be used
Interface, System Monitoring & Control — data sheets, design notes, application notes and Linear with any version of SPICE for analog circuit simulations.
• Interface — RS232/562, RS485, Technology magazines. These models run on SwitcherCAD III/LTC SPICE.
Mixed Protocol, SMBus/I2C Noise Program — This PC program allows the user to
• System Monitoring & Control — Supervisors, CD-ROM calculate circuit noise using LTC op amps, determine
Margining, Sequencing & Tracking Controllers The November 2004 CD-ROM contains product data the best LTC op amp for a low noise application, display
sheets, application notes and Design Notes released the noise data for LTC op amps, calculate resistor noise
through October of 2004. Use your browser to view and calculate noise using specs for any op amp.
Information furnished herein by Linear Technology Cor-
poration is believed to be accurate and reliable. However, product categories and select products from parametric
no responsibility is assumed for its use. Linear Technology tables or simply choose products and documents from
Corporation makes no representation that the interconnec- part number, application note or design note indexes.
tion of its circuits, as described herein, will not infringe on
existing patent rights.
www.linear.com
© 2004 Linear Technology Corporation/Printed in U.S.A./34K Linear Technology Magazine • November 2004