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Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(VIN = 14V, CIN = 0.1μF, CVCC = 0.1μF // 1μF, CREG5 = 1μF, VON/OFF = 5V, CSS = 0.01μF, CSLOPE = 100pF, RT = 13.7kΩ, CT = 560pF,
VSYNC = VOVI = VFB = VCS = 0V, COMP = unconnected, OUT = unconnected. TA = TJ = -40°C to +125°C, unless otherwise noted.
Typical values are at TA = +25°C. All voltages are referenced to PGND, unless otherwise noted.) (Note 1) (Figure 5)
VIN UVLO HYSTERESIS VIN SUPPLY CURRENT (ISUPPLY) SHUTDOWN SUPPLY CURRENT
vs. TEMPERATURE vs. OSCILLATOR FREQUENCY (fOSC) vs. SUPPLY VOLTAGE
120 20
31
MAX15004 toc03
MAX15004 toc01
MAX15004 toc02
110 MAX15005 19
90 16
80 22 15 TA = +135°C
70 19 14
COUT = 10nF
13
60 16 12
50 11
13 TA = +25°C
40 10
10 9
30
7 COUT = 0nF 8
20
7
10 4 TA = -40°C
6
0 1 5
-40 -15 10 35 60 85 110 135 10 60 110 160 210 260 310 360 410 460 510 5 10 15 20 25 30 35 40 45
TEMPERATURE (°C) FREQUENCY (kHz) SUPPLY VOLTAGE (V)
VCC OUTPUT VOLTAGE REG5 OUTPUT VOLTAGE REG5 DROPOUT VOLTAGE
vs. VIN SUPPLY VOLTAGE vs. VCC VOLTAGE vs. IREG5
7.5 5.000 0.30
MAX15004 toc04
MAX15004 toc06
MAX15004 toc07
4.975 IREG5 = 1mA (SOURCING) 0.28 VCC = 4.5
TA = +125°C
IVCC = 0mA VIN = VON/OFF
REG5 LDO DROPOUT VOLTAGE (V)
MAX15004 toc09
148
CT = 560pF
147
TA = +25°C TA = -40°C
146
CT = 1000pF
145 100
144 CT = 1500pF
143
CT = 2200pF
142 TA = +125°C TA = +135°C
141 CT = 3300pF
140 10
5.5 10.5 15.5 20.5 25.5 30.5 35.5 40.5 45.5 1 10 100 1000
VIN SUPPLY VOLTAGE (V) RT (kΩ)
MAX15005 MAXIMUM DUTY CYCLE MAX15004 MAXIMUM DUTY CYCLE MAX15005 MAXIMUM DUTY CYCLE
vs. OUTPUT FREQUENCY (fOUT) vs. TEMPERATURE vs. TEMPERATURE
100 55 85
MAX15004 toc10
MAX15004 toc11
MAX15004 toc12
CT = 100pF fOUT = 75kHz CT = 560pF
95 54 83 RT = 13.7kΩ
90 53 81 fOSC = fOUT = 150kHz
MAXIMUM DUTY CYCLE (%)
80
CS-TO-OUT DELAY (ns)
70 260
70 60
60
GAIN (dB)
220
50 50 VCS OVERDRIVE = 190mV
65
40 180 40
60 CRTCT = 220pF 30
PHASE 30
RRTCT = 10kΩ 20 140
fOSC = fOUT = 418kHz 20
55 10
100
0 10
50 -10 60 0
1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9 2.0 0.1 1 10 100 1k 10k 100k 1M 10M -40 -15 10 35 60 85 110 135
fSYNC/fOSC RATIO FREQUENCY (Hz) TEMPERATURE (°C)
COUT = 10nF
VOUT VON/OFF = 5V VIN
VOUT 5V/div 10V/div
VOUT VCC
VOVI 2V/div 5V/div
REG5
5V/div
VOVI IOUT
500mV/div 1A/div
VOUT
5V/div
VON/OFF = 5V
ON/OFF
5V/div
VIN ON/OFF
10V/div VCC 5V/div
5V/div
VCC
VCC REG5 5V/div
5V/div 5V/div
REG5
REG5
5V/div
5V/div
VOUT
VOUT 5V/div VOUT
5V/div 5V/div
LINE TRANSIENT FOR VIN STEP LINE TRANSIENT FOR VIN STEP
FROM 14V TO 5.5V FROM 14V TO 40V
MAX15004 toc22 MAX15004 toc23
VIN VIN
10V/div 20V/div
VCC VCC
5V/div 5V/div
REG5 REG5
5V/div 5V/div
VOUT VOUT
5V/div 5V/div
100µs/div 100µs/div
ILOAD = 10mA
VCS
200mV/div
10V/div
VANODE
1V/div
ISHORT
500mA/div
10µs/div 4µs/div
IN 1 MAX15004A/B
MAX15005A/B
ON/OFF
COMP 3.5V UVB
REFERENCE 15 OUT
UVLO DRIVER
14 PGND
VCC
THERMAL
SHUTDOWN
SET
UVB 5V LDO 13 REG5
REG
RESET
OVI 3 OV-COMP ILIMIT
COMP 0.3V
1.228V 50ns 12 CS
PWM- LEAD
COMP DELAY
R
OVRLD
SLOPE 4 SLOPE
COMPENSATION
2R
RTCT 6
OSCILLATOR
SS_OK 11 COMP
CLK
10 FB
SGND 7 EAMP
7
RESET
CONSECUTIVE
EVENTS 1.228V
SYNC 8 COUNTER 9 SS
REF-AMP
OVRLD
RTCT
CLKINT
SYNC
OUT
D = 50% D = 50%
RTCT
CLKINT
SYNC
OUT
D = 81.25% D = 80%
Figure 2. Timing Diagram for Internal Oscillator vs. External SYNC and DMAX Behavior
CT = 560pF
85
80
CT = 1000pF
75 CT = 3300pF 100
70 CT = 2200pF CT = 1500pF
65
CT = 1500pF CT = 2200pF
60
CT = 1000pF CT = 560pF
55 CT = 220pF CT = 3300pF
50 10
10 100 1000 1 10 100 1000
OUTPUT FREQUENCY (kHz) RT (kΩ)
Figure 3a. MAX15005 Maximum Duty Cycle vs. Output Figure 3b. Oscillator Frequency vs. RT/CT
Frequency.
Moreover, the source and sink current capability of 2mA Current Limit
provides fast error correction during the output load The current-sense resistor (RCS), connected between the
transient. For Figure 5, calculate the power-supply output source of the MOSFET and ground, sets the current limit.
voltage using the following equation: The CS input has a voltage trip level (VCS) of 305mV. The
R current-sense threshold has 5% accuracy. Set the current-
VOUT= 1 + A VREF limit threshold 20% higher than the peak switch current at
RB the rated output power and minimum input voltage. Use
where VREF = 1.228V. The amplifier’s noninverting input the following equation to calculate the value of RS:
is internally connected to a soft-start circuit that gradu-
ally increases the reference voltage during startup. This =R S VCS (IPK × 1.2)
forces the output voltage to come up in an orderly and
well-defined manner under all load conditions. where IPRI is the peak current that flows through the
Slope Compensation MOSFET at full load and minimum VIN.
The MAX15004A/B/MAX15005A/B use an internal ramp When the voltage produced by this current (through the
generator for slope compensation. The internal ramp current-sense resistor) exceeds the current-limit com-
signal resets at the beginning of each cycle and slews at parator threshold, the MOSFET driver (OUT) quickly
the rate programmed by the external capacitor connected terminates the on-cycle. In most cases, a short-time
to SLOPE. The amount of slope compensation needed constant RC filter is required to filter out the leading-edge
depends on the downslope of the current waveform. spike on the sense waveform. The amplitude and width
Adjust the MAX15004A/B/MAX15005A/B slew rate up to of the leading edge depends on the gate capacitance,
110mV/μs using the following equation: drain capacitance (including interwinding capacitance),
and switching speed (MOSFET turn-on time). Set the RC
2.5 × 10 −9 (A) time constant just long enough to suppress the leading
Slope compensation (mV µs) =
C SLOPE edge. For a given design, measure the leading spike at
the highest input and rated output load to determine the
where CSLOPE is the external capacitor at SLOPE in value of the RC filter.
farads.
REG5
VIN 2 × D × η
L MIN =
MAX15004A/B 2 × f OUT × VOUT × I OMIN
MAX15005A/B N where:
R1
VOUT + VD − VIN
RCS D=
VOUT + VD − VDS
0.3V and
RS
CCS
CURRENT-LIMIT I OMIN =
(0.1× I O ) to (0.25 × I O )
COMPARATOR
The higher value of IOMIN reduces the required
inductance; however, it increases the peak and RMS
Figure 4. Reducing Current-Sense Threshold
currents in the switching MOSFET and inductor. Use
IOMIN from 10% to 25% of the full load current. The VD is
The low 305mV current-limit threshold reduces the power the forward voltage drop of the external Schottky diode,
dissipation in the current-sense resistor. The current-limit D is the duty cycle, and VDS is the voltage drop across
threshold can be further reduced by adding a DC offset the external switch. Select the inductor with low DC
to the CS input from REG5 voltage. Do not reduce the resistance and with a saturation current (ISAT) rating
current-limit threshold below 150mV as it may cause higher than the peak switch current limit of the converter.
noise issues. See Figure 4. For a new value of the
current-limit threshold (VILIM_LOW), calculate the value of Input Capacitor Selection in Boost
R1 using the following equation: Configuration
The input current for the boost converter is continuous
4.75 × R CS and the RMS ripple current at the input capacitor is
R1 =
0.290 − VILIM_LOW low. Calculate the minimum input capacitor value and
maximum ESR using the following equations:
VIN
DVIN
CIN
CVIN DVBS L
CREG5 1µF
0.1µF
VOUT
D3
18V
13 1
REG5 IN 16
RT VCC COUT
CVCC
4.7µF
6
RTCT
CT 15
MAX15004A/B OUT Q
MAX15005A/B
CFF RCS
12
CS
CF RA
RF
11
COMP CCS RS
10
FB
SLOPE SS
PGND RB
4 9
CSLOPE CSS
discharge and ΔVESR is the contribution due to ESR of Output Capacitor Selection in
the capacitor. Assume the input capacitor ripple contribu- Boost Configuration
tion due to ESR (ΔVESR) and capacitor discharge (ΔVQ) For the boost converter, the output capacitor supplies the
is equal when using a combination of ceramic and alu- load current when the main switch is on. The required out-
minum capacitors. During the converter turn-on, a large put capacitance is high, especially at higher duty cycles.
current is drawn from the input source especially at high Also, the output capacitor ESR needs to be low enough to
output to input differential. The MAX15004/MAX15005 minimize the voltage drop due to the ESR while support-
are provided with a programmable soft-start; however, a ing the load current. Use the following equations to calcu-
large storage capacitor at the input may be necessary to late the output capacitor, for a specified output ripple. All
avoid chattering due to finite hysteresis. ripple values are peak-to-peak.
∆VESR
ESR =
IO
I × D MAX
C OUT = O
∆VQ × f OUT
(VOUT − VIN ) × R S × 10 −3
MOSFET Selection in Boost Converter mc = (mV µs)
2L
The MAX15004A/B/MAX15005A/B drive a wide variety
of n-channel power MOSFETs. Since VCC limits the OUT The internal ramp signal resets at the beginning of each
output peak gate-drive voltage to no more than 11V, a cycle and slews at the rate programmed by the external
12V (max) gate voltage-rated MOSFET can be used with- capacitor connected to SLOPE. Adjust the MAX15004A/B/
out an additional clamp. Best performance, especially at MAX15005A/B slew rate up to 110mV/μs using the follow-
low-input voltages (5VIN), is achieved with low-threshold ing equation:
n-channel MOSFETs that specify on-resistance with a
gate-source voltage (VGS) of 2.5V or less. When select- 2.5 × 10 −9
C SLOPE =
ing the MOSFET, key parameters can include: mc(mV µs)
1) Total gate charge (Qg). where CSLOPE is the external capacitor at SLOPE in
2) Reverse-transfer capacitance or charge (CRSS). farads.
3) On-resistance (RDS(ON)). Flyback Converter
4) Maximum drain-to-source voltage (VDS(MAX)). The choice of the conversion topology is the first stage
5) Maximum gate frequencies threshold voltage in power-supply design. The topology selection criteria
(VTH(MAX)). include input voltage range, output voltage, peak currents
At high switching, dynamic characteristics (parameters 1 in the primary and secondary circuits, efficiency, form fac-
and 2 of the above list) that predict switching losses have tor, and cost.
more impact on efficiency than RDS(ON), which predicts For an output power of less than 50W and a 1:2 input
DC losses. Qg includes all capacitances associated voltage range with small form factor requirements, the
with charging the gate. The VDS(MAX) of the selected flyback topology is the best choice. It uses a minimum
A major disadvantage of discontinuous mode opera- Step 2) The rising current in the primary builds the energy
tion is the higher peak-to-average current ratio in the stored in the core during on-time, which is then released
primary and secondary circuits. Higher peak-to-average to deliver the output power during the off-time. Primary
current means higher RMS current, and therefore, higher inductance is then calculated to store enough energy
loss and lower efficiency. For low-power converters, the during the on-time to support the maximum output power.
advantages of using discontinuous mode easily surpass
the possible disadvantages. Moreover, the drive capabil- VINMIN 2 × D MAX 2 × η
LP =
ity of the MAX15004/MAX15005 is good enough to drive 2 × POUT × f OUT(MAX)
a large switching MOSFET. With the presently available t ON
MOSFETs, power output of up to 50W is easily achievable D=
t ON + t OFF
with a discontinuous mode flyback topology using the
MAX15004/MAX15005 in automotive applications. DMAX = Maximum D.
Transformer Design Step 3) Calculate the secondary to primary turns ratio
Step-by-step transformer specification design for a dis- (NSP) and the bias winding to primary turns ratio (NBP)
continuous flyback example is explained below. using the following equations:
Follow the steps below for the discontinuous mode trans-
former: NS LS
=
N SP =
Step 1) Calculate the secondary winding inductance for NP LP
guaranteed core discharge within a minimum off- and
time. NBIAS 11.7
NBP
= =
Step 2) Calculate primary winding inductance for suf- NP VOUT + 0.35
ficient energy to support the maximum load.
Step 3) Calculate the secondary and bias winding turns The forward bias drops of the secondary diode and the
ratios. bias rectifier diode are assumed to be 0.35V and 0.7V,
Step 4) Calculate the RMS current in the primary and respectively. Refer to the diode manufacturer’s data sheet
estimate the secondary RMS current. to verify these numbers.
Step 5) Consider proper sequencing of windings and Step 4) The transformer manufacturer needs the RMS
transformer construction for low leakage. current maximum values in the primary, secondary,
and bias windings to design the wire diameter for the
Step 1) As discussed earlier, the core must be discharged
different windings. Use only wires with a diameter smaller
during the off-cycle for discontinuous mode operation.
The DC losses in the MOSFET can be calculated using the where fC = estimated converter closed-loop unity-gain
value for the primary RMS maximum current. Switching frequency.
losses in the MOSFET depend on the operating frequency,
VIN
2.5V TO 16V L1
L11 = L22 = 7.5mH
VOUT
C7 D2 (8V/2A)
6.8µF STP745G
VOUT
D1
LL4148 C4 C5 C6
D3
22µF 22µF 22µF
BAT54C
C1 C2 C3
1 16 6.8µF 6.8µF 6.8µF
IN VCC
C1 CVCC
100nF 1µF
MAX15005A/B
ON 2
OFF ON/OFF
RG
1Ω
15 STD20NF06L
OUT
3
OVI
14
PGND
4
SLOPE
CSLOPE REG5
47pF 13
REG5
C10
1µF
5
REG5 RT N.C.
RCS
15kΩ 100Ω
6 12
RTCT CS
CT CCS
100pF RS
150pF 0.025Ω
7
SGND
11
SYNC COMP
VOUT
8 R3
SYNC 1.8kΩ C4
680pF R2
RSYNC C3 15kΩ
10kΩ 47nF
10
FB
R1
9 2.7kΩ
SS
CSS
150nF
EP
R7 C12
510Ω 220pF
VIN VANODE
(5.5V TO 16V) (110V/55mA)
C13
C1 D2
R16 C11 R2 10µF
330µF 10Ω 2200pF 200V
560Ω
50V 100V
R8 VGRID
C18 100kΩ (60V/12mA)
4700pF D1 D2
100V
C15
22µF
1 16 60V
IN VCC
C3 R9 R10
C2 C14
1µF NU 36kΩ
0.1mF NU
MAX15005A/B 16V
50V
R17 FILAMENT+
100kΩ (3V/650mA)
1% D4
2
ON/OFF
R18 VIN C16
R15 330µF
47.5kΩ R3
100Ω 6.3V
1% R11 50Ω
15 N
182kΩ OUT
FILAMENT-
1% 3 C17
OVI 2.2µF D5
R12 10V
12.1kΩ 14
PGND
1%
REG5
4
SLOPE 13
C4 REG5
100pF C10
1µF
R1 5 R5
REG5 8.45kΩ N.C.
1kΩ
1% 12
6 CS
RTCT C9 R6
C5 560pF 0.06Ω
1200pF 1%
7
SGND
11
COMP
8 R2 VANODE
SYNC 402kΩ C7
1% R13
1 47pF
R19 118kΩ
JU1 C6
10kΩ 1%
2 10 4700pF
FB
R14
9
SS 1.3kΩ
C8 1%
EP 0.1µF
VIN
(4.5V TO 16V)
C1
10µF L1
25V 10µH/IHLP5050
VISHAY
1 16
IN VCC
C11 C10
0.1µF 1µF/16V
CERAMIC
MAX15005A/B VOUT
R11 D1 (18V/2A)
301kΩ B340LB
2 C6
ON/OFF
56µF/25V
VOUT
R10 R1 SVP-SANYO
100kΩ 5Ω
R8 15 Q
OUT
153kΩ Si736DP
3
OVI
R9 14
10kΩ PGND
REG5
4
SLOPE 13
C2 REG5
100pF C10
1µF
5 R3
REG5 R2 N.C.
1kΩ
13kΩ 12
6 CS
RTCT C4
R4
C3 100pF
0.025Ω
180pF
7
SGND
11
SYNC COMP
8 R5 VOUT
SYNC 100kΩ C8
330pF R6
1
C9 136kΩ
JU1
2 10 0.1µF
FB
9 R7
SS
10kΩ
C7
EP 0.1µF
TOP VIEW + +
IN 1 16 VCC IN 1 16 VCC
SGND 7 10 FB SGND 7 10 FB
SYNC 8 9 SS SYNC 8 9 SS
EP
TSSOP-EP TSSOP
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
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