Proceedings of 2015 3rd International Conference on Advances in Electrical Engineering

17-19 December, 2015, Dhaka, Bangladesh

Development of an 8-Bit Microcontroller

Learning System Using 89S52 Architecture
Golam Mostafa
Department of Electrical and Electronic Engineering, Ahsanullah University of Science and Technology
141-142 Love Road, Tejgaon Industrial Area, Dhaka-1208, Bangladesh, Email: krdcbdgm@yahoo.com

.
Abstract – The 89S52 microcontroller (MCU) is very popular II. RESOURCE REQUIREMENT
among the students, teachers, amateurs, engineers, scientists, • IBMPC with WINXP Operating System.
and hobbyists for building electronics projects and consumer
products. Successful realization of MCU based products • MIDE-51 [2]: Assembler for 8051 microcontrollers.
depends on the sound understanding of architecture, instruction • TOP2005 [3]: ROM Programmer.
and interfacing of the MCU, which can be effectively acquired • MicroTalk-8085 [4]: Optional item. It provides
with the help of a ‘Microcontroller Learning System (MLS)’. hardware of the MCU trainer as the peripherals of the
The MLS provides facilities to enter program codes and data
8085 microprocessor are fully compatible with 8051.
into memory; program execution and debugging; checking and
changing memory/register contents; breadboard/edge connector III. EXPECTED FEATURES OF THE MCU TRAINER
for prototyping interfacing circuits; and viewing the result on
display devices. This paper presents the design and development The trainer wills have the following hardware and software
procedures of an 89S52 MLS system along with examples to features to perform experiments for learning the 8051
establish its effectiveness in learning microcontroller hardware interfacing and its programming.
and programming. We designed, developed, and tested a
prototype MLS system named MicroTalk-8051 Trainer. A. Hardware Features
• 89S52 MCU with internal Flash disabled.
Keywords – 89S52, CISC architecture, microcontroller • 2x8-Kbyte EPROM for holding the codes of the
learning system, MLS, MicroTalk-8051, GUI interface. Monitor Program and the Subroutines.
I. INTRODUCTION • 8-Kbyte external RAM for loading users’ programs.
• 8279-based 6-digit CC-type display unit.
The 8051 is the generic name for the microcontrollers
• 8279-based Keypad with 17 Command/Data keys and
89C51, 89S51, 89C52, 89S52, 89S8252, and the like. All
1 Reset key arranged in 6x3 matrix.
these MCUs share a common basic architecture and an
instruction set. The 8051 is a single chip IC housed in a • RS232/USB interface for downloading program codes
40-pin DIP package. It contains hardware resources, which and data from the IBMPC.
are: 8-bit and 1-bit processors known as Byte Processor and • IO connectors and breadboard for circuit interface.
Boolean Processor, Clock Oscillator, Special Function B. Software Features
Register Set, Code Memory (Flash) with Security Bit, Data
Memory (EEPROM) with Security Bit, RAM, Parallel IO, • EXA Command to open the address of an external
Asynchronous Serial IO, Counter/Timer, High Speed Serial memory location.
Peripheral Interface (SPI), In System Programming Interface, • CHG Command to change the content of an external
and Parallel Programming Interface. memory location.
To learn the functionalities of all these resources and their • FRW/BKW Commands to check next/previous
interfacing with IO devices, one requires owning a memory and register location.
‘Microcontroller Learning System’, where he can experiment • DOP Command to execute a program.
all kinds of trial-and-error approached hardware interfacing • PCR & S/S Command to execute only one instruction.
and the software programming. The user may own a learning • GPR Command to check General Purpose Register.
system through purchase or by making it himself. In this • CSR Command to check Control & Status Registers.
paper, we have documented design methodology of an MLS, • TCR Command to check Timer & Counter Registers.
which the serious readers may adopt to build their own • DPR Command to check Data Pointer Register.
Trainers and spend times to learn everything (!) of the 8051 • PSR Command to check Processor Word Register.
microcontroller. • SPR Command to check Stack Pointer Register.
There are many companies [1] around the world, who • ICR Command to check Interrupt Control Registers.
manufacture and distribute 8051 trainers among the • Subroutines to convert data & access display/keypad.
educational and industrial institutions for learning purposes.
These trainers accompany user manual, laboratory D
DO P 01
E
EXA 09
F
FRW 11
experiments, and schematics of the hardware but no A
AUT 02
B
BKW
C
CHG
0A 12
information at all on the working principle of ‘Monitor 7 8 9
TIR 03 GPR 0B CSR 13
Program (MP)’ and its design methodology. MP is a 4 5 6
SPR 04 PCR 0C DPR 14
specialized program, which usually resides in the EPROM of 1 2 3
RAM 05
the trainer and decodes the keypad commands for code/data ICR 0D PSR 15
BKS 0
entry, program execution, memory/register check and change, RST
S/S 0E PRT 16

and finding the erroneous instruction (s) of a faulty program. Fig. 1 Pictorial view of MicroTalk-8051 with Keypad Layout

978-1-4673-9695-0/15/$31.00 ©2015 IEEE 97

 Proceedings of 2015 3rd International Conference on Advances in Electrical Engineering
17-19 December, 2015, Dhaka, Bangladesh

IV. HARDWARE BLOCK DIAGRAM AND DESCRIPTION

Address Data
IOC U1 : MAX232 U3 : 89S52 IOC Holes U4: 74LS138 U6: 27C64 U7: 27C64 U8: 6264 U9: 8279 DP0 DP1 DP2 DP3 DP4 DP5
Pins A3-A0 8
TxT TxDTTL (P31) S7/ CS3/ B3-B0
p,…,a cc0 cc1 cc2 cc3 cc4 cc5
TxRS S6/ CS2/
RxRS RxT RxDTTL (P30) S5/ C000-DFFF
0V S4/
S0/ S1/ S2/ S3/ S4/ S5/
S3/ E000-FFFF 0000-1FFF C, B, A
Y1 XT2 (P27)A15 C S2/
11.0592 U10: 74LS138
(P26)A14 B S1/ CS1/ 3
MHz 3
XT1 (P25)A13 A S0/ CS0/ SL2 – SL0 3
RST 100uF U11: 74LS138
RD/, WR/ WR/ WR/ WR/ RD/, WR/
U2: 7400 C, B, A
RST (P37, P36)
5k S0/ S1/ S2/
RD/
0V
CRD/ CRD/(OE/)
IO Connector (IOC, Holes) RST
PSEN/ D E F
8 0V DOP 01 EXA 09 FRW
P17-P10 11
PSEN/ RD/(OE/) RD/(OE/) A B C
P35 A8 AUT 02 BKW 0A CHG 12
5 A12-A8 A (C-D/)
P34 A12-A8 A12-A8 A12-A8 7 8 9
For S/S
Short

P33 (P24-P20) U5: 74LS373 TIR 03 GPR 0B CSR 13

P32(INT0/) ALE RL6-RL1 4 5 6
ALE CLK CLK SPR 04 PCR 0C DPR 14
DR = 2000h 1 2 3
+5V Vcc CR = 2100h RAM 05 ICR 0D PSR 15
EA/ AD7-AD0 AD A7-A0 A7-A0 A7-A0 A7-A0 SR = 2100h BKS 0
0V GND (P07-P00) RST
D7 – D0 D7 – D0 D7 – D0 D7 – D0 S/S 0E PRT 16
2 A1-A0
D7 – D0 8 D7 – D0
Mtk8051:2014

Fig. 2 Hardware Block Diagram for the 89S52 Microcontroller Learning System

A. Overall Functional Description C. Linear Decoder U3

After power up, the MCU (U2) boots up at location In bus mode, the total addressable locations including
0000H and performs the necessary initialization tasks. It then memory and port of the 8051 are 64Kbyte. In system of Fig.
keeps polling the Keypad for commands like EXA, or DOP 2, a 3-to-8 linear decoder (U3) is just good enough to allocate
or S/S. EXA command allows a user to enter program spaces for the storage devices of the system. The truth table
code/data into RAM space (C000-DFFF, U8) using Keypad. of the decoder is:
Memory address and its content appear at the ‘Address Field’ TABLE 1: TRUTH TABLE OF THE LINEAR DECODER, U3
and ‘Data Field’ of the display unit. DOP command helps the Address Signals Decoded Space Connected at
user executing his application program. There are IO A15 A14 A13
connectors and breadboard in the trainer, which facilitate 0 0 0 0000 – 1FFF (8K) CS0/-pin of U7
developing and testing interfacing experiments. The serial 0 0 1 2000 – 3FFF (8K) CS1/-pin of U9
0 1 0 4000 – 5FFF (8K) CS2/-pin at IOC
communication controller (SCC, U1) establishes link with
0 1 1 6000 – 7FFF (8K) CS3/-pin at IOC
IBMPC to receive program code/data from the host computer 1 0 0 8000 – 9FFF (8K) CS4/-pin of IOC
to the RAM space of the trainer. 1 0 1 A000 – BFFF (8K) CS5/-pin of IOC
In the given system, the 8051 is working in the ‘bus 1 1 0 C000 – DFFF (8K) CS6/-pin of U8
mode’ meaning that it now asserts standard bus signals like 1 1 1 E000 - FFFF (8K) CS7-pin of U6
address, data and control signals to access external memory
(port) locations. The 8051 has 16 address lines (A15-A0), 8 D. Microcontroller Subsystem
data lines (D7-D0) multiplexed with 8 lower address lines The MCU (U2) operates in multiplexed bus mode along
(A7-A0), RD/, WR/ and PSEN/ signals to communicate with with the availability of important IO operations like Counter,
memory (port) devices. The 8051 automatically turns into bus Interrupt, Serial IO, ISP, and Digital IO. U4 has conditioned
mode while it executes instructions like MOVX and MOVC. the RD/ and PSEN/ signal to synthesize CRD/ signal, which
In Fig. 2, we have indicated with ( ) signs, which port line, allows the MCU to fetch program codes from the RAM chip.
transforms into which bus signal during bus mode operation. The ALE signal clocks the auxiliary latch (U5) to hold the
address signals (A7-A0) from the AD7-AD0 bus before the
B. Memory and Port Space Map bus turns into D7-D0 data lines. U2 is directly replaceable by
There are three memory FFFF Monitor the advanced 89S8252 chip, which has internal EEPROM
U6 Program
chips and one IO chip in the E000 (EPROM) and SPI interface. Bus signals, decoded lines, and IO lines
trainer. To write codes for DFFF are available at the IO connectors for interfacing purposes.
U8 RAM
the monitor and example C000
programs, one must assign 3FFF Keyboard E. Keyboard/Display Subsystem
addresses to these devices. U9 Display
2000 Controller(Port) The 8279 controller [2] can handle 16 cc-type 7-segment
Linear decoding scheme has 1FFF Monitor
display devices and 8x8 ‘walking 0’ Keypad in multiplexed
assigned 8K space for the 0030 U7 Program
(EPROM) mode. The controller has built-in scan circuitry to generate
three internal registers of 002F IE0ٛ 0003ٛ DFEE
TF0ٛ 000Bٛ DFF1
Reserved for timing signals to refresh the display, catch the scan code of a
U9. We have indicated Interrupt
IE1ٛ 0013ٛ DFF4
Vectors. pressed down key. At the closure of a key, the MS-bit of SR
within the block of U9 of TF1ٛ 001Bٛ DFF7
Linked to
RI+TIٛ 0023ٛ DFFA assumes Logic-H state and its 8-bit scan codes (numerical
Fig. 2 the specific addresses 0001 TF2ٛ 002Bٛ DFFD
RAM Space
values shown in Keypad) enter into keyboard FIFO, which
for the registers of this IO. 0000 LJMP 0030H map

Fig. 3 Memory and Port Map could be read via DR.

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 Proceedings of 2015 3rd International Conference on Advances in Electrical Engineering
17-19 December, 2015, Dhaka, Bangladesh

V. MONITOR PROGRAM OF THE MICROTALK-8051 TRAINER

Initializ: mtk8751monflow:GM:93:02
Start/Reset stack, flag, conuter,
8952 UP
0073H
0000H
Keyboard
Polling

007A 035E
N
key closed Backspace
? Routine
Y Y
007D 00B3, N
0340 00B6
Is disp BKS
_ _ _ _ Ad ? ?
N
0086
Y, f0=1
Is disp
0089, 0100
XXXX XX ?

N Print at:
Y 008C Y SUR4
D6D5D4D3
0095 FRW 0109 0530
Is EXA D2D1
1--> f0 ?
?
1--> f2 N
N Forward KBP:
4--> #DP Show: 0106,
0092, 01A0 Routine Print
D6-->PP _ _ _ _ Ad 0128 00C0
KBP:011F End?
Y Y Y 0037
KBP:00A7 Is DOP BKW
01A9 0131 00BD Y
? ? 00D0
1--> f0 00D6 for: EXA
1--> f4 N N Backward f0, f1 00DC
4--> #DP Show: 01A6, 0210 012E Routine =1?
35-->PP _ _ _ _ dO 0150 1--> f1
Y KBP:0141 0-->f0, f2
KBP:01C1 Is AUT Show:
CHG 0159 4--> #DP
? 1--> f0 XXXX XX
1--> f0 Y ? D6-->PP
1--> f5 0219 1-->f3, f1
N Change KBP:00FE
4--> #DP Show: N 2--> #DP
35-->PP _ _ _ _ Ad 0216. 02A0 0156 Routine 31-->PP
Y KBP:016D
KBP:022E
Is PCR PCR 0309
Y
Y ? ?
0176 for:CHG
1--> f0 02A9 N
1--> f07 Show: N Home f0, f3
02A6, 0300 0306 Action =1?
_ _ _ _ PC
KBP:0325 1--> f1
N Show: 0-->f3, f0
0170 XXXX _ _ 35-->PP
N Y
Y
037C 0176 KBP:0197
S/S 0379
? f0, f4 01D6 for:DOP
=1?

Jumo to
REG Users Prog
EXA?CHG?
Loop/KBP
Y
KBP:E4B6 0246 for AUT
f0, f5
=1? 1--> f6
Exam/Edit Execute
0-->f5
Regs. Curr. Instruc Sow:
31-->PP
XXXX__
2 --> #DP
00A7
KBP:0258
KBP:02BB KBP:0037

Fig. 4 Flow Chart for the Complete Monitor Program of MicroTalk-8051 Trainer

A Microcontroller Trainer interacts with a user by virtue
of its EPROM-resident Monitor Program. The following are
the essential components of a MP, which once developed
could lead to the easy development of other components:
• Sensing EXA command and responses by showing the
message _ _ _ _ A d in the display unit meaning that the
user may now enter 16-bit address (as 4 hex digit) of a
RAM location. Assume that the RAM location is C000.
• At the end of address entry, the display shows C000 XX.
• Senses the CHG command to show message C000 _ _ on
the display. Now, the user may enter 1-byte (2 digits, say
D2) program code in the memory location. After code
entry, the display becomes C000 D2.
• Sense FRW command and show the next memory
location and its content on the display as C001 XX. Now,
the user can employ FRW and CHG commands to finish
the entry of all the program bytes in memory.
• Sense DOP command to accept the beginning address of
the loaded program, execute the program, and show result
on the display.

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 Proceedings of 2015 3rd International Conference on Advances in Electrical Engineering
17-19 December, 2015, Dhaka, Bangladesh

VI. DEVELOPING HARDWARE CIRCUITS A. Data Structure and Lookup Tables

U9:8279 7Segment Display Unit
We shall follow ‘Small Start Strategy (SSS)’ approach to Internal RAM

develop the hardware circuits and the software routines for 35 CC (DP0)
34 CC (DP1)
Display RAM DP0 DP5

the trainer. In SSS methodology, a basic hardware circuit and DRAM0 00H DP0

CC-Table
33 CC (DP2)
SUR1 DRAM1 01H DP1
its associated software codes are developed and tested. After 32 CC (DP3)
DRAM2 02H DP2
31 CC (DP4)
that, we add another incremental amount of hardware and 30 CC (DP5)
DRAM3 03H DP3

software with the previous one and test them. We will try to Internal RAM
DRAM4
DRAM5
04H
05H
DP4
DP5 Within Flash
develop the hardware on breadboards. However, at some 39 DP0DP1

Hex Table
DRAM6 06H DP6 LUT1
38 DP2DP3 SUR2 ScodeVsCC
stage of development, the trainer might stop working due to 37 DP4DP5
DRAM7 07H DP7
LUT2
too many jumpers and noise. At this time, either we have to CCVsDigit
LUT3
use the ready-made hardware of the MicroTalk-8085 trainer DigitVsCC

or placing the components on manually PTHed double Fig. 6 Data Structure and Lookup Tables
layered PCB (Fig. 5). B. Sense EXA Command and Show _ _ _ _ A d on Display
D P 0 ----------------D P 5 Listing – B
XTAL
R e se t
U 12 L21: If (scan code != 09H)
U1 U4 ADC Goto L21
U6 (0 8 04 )
L22: LH → flag1
U 10 Write cc-codes for _ s into CC-Table
Call SUR1 to transfer CC-Table to Display RAM of U9
U3 Enable printing logic for address field
U9
IOC

U2 U7 U8 C. Forming 16-Bit Address and Showing Location Content

U5 U 11
Listing – C
L31: Read CC-codes from location 30H-33H of CC-Table
Consult LUT2 and collect unpacked digits
+5V B rea d b o a rd K eypad Process unpacked digits to form 4-digit hex address, Adr
IO C L32: Pass the address into DPTR register
xxc Execute MOVX A, @DPTR to collect present data of Adr
Put Adr and Data into Hex-Table
Fig. 5 Components Layout for the Manual PTHed Double Layered PCB Call SUR2 to convert Hex-Table to CC-Table
Call SUR1 to show CC-Table to display unit via 8279
A. Building and Testing the Startup Circuit
D. Sense CHG Command and Show XXXX _ _ on Display
• Place the display devices DP0-DP5, U9, U10 on the Listing - D
L41: IF (scan code !=12h)
breadboard and connect them together using jumper wires Goto L41
L42: Write cc-codes for _ s at DP4 & DP5 positions of CC-Table
as per circuit of Fig. 2. We need to consult data sheets of Call SUR1 to show CC-Table to display
the chips to find the pin numbers. Enable printing logic for data field
• Place 89S52 MCU on the breadboard and complete bus E. Writing 8-Bit Data into Memory Location
connections with the 8279. Connect EA/-pin of the MCU Listing – E
L51: Read CC-codes from location 30H-35H of CC-Table
to +5V and CS1/-pin of 8279 to 0V. Consult LUT2 and collect unpacked digits
Process unpacked digits to form 4-digit hex address, Adr
• Convert the following Pseudo Codes into Binary codes Process unpacked digits and form 2-digit data
and fuse them into the flash of the 89S52 MCU. L32: Pass the address into DPTR register
Listing – A Execute MOVX @DPTR, A to write present data into RAM
Put Adr and Data into Hex-Table
L11: 0000 → 0030H ; LJMP 0030H Enable FRW command
L12: Initialize 8279 for 8-digit, left entry, 2-key lock
L13: Set cursor position at DP0-position with auto index
L14: Write characters 8 9 5 2 U P onto display RAM of 8279 F. Sense FRW Command and Show Next Location and Data
L15: Loop HERE ; LJMP HERE Listing – F
L61: If (scan code !=11h)
• Place the loaded MCU on breadboard and press Reset Goto L61
L62: Execute partial codes of Listing – C to form address
key. We will see 8952 UP message on the display. Pass address into DPTR register
(DPTR) + 01h → DPTR
B. Placing EPROM Memory (U7) with the Trainer A ← ((DPTR))
• Place U7, U5, and U3 on breadboard. Connect them with Pass DPTR and A into Hex-Table
Call SUR2 and SUR1 to show address and data on display
the system and the CS/-pins of the U7 and U9. Connect
EA/-pin of MCU to 0V. G. Program Execution
Listing – G
• Fuse the codes of Listing – A into the U7 using ROM L71: if (scan code !=01h)
Goto L71
Programmer and place it back on breadboard. Apply L72: Read Adr from Hex-Table and keep in DFDE and DFDD of RAM
power. Press Reset key. The display will show 8952 UP. Make a jump to location DFDEH : LJMP DFDEh

C. Placing RAM (U8) with the Trainer VIII. CONCLUSIONS

• Place U8 on breadboard and connect its pin with other IC.
• Place U4 on breadboard and connect its output signal
(CRD/) with the RD/-pins of the RAM and EPROM.
D. Placing Keypad with Trainer
• Place U11 and switches on a breadboard.
• Connect the terminals of the switches with the row lines
of the 8279 and the column lines of the U11 decoder.
VII. DEVELOPING SOFTWARE ROUTINES
To develop software routines for the MP, as we will
experience, there are needs of data structures to store
variables and lookup tables for code conversion purposes.
The design methodology of an 89S52 Microcontroller
Trainer, which once belonged to the business houses, is now
available to the public. The interested readers may build their
own Trainers and learn many more things like ‘Single
Stepping’, ‘Register Check’, ‘MCU Based Low Cost
Industrial Control Circuits’, ‘Consumer Products’, and
‘Creating Effective Lessons for Class Room Lectures.’
REFERENCES
[1] MIDAS Engineering Co. of Korea. www.midas.com for 8051 Trainer.
[2] www. Google.com for 8051 free assembler, MIDE-51.
[3] www.ty51.com for Universal ROM Programmer.
[4] krdcbdgm@yahoo.com : for details of 8085 Microprocessor Trainer

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