Lecture 7

Recap
Data structures: Arrays, strings
Indexed addressing, i=index, buf is base address
Size Assembly C
Byte buf+i buf[i]
Halfword buf +2*i buf[i]
Word buf +4*i buf[i]
Size_N buf +N*i buf[i]

Pointers: define, initialize, dereference

Access sequentially using pointers, pt is pointer
Size Assem next Assem deref C next C dereference
Byte pt = pt+1 LDRB/LDRSB pt = pt+1 *pt
Halfword pt = pt+2 LDRH/LDRSH pt = pt+1 *pt
Word pt = pt+4 LDR pt = pt+1 *pt
Size_N pt = pt+N
Functional debugging: dumps into arrays
SysTick: reload = 0xFFFFFF for measuring time
Reload = n-1, clear count, wait for count

Outline
1. PLL
2. struct to make data structures
3. Finite State Machine
4. Introduction to interrupts

Crystal
What: silicone lattice that resonates at selected frequency, 16.000 MHz
Why: time accuracy ±50ppm
How: soldered onto LaunchPad

PLL
What: analog circuit: input clock to output clock (faster or slower)
Why: software speed versus system power tradeoff
How: call PLL_Init

struct
list of things of different types
struct State{
uint32_t out; // 2-bit output
uint32_t delay; // time to delay in 1ms
uint32_t next[4]; // Next if 2-bit input is 0-3
};
typedef const struct State State_t;
State_t thing;
SysTick_Wait10ms(thing.Time);
State_t bunch[10];
SysTick_Wait10ms(bunch[n].Time);
State_t *pt;
pt = bunch; // pt = &bunch[0];
SysTick_Wait10ms(pt->Time);
Lecture 7

Software abstraction
What is abstraction?
Define a problem with a minimal set of basic, abstract principles / concepts
Separation of what it does (policy) from how it works (mechanisms)
Straightforward, mechanical path to implementation

Three advantages of abstraction are

Faster to develop
Easier to debug (prove correct) and
Easier to change

Finite State Machines (FSMs)

Set of inputs, outputs, states and transitions
State graph defines input/output relationship
What is a state?
Description of current conditions
What is a state graph?
Graphical interconnection between states
What is a controller?
Software that inputs, outputs, changes state
Accesses the state graph

What is a finite state machine?

Inputs (sensors)
Outputs (actuators)
Controller
State graph

Moore FSM
output value depends only on the current state,
inputs affect the state transitions
significance is being in a state
Input: when to change state
Output: definition of being in that state
Hardware

Draw state transition table (STT), Draw state transition graph (STG), show C code for machine
State \ Input 00(lost) 01(left) 10 (right) 11 (on line)

Nice (0x03,50) OffR OffL OffR Nice

OffL (0x02,50) OffL OffL Nice Nice

OffR (0x01,50) OffR Nice OffR Nice

struct State {
Lecture 7

uint32_t out; // 2-bit output

uint32_t delay; // time to delay in 1ms
uint32_t next[4]; // Next if 2-bit input is 0-3
};
typedef const struct State State_t;

#define Nice 0
#define OffL 1
#define OffR 2
State_t fsm[3]={
{0x03, 50, { OffR, OffL, OffR, Nice }}, // Nice
{0x02, 50, { OffL, OffL, Nice, Nice }}, // OffL
{0x01, 50, { OffR, Nice, OffR, Nice }} // OffR
};
void main(void) {
uint32 CS; // index of current state
uint32_t Input;

// initialize ports and timer

…

CS = Nice; // start state

while(1) {
Motor_Out(FSM[CS].Out); // set motors
SysTick_Wait10ms(FSM[CS].Time);
Input = Sensor_In(); // read sensors
CS = FSM[CS].Next[Input];
}
}
*********************pointer version***************
struct State {
uint32_t out; // 2-bit output
uint32_t delay; // time to delay in 1ms
const struct State *next[4]; // Next if 2-bit input is 0-3
};
typedef const struct State State_t;

#define Nice &fsm[0]

#define OffL &fsm[1]
#define OffR &fsm[2]
State_t fsm[3]={
{0x03, 50, { OffR, OffL, OffR, Nice }}, // Nice
{0x02, 50, { OffL, OffL, Nice, Nice }}, // OffL
{0x01, 50, { OffR, Nice, OffR, Nice }} // OffR
};
void main(void) {
STyp *Pt; // state pointer
Lecture 7

uint32_t Input;

// initialize ports and timer

…

Pt = goN; // start state

while(1) {
Motor_Out(Pt->Out); // set motor
SysTick_Wait10ms(Pt->Time);
Input = Sensor_In(); // read sensors
Pt = Pt->Next[Input];
}
}
Lecture 7

Thought Exercise: Implement Lab 3 as an FSM

1) The system starts with 20% duty-cyle
2) Turn the LED on/off at current duty-cycle
2) If the switch is pressed, then switch duty-cycle
Cycle: 40->60->80->100->0->20->40...
3) Steps 1 and 2 are repeated over and over
Lab 5)
Num Name 6-LED PF3-1 Time In=0 In=1 In=2 In=3 In=4 In=5 In=6 In=7

0 GoW West green Red

1 West yellow Red

2 South green Red

3 South yellow Red

4 Both red Green

5 Both red Red

6 All red off

How to make it flash?

How to remember press?
Lecture 7

An interrupt is the automatic transfer of software execution in response to a

hardware event (trigger) that is asynchronous with current software
execution.
external I/O device (like a keyboard or printer) or
an internal event (like an op code fault, or a periodic timer.)
Occurs when the hardware needs or can service (busy to done state transition)
 Each potential interrupt source has a separate arm bit
 Set for those devices from which it wishes to accept interrupts,
 Deactivate in those devices from which interrupts are not allowed
 Each potential interrupt source has a separate flag bit
 hardware sets the flag when it wishes to request an interrupt
 software clears the flag in ISR to signify it is processing the request
 Interrupt enable conditions in processor
 Global interrupt enable bit, I, in PRIMASK register
 Priority level, BASEPRI, of allowed interrupts (0 = all)
 Four conditions must be true simultaneously for an interrupt to occur:
1. Arm: control bit for each possible source is set
2. Enable: interrupts globally enabled (I=0 in PRIMASK)
3. Level: interrupt level must be less than BASEPRI
4. Trigger: hardware action sets source-specific flag
 Interrupt remains pending if trigger is set but any other condition is not true
 Interrupt serviced once all conditions become true
 Need to acknowledge interrupt
 Clear trigger flag or will get endless interrupts!
1. The execution of the main program is suspended
1. the current instruction is finished,
2. suspend execution and push 8 registers (R0-R3, R12, LR, PC, PSR) on the
stack
3. LR set to 0xFFFFFFF9 (indicates interrupt return)
4. IPSR set to interrupt number
5. sets PC to ISR address
2. The interrupt service routine (ISR) is executed
 clears the flag that requested the interrupt
 performs necessary operations
 communicates using global variables
2. The main program is resumed when ISR executes BX LR
 pulls the 8 registers from the stack
Lecture 7

Before interrupt After interrupt

I 0 I 0
RAM Context Switch
IPSR 0 Finish instruction IPSR 18 old R0
a) Push registers old R1
BASEPRI 0 b) PC = {0x00000048} BASEPRI 0 old R2
c) Set IPSR = 18 old R3
old R12
d) Set LR = 0xFFFFFFF9 old LR
Use MSP as stack pointer old PC
MSP MSP old PSR
Stack Stack