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OP-Amp: Introduction, Basics, Ideal OP-AMP -Open Loop and feedback in OP-AMP
operation, Inverting and non inverting amplifier -Voltage follower and Differential
amplifiers -Difference mode, Common mode gain, CMRR. Operation amplifier internal
circuit, Example of OP-AMP IC’s (IC 741) OP-Amp D.C characteristics
The operational amplifier is a versatile device that can be used to amplify dc as well as ac
input signals and was originally designed for computing such mathematical functions as
addition, subtraction, multiplication, and integration.
Thus the name operational amplifier stems from its original use for these mathematical
operations and is abbreviated to op-amp. With the addition of suitable external feedback
components, the modern day op-amp can be used for a variety of applications, such as ac and
dc signal amplification, active filters, oscillators, comparators, regulators, and others.
Ideal op-amp:
2. Infinite input resistance so that almost any signal source can drive it and there is no
loading on the preceding stage.
3. Zero output resistance Ro so that output can drive an infinite number of other devices.
5. Infinite bandwidth so that any frequency signal from 0 to ∞Hz can be amplified without
attenuation.
6. Infinite common mode rejection ratio so that the output common-mode noise
voltage is zero.
7. Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes.
This open-loop operation is practical only when the operational amplifier is used as
a comparator (a circuit which compares two input signals or compares an input signal to some
fixed level of voltage).
As an amplifier, the open-loop operation is not practical because the very high gain of
the operational amplifier creates poor stability. (Noise and other unwanted signals are
amplified so much in open-loop operation that the operational amplifier is usually not used in
this way.)
In the closed-loop configuration, the output signal is applied back to one of the input
terminals. This feedback is always degenerative (negative). In other words, the feedback signal
always opposes the effects of the original input signal. One result of degenerative feedback is
that the inverting and non inverting inputs to the operational amplifier will be kept at the
same potential. Closed-loop circuits can be of the inverting configuration or non inverting
configuration. Since the inverting configuration is used more often than the non inverting
configuration, the inverting configuration will be shown first.
Inverting amplifier :
Inverting amplifier is one in which the output is exactly 1800 out of phase with respect
to input (i.e. if you apply a positive voltage, output will be negative). Output is an inverted (in
terms of phase) amplified version of input.
Assuming the op amp is ideal and applying the concept of virtual short at the input terminals
of op amp, the voltage at the inverting terminal is equal to non inverting terminal.
Gain
Gain of inverting amplifier Av= – Rf/Ri.
Non Inverting amplifier is one in which the output is in phase with respect to input(i.e. if you
apply a positive voltage, output will be positive ). Output is an Non inverted(in terms of
phase) amplified version of input.
Assuming the op amp is ideal and applying the concept of virtual short, the voltage at the
inverting terminal is equal to non inverting terminal.
Applying KCL at inverting node we get
(Vi-Vo)/R2+(Vo-0)/R1 = 0
Voltage follower :
Voltage follower is one in which the output exactly follows the input. The circuit shown below
acts as ideal DC voltage follower.
The output exactly follows the input because the two inputs are tied together virtually, hence
Vout = Vin.
Differential Amplifier :
A differential amplifier is one which amplifies only difference between two signals. Ideally
difference amplifier should not amplify signal content common to both input signals.
Practically the common mode signal gain will be finite.
Consider a transducer which provides a small signal at its output terminals which has to be
sent to the measuring instrument. The medium carrying these signals for example copper wire
may induce an interference signal which is comparable or larger than the transducer output
signal. This noise signal is common to both output terminals. Hence by using differential
amplifier at the front end of the amplifier this noise signal can be attenuated to a large extent
so that its amplitude is negligible to the transducer output signal.
Consider the simplest design of differential amplifier with one opamp, four resistors R1, R2,
R3 and R4. V1 and v2 are the two input voltages applied to non-inverting and inverting
terminals of an opamp. In this configuration opamp is given negative feedback hence the
concept ofvirtual ground holds and V+ = V-.
Due to high input resistance of opamp, it draws no current. Hence
From the equations it is evident that for the output to be of the form
Ad*(V1-V2)
A common mode signal is one that drives both inputs of a differential amplifier equally. If a
differential amplifier is operating in an environment with lot of electromagnetic interference,
each base picks up an unwanted interference voltage. If both the transistors were matched in
all respects then the balanced output would be theoretically zero. This is the important
characteristic of a differential amplifier. It discriminates against common mode input signals.
In other words, it refuses to amplify the common mode signals.
In practical differential amplifier, the output depends not only on difference signal but also
upon the common mode signal (average).
vd = (v1 – vd )
and vc = ½ (v1 + v2 )
vO = A1 v1 + A2 v2
Where A1 & A2 are the voltage amplification from input 1(2) to output under the condition that
input 2 (1) is grounded.
The voltage gain for the difference signal is Ad and for the common mode signal is AC.
The ability of a differential amplifier to reject a common mode signal is expressed by its common mode
rejection ratio (CMRR). It is the ratio of differential gain Ad to the common mode gain AC.
Operation amplifier internal circuit (IC 741)
Where pins 1 and 5showing Offset Null’s along with potentiometer arrangement are used to
nullify offset voltages. Positive offsets are nullified with pin 1 and negative offsets are nullified
using pin 5.+Vcc and -Vcc are positive and negative supply voltages respectively generally
within a range of + or _12 to + or – 24 .
Pins 2 and 3 are inverting and non inverting input terminals respectively. Maximum
differential input voltages will be specified in datasheets which should be exceeded, Opamp
may get damaged due to high power dissipation. Pin 6 is single ended output terminal from
which output will be taken.
INTERNAL CIRCUIT :
The operational amplifier is a direct-coupled high gain amplifier usable from 0 to over 1MHz
to which feedback is added to control its overall response characteristic i.e. gain and
bandwidth. The op-amp exhibits the gain down to zero frequency.
The input stage is the dual input balanced output differential amplifier. This stage generally
provides most of the voltage gain of the amplifier and also establishes the input resistance of
the op-amp. The intermediate stage is usually another differential amplifier, which is driven
by the output of the first stage. On most amplifiers, the intermediate stage is dual input,
unbalanced output. Because of direct coupling, the dc voltage at the output of the intermediate
stage is well above ground potential. Therefore, the level translator (shifting) circuit is used
after the intermediate stage downwards to zero volts with respect to ground. The final stage is
usually a push pull complementary symmetry amplifier output stage. The output stage
increases the voltage swing and raises the ground supplying capabilities of the op-amp. A well
designed output stage also provides low output resistance.
Input stage (dual input balanced output differential amplifier)
If use two input signals, the configuration is said to be dual input, otherwise it is a single input
configuration. On the other hand, if the output voltage is measured between two collectors, it
is referred to as a balanced output because both the collectors are at the same dc potential
w.r.t. ground.
V1 and V2 are the two inputs, applied to the bases of Q1 and Q2 transistors. The output
voltage is measured between the two collectors C1 and C2, which are at same dc potentials.
The internal resistances of the input signals are denoted by RS because RS1= RS2. Since both
emitter biased sections of the different amplifier are symmetrical in all respects, therefore, the
operating point for only one section need to be determined. The same values of ICQ and
VCEQ can be used for second transistor Q2. Applying KVL to the base emitter loop of the
transistor Q1.
The value of RE sets up the emitter current in transistors Q1 and Q2 for a given value of VEE.
The emitter current in Q1 and Q2 are independent of collector resistance RC. The voltage at the
emitter of Q1 is approximately equal to -VBE if the voltage drop across R is negligible.
Knowing the value of IC the voltage at the collector VCis given by
Because of the direct coupling the dc level at the emitter rises from stages to stage. This
increase in dc level tends to shift the operating point of the succeeding stages and therefore
limits the output voltage swing and may even distort the output signal.
To shift the output dc level to zero, level translator circuits are used. An emitter follower with
voltage divider is the simplest form of level translator as shown in fig 1.13. Thus a dc voltage at the
base of Q produces 0V dc at the output. It is decided by R1 and R2. Instead of voltage divider
emitter follower either with diode current bias or current mirror bias
In this case, level shifter, which is common collector amplifier, shifts the level by 0.7V. If this
shift is not sufficient, the output may be taken at the junction of two resistors in the emitter leg.
Current is taken from the source into the op-amp inputs respond differently to current and
voltage due to mismatch in transistor.
1. Input bias current
4. Thermal drift
1. In an ideal op-amp, we assumed that no current is drawn from the input terminals.
2. The base currents entering into the inverting and non-inverting terminals (IB-&
IB+ respectively).
3. Even though both the transistors are identical, IB- and IB+ are not exactly equal due to
internal imbalance between the two inputs.
4. Manufacturers specify the input bias current IB
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Unit IV: Operational Amplifier Applications
Basic OP-AMP applications, Instrumentation amplifier - OP-Amp circuit using diodes, Sample and
Hold circuit, V-I and I-V convertor, Multiplier, Divider, Integrator and Differentiator.
Op-amps can be configured to work as different types of signal amplifiers like inverting, non-
inverting, differential, summing, etc. as well as it is used to perform mathematical operations
like addition, subtraction, multiplication, division and also differentiation and integration.
Operational amplifiers can be used in construction of active filters, providing high-pass, low-
pass, band-pass, band-reject and delay functions.
Op-amps are also used in signal processing circuits such as Precision Rectifiers, Clamping
circuits and Sample-and-Hold circuits.
Instrumentation amplifier :
The output stage of the instrumentation amplifier is a difference amplifier, whose output
Vout is the amplified difference of the input signals applied to its input terminals. If the
outputs of op-amp 1 and op-amp 2 are Vo1 and Vo2 respectively, then the output of the
difference amplifier is given by,
Vout = (R3/R2)(Vo1-Vo2)
The expressions for Vo1 and Vo2 can be found in terms of the input voltages and resistances.
The potential at node A is the input voltage V1. Hence the potential at node B is also V1, from
the virtual short concept. Thus, the potential at node G is also V1.
The potential at node D is the input voltage V2. Hence the potential at node C is also V2, from
the virtual short. Thus, the potential at node H is also V2.
Ideally the current to the input stage op-amps is zero. Therefore the current I through the
resistors R1, Rgain and R1 remains the same.
I = (Vo1-Vo2)/(2R1+Rgain)
Since no current is flowing to the input of the op-amps 1 & 2, the current I between the nodes
G and H can be given as,
(Vo1-Vo2)/(2R1+Rgain) = (V1-V2)/Rgain
(R2/R3)Vout = (2R1+Rgain)(V1-V2)/Rgain
The above equation gives the output voltage of an instrumentation amplifier. The overall gain
of the amplifier is given by the term (R3/R2){(2R1+Rgain)/Rgain}.
When Vi<0 V
The diodes D1, D2 will be reverse biased and are open. The combination shown in the figure
resembles a inverting amplifier with gain -Rf/R1. Hence the output of opamp
V0 = -Rf/R1 (Vi)
The output will be positive as Vi is negative.
In positive half cycle of applied ac input signal, output of first op-amp (A1) is Negative.
Therefore diode D2 is forward biased & diode D1 is reverse biased. Here op-amp A1 works as
an inverting amplifier with gain =(-R/R)=-1
Therefore output of op-amp A1 is ,V=(-1) Vin=-Vin
Op-amp A2 works as an inverting adder. The two inputs to the op-amp A2 are voltage V
(output of A1) and input voltage Vin. Thus output of op-amp A2i.e. Output voltage is given as
∴Vo=-[R/R Vin+R/(R⁄2) V ]
∴Vo=-[Vin+2V]
Substituting V=-V_in
∴Vo=Vin
In negative half cycle of applied ac input signal, output of first op-amp (A1) is positive.
Therefore diode D2 is reversed biased & diode D1 is forward biased.
Due to virtual ground concept output of op-amp A1is zero. (∴V=0)
Thus output of op-amp A2, i.e. Output voltage is given as
∴Vo=-[R/R Vin+R/(R⁄2) V ]
∴Vo=-[R/R Vin+R/(R⁄2) (0) ]
But in negative half cycle input magnitude is negative therefore we get,
∴Vo=-[R/R (-Vin ) ]
∴Vo=Vin
Thus in both the half cycles output is positive & in one direction & also have same magnitude.
Thus it is also called as non-saturating type of PFWR because op-amp A1 is not going in
saturation.
The transfer characteristics and input-output waveforms of PFWR are shown below,
The operation can be explained as follows assume the switch is open and if
a)Vout < Vin the op amp output V’ is positive so that the diode conducts and the capacitor
charges to the input value at that instant as it forms a voltage follower circuit.
b) When Vout > Vin, op amp output V’ is negative and the diode becomes reverse biased.
Thus the capacitor charges to the most positive value of input.
In op amp zero crossing detectors the output responds almost discontinuously every time the
input passes through zero. It consists of a comparator circuit followed by differentiator and
diode arrangement.
a sinusoidal signal is applied as input to opamp. Since the opamp is in open loop configuration
Vo = Av*(Vi-0) the output of opamp i.e.Vo will be at Positive saturation voltage +Vcc when ever
Vi > 0 V and is at negative saturation voltage -Vcc when Vi < 0 V.
whenever the output of opamp transits from +Vcc to -Vcc the capacitor C charges to +Vcc if the
output of opamp changes from -Vcc to +Vcc and it discharges through R to -Vcc if the output of
opamp changes from -Vcc to +Vcc .
The switching element will be a electronic device such as MOSFET with control voltage
applied to gate consisting of a train of pulses. Whenever the switch is closed i.e. MOSFET is
on, the capacitor charges to the voltage at the input with a time constant equal to on resistance
of control device *C. After the switch is opened (MOSFET is off) the capacitor holds the charge
and hence the voltage across capacitor cannot change since it does not have any path to
discharge. Then the voltage across the capacitor is replicated at the output by a voltage
follower.
Input Waveform
Output Waveform
V to I Converter:
A voltage to current converter in which load resistor RL is floating (not connected to ground). The
input voltage is applied to the non-inverting input terminal and the feedback voltage across R
drives the inverting input terminal. This circuit is also called a current series negative feedback,
amplifier because the feedback voltage across R depends on the output current iL and is in series
with the input difference voltage Vd.
Writing the voltage equation for the input loop.
vin = vd + vf
But vd » since A is very large, therefore,
vin = vf vin = R iin
iin = v in / R.
Due to virtual ground the current through R is zero and the input current flows through Rf.
Therefore, vout =-Rf * iin
The lower limit on current measure with this circuit is set by the bias current of the inverting input
.
MULTIPLIER
If both inputs are positive, then the multiplier is called a one-quadrant multiplier. If one input
is kept at a positive value and the other input is allowed to take either a positive or negative
value, then it is called a two-quadrant multiplier. If both the inputs are allowed to take either
positive or negative values, then it is called a four-quadrant multiplier.There are some
commercially available multiplier ICs and multiplier circuits can be constructed from op-amp
ICs such as 741.
The applications of multipliers include frequency doubling, frequency shifting, phase angle
detection, real power computation, and squaring signals.
Divider
DIFFERENTIATOR:
A circuit in which the output voltage waveform is the differentiation of input voltage is called
differentiator.
The expression for the output voltage can be obtained from the Kirchoff's current equation written
at node v2.
Thus the output vo is equal to the RC times the negative instantaneous rate of change of the input
voltage vin with time. A cosine wave input produces sine output. Fig.1.39 also shows the output
waveform for different input voltages.
The input signal will be differentiated properly if the time period T of the input signal is larger
than or equal to Rf C. As the frequency changes, the gain changes. Also at higher frequencies the
circuit is highly susceptible at high frequency noise and noise gets amplified. Both the high
frequency noise and problem can be corrected by adding, few components.
Integrator:
A circuit in which the output voltage waveform is the integral of the input voltage waveform
is called integrator.
Here, the feedback element is a capacitor. The current drawn by OPAMP is zero and also the V2 is
virtually grounded.
Therefore, i1 = if and v2 = v1 = 0
The output voltage is directly proportional to the negative integral of the input voltage and
inversely proportional to the time constant RC. If the input is a sine wave the output will be cosine
wave. If the input is a square wave, the output will be a triangular wave. For accurate integration,
the time period of the input signal T must be longer than or equal to RC.
In this type of applications, output is not having a linear relationship with input. Op-amp is
operated either in open loop condition or with positive feedback.
Op-amp in open loop configuration goes into saturation. Op-amp requires more time to
come out of the saturation, so these kinds of circuits are preferred at low frequency
applications. By modifying the circuit we can also make circuit as non-saturating type and
make it to use at high frequency.
In linear applications, we carried out mathematical analysis and it is based on two
principles
1.Input current to the op-amp is zero.
2.Virtual ground.
The first assumption is also used in non-linear applications. The second assumption says
that both the terminals are at the same potential (due to negative feedback). In non-linear
applications no negative feedback is applied and hence this assumption is not used in non-
linear applications.
Comparators:
Comparators are used in ADC & DAC. It is also used for generating waveforms (square &
2. Accuracy:
It is the smallest amount of input difference voltage required to make the output to change its
state
3. Strobe function:
To enable/disable the device, certain comparators are having a strobe terminal. When it is
enable, output will respond to input. If it is disabling, output will not respond to input signal
4. Latch: some of the comparators are having latching facility. The required output state is
frozen in a latch flip flop.
INVERTING COMPARATOR
The input signal is applied at inverting terminal of op-amp. The reference voltage Vref = 0V.
Due to open loop configuration of op-amp, the output goes into saturation.
The reference voltage is zero here and hence the circuit is also called as inverting zero crossing
detector. The reference voltage can be changed externally with the help of potential divider
arrangement.
If the supply voltage is positive, the reference voltage is also positive. If the supply voltage is negative,
the reference voltage is also negative.
NON-INVERTING COMPARATOR
In this circuit input is applied to the non-inverting terminal of op-amp. Inverting terminal is kept at
reference potential. In this case the reference voltage is zero. i.e. Vref = 0V.
The op-amp is in open loop configuration and hence its output is in saturation. The saturation level at
the output may be positive or negative depending on the input signal. Here op-amp acts as a
comparator and compares the input signal with the reference voltage.
If the difference between the two signals is positive, op-amp goes into positive saturation i.e. Vo =
+Vsat .
If the difference between the two signals is negative, op-amp goes into negative saturation i.e. Vo= -
Vsat.
1. If Vin>Vref, Vo = +Vsat
2. If Vin<Vref, Vo = -Vsat
The transfer characteristics
Schmitt Trigger :
The input voltage Vin triggers the output V0 every time it exceeds certain voltage levels called
the upper threshold voltage Vut and lower threshold voltage Vlt, These threshold voltages are
obtained by using the voltage divider where the voltage across R1 is fed back to the input. The
voltage across R1 is a variable reference threshold voltage that depends on the value and
polarity of the output voltage V0
When Vo = +VSat, the voltage across R1 is called the upper threshold voltage, Vut The input voltage
Vin must be slightly more positive than Vut in order to cause the output switch from +VSat to -VSat.
As long as Vin
Thus, if the threshold voltages are made larger than the input noise voltages, the positive feedback will
eliminate the false output transitions. Resistance ROM used to minimize the offset problems.
The comparator with positive feedback is said to exhibit hysteresis, a dead-band condition That is,
when the input of the comparator exceeds Vut, its output switches from +Vsat to -Vsat and reverts
back to its original state, +Vsat, when the input goes below Vlt.
Peak Detector
Rectifier circuit gives average value of input signal; but in practice we need peak value of input signal.
This is achieved by peak detector circuit.
In the positive half cycle, diode D is forward biased and capacitor C starts charging. When input
reaches its peak value capacitor gets charged to positive peak value.
In negative half cycle, as input decreases, diode D is reversed biased and capacitor is isolated and holds
the peak value of previous cycle. Hence called as peak detector.
AstableMultivibrator:
Both the states at the output of an op-amp are temporary states. None of them is a permanent state. If
output is HIGH, after some time it changes to LOW without any triggering pulse. Thus output is a
square wave which is continuously toggling between HIGH and LOW states and hence the name
astable.
The output voltage is either +Vsat (HIGH) or –Vsat (LOW).The threshold voltage for the op-amp
comparator is ±VT.
It is given as
VT=R2/(R1+R2 ) Vout
VT=β.Vout
Thus +VT and –VT are the two triggering points are available
The voltage across capacitor C is input to the op-amp and the second input is the triggering point ±VT.
So the voltage across capacitor, Vc is compared with the threshold VT(i.e. triggering point).
Let at t = 0, output just changes to +Vsat so capacitor starts charging through resistance R towards
+Vsat with an initial voltage of -VT.
The voltage across capacitor C is given as
Vc=Vfinal+[Vinitial-Vfinal ] e^((-t)⁄RC)
Where final value =+Vsat
Initial value =-VT
∴Vc=Vsat-[VT+Vsat ] e^((-t)⁄RC)
When voltage across capacitor is more positive(i.e. crossing the threshold +VT) with respect to +VT,
output state changes to -Vsat
When capacitor voltage is more negative with respect to negative threshold -VT output state changes to
+Vsat.
The time constant ‘RC’ is same while charging and discharging towards +Vsat and –Vsat respectively.
So output square wave is symmetrical with 50% duty cycle.
Since the charging and discharging time is same, the total time of one cycle is
T=2t1
From the waveforms shown above,
At time t = t1, the voltage across capacitor C is
∴VT=Vsat-[VT+Vsat ] e^((-t1)⁄RC)
[VT+Vsat ] e^((-t1)⁄RC)=Vsat-VT
e^((-t1)⁄RC)=(Vsat-VT)/(VT+Vsat )
But the threshold point VT is
VT=R2/(R1+R2 ) Vsat
∴e^((-t1)⁄RC)=(Vsat-R2/(R1+R2 ) Vsat)/(Vsat+R2/(R1+R2 ) Vsat )
∴e^((-t1)⁄RC)=(Vsat [1-R2/(R1+R2 )])/(Vsat [1+R2/(R1+R2 )] )
∴e^((-t1)⁄RC)=[(R1+R2-R2)/(R1+R2 )]/[(R1+R2+R2)/(R1+R2 )]
∴e^((-t1)⁄RC)=R1/(R1+2R2 )
-t1/RC=ln[R1/(R1+2R2 )]
∴t1=-RC ln[R1/(R1+2R2 )]
Absorbing the negative sign
t1=RC ln[(R1+2R2)/R1 ]
t1=RC ln[1+2R2/R1 ]
But the total time T is T=2t1
∴T=2RC ln[1+2R2/R1 ]
The output frequency ‘f’ is given as
f=1/T
∴f=1/(2RC ln[1+2R2/R1 ] )
Input to the op-amp is either +VT or –VT. So differential input voltage to the op-amp must be 2VT.
et us analyze the circuit using normal analysis concepts used in op-amp. When the switches are closed
the respective currents are flowing through resistors as shown in the circuit diagram above.
Since input current to the op-amp is zero, the addition current flows through feedback resistor.
∴I=I1+I2+I3+ …………+In
The inverting terminal of op-amp is virtually at ground potential.
Consider the example of 3-bit DAC.
When input binary sequence is B1 B2 B3 = 001
If the reference voltage is positive i.e. + VR, then the output voltage is positive.
Disadvantages:
1) When number of binary input increases, it is not easy to maintain the resistance ratio.
2) Very wide ranges of different values of resistors are required.
For high accuracy of conversion, the values of resistances must be accurate.
3) Different current flows through resistors, so their wattage ratings are also different.
4) Accuracy and stability of conversion depends primarily on the absolute accuracy of the resistors and
tracking of each other with temperature.
The following circuit diagram shows the basic 2 bit R-2R ladder DAC circuit using op-amp. Here only
two values of resistors are required i.e. R and 2R. The number of digits per binary word is assumed to
be two (i.e. n = 2). The switch positions decides the binary word ( i.e. B1 B0 )
he typical value of feedback resistor is Rf = 2R. The resistance R is normally selected any value
between 2.5 kΩ to 10 kΩ.
The generalized analog output voltage equation can be given as
The operation of the above ladder type DAC is explained with the binary word (B1B0= 01)
Applying the nodal analysis concept at point (A), we gets following equations
Applying the nodal analysis concept at point (B), we gets following equations
Substituting the equation of VB in the above equation
The voltage at point A i.e. VA is applied as input to the op-amp which is in inverting amplifier mode
Vo=-(2R/R) VA
Vo=-(2R/R)(-VR/8)
Vo=VR/4
SUCCESSIVE APPROXIMATION TYPE ADC
Successive Approximation type ADC is the most widely used and popular ADC method. The
conversion time is maintained constant in successive approximation type ADC, and is proportional to
the number of bits in the digitaloutput, unlike the counter and continuous type A/D converters. The
basic principle of this type of A/D converter is that the unknown analog input voltage is approximated
against an n-bit digital value by trying one bit at a time, beginning with the MSB.
(1) The MSB is initially set to 1 with the remaining three bits set as 000. The digital equivalent
voltage is compared with the unknown analog input voltage.
(2) If the analog input voltage is higher than the digital equivalent voltage, the MSB is retained
as 1 and the second MSB is set to 1. Otherwise, the MSB is set to 0 and the second MSB is set to
1. Comparison is made as given in step (1) to decide whether to retain or reset the second MSB.
Let us assume that the 4-bit ADC is used and the analog input voltage is VA = 11 V. when the
conversion starts, the MSB bit is set to 1.
Now VA = 11V > VD = 8V = [1000]2
Since the unknown analog input voltage VA is higher than the equivalent digital voltage VD,
as discussed in step (2), the MSB is retained as 1 and the next MSB bit is set to 1 as follows
VD = 12V = [1100]2
It consists of a successive approximation register (SAR), DAC and comparator. The output of
SAR is given to n-bit DAC. The equivalent analog output voltage of DAC, VD is applied to the
non-inverting input of the comparator. The second input to the comparator is the unknown
analog input voltage VA. The output of the comparator is used to activate the successive
approximation logic of SAR.
When the start command is applied, the SAR sets the MSB to logic 1 and other bits are made
logic 0, so that the trial code becomes 1000.
Advantages:
Disadvantages:
1 Circuit is complex.
2 The conversion time is more compared to flash type ADC.
Flash Type ADC is based on the principle of comparing analog input voltage with a set of reference
voltages.
To convert the analog input voltage into a digital signal of n-bit output, (2n – 1) comparators are
required.
The three op-amps are used as comparators. The non-inverting inputs of all the three comparators are
connected to the analog input voltage. The inverting terminals are connected to a set of reference
voltages (V/4), (2V/4) and (3V/4) respectively which are obtained using a resistive divider network
and power supply +V.
The output of the comparator is in positive saturation(i.e. logic 1), when voltage at non-inverting
terminal is greater than voltage at inverting terminal and is in negative saturation otherwise.
The following table shows the comparator outputs for different ranges of analog input voltages and
their corresponding digital outputs.
Consider first condition, where analog input voltage VA is less than (V/4). In this case, the voltage at
the non-inverting terminals of all the three comparators is less than the respective voltages at inverting
terminals and hence the comparator outputs are C1C2C3 = 000.
This comparator outputs are applied to the further coding circuit to get the digital outputs as B1B0 = 00
Similarly the digital outputs are calculated for other three conditions also.
Advantages:
1)It is the fastest type of ADC because the conversion is performed simultaneously through a set of
comparators, hence referred as flash type ADC. Typical conversion time is 100ns or less.
2)The construction is simple and easier to design.
Disadvantages:
1)It is not suitable for higher number of bits.
2)To convert the analog input voltage into a digital signal of n-bit output, (2n – 1) comparators are
required. The number of comparators required doubles for each added bit.