Why SPICE Is Just As Good And Just As Bad For
IC Design As It Was 40 Years Ago
Laurence W. Nagel
Omega Enterprises Consulting
251 Stanford Avenue, Kensington, CA 94708
Email: lwn@omega-enterprises.net
Abstract—The modern EDA industry has its roots at UC
Berkeley in the 1970’s, and in particular the spread of SPICE
fueled the growth of this industry. Evolving from a teaching
tool to a research tool to a production IC design tool, SPICE
is still universally used to teach IC design in academia and to
do production IC design in industry. Both the capabilities of the
simulation algorithms and the accuracy of the compact models in
SPICE have improved dramatically over time. However, designer
expectations, to handle larger and more complex circuits and to
give more accuracte results for more detailed aspects of circuit
behavior, have increased at least as fast. This has meant that,
at best, SPICE has had to “run just to stay in place.” This
paper looks back at this escalating arms race, and proposes some
future research directions to help SPICE make some headway
and “swim upstream.”
Index Terms—SPICE, circuit simulation, analog circuit design,
MOSFET transistor modeling and simulation, bipolar transistor
modeling and simulation.
I. I NTRODUCTION
When SPICE was developed at the University of California,
Berkeley, almost fifty years ago, the primary goal was to
provide a tool that would give undergraduate and graduate
students insight into the operation of electronic circuits, par-
ticularly of analog electronic circuits. SPICE soon evolved into
a research tool as well, it was used in numerous analog design
projects, and became the basis of many graduate projects on
the development of both circuit simulation algorithms and
semiconductor device (a.k.a. compact) models.
SPICE continued to evolve as students took SPICE with
them when they graduated and began using the program as
a production tool for the design of integrated circuits. This
led to the need for SPICE to simulate much larger and more
complex circuits.
This paper will address these three roles of SPICE in the
integrated circuit industry: as a teaching tool, as a research
tool, and as a production IC design tool. We will identify those
areas in integrated circuit design where SPICE has been good
and those areas where SPICE has been not so good (bad).
II. SPICE A S A T EACHING T OOL
SPICE originally was developed as a teaching tool to pro-
vide students, both undergraduate and graduate, with insight
into, and understanding of, the operation of electronic circuits,
especially analog circuits. The idea was to make circuit design
978-1-5386-5401-9/18/$31.00 ©2018 IEEE 170
Colin C. McAndrew
NXP Semiconductors
1300 North Alma School Rd, Chandler, AZ 85224
Email: Colin.McAndrew@nxp.com
more accessible and to impart to the students some enthusiasm
about becoming a circuit designer.
In common with all the UC Berkeley simulation programs
[1]–[3], SPICE provided “built-in” models for semiconductor
devices. Don Pederson, one of the principals in the develop-
ment of SPICE, used to talk about how SPICE gave students
a breadboard circuit that had “a beta knob on each transistor.”
Built-in models freed the student in analog circuit design
from worrying about details of the device models. This is
still true, but having built-in models is a two-edged sword.
While the student may not have to worry about the details
of compact models, he or she also misses an introduction
into the models and, more important, their limitations. And
the models presented in design textbooks are not just overly
simplistic, they can be incorrect and misleading, especially for
capacitances.
SPICE gave excellent insight into the performance of a
circuit for a “nominal” design. It still does. But SPICE could
not provide insight into how to modify a “nominal” design
to improve the performance of a circuit. It still can’t. This is
somewhat surprising. The original version of SPICE [4], [5]
contained a method for calculating circuit sensitivities using
the adjoint method [6], and this approach has been shown
to be extendable to calculating parameter sensitivities for
transient analyses [7]. However, although the adjoint solution
technique is still widely used for small-signal noise analysis,
it is not exploited in commercial simulators to determine
sensitivities with respect to device geometries, device biases,
and manufacturing variations.
III. SPICE A S A R ESEARCH T OOL
SPICE soon evolved from a teaching tool into a research
tool, and was used in numerous analog design projects. In
addition, SPICE led to hundreds of graduate projects on
improved simulation algorithms, on algorithms for new types
of circuit analyses, and on the development of significantly
improved compact models.
SPICE has always produced accurate results for linear RLC
circuits. With adequate models, SPICE produced reasonable
approximations of the performance of circuits containing non-
linear devices such as bipolar transistors and MOS transistors.
It still does. But SPICE does not provide an estimate of
how accurate the results of complex nonlinear models are
for a specific simulation. It is possible to use models in
an incorrect manner to produce simulation results that are
totally meaningless. Scarier still, many novice designers today,
weaned on SPICE and not on bench measurements, trust the
simulation results without mentally questioning, or applying
design-experience-related sanity checks to, the simulation re-
sults. This directive is as important as, perhaps more important
than, it was 40 years ago: do not blindly use SPICE simulations
to replace physical understanding of how devices and circuits
should operate.
As SPICE simulation algorithms and model improvements
have accumulated over time, and the industry overall has
matured, there is less research than in the past in both of
these areas. Model developments are still primarily driven by
universities, but algorithm developments are often proprietary
to EDA companies. A key roadblock to developing and sharing
algorithms is the need to implement them in low-level C code
specific to one simulator. Significant improvements in imple-
mentation efficiency and portability can come from the use of
high-level, object-oriented code. This approach is spearheaded
by the Model and Algorithm Prototyping Platform MAPP [8],
which comes the full circle to UC Berkeley.
IV. SPICE A S A P RODUCTION IC D ESIGN T OOL
SPICE continued to evolve as students from numerous
universities took SPICE with them when they graduated and
began using the program as a production tool in the design
of integrated circuits. This progression led to the need to
have SPICE simulate much larger and more complex circuits.
SPICE has progressed to the point where circuit designers can
load literally millions of lines of netlist in the program and
perform hours and days of simulations to ascertain if their
circuit works as it is supposed to.
Enhancing the capabilities of SPICE to handle millions of
lines of netlist instead of hundreds of lines of netlist was not
without bumps in the road. As SPICE became a keystone of
the IC design process, numerous “industrial strength” versions
of SPICE became commercially available, including HSPICE
[9], Spectre [10], and SmartSPICE [11]. These “industrial
strength” simulators preserved the SPICE input format and
had pretty much the same core simulation capabilities (DC,
AC Small-Signal, and Large-Signal Transient Analyses). The
improvements in these simulators were to the core algorithms
of sparse matrix solution, iterative nonlinear solution methods,
and numerical integration methods. Recently, Sandia National
Laboratories released the XYCE simulator [12] which features
better core algorithms that yield additional improvements in
simulation efficiency.
One of the core strengths of SPICE was that it placed
as much importance on models as on algorithms; to quote
from the abstract of [4]: “particular emphasis is placed upon
the circuit models for the BJT and the FET.” In the decades
since SPICE spread throughout the semiconductor industry the
growing complexity of technology and circuits, increasingly
stringent IC performance specifications, and an industry-wide
push to reduce IC design cycle time have all focused attention
171
on model accuracy and computational efficiency. This has led
to significant improvements in the basic capabilities of models,
that is, in the physics that underlies them, and in how models
are implemented in simulators.
But neither algorithms nor models are perfect. That is
the “just as bad” aspect of the title of this paper. When
SPICE was first developed it was the “apex predator” of
both algorithms and models: It rendered hand calculations
of circuit performance (feasible for simple circuits that com-
prised several transistors, infeasible for any practical circuit
for decades) obsolete, and defined the foundation of circuit
simulation from the early 1970s to today. The algorithms are
good, but neither perfect nor complete (for example, cyclo-
stationary or transient noise simulation), and more importantly
the accuracy expected from, and assumed of, the models has
grown exponentially over time (“I SPICEd it so it must be
right”) whereas the capabilities of the models have not kept
up.
Weak inversion and leakage modeling cannot be done to
1% accuracy, so don’t trust the simulations to that level.
Capacitances in the most widely used MOS transistor models
can sort-of-work for fast digital or analog circuits, but not
both at the same time. New device structures can include
new phenomena, like the “hump” effect in weak inversion for
STI MOS transistors [13], that take years, or even decades, to
become included in compact models.
It is impossible to make models perfect (by definition they
are “models”). So, to blindly trust SPICE simulations, espe-
cially for “fine structure” features (distortion, which requires
accuracy for high order derivatives, leakage, noise statistics,
basically anything but the norm—even output conductance in
weak inversion or at the boundary between nonsaturation and
saturation, which depends on process variability), is specious.
SPICE produced reasonable estimates of “nominal” perfor-
mance and was used to produce “worst-case” performance
estimates using “corner” files. “Corner” files became a stan-
dard feature of most SPICE simulators, but as simulating
manufacturing variations became a more critical component
of SPICE simulation, numerous problems with corner files
were uncovered [14], [15]. Sadly, SPICE still does not directly
provide an estimate of the variation of circuit performance with
manufacturing variations. Monte Carlo like simulations give
some information, but unless analyzed properly (the sensitivity
analysis noted above) do not guide a designer in terms of
optimal layout, bias, or geometry.
V. SPICE A LGORITHMS I N T HE F UTURE
So how will SPICE evolve in the future? What follows are
several areas of simulation capability that are necessary in a
public domain version of SPICE. Several proprietary versions
contain one or more of these improvements, but they have not
yet been migrated to open source versions.
A. SPICE will remain an Open Source tool
SPICE has lasted as long as it has in part because it is
an open source tool, versions of which are available free of
charge to all takers. An open source SPICE is a far better
educational tool because the student can always take the tool
apart to see how it works and how it can be improved. An
open source SPICE is a far better research tool because it can
be modified to fit the needs of a new technology, even if it is
not profitable for an EDA vendor to make the modification.
For SPICE to continue to be successful, it must continue to
be an open source tool.
B. SPICE will take advantage of new hardware (Multicores,
GPU’s, Cloud Computing, even Smart Phones)
The clock speed of processors stopped increasing with
advancing technology nodes years ago. Instead, as design rules
continue to decrease, more cores and more ancillary hardware
such as Graphics Processing Units (GPUs) have become avail-
able. Cloud computing is making ever-less-expensive CPU
cycles available to all. Even smart phones now come with
two cores and a GPU, and are capable of running SPICE!
To take advantage of this trend in technology, SPICE
algorithms need to exploit the “obvious parallelism” in circuit
simulation. This includes model evaluation using GPUs, as
well as exploiting the “obvious latency” in large circuits (this
has been done for regular circuits such as memories, but not for
general circuits). Large systems need multiple copies of SPICE
simulating different portions of the circuit simultaneously. This
is an important application of parallel computing that requires
effective inter-process communication.
One new development in parallel circuit simulation is the
XYCE simulator [12] that was developed at Sandia National
Laboratories with the express goal of exploiting parallel pro-
cessing hardware. XYCE has been in development for fourteen
years and has been released as an Open Source program.
Another recent development in circuit simulation is the use
of special-purpose hardware such as GPUs. These chips orig-
inally were designed for accelerating graphics for computer
games, but are really specialized processing units tailored to
single-instruction multiple-data (SIMD) applications, such as
evaluating many copies of a device model with different data
(i.e. with different biases and parameters) [16]. It would be
interesting if GPUs could be leveraged to speed up other
aspects of simulation.
C. SPICE will accept Verilog-A as input
In addition to being able to accept device models coded in
Verilog-A, it would be highly desirable to have SPICE accept
netlists that are compatible with Verilog-A. This compatibility
will aid compact model development by allowing the full
power of the Verilog-A language. Verilog-A compatibility also
will allow noncritical portions of the circuit to be described
at the behavioral level. Partitioning the circuit into behavioral
(functional) blocks will aid parallelization.
D. SPICE will include RF Analysis
By the end of the 1980’s, at around the 1µm technology
node, CMOS transistor fT ’s had extended well into the GHz
region. As MOS transistors became faster, it became possible
172
to implement RF CMOS circuits and the wireless explosion
began. RF circuit simulation required an entirely new line
of algorithms. Unfortunately, each commercial simulator had
different algorithms that worked on some RF circuits but
not others. The user interface and netlist description varied
from program to program. With the exception of QUCS [17],
none of the programs were Open Source. Because of the lack
of open source RF simulation tools, RF simulators are only
slowly working their way into educational institutions.
E. SPICE will include Variational Analysis
Variational analysis in the past has been added to SPICE
almost as an afterthought. It has been assumed that variations
in circuit components have been small, so that variational
analysis would be treated as a small-signal perturbation. For
the last forty years, worst case corner analysis has been used
instead of variational analysis.
As an educational tool, students now need to learn vari-
ational analysis from the very start. Variational analysis no
longer can be treated as an afterthought! New technologies
have to be specified with random variations, and SPICE
needs to have Variational Analysis integrated into its basic
framework.
F. SPICE will include Thermal Analysis
Devices are being placed closer and closer to each other,
and devices are being placed on “substrates” that are not
good thermal conductors. MOSFET models already include
thermal effects, but only “self” heating is included. Thermal
coupling between devices is or will be significant in analog
IC design, and coupled electrothermal analysis will become
more important as time goes on.
VI. SPICE M ODELS I N T HE F UTURE
Besides core “simulation” improvements, areas where the
compact models in SPICE warrant development include:
• “self-identification” of where model accuracy becomes
suspect, so designers know when and where to question
simulation results
• modeling of the effects of, and sensitivities to, layout
• efficient modeling of both fast digital transients and
analog behavior
• development of “design centric” models and pro-active
use of models for design (define required matching, fT ,
gm , etc. to automatically select W , L, VGS , etc., rather
just calculate the former from the latter)
• “built-in” modeling of variability
• techniques and tools to automatically detect unphysical
behavior, or numerical problems, in models
It is pretty clear that the replacement for CMOS has not
yet been invented. Many “new” device models will have
to be added to SPICE to try out new technology ideas in
the quest for a new technology. The ADMS program [18],
originally developed by Laurent Lemaitre at Motorola, is an
open source tool that was designed to compile SPICE models
coded in a subset of Verilog-A into the C language routines
required by most versions of SPICE. However, some newer
device models, such as BSIMCMG and BSIM6, have been
coded in a subset of Verilog-A that is not compatible with
ADMS, and ADMS has not been supported for many years. An
open source Verilog-A compiler, that is compatible with open
source simulators and supports extended Verilog-A constructs,
is sorely needed. MAPP [8] may fill this void, but if it does
not an alternative must be developed.
VII. C ONCLUSIONS
SPICE revolutionized IC design, by supplanting breadboard-
ing and bench measurements. But the imperfections of 40
years ago remain. The core analysis algorithms from way back
then have remained the keystones of simulation today, and
have been improved. They have been augmented (e.g., har-
monic balance, phase noise), but not supplanted. The models
are vastly more accurate than they were 40 years ago. But they
are still imperfect, in several aspects embarrassingly so for
model developers. With the increasing importance of layout
dependence effects (LDEs) and parasitics, and the inability
of models to keep up with the cadence of technology devel-
opment in these areas, there will always be “unsimulatable”
effects. So, these are the main reasons why although SPICE,
and SPICE models, have significantly improved since it was
first released it is still as “bad” as it was back then.
The expectations of how accurate SPICE models and sim-
ulations are has continued to escalate, yet the gaps between
SPICE and reality, especially for the device models, has never
been closed as more physical effects come into play and
accuracy requirements have become more demanding. The
Shichman-Hodges MOS transistor model was revolutionary 50
years ago, but is completely inadequate for todays needs. As
technology continues to scale, what “fine details” of modeling
bubble up to be make-or-break capabilities continue to evolve.
This is a continuous learning/need curve, and is exactly why
todays SPICE is just as good, and just as bad, as it was 40
years ago.
The basic capabilities and requirements are similar: predict
circuit performance reasonably well. But the expectations
today are much, much more stringent than they were 40 years
ago. Circuits have 108 more components, supply voltages are
much smaller so sensitivity to variability is much greater,
sensitivity to inaccuracies in models is vastly higher, and many
more circuit performances are important. The capabilities of
SPICE, and SPICE models, have improved astronomically
since SPICE was released. But the complexity of the circuits
it simulates, and the expectations of the accuracy of those
simulation results, has increased at a greater rate. So basically,
the algorithms and models in SPICE are continually playing
catch-up.
The expectation from simulations for IC design these days
is perfection: just run a bunch of SPICE simulations and you
are done.
The reality is that SPICE algorithms and models have,
despite huge steps forward, struggled to keep pace with the
increasing expectations of how accurate they should be.
173
This is not a problem for expert IC designers. It is a huge
problem, recognized in both industry and academia, for the
“SPICE jockeys” who blindly run, and trust, SPICE simulation
results. There is no substitute for knowledge of how circuits
operate and physical understanding of how devices behave.
ACKNOWLEDGMENT
The authors wish to acknowledge the members of the
ESSCIRC/ESSDERC 2018 Technical Program Committee for
their encouragement and invitation to present this paper.
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