Documente Academic
Documente Profesional
Documente Cultură
Alexandria University
Electrical and Electronic department
2nd Communication year
Pulse width
modulation Circuit
Prepared by:
Salma Shaaban 121
Salma Mohamed 122
Sohaila Ahmed 123
Doha Mohamed 131
Table of content:
I.Introduction……………………......3
II.Design steps……………………….4
III.Circuit Schematics…………….......5
IV. Schematics blocks illustration;
1.N-bit counter and its output
wave……………………….6
2.N-bit comparator and its output
wave……………….............7
3.N-bit register and its output
wave……….……………….8
V. VHDL code………………………...9
VI. The Output of the PWM circuit……...10
I-Introduction
Pulse Width Modulation, or PWM, is a technique for getting analog
results with digital means. Digital control is used to create a square
wave, a signal switched between on and off. This on-off pattern can
simulate voltages in between full on (5 Volts) and off (0 Volts) by
changing the portion of the time the signal spends on versus the time
that the signal spends off. The duration of "on time" is called the pulse
width. To get varying analog values, you change, or modulate, that
pulse width. If you repeat this on-off pattern fast enough with an LED
for example, the result is as if the signal is a steady voltage between 0
and 5v controlling the brightness of the LED.
Duty cycle:
The term duty cycle describes the proportion of 'on' time to the
regular interval or 'period' of time; a low duty cycle corresponds to
low power, because the power is off for most of the time. Duty cycle
is expressed in percent, 100% being fully on. When a digital signal is
on half of the time and off the other half of the time, the digital signal
has a duty cycle of 50% and resembles a "square" wave. When a
digital signal spends more time in the on state than the off state, it has
a duty cycle of >50%. When a digital signal spends more time in the
off state than the on state, it has a duty cycle of <50%. Here is a
pictorial that illustrates these three scenarios:
II- Design steps
For the design of our PWM project we followed some
essential steps to determine what parts and blocks shall we use
and how to put them in the right order to get the output we
wanted.
So here are the steps we took to reach our aspired output:
1. We studied our problem and made a research on what the
pulse width modulation is and what is its function.
2. We then determined our inputs and our outputs; in our
case we have 2 inputs (clk signal and “w”) and only one
needed output (q).
3. We determined out states and how to move from one
state to another and the conditions given to do so, we
have various states; 16 states and conditions to be taken
care of.
4. We picked up the perfect components to fit our states; so
we started with the counter, then the comparator and we
ended our components with a register or a D flip flop.
5. We implemented our VHDL code on quartz program to
check the validity of our code.
6. The last step was to simulate our code on Modelsim
program to ensure that the output of our code is exactly
as we wanted it to be.
III-Circuit Schematics
IV-Schematics blocks illustration:
1. N- bit counter:
Here we are using a four bit up counter (Mod 16 counter) ;
where its minimum value is (0000)2 and its maximum count is
(1111)2 . This means that it has 16 cases to count starting from
(0000, 0001, 0010……,1111). It also works on the rising edges
of the clock pulses. The output of the counter is then carried
towards a comparator.