Analog Power AM4825P

P-Channel 30-V (D-S) MOSFET

These miniature surface mount MOSFETs utilize a
PRODUCT SUMMARY
high cell density trench process to provide low
rDS(on) and to ensure minimal power loss and heat VDS (V) rDS(on) m(Ω) ID (A)
dissipation. Typical applications are DC-DC 13 @ VGS = -10V -11.5
converters and power management in portable and -30
battery-powered products such as computers, 19 @ VGS = -4.5V -9.3
printers, PCMCIA cards, cellular and cordless
telephones.

• Low rDS(on) provides higher efficiency and

1 8
extends battery life
2 7
• Low thermal impedance copper leadframe
SOIC-8 saves board space 3 6

• Fast switching speed 4 5

• High performance trench technology

o
ABSOLUTE MAXIMUM RATINGS (TA = 25 C UNLESS OTHERWISE NOTED)
Parameter Symbol Maximum Units
Drain-Source Voltage VDS -30
V
Gate-Source Voltage VGS ±25
o
a TA=25 C -11.5
Continuous Drain Current o
ID
TA=70 C -9.3 A
b
Pulsed Drain Current IDM ±50
a
Continuous Source Current (Diode Conduction) IS -2.1 A
o
a TA=25 C 3.1
Power Dissipation o
PD W
TA=70 C 2.3
o
Operating Junction and Storage Temperature Range TJ, Tstg -55 to 150 C

THERMAL RESISTANCE RATINGS

Parameter Symbol Maximum Units
a o
Maximum Junction-to-Case t <= 5 sec RθJC 25 C/W
a o
Maximum Junction-to-Ambient t <= 5 sec RθJA 50 C/W
Notes
a. Surface Mounted on 1” x 1” FR4 Board.
b. Pulse width limited by maximum junction temperature

1 Publication Order Number:

PRELIMINARY DS-AM4825_F
Analog Power AM4825P

SPECIFICATIONS (T A = 25oC UNLESS OTHERWISE NOTED)

Limits
Parameter Symbol Test Conditions Unit
Min Typ Max
Static
Drain-Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = -250 uA -30
V
Gate-Threshold Voltage VGS(th) VDS = VGS, ID = -250 uA -1
Gate-Body Leakage IGSS VDS = 0 V, VGS = ±25 V ±100 nA
VDS = -24 V, VGS = 0 V -1
Zero Gate Voltage Drain Current IDSS o
uA
VDS = -24 V, VGS = 0 V, TJ = 55 C -5
A
On-State Drain Current ID(on) VDS = -5 V, VGS = -10 V -50 A
A VGS = -10 V, ID = -11.5 A 13
Drain-Source On-Resistance rDS(on) mΩ
VGS = -4.5 V, ID = -9.3 A 19.0
A
Forward Tranconductance gfs VDS = -15 V, ID = -11.5 A 29 S
Diode Forward Voltage VSD IS = 2.5 A, VGS = 0 V -0.8 V
b
Dynamic
Total Gate Charge Qg 64
VDS = -15 V, VGS = -10 V,
Gate-Source Charge Qgs 11 nC
ID = -11.5 A
Gate-Drain Charge Qgd 17
Input Capacitance Ciss 2300
Output Capacitance Coss VDS=-15V, VGS=0V, f=1MHz 600 pF
Reverse Transfer Capacitance Crss 300
Turn-On Delay Time td(on) 15
Rise Time tr VDD = -15 V, RL = 6 Ω , ID 13
nS
Turn-Off Delay Time td(off) = -1 A, VGEN = -10 V 100
Fall-Time tf 54

Notes
a. Pulse test: PW <= 300us duty cycle <= 2%.
b. Guaranteed by design, not subject to production testing.

Analog Power (APL) reserves the right to make changes without further notice to any products herein. APL makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does APL assume any liability arising out of the application or
use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in APL data sheets and/or specifications can and do vary in different applications and
actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by
customer’s technical experts. APL does not convey any license under its patent rights nor the rights of others. APL products are not designed,
intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or
sustain life, or for any other application in which the failure of the APL product could create a situation where personal injury or death may occur.
Should Buyer purchase or use APL products for any such unintended or unauthorized application, Buyer shall indemnify and hold APL and its
officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney
fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that APL was negligent regarding the design or manufacture of the part. APL is an Equal Opportunity/Affirmative Action Employer.

2 Publication Order Number:

PRELIMINARY DS-AM4825_F
Analog Power AM4825P

Typical Electrical Characteristics (P-Channel)

-5 0 0.03

4 V thru 1 0 v
-4 0 0.026
3 .5 V

(Ω)
-3 0 0.022
Vgs = 4.5V

-2 0 0.018
3V
Vgs = 10V

R
0.014
-1 0 2 .5 V

0 0.01
0 -1 -2 -3 0 -4 -8 -12 -16 -20
ID - Drain Current (A)
VDS - Dra in to S o urc e Vo lta ge (V)
Figure 2. On-Resistance Variation with
Figure 1. On-Region Characteristics Drain Current and Gate Voltage

1.6
0 .0 5
1.5 VGS =10V
Normalized RDS (on)

1.4 ID =11.5A 0 .0 4
1.3
(Ω)

1.2 0 .0 3
1.1
1.0
ID = 1 1 .5 a
0 .0 2
0.9
R

0.8 0 .0 1
0.7
0.6 0
-50 -25 0 25 50 75 100 125 150 0
Figure 6. Body 2 Forward
Diode 4 6
Voltage 8 10
Variation

T J - Juncation T emperature (ºC) with SourceVGS - Gate

Current and to Source Voltage
Temperature (V)
Figure 3. On-Resistance Variation with Temperature Figure 4. On-Resistance with Gate to Source Voltage

100 -50
25C

-40
I - Drain Current (A)

125C
IS - Source Current (A)

-55C
10
TJ = 150°C -30

-20
TJ = 25°C
1
-10

0
0.1 0 -1 -2 -3 -4 -5
0 0.2 0.4 0.6 0.8 1 1.2 VGS - Gate to Source Voltage (V)
VSD - Source to Drain Current (V)
Figure 5. Transfer Characteristics Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature

3 Publication Order Number:

PRELIMINARY DS-AM4825_F
Analog Power AM4825P

Typical Electrical Characteristics (P-Channel)

4000
10
VDS = 10V
VGS Gate to Source Voltage (V)

8
CISS

Capacit ance (pF)

3000

6
2000
4
CRSS COSS
2 1000

0
0
0 10 20 30 40 50 0 -5 -1 0 -1 5 -2 0
QGS, T otal Gate Charge (nC) VDS (V)
Figure 7. Gate Charge Characteristics Figure 8. Capacitance Characteristics

0.8
50
45
0.6
Variance (V)

40
0.4 35
30
Power (W)

0.2
25
0 20
15
-0.2
V

10
-0.4 5
-50 -25 0 25 50 75 100 125 150 0
T J - Juncation T emperature (ºC) 0.01 0.1 1 10 100 1000
Pulse T ime (S)
Figure 9. Maximum Safe Operating Area
Figure 10. Single Pulse Maximum Power Dissipation

Normalized Thermal Transient Junction to Ambient

1
0.5

0.2

P DM
0.1
0.1 t1
0.05
t2

0.02 1. Duty Cycal D = t1/t2

2. Per Unit Base RθJ A =70C/W
3. TJ M - TA = PDM Zθjc
Single Pulse
4. Sureface Mounted

0.01
0.0001 0.001 0.01 0.1 1 10 100 1000
Square Wave Pulse Duration (S)
Figure 11. Transient Thermal Response Curve

4 Publication Order Number:

PRELIMINARY DS-AM4825_F
Analog Power AM4825P

Package Information
SO-8: 8LEAD

H x 45°

5 Publication Order Number:

PRELIMINARY DS-AM4825_F