Documente Academic
Documente Profesional
Documente Cultură
December 2007
UniFETTM
FDD5N50
tm
N-Channel MOSFET
500V, 4A, 1.4Ω
Features Description
• RDS(on) = 1.15Ω ( Typ.)@ VGS = 10V, ID = 2A These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary, planar
• Low gate charge ( Typ. 11nC) stripe, DMOS technology.
• Low Crss ( Typ. 5pF) This advanced technology has been especially tailored to
• Fast switching minimize on-state resistance, provide superior switching
performance, and withstand high energy pluse in the avalanche
• 100% avalanche tested and commutation mode. These devices are well suited for high
efficient switched mode power suppliesand active power
• Improved dv/dt capability
factor correction.
• RoHS compliant
D
G
G
S
D-PAK
S
Thermal Characteristics
Symbol Parameter Ratings Units
RθJC Thermal Resistance, Junction to Case 1.4 o
C/W
RθJA Thermal Resistance, Junction to Ambient 110
Electrical Characteristics
Symbol Parameter Test Conditions Min. Typ. Max. Units
Off Characteristics
BVDSS Drain to Source Breakdown Voltage ID = 250µA, VGS = 0V, TJ = 25oC 500 - - V
∆BVDSS Breakdown Voltage Temperature
ID = 250µA, Referenced to 25oC - 0.6 - V/oC
∆TJ Coefficient
VDS = 500V, VGS = 0V - - 1
IDSS Zero Gate Voltage Drain Current µA
VDS = 400V, TC = 125oC - - 10
IGSS Gate to Body Leakage Current VGS = ±30V, VDS = 0V - - ±100 nA
On Characteristics
VGS(th) Gate Threshold Voltage VGS = VDS, ID = 250µA 3.0 - 5.0 V
RDS(on) Static Drain to Source On Resistance VGS = 10V, ID = 2A - 1.15 1.4 Ω
gFS Forward Transconductance VDS = 20V, ID = 2A (Note 4) - 4.3 - S
Dynamic Characteristics
Ciss Input Capacitance - 480 640 pF
VDS = 25V, VGS = 0V
Coss Output Capacitance - 66 88 pF
f = 1MHz
Crss Reverse Transfer Capacitance - 5 8 pF
Qg(tot) Total Gate Charge at 10V - 11 15 nC
Qgs Gate to Source Gate Charge VDS = 400V, ID = 5A - 3 - nC
VGS = 10V
Qgd Gate to Drain “Miller” Charge (Note 4, 5) - 5 - nC
Switching Characteristics
td(on) Turn-On Delay Time - 13 36 ns
tr Turn-On Rise Time VDD = 250V, ID = 5A - 22 54 ns
td(off) Turn-Off Delay Time RG = 25Ω - 28 66 ns
tf Turn-Off Fall Time (Note 4, 5) - 20 50 ns
Notes:
1: Repetitive Rating: Pulse width limited by maximum junction temperature
2: L = 32mH, IAS = 4A, VDD = 50V, RG = 25Ω, Starting TJ = 25°C
3: ISD ≤ 4A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4: Pulse Test: Pulse width ≤ 300µs, Duty Cycle ≤ 2%
5: Essentially Independent of Operating Temperature Typical Characteristics
ID,Drain Current[A]
6.0 V
o
5.5 V 150 C
1 o
25 C
1
o
-55 C
*Notes: *Notes:
0.1 1. 250µs Pulse Test 1. VDS = 20V
o
2. TC = 25 C 2. 250µs Pulse Test
0.04 0.1
0.1 1 10 30 4 5 6 7 8
VDS,Drain-Source Voltage[V] VGS,Gate-Source Voltage[V]
2.5
o
150 C
RDS(ON) [Ω],
10
2.0 VGS = 10V
o
25 C
Crss = Cgd
8 VDS = 400V
750 *Note:
1. VGS = 0V
Capacitances [pF]
2. f = 1MHz 6
Ciss
500
Coss 4
250
2
Crss
*Note: ID = 5A
0 0
0.1 1 10 30 0 4 8 12
VDS, Drain-Source Voltage [V] Qg, Total Gate Charge [nC]
2.5
Drain-Source On-Resistance
1.1
BVDSS, [Normalized]
RDS(on), [Normalized]
2.0
1.0 1.5
1.0
0.9
*Notes: 0.5 *Notes:
1. VGS = 0V 1. VGS = 10V
2. ID = 250µA 2. ID = 2A
0.8 0.0
-75 -25 25 75 125 175 -75 -25 25 75 125 175
o o
TJ, Junction Temperature [ C] TJ, Junction Temperature [ C]
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
30 4.5
30µs
4
10 100µs
ID, Drain Current [A]
1ms
3
1 10ms
DC 2
Operation in This Area
is Limited by R DS(on)
0.1 *Notes:
o
1
1. TC = 25 C
o
2. TJ = 150 C
3. Single Pulse
0.01 0
1 10 100 800 25 50 75 100 125 150
o
VDS, Drain-Source Voltage [V] TC, Case Temperature [ C]
3
Thermal Response [ZθJC]
1
0.5
0.2
PDM
0.1
t1
0.1 0.05 t2
*Notes:
0.02 o
0.01
1. ZθJC(t) = 1.4 C/W Max.
2. Duty Factor, D= t1/t2
Single pulse 3. TJM - TC = PDM * ZθJC(t)
0.01
-5 -4 -3 -2 -1 0 1
10 10 10 10 10 10 10
Rectangular Pulse Duration [sec]
DUT +
V DS
I SD
L
D r iv e r
R G
S am e T ype
as DUT V DD
V G S • d v / d t c o n t r o lle d b y R G
• I S D c o n t r o lle d b y p u ls e p e r io d
G a t e P u ls e W id th
V GS D = --------------------------
G a te P u ls e P e r io d 10V
( D r iv e r )
I F M , B o d y D io d e F o r w a r d C u r r e n t
I SD
( DUT ) d i/ d t
IR M
B o d y D io d e R e v e r s e C u r r e n t
V DS
( DUT ) B o d y D io d e R e c o v e r y d v / d t
V SD
V DD
B o d y D io d e
F o r w a r d V o lt a g e D r o p
D-PAK
Dimensions in Millimeters
SuperSOT™-8
* EZSWITCH™ and FlashWriter® are trademarks of System General Corporation, used under license by Fairchild Semiconductor.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT NOTICE TO ANY PRODUCTS HEREIN TO
IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER
ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
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which, (a) are intended for surgical implant into the body, or device or system whose failure to perform can be reasonably
(b) support or sustain life, and (c) whose failure to perform expected to cause the failure of the life support device or
when properly used in accordance with instructions for use system, or to affect its safety or effectiveness.
provided in the labeling, can be reasonably expected to result
in significant injury to the user.