Microprocessors 15EC42 Module-5 Notes

Module 5
15EC42
Microprocessors

Basic Peripherals and their Interfacing with 8086 (Part 2): Interfacing ADC-0808/0809,
DAC-0800, Stepper Motor using 8255 (5.6.1, 5.7.2, 5.8). Timer 8254 – Mode 0, 1, 2 & 3 and
Interfacing programmes for these modes (refer 6.1 of Text).
INT 21H DOS Function calls - for handling Keyboard and Display (refer Appendix-B of
Text).
Other Architectures: Architecture of 8088 (refer 1.10 up to 1.10.1 of Text) and
Architecture of NDP 8087 (refer 8.3.1, 8.3.5 of Text). Von-Neumann & Harvard CPU
architecture and CISC & RISC CPU architecture (refer Reference Book 1).
 Microprocessors 15EC42 Module-5 Notes
5.2 Programming using keyboard and video display
5.2.1 Character input with echo (Function 01H)
Reads a character from the standard input device and echoes it to the standard output
device. If no character is ready, waits until one is available.
Calling parameter: AH = 01H
Returns : AL = 8-bit input data
Program for reading a Character from keyboard
.MODEL SMALL
.DATA
MSG DB ?
.CODE
MOV AX,@DATA
MOV DS,AX
MOV AH,01H
INT 21H
MOV MSG,AL
MOV AH,4CH
INT 21H
END

5.2.2 Unfiltered character input without echo (Function 07H) or Character input
without echo (Function 08H)
Reads a character from the standard input device without echoing it to the standard output
device. If no character is ready, waits until one is available.
Calling parameter
AH = 07H or AH = 08H
Returns
AL = 8-bit input data

5.2.3 Character Output (Function 02H)

Outputs the character to the standard output device.
Calling parameters
AH = 02H
 Microprocessors 15EC42 Module-5 Notes
DL = 8-bit data for output
Returns: Nothing

Program to display a character on console

.MODEL SMALL
.CODE
MOV AX,@DATA
MOV DS,AX
MOV DL,‘A’
MOV AH,02H
INT 21H
MOV AH,4CH
INT 21H
END

5.2.4 Display string (Function 09H)

Sends a string of characters to the standard output device. End of string is indicated by
character $ (24H).
Calling Parameters: AH = 09H
DS:DX = segment: offset of string
Returns: Nothing

Program to display a string on console

.MODEL SMALL
.DATA
MSG DB 'MICROPROCESSOR LAB $'
.CODE
MOV AX,@DATA
MOV DS,AX
MOV DX, OFFSET MSG
MOV AH,09H
INT 21H
 Microprocessors 15EC42 Module-5 Notes
MOV AH,4CH
INT 21H
END

5.2.5 Buffered keyboard input (Function 0AH)

Reads a string of bytes form the standard input device, up to and including ASCII carriage
return (0DH), and places them in a user designated buffer. The characters are echoed to
the standard output device.
Calling parameters: AH = 0AH
DS: DX = segment: offset of buffer
Returns: Nothing (data placed in buffer)

Write a program to read a string that is maximum of 50 characters long

form the standard input device, placing it in the buffer named buffer.
.MODEL SMALL
.DATA
BUFFER DB 50 DUP (0)
.CODE
MOV AX, @DATA
MOV DS, AX
MOV AH, 0AH
MOV DX, OFFSET BUFFER
INT 21H
MOV AH, 4CH
INT 21H
END

Write a program using DOS INT 21H function call to read a key from
keyboard. Display message GOOD if the key pressed is ‘G’ otherwise, do
not display any message.
.MODEL SMALL
Microprocessors 15EC42 Module-5 Notes
.DATA
MSG DB 10,13, ‘GOOD $’
.CODE
MOV AX, @DATA
MOV DS, AX
MOV AH, 07H ; to read character from key board
INT 21H
CMP AL, ‘G’
JNZ LAST
LEA DX, MSG
MOV AH, 09H ; to display string on console or monitor
INT 21H
LAST : MOV AH, 4CH
INT 21H
END

Write an ALP to read a string of characters from keyboard without echo

and display.
.MODEL SMALL CMP AL, 13
.DATA JZ DISP
STR DB 50 DUP (?) MOV [BX], AL
MES DB 10, 13, ‘ENTER THE INC BX
STRING $’ JMP BACK
.CODE DISP :MOV AH, 09H
MOV AX, @DATA LEA DX, STR
MOV DS, AX INT 21H
MOV AH, 09H MOV AH, 4CH
LEA DX, MES INT 21H
 Microprocessors 15EC42 Module-5 Notes
INT 21H END
LEA BX, STR
BACK :MOV AH, 07H
INT 21H

5.3 The Processor 8088

The microprocessor 8088 has all the programming facilities that 8086 has, along with some
hardware features of 8086, like 1 Mega byte memory addressing capability, operating
̅̅̅̅), interrupt structure etc. However, 8088 unlike 8086 has 8-bit data bus.
modes (MN/MX
This feature of 8088 makes the circuits, designed around 8085, compatible with 8088, with
little or no modification.
All the peripheral interfacing schemes with 8088 are the same as those for the 8-bit
processors. The memory and I/O addressing schemes are exactly similar to 8085 schemes
except for the increased memory (1MB) and I/O (64KB) capabilities.

5.3.1 Architecture and signal description of 8088

The register set of 8088 is exactly the same as that of 8086. The architecture of 8088 is also
similar to 8086 except for two changes:
a) 8088 has 4-byte instruction queue and
b) 8088 has 8-bit data bus
The function of each block is the same as in 8086. Fig 5.1 shows the 8088 architecture.
 Microprocessors 15EC42 Module-5 Notes

Fig 5.1: Architecture of 8088

The addressing capability of 8088 is 1 Mega byte; therefore it needs 20 address lines. While
handling this 20-bit address, the segmented memory scheme is used and the complete
physical address forming procedure is similar to 8086. The memory organization and
addressing methods of 8088 and 8086 are similar. While physically interfacing memory to
8088, there is nothing like an even address bank or odd address bank. The complete
memory is homogeneously addressed as a bank of 1 Mega byte memory locations using the
segmented memory scheme. This change in hardware is completely transparent to software.
As a result of modified data bus, the 8088 can access only a byte at a time. This fact
reduces the speed of operation of 8088 as compared to 8086, but the 8088 can process the
16-bit data internally. On account of this change in bus structure, the 8088 has slightly
different timing diagrams than 8086.
The pin diagram of 8088 is as shown in Fig 5.2. Most of the 8088 pins and their functions
are exactly similar to the corresponding pins of 8086.
Microprocessors 15EC42 Module-5 Notes

Fig 5.2: Pin diagram of 8088

 Microprocessors 15EC42 Module-5 Notes
5.4 Numeric processor 8087 (Mathematical co-processor)
8087 NDP (numerical data processor) is also known as math co-processor which is used in
parallel with the main processor for number crunching applications, which would otherwise
require complex programming. 8087 is available in 5 MHz, 8 MHz and 10 MHz versions
compatible with 8086, 8088, 80186 and 80188 processors.
The 8086 is supposed to perform the opcode fetch cycle and identify the instructions
for 8087. Once the instruction for 8087 is identified by 8086, it is allotted to 8087 for
further execution. It is the task of 8086 to identify the 8087 instructions from the program,
send it to 8087 for execution and get back the results. The operation of 8087 does not need
any software support from the system software or operating system. The 8087 adds 68 new
instructions to the instruction set of 8086.

Why we need a mathematical coprocessor?

Using a general-purpose microprocessor such as the 8088/86 to perform mathematical
functions such as log, sine, and others is very time consuming,
not only for the CPU but also for programmers writing such programs.
In the absence of a math coprocessor, programmers must write subroutines using 8088/86
instructions for mathematical functions.

Features:
• It can operate on the data of the integer, decimal, real types with lengths ranging
from 2 to 10 bytes.
• Performs add, sub and also complex operations like square root, exponential, tangent
etc.
• High performance.
• Multi-bus compatible.
• Follows IEEE floating point standard.
• It is also faster than 8086/8088 processor in performing mathematical computation.
• It has its own specialized instruction sets to handle mathematical programs.
 Microprocessors 15EC42 Module-5 Notes
5.4.1 Architecture of 8087
The internal architecture of 8087 is as shown in Fig 5.3:

Fig 5.3: 8087 Architecture

The 8087 is divided into two sections internally: i) Control Unit (CU) and ii) Numeric
Execution Unit (NEU).
The Numeric Execution Unit executes all the numeric processor instructions including
arithmetic, logical and data transfer instructions. The control unit receives, decodes
instructions, reads and writes memory operands and executes the 8087 control
instructions. These two units may work asynchronously with each other. The control unit
is mainly responsible for establishing communication between the CPU and memory and
also for coordinating the internal processor execution. The CPU, while fetching the
instructions from memory, monitors the data bus to check for the 8087 instructions.
Meanwhile, the 8087 control unit internally maintains a parallel queue, identical to the
status queue of the main CPU. The microcode control unit generates the control signals
required for execution of the instructions. 8087 contains a programmable shifter which is
responsible for shifting the operands during the execution of instructions like FMUL and
 Microprocessors 15EC42 Module-5 Notes
FDIV. The data bus interface connects the internal data bus of 8087 with the CPU system
data bus.

5.4.2 Interconnections of 8087 with the CPU

8087 can be connected with any of the CPU only in their maximum mode of operation, i.e.
̅̅̅̅ pin of the CPU is grounded. In maximum mode, all the control
only when the MN/MX
signals are derived using a separate chip known as a bus controller. The 8288 is 8086/88
compatible bus controller while 82188 is 80186/80188 compatible bus controller.

Fig 5.4: Interconnections of 8087 with 8086/8088

Fig 5.5: Interface of 8087 with 80186/80188

 Microprocessors 15EC42 Module-5 Notes
The BUSY pin of 8087 is connected with the ̅̅̅̅̅̅̅
TEST pin of the used CPU. The QS0 and QS1
lines may be directly connected to the corresponding pins in case of 8086/88 based
systems. However, in case of 80186/80188 systems these QS0 and QS1 lines are passed to
the CPU through the bus controller. In case of 8086/88 based systems the ̅̅̅̅
RQ/𝐺𝑇̅̅̅̅ 0 of 8087

may be connected to ̅̅̅̅

RQ/GT̅̅̅̅1 of the 8086/88. The clock pin of 8087 may be connected with
the CPU 8086/88 clock input. The interrupt output of 8087 is routed to 8086/88 via
̅̅̅̅̅̅/S7, RESET, A19/S6-A16/S3 are
programmable interrupt controller. The pins AD0-AD15, BHE
connected to the corresponding pins of 8086/88. In case of 80186/80188 systems the
̅̅̅̅ /GT
RQ/GT lines of 8087 are connected with the corresponding RQ ̅̅̅̅ lines of 82188. The
interconnections of 8087 with 8086/8088 and 80186/80188 are shown in Fig 5.4 and Fig
5.5 respectively. Where 8259 is programmable interrupt controller, 8254 is counter timer
device, 8288 is bus controller for 8086/8088 and 82188 is bus controller for 80186/80188.