Tea1552 Datasheet

TEA1552
HV start-up flyback controller for DCM or QR mode; 125 kHz

fosc(h); standby output signal
Rev. 3.1 — 21 June 2012 Product data sheet
1. General description
The GreenChipII is the second generation of green Switched Mode Power
Supply (SMPS) control ICs operating directly from the rectified universal mains. A high
level of integration leads to a cost effective power supply with a very low number of
external components.
The special built-in green functions allow the efficiency to be optimum at all power levels.
This holds for quasi-resonant operation at high power levels, as well as fixed frequency
operation with valley switching at medium power levels. At low power (standby) levels, the
system operates at reduced frequency and with valley detection.
The proprietary high voltage BCD800 process makes direct start-up possible from the
rectified mains voltage in an effective and green way. A second low voltage BICMOS IC is
used for accurate, high speed protection functions and control.
Highly efficient, reliable supplies can easily be designed using the GreenChipII control IC.
2. Features and benefits

 Distinctive features:
 Universal mains supply operation (70 V AC to 276 V AC)
 High level of integration, giving a very low external component count.
 Green features:
 Valley or zero voltage switching for minimum switching losses
 Efficient quasi-resonant operation at high power levels
 Frequency reduction at low power standby for improved system efficiency (<3 W)
 Cycle skipping mode at very low loads. Pi < 300 mW at no-load operation for a
typical adapter application
 On-chip start-up current source
 Standby indication pin to indicate low output power consumption.
 Protection features:
 Safe restart mode for system fault conditions
 Continuous mode protection by means of demagnetization detection (zero
switch-on current)
 Accurate and adjustable overvoltage protection (latched)
 Short winding protection
 Undervoltage protection (foldback during overload)
 Overtemperature protection (latched)
NXP Semiconductors TEA1552
HV start-up flyback controller for DCM or QR mode
 Low and adjustable overcurrent protection trip level

 Soft (re)start
 Mains voltage-dependent operation-enabling level
 General purpose input for lock protection.
3. Applications
3.1 Typical application

Typical application areas are adapters and chargers (e.g. for laptops, camcorders and
printers) and all applications that demand an efficient and cost-effective solution up to
250 W.
4. Ordering information
Table 1. Ordering information
Type number Package
Name Description Version
TEA1552T SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
TEA1552 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3.1 — 21 June 2012 2 of 26

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Product data sheet
TEA1552
5. Block diagram
NXP Semiconductors
VCC 8 SUPPLY START-UP 7
DRAIN
MANAGEMENT CURRENT SOURCE
clamp
internal UVLO start VALLEY 5, 6
supply HVS
M-level
S1 VOLTAGE 14
10 DEM
GND CONTROLLED LOGIC
OSCILLATOR
100 mV
All information provided in this document is subject to legal disclaimers.
OVER-
3 FREQUENCY VOLTAGE
STDBY
CONTROL PROTECTION
Rev. 3.1 — 21 June 2012
1 4
VCOadj LOGIC DRIVER DRIVER
Iss

POWER-ON LEB
RESET S Q soft
13 start 0.5 V
CTRL -1 blank S2
UVLO R Q
2
Isense
OCP
TEA1552 MAXIMUM
ON-TIME
PROTECTION
12 300 Ω
LOCK
S Q short
winding 0.88 V
2.5 V OVER-
lock TEMPERATURE
R Q 11
5.6 V detect PROTECTION VCC < 4.5 V VCC(5V)
OVER-POWER 5 V/1 mA
TEA1552
© NXP B.V. 2012. All rights reserved.
PROTECTION (max)
mbl499
3 of 26
Fig 1. Block diagram

6. Pinning information
6.1 Pinning
VCOadj 1 14 DEM
Isense 2 13 CTRL
STDBY 3 12 LOCK
DRIVER 4 TEA1552T 11 VCC(5V)
HVS 5 10 GND
HVS 6 9 n.c.
DRAIN 7 8 VCC
mbl497
Fig 2. Pin configuration
6.2 Pin description

Table 2. Pin description
Symbol Pin Description
VCOadj 1 VCO adjustment input
Isense 2 programmable current sense input
STDBY 3 standby indication or control output
DRIVER 4 gate driver output
HVS 5 high voltage safety spacer, not connected
HVS 6 high voltage safety spacer, not connected
DRAIN 7 drain of external MOS switch, input for start-up current and valley
sensing
VCC 8 supply voltage
n.c. 9 not connected
GND 10 ground
VCC(5V) 11 5 V output
LOCK 12 lock input
CTRL 13 control input
DEM 14 input from auxiliary winding for demagnetization timing, OVP and OPP
7. Functional description
The TEA1552 is the controller of a compact flyback converter, with the IC situated at the
primary side. An auxiliary winding of the transformer provides demagnetization detection
and powers the IC after start-up.
The TEA1552 operates in multi modes (see Figure 3).

The next converter stroke is started only after demagnetization of the transformer current
(zero current switching), while the drain voltage has reached the lowest voltage to prevent
switching losses (green function). The primary resonant circuit of primary inductance and
drain capacitor ensures this quasi-resonant operation. The design can be optimized in
such a way that zero voltage switching can be reached over almost the complete
universal mains range.
To prevent very high frequency operation at lower loads, the quasi-resonant operation
changes smoothly in fixed frequency PWM control.
At very low power (standby) levels, the frequency is controlled down, via the VCO, to a
minimum frequency of approximately 25 kHz.
7.1 Start-up, mains enabling operation level and undervoltage lock-out

(see Figure 11 and 12)
Initially, the IC is self supplying from the rectified mains voltage via pin DRAIN. Supply
capacitor CVCC is charged by the internal start-up current source to a level of
approximately 4 V or higher, depending on the drain voltage. Once the drain voltage
exceeds the M-level (mains-dependent operation-enabling level), the start-up current
source will continue charging capacitor CVCC (switch S1 will be opened); see Figure 1.
The IC will activate the power converter as soon as the voltage on pin VCC passes the
level VCC(start). The IC supply is taken over by the auxiliary winding as soon as the output
voltage reaches its intended level and the IC supply from the mains voltage is
subsequently stopped for high efficiency operation (green function).
The moment the voltage on pin VCC drops below the undervoltage lock-out level VUVLO,
the IC stops switching and enters a safe restart from the rectified mains voltage. Inhibiting
the auxiliary supply by external means causes the converter to operate in a stable, well
defined burst mode.
7.2 Supply management

All (internal) reference voltages are derived from a temperature compensated, on-chip
band gap circuit.
f
(kHz)
VCO fixed quasi resonant
125
25
P (W)
mbl500
Fig 3. Multi-mode operation
7.3 Current mode control

Current mode control is used for its good line regulation behaviour.

The ‘on-time’ is controlled by the internally inverted control pin voltage, which is compared
with the primary current information. The primary current is sensed across an external
resistor. The driver output is latched in the logic, preventing multiple switch-on.
The internal control voltage is inversely proportional to the external control pin voltage,
with an offset of 1.5 V. This means that a voltage range from 1 V to 1.5 V on pin CTRL will
result in an internal control voltage range from 0.5 V to 0 V (a high external control voltage
results in a low duty cycle).
7.4 Oscillator
Vsense(max)
0.52 V
1V 1.5 V VCTRL
(typ) (typ)
mgu233
Fig 4. Vsense(max) as a function of VCTRL
The maximum fixed frequency of the oscillator is set by an internal current source and
capacitor. The maximum frequency is reduced once the control voltage enters the VCO
control window. Then, the maximum frequency changes linearly with the control voltage
until the minimum frequency is reached (see Figure 4 and 5).
f
(kHz)
125 kHz
125
25
VCO2 VCO1 Vsense(max) (V)

level level
mbl501
Fig 5. VCO-frequency as a function of Vsense(max)
7.5 VCO adjustment

The VCOadj pin can be used to set the VCO operation point. As soon as the peak voltage
on the sense resistor is controlled below half the voltage on the VCOadj pin (VCO1 level),
frequency reduction will start. The actual peak voltage on sense will be somewhat higher

due to switch-off delay (see Figure 6). The frequency reduction will stop approximately
25 mV lower (VCO2 level), when the minimum frequency is reached.
7.6 Cycle skipping

At very low power levels, a cycle skipping mode will be activated. A high control voltage
will reduce the switching frequency to a minimum of 25 kHz. If the voltage on the control
pin has raised even more, switch-on of the external power MOSFET will be inhibited until
the voltage on the control pin has dropped to a lower value again <.Normal_XRef>(see
Fig.6).
For system accuracy, it is not the absolute voltage on the control pin that will trigger the
cycle skipping mode, but a signal derived from the internal VCO will be used.
Remark: If the no-load requirement of the system is such that the output voltage can be
regulated to its intended level at a switching frequency of 25 kHz or above, the cycle
skipping mode will not be activated.
fosc
current dV2 dV1

1.5 V - VCTRL
comparator fmax
CTRL
DRIVER
DRIVER
fmin
Isense
VCC(5V) X2
VSTDBY dV3 Vx (mV)
5V Vx dV4
(V)
V
VCOadj OSCILLATOR VCOadj
I
5
0
cycle Vx (mV)
skipping
0
Vx (mV)
mbl502
The voltage levels dV1, dV2, dV3 and dV4 are fixed in the IC to typically 50 mV, 18 mV, 40 mV and 15 mV respectively.
The level at which VCO mode of operation starts or ends can be externally controlled with the VCOadj pin.
Fig 6. A functional implementation of the standby and cycle skipping circuitry.
7.7 Standby output

The STDBY output pin (VSTDBY = 5 V) can be used to drive an external NPN transistor or
FET in order to e.g. switch-off a PFC circuit. The STDBY output is activated by the internal
VCO: as soon as the VCO has reduced the switching frequency to (almost) the minimum
frequency of 25 kHz, the STDBY output will be activated (see Figure 6). The STDBY output
will go low again as soon as the VCO allows a switching frequency close to the maximum
frequency of 125 kHz.

7.8 Demagnetization
The system will be in discontinuous conduction mode all the time. The oscillator will not
start a new primary stroke until the secondary stroke has ended.
Demagnetization features a cycle-by-cycle output short-circuit protection by immediately

lowering the frequency (longer off-time), thereby reducing the power level.
Demagnetization recognition is suppressed during the first time (tsuppr). This suppression
may be necessary in applications where the transformer has a large leakage inductance
and at low output voltages/start-up.
7.9 OverVoltage Protection (OVP)

An OVP mode is implemented in the GreenChip series. For the TEA1552, this works by
sensing the auxiliary voltage via the current flowing into pin DEM during the secondary
stroke. The auxiliary winding voltage is a well-defined replica of the output voltage. Any
voltage spikes are averaged by an internal filter.
If the output voltage exceeds the OVP trip level, the OVP circuit switches off the power
MOSFET. The controller then waits until the UVLO level is reached on pin VCC. When VCC
drops to UVLO, capacitor CVCC will be recharged to the Vstart level, however the IC will not
start switching again. Subsequently, VCC will drop again to the UVLO level, etc.
Operation only recommences when the VCC voltage drops below a level of approximately
4.5 V (practically when the Vmains has been disconnected for a short period).
The output voltage (VOVP) at which the OVP function trips, can be set by the
demagnetization resistor RDEM:
Ns
V OVP = ----------- × [ I OVP ( DEM ) × R DEM + V clamp ( DEM ) ( pos ) ]
N aux
where Ns is the number of secondary turns and Naux is the number of auxiliary turns of the
transformer.
Current IOVP(DEM) is internally trimmed.
The value of the demagnetization resistor (RDEM) can be adjusted to the turns ratio of the
transformer, thus making an accurate OVP possible.
7.10 Valley switching (see Figure 7)

A new cycle starts when the power switch is switched on. After the ‘on-time’ (which is
determined by the ‘sense’ voltage and the internal control voltage), the switch is opened
and the secondary stroke starts.
After the secondary stroke, the drain voltage shows an oscillation with a frequency of
1
approximately ---------------------------------------------------
( 2 × π × ( Lp × Cd ) )
where Lp is the primary self inductance of the transformer and Cd is the capacitance on
the drain node.

primary secondary secondary

stroke stroke ringing
drain
valley
secondary
stroke
(2) (1)
oscillator
mgu235
A: Start of new cycle at lowest drain voltage.

B: Start of new cycle in a classical PWM system at high drain voltage.
Fig 7. Signals for valley switching.
As soon as the oscillator voltage is high again and the secondary stroke has ended, the
circuit waits for the lowest drain voltage before starting a new primary stroke. This method
is called valley detection. Figure 7 shows the drain voltage together with the valley signal,
the signal indicating the secondary stroke and the oscillator signal.
In an optimum design, the reflected secondary voltage on the primary side will force the
drain voltage to zero. Thus, zero voltage switching is very possible, preventing large
capacitive switching losses
 P = 1--- × C × V 2 × f
 2 
and allowing high frequency operation, which results in small and cost effective inductors.
7.11 OverCurrent Protection (OCP)

The cycle-by-cycle peak drain current limit circuit uses the external source resistor to
measure the current accurately. This allows optimum size determination of the
transformer core (cost issue). The circuit is activated after the leading edge blanking time
tleb. The OCP protection circuit limits the ‘sense’ voltage to an internal level.

7.12 OverPower Protection (OPP)

During the primary stroke, the rectified mains input voltage is measured by sensing the
current drawn from pin DEM. This current is dependent on the mains voltage, according to
the following formula:
V aux N × V mains
I DEM ≈ --------------- ≈ -------------------------
R DEM R DEM
where:
N aux
N = ----------
-
N
P
The current information is used to adjust the peak drain current, which is measured via
pin Isense. The internal compensation is such that an almost mains independent maximum
output power can be realized.
The OPP curve is given in Figure 8.
Vsense(max)
0.52 V
(typ)
0.3 V
(typ)
-100 mA -24 mA
(typ) IDEM (typ)
mgu236
Fig 8. OPP correction curve
7.13 Minimum and maximum ‘on-time’

The minimum ‘on-time’ of the SMPS is determined by the Leading Edge Blanking (LEB)
time. The IC limits the ‘on-time’ to 50 μs. When the system desires an ‘on-time’ longer
than 50 μs, a fault condition is assumed, and the IC will stop switching and enter the safe
restart mode.
7.14 Short winding protection

After the leading edge blanking time, the short winding protection circuit is also activated.
If the ‘sense’ voltage exceeds the short winding protection voltage Vswp, the converter will
stop switching. Once VCC drops below the UVLO level, capacitor CVCC will be recharged
and the supply will restart again. This cycle will be repeated until the short-circuit is
removed (safe restart mode).
The short winding protection will also protect in case of a secondary diode short-circuit.

7.15 Lock input

Pin LOCK is a general purpose (high-impedance) input pin, which can be used to switch
off the IC. As soon as the voltage on this pin is raised above 2.5 V, switching will stop
immediately. The voltage on the VCC pin will cycle between VCC(start) and VCC(UVLO), but
the IC will not start switching again until the latch function is reset. The latch is reset as
soon as the VCC drops below 4.5 V (typical value). The internal OVP and OTP will also
trigger this latch Figure 1.
The detection level of this input is related to the VCC(5V) pin voltage in the following way:
0.5 × VCC(5V) ± 4%. An internal Zener diode clamp of 5.6 V will protect this pin from
excessive voltages. No internal filtering is done on this input.
7.16 Overtemperature Protection (OTP)

An accurate temperature protection is provided in the circuit. When the junction
temperature exceeds the thermal shutdown temperature, the IC will stop switching. When
VCC drops to UVLO, capacitor CVCC will be recharged to the Vstart level, however the IC
will not start switching again. Subsequently, VCC will drop again to the UVLO level, etc.
Operation only recommences when the VCC voltage drops below a level of approximately
4.5 V (practically when the Vmains has been disconnected for a short period).
7.17 Soft start-up

To prevent transformer rattle during hiccup, the transformer peak current is slowly
increased by the soft start function. This can be achieved by inserting a resistor and a
capacitor between pin Isense and the sense resistor (see Figure 9). An internal current
source charges the capacitor to V = ISS × RSS, with a maximum of approximately 0.5 V.
The start level and the time constant of the increasing primary current level can be
adjusted externally by changing the values of RSS and CSS.
V ocp – ( I SS × R SS )
I primary(max) = --------------------------------------------
R sense
τ = R SS × C SS
The charging current ISS will flow as long as the voltage on pin Isense is below
approximately 0.5 V. If the voltage on pin Isense exceeds 0.5 V, the soft start current source
will start limiting the current ISS. At the VCC(start) level, the ISS current source is completely
switched off.
Since the soft start current ISS is subtracted from pin VCC charging current, the RSS value
will affect the VCC charging current level by a maximum of 60 μA (typical value).

ISS
0.5 V
start-up
R
5 Isense SS
Vocp CSS Rsense
mbl503
Fig 9. Soft start-up
7.18 5 V output
Pin VCC(5V) can be used for supplying external circuitry. The maximum output current must
be limited to 1 mA. If higher peak currents are required, an external RC combination
should limit the current drawn from this pin to 1 mA maximum.
The 5 V output voltage will be available as soon as the start-up voltage is reached. As the
high voltage supply can not supply the 5 V pin during start-up and/or shutdown, during
latched shutdown (via pin LOCK or other latched protection such as OVP or OTP), the
voltage is switched to zero.
7.19 Driver
The driver circuit to the gate of the power MOSFET has a current sourcing capability of
typically 170 mA and a current sink capability of typically 700 mA. This permits fast
turn-on and turn-off of the power MOSFET for efficient operation. A low driver source
current has been chosen to limit the ΔV/Δt at switch-on. This reduces Electro Magnetic
Interference (EMI) and also limits the current spikes across Rsense.

8. Limiting values
Table 3. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).[1]
Symbol Parameter Conditions Min Max Unit
Voltages
VVCOadj voltage on pin VCOadj continuous −0.4 +5 V
Vsense voltage on pin Isense current limited −0.4 − V
VDRAIN voltage on pin DRAIN −0.4 +650 V
VCC supply voltage continuous −0.4 +20 V
VLOCK voltage on pin LOCK continuous −0.4 +7 V
VCTRL voltage on pin CTRL −0.4 +5 V
VDEM voltage on pin DEM current limited −0.4 − V
Currents
Isense current on pin Isense −1 +10 mA
ISTDBY current on pin STDBY −1 - mA
IDRIVER current on pin DRIVER d < 10 % −0.8 +2 A
IDRAIN current on pin DRAIN - +5 mA
ICC(5V) current on pin VCC(5V) −1 0 mA
ICTRL current on pin CTRL - +5 mA
IDEM current on pin DEM −250 +250 μΑ
General
Ptot total power dissipation Tamb < 70 °C - 0.75 W
Tstg storage temperature −55 +150 °C
Tj junction temperature −20 +145 °C
ESD
Vesd electrostatic discharge voltage
pins 1 to 6 and pins 9 to 14 HBM class 1 [2] - 2000 V
pin 7 HBM class 1 [2] - 1500 V
on any other pin MM [3] - 400 V
[1] All voltages are measured with respect to ground; positive currents flow into the chip; pin VCC may not be current driven. The voltage
ratings are valid provided other ratings are not violated; current ratings are valid provided the maximum power rating is not violated.
[2] Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ serie resistor.
[3] Equivalent to discharging a 200 pF capacitor through a 0.75 μH coil and a 10 Ω resistor.
9. Thermal characteristics
Table 4. Thermal characteristics
Symbol Parameter Conditions Typ Unit
Rth(j-a) thermal resistance from junction to ambient in free air [1] 100 K/W
[1] With pin GND connected to sufficient copper area on the printed-circuit board.

10. Characteristics
Table 5. Characteristics
Tamb = 25 °C; VCC = 15 V; all voltages are measured with respect to ground; currents are positive when flowing into the IC;
unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Start-up current source (pin DRAIN)
IDRAIN supply current from pin DRAIN VCC = 0 V; VDRAIN > 100 V 1.0 1.2 1.4 mA
with auxiliary supply; - 100 300 μA
VDRAIN > 100 V
BVDSS breakdown voltage 650 - - V
M-level mains-dependent 60 - 100 V
operation-enabling level
Supply voltage management (pin VCC)
VCC(start) start-up voltage on VCC 10.3 11 11.7 V
VCC(UVLO) undervoltage lock-out on VCC 8.1 8.7 9.3 V
VCC(hys) hysteresis voltage on VCC VCC(start) − VCC(UVLO) 2.0 2.3 2.6 V
ICC(h) pin VCC charging current (high) VDRAIN > 100 V; VCC < 3V −1.2 −1 −0.8 mA
ICC(l) pin VCC charging current (low) VDRAIN > 100 V; −1.2 −0.75 −0.45 mA
3 V < VCC < VCC(UVLO)
ICC(restart) pin VCC restart current VDRAIN > 100 V; −650 −550 −450 μA
VCC(UVLO) < VCC < VCC(start)
ICC(oper) supply current under normal no load on pin DRIVER 1.1 1.3 1.5 mA
operation
Demagnetization management (pin DEM)
Vth(DEM) demagnetization comparator 50 100 150 mV
threshold voltage on pin DEM
Iprot(DEM) protection current on pin DEM VDEM = 50 mV −50[1] - −10 nA
Vclamp(DEM)(neg) negative clamp voltage on pin DEM IDEM = −150 μA −0.5 −0.25 −0.05 V
Vclamp(DEM)(pos) positive clamp voltage on pin DEM IDEM = 250 μA 0.5 0.7 0.9 V
tsuppr suppression of transformer ringing 1.1 1.5 1.9 μs
at start of secondary stroke
Pulse width modulator
ton(min) minimum on-time - tleb - ns
ton(max) maximum on-time latched 40 50 60 μs
Oscillator
fosc(l) oscillator low fixed frequency VCTRL > 1.5 V 20 25 30 kHz
fosc(h) oscillator high fixed frequency VCTRL < 1 V 100 125 150 kHz
Vvco(start) peak voltage on pin Isense, where see Figure 5 and Figure 6 - VCO[1] − mV
frequency reduction starts
Vvco(max) peak voltage on pin Isense, where - VCO[1] − 25 − mV
the frequency is equal to fosc(l)

Table 5. Characteristics …continued

Duty cycle control (pin CTRL)
VCTRL(min) minimum voltage on pin CTRL for - 1.0 - V
maximum duty cycle
VCTRL(max) maximum voltage on pin CTRL for - 1.5 - V
minimum duty cycle
5 V output (pin VCC(5V))

VCC(5V) output voltage IO = 1 mA 4.75 5.0 5.25 V
ICC(5V) current capability of pin VCC(5V) −1.0 - - mA
LOCK input (pin LOCK)
VLOCK LOCK trip level 2.37 2.5 2.63 V
VCC(reset) voltage level on pin VCC which VLOCK < 2.3 V - 4.5 - V
resets the latch
RELLOCK,5V relation to 5 V output (pin VCC(5V)) VLOCK = 0.5 × VCC(5V) −4 - +4 %
Valley switch (pin DRAIN)
ΔV/Δtvalley valley recognition voltage change −85 - +85 V/μs
tvalley-swon delay from valley recognition to - 150[1] - ns
switch-on
Overcurrent and short winding protection (pin Isense)
Vsense(max) maximum source voltage OCP ΔV/Δt = 0.1 V/μs 0.48 0.52 0.56 V
tPD propagation delay from detecting ΔV/Δt = 0.5 V/μs − 140 185 ns
Vsense(max) to switch-off
Vswp short winding protection voltage 0.83 0.88 0.96 V
tleb blanking time for current and short 300 370 440 ns
winding protection
ISS soft start current Vsense < 0.5 V 45 60 75 μA
Overvoltage protection (pin DEM)
IOVP(DEM) OVP level on pin DEM set by resistor RDEM; 54 60 66 μA
see Section 7.9
Overpower protection (pin DEM)
IOPP(DEM) OPP current on pin DEM to start set by resistor RDEM; − −24 − μA
OPP correction see Section 7.12
IOPP50%(DEM) OPP current on pin DEM, where − −100 − μA
maximum source voltage is limited
to 0.3 V
Standby output (pin STDBY)
VSTDBY standby output voltage 4.75 5.0 5.25 V
Isource source current capability VSTDBY = 1 V 20 22 24 μA
Isink sink current capability VSTDBY = 1.2 V 2 - mA

Table 5. Characteristics …continued

Driver (pin Driver)
Isource source current capability of driver VCC = 9.5 V; VDRIVER = 2 V - −170 −88 mA
Isink sink current capability of driver VCC = 9.5 V; VDRIVER = 2 V - 300 - mA
VCC = 9.5 V; 400 700 - mA
VDRIVER = 9.5 V
Vo(driver)(max) maximum output voltage of driver VCC > 12 V - 11.5 12 V
Temperature protection
Tprot(max) maximum temperature protection 130 140 150 °C
level
Tprot(hys) hysteresis for the temperature [1] - 8 - °C
protection level
[1] Guaranteed by design.

11. Application information
VCOadj
1 14 DEM
Isense
2 13 CTRL
STDBY
3 12 LOCK
DRIVER VCC(5V)
4 11
HVS TEA1552T
5 10 GND
HVS
6 9 n.c.
DRAIN VCC
7 8
mbl498
Fig 10. Basic application
A converter with the TEA1552 consists of an input filter, a transformer with a third winding
(auxiliary), and an output stage with a feedback circuit.
Capacitor CVCC (at pin VCC) buffers the supply voltage of the IC, which is powered via the
high voltage rectified mains during start-up and via the auxiliary winding during operation.
A sense resistor converts the primary current into a voltage at pin Isense. The value of this
sense resistor defines the maximum primary peak current.

Vmains
Vi Do
PFC Vo
VCC Np Ns
DRAIN
8 7 Co
CVCC
n.c. HVS
9 6
GND HVS power
10 5 MOSFET
VCC(5V) TEA1552T DRIVER
11 4
-t
LOCK STDBY CSS
12 3
CTRL Isense Rs2 RSS
13 2
CCTRL Rsense
DEM VCOadj
RCTRL 14 1
RDEM
Naux
Rreg1
Rreg2
mbl504
Pin LOCK is used in this example for an additional external overtemperature protection.
If pin LOCK is not used, it must be tied to ground.
Fig 11. Configuration with controlled PFC.

Vi
VD
(power
MOSFET)
Vo
VCC
Vgate
M-level
VmC
start-up normal overvoltage normal output

sequence operation protection operation short-circuit
mbl505
Fig 12. Typical waveforms.

12. Package outline
SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
D E A
X
y HE v M A
14 8
Q
A2
(A 3) A
A1
pin 1 index
θ
Lp
1 7 L
e w M detail X
bp
0 2.5 5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A
UNIT A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ
max.
0.25 1.45 0.49 0.25 8.75 4.0 6.2 1.0 0.7 0.7
mm 1.75 0.25 1.27 1.05 0.25 0.25 0.1
0.10 1.25 0.36 0.19 8.55 3.8 5.8 0.4 0.6 0.3 8o
o
0.010 0.057 0.019 0.0100 0.35 0.16 0.244 0.039 0.028 0.028 0
inches 0.069 0.01 0.05 0.041 0.01 0.01 0.004
0.004 0.049 0.014 0.0075 0.34 0.15 0.228 0.016 0.024 0.012
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC JEITA PROJECTION
99-12-27
SOT108-1 076E06 MS-012
03-02-19
Fig 13. Package outline SOT108-1 (SO14)


13. Soldering of SMD packages

This text provides a very brief insight into a complex technology. A more in-depth account
of soldering ICs can be found in Application Note AN10365 “Surface mount reflow
soldering description”.
13.1 Introduction to soldering

Soldering is one of the most common methods through which packages are attached to
Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both
the mechanical and the electrical connection. There is no single soldering method that is
ideal for all IC packages. Wave soldering is often preferred when through-hole and
Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not
suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high
densities that come with increased miniaturization.
13.2 Wave and reflow soldering

Wave soldering is a joining technology in which the joints are made by solder coming from
a standing wave of liquid solder. The wave soldering process is suitable for the following:
• Through-hole components
• Leaded or leadless SMDs, which are glued to the surface of the printed circuit board
Not all SMDs can be wave soldered. Packages with solder balls, and some leadless
packages which have solder lands underneath the body, cannot be wave soldered. Also,
leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered,
due to an increased probability of bridging.
The reflow soldering process involves applying solder paste to a board, followed by
component placement and exposure to a temperature profile. Leaded packages,
packages with solder balls, and leadless packages are all reflow solderable.
Key characteristics in both wave and reflow soldering are:
• Board specifications, including the board finish, solder masks and vias
• Package footprints, including solder thieves and orientation
• The moisture sensitivity level of the packages
• Package placement
• Inspection and repair
• Lead-free soldering versus SnPb soldering
13.3 Wave soldering

Key characteristics in wave soldering are:
• Process issues, such as application of adhesive and flux, clinching of leads, board
transport, the solder wave parameters, and the time during which components are
exposed to the wave
• Solder bath specifications, including temperature and impurities

13.4 Reflow soldering

Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 14) than a SnPb process, thus
reducing the process window
• Solder paste printing issues including smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature) and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic). In addition, the peak temperature must be low enough that the
packages and/or boards are not damaged. The peak temperature of the package
depends on package thickness and volume and is classified in accordance with
Table 6 and 7
Table 6. SnPb eutectic process (from J-STD-020C)

Package thickness (mm) Package reflow temperature (°C)
Volume (mm3)
< 350 ≥ 350
< 2.5 235 220
≥ 2.5 220 220
Table 7. Lead-free process (from J-STD-020C)

Package thickness (mm) Package reflow temperature (°C)
Volume (mm3)
< 350 350 to 2000 > 2000
< 1.6 260 260 260
1.6 to 2.5 260 250 245
> 2.5 250 245 245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all

times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 14.

maximum peak temperature

temperature = MSL limit, damage level
minimum peak temperature

= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level

Fig 14. Temperature profiles for large and small components
For further information on temperature profiles, refer to Application Note AN10365

“Surface mount reflow soldering description”.
14. Abbreviations
Table 8. Abbreviations
Acronym Description
BiCMOS Bipolar Complementary Metal-Oxide Semiconductor
DMOS Diffusion Metal-Oxide Semiconductor
ESR Equivalent Series Resistance
EZ-HV SOI Easy High Voltage Silicon-On-Insulator
FET Field-Effect Transistor
PWM Pulse Width Modulation
SMPS Switched Mode Power Supply
SOPS Self-Oscillating Power Supply
15. Revision history

Table 9. Revision history
Document ID Release date Data sheet status Change notice Supersedes
TEA1552 v.3.1 20120621 Product data sheet - TEA1552 v.3
Modifications: • Data sheet title changed.
• Table 1 “Ordering information” on page 2 updated.
TEA1552 v.3 20120418 Product data sheet - TEA1552 v.2
TEA1552 v.2 20020827 Product specification - TEA1552 v.1
TEA1552 v.1 20020703 Product specification - -

16. Legal information
16.1 Data sheet status

Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the objective specification for product development.
Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document contains the product specification.
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
16.2 Definitions Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
Draft — The document is a draft version only. The content is still under
malfunction of an NXP Semiconductors product can reasonably be expected
internal review and subject to formal approval, which may result in
to result in personal injury, death or severe property or environmental
modifications or additions. NXP Semiconductors does not give any
damage. NXP Semiconductors and its suppliers accept no liability for
representations or warranties as to the accuracy or completeness of
inclusion and/or use of NXP Semiconductors products in such equipment or
information included herein and shall have no liability for the consequences of
applications and therefore such inclusion and/or use is at the customer’s own
use of such information.
risk.
Short data sheet — A short data sheet is an extract from a full data sheet
Applications — Applications that are described herein for any of these
with the same product type number(s) and title. A short data sheet is intended
products are for illustrative purposes only. NXP Semiconductors makes no
for quick reference only and should not be relied upon to contain detailed and
representation or warranty that such applications will be suitable for the
full information. For detailed and full information see the relevant full data
specified use without further testing or modification.
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the Customers are responsible for the design and operation of their applications
full data sheet shall prevail. and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
Product specification — The information and data provided in a Product design. It is customer’s sole responsibility to determine whether the NXP
data sheet shall define the specification of the product as agreed between Semiconductors product is suitable and fit for the customer’s applications and
NXP Semiconductors and its customer, unless NXP Semiconductors and products planned, as well as for the planned application and use of
customer have explicitly agreed otherwise in writing. In no event however, customer’s third party customer(s). Customers should provide appropriate
shall an agreement be valid in which the NXP Semiconductors product is design and operating safeguards to minimize the risks associated with their
deemed to offer functions and qualities beyond those described in the applications and products.
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
16.3 Disclaimers customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Limited warranty and liability — Information in this document is believed to
Semiconductors products in order to avoid a default of the applications and
be accurate and reliable. However, NXP Semiconductors does not give any
the products or of the application or use by customer’s third party
representations or warranties, expressed or implied, as to the accuracy or
customer(s). NXP does not accept any liability in this respect.
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no Limiting values — Stress above one or more limiting values (as defined in
responsibility for the content in this document if provided by an information the Absolute Maximum Ratings System of IEC 60134) will cause permanent
source outside of NXP Semiconductors. damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
In no event shall NXP Semiconductors be liable for any indirect, incidental,
the Recommended operating conditions section (if present) or the
punitive, special or consequential damages (including - without limitation - lost
Characteristics sections of this document is not warranted. Constant or
profits, lost savings, business interruption, costs related to the removal or
repeated exposure to limiting values will permanently and irreversibly affect
replacement of any products or rework charges) whether or not such
the quality and reliability of the device.
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory. Terms and conditions of commercial sale — NXP Semiconductors
Notwithstanding any damages that customer might incur for any reason products are sold subject to the general terms and conditions of commercial
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards sale, as published at http://www.nxp.com/profile/terms, unless otherwise
customer for the products described herein shall be limited in accordance agreed in a valid written individual agreement. In case an individual
with the Terms and conditions of commercial sale of NXP Semiconductors. agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
Right to make changes — NXP Semiconductors reserves the right to make applying the customer’s general terms and conditions with regard to the
changes to information published in this document, including without purchase of NXP Semiconductors products by customer.
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior No offer to sell or license — Nothing in this document may be interpreted or
to the publication hereof. construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein own risk, and (c) customer fully indemnifies NXP Semiconductors for any
may be subject to export control regulations. Export might require a prior liability, damages or failed product claims resulting from customer design and
authorization from competent authorities. use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified, Translations — A non-English (translated) version of a document is for
the product is not suitable for automotive use. It is neither qualified nor tested reference only. The English version shall prevail in case of any discrepancy
in accordance with automotive testing or application requirements. NXP between the translated and English versions.
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in 16.4 Trademarks
automotive applications to automotive specifications and standards, customer
Notice: All referenced brands, product names, service names and trademarks
(a) shall use the product without NXP Semiconductors’ warranty of the
are the property of their respective owners.
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond GreenChip — is a trademark of NXP B.V.
NXP Semiconductors’ specifications such use shall be solely at customer’s
17. Contact information

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com

18. Contents
1 General description . . . . . . . . . . . . . . . . . . . . . . 1 16.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 16.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 17 Contact information . . . . . . . . . . . . . . . . . . . . 25
3.1 Typical application . . . . . . . . . . . . . . . . . . . . . . 2 18 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2
5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Functional description . . . . . . . . . . . . . . . . . . . 4
7.1 Start-up, mains enabling operation level and
undervoltage lock-out (see Figure 11 and 12) . 5
7.2 Supply management. . . . . . . . . . . . . . . . . . . . . 5
7.3 Current mode control . . . . . . . . . . . . . . . . . . . . 5
7.4 Oscillator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
7.5 VCO adjustment . . . . . . . . . . . . . . . . . . . . . . . . 6
7.6 Cycle skipping . . . . . . . . . . . . . . . . . . . . . . . . . 7
7.7 Standby output . . . . . . . . . . . . . . . . . . . . . . . . . 7
7.8 Demagnetization. . . . . . . . . . . . . . . . . . . . . . . . 8
7.9 OverVoltage Protection (OVP) . . . . . . . . . . . . . 8
7.10 Valley switching (see Figure 7) . . . . . . . . . . . . . 8
7.11 OverCurrent Protection (OCP) . . . . . . . . . . . . . 9
7.12 OverPower Protection (OPP) . . . . . . . . . . . . . 10
7.13 Minimum and maximum ‘on-time’ . . . . . . . . . . 10
7.14 Short winding protection . . . . . . . . . . . . . . . . . 10
7.15 Lock input . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
7.16 Overtemperature Protection (OTP). . . . . . . . . 11
7.17 Soft start-up . . . . . . . . . . . . . . . . . . . . . . . . . . 11
7.18 5 V output . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7.19 Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 13
9 Thermal characteristics . . . . . . . . . . . . . . . . . 13
10 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 14
11 Application information. . . . . . . . . . . . . . . . . . 17
12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 20
13 Soldering of SMD packages . . . . . . . . . . . . . . 21
13.1 Introduction to soldering . . . . . . . . . . . . . . . . . 21
13.2 Wave and reflow soldering . . . . . . . . . . . . . . . 21
13.3 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 21
13.4 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 22
14 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 23
15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 23
16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 24
16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 24
16.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2012. All rights reserved.

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 21 June 2012
Document identifier: TEA1552

Tea1552 Datasheet

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TEA1552

HV start-up flyback controller for DCM or QR mode; 125 kHz

2. Features and benefits

 Low and adjustable overcurrent protection trip level

3.1 Typical application

Product data sheet Rev. 3.1 — 21 June 2012 2 of 26

HV start-up flyback controller for DCM or QR mode

Fig 1. Block diagram

DRIVER 4 TEA1552T 11 VCC(5V)

Fig 2. Pin configuration

6.2 Pin description

The TEA1552 operates in multi modes (see Figure 3).

Product data sheet Rev. 3.1 — 21 June 2012 4 of 26

7.1 Start-up, mains enabling operation level and undervoltage lock-out

7.2 Supply management

Fig 3. Multi-mode operation

7.3 Current mode control

Product data sheet Rev. 3.1 — 21 June 2012 5 of 26

Fig 4. Vsense(max) as a function of VCTRL

VCO2 VCO1 Vsense(max) (V)

Fig 5. VCO-frequency as a function of Vsense(max)

7.5 VCO adjustment

Product data sheet Rev. 3.1 — 21 June 2012 6 of 26

7.6 Cycle skipping

current dV2 dV1

7.7 Standby output

Product data sheet Rev. 3.1 — 21 June 2012 7 of 26

Demagnetization features a cycle-by-cycle output short-circuit protection by immediately

7.9 OverVoltage Protection (OVP)

Current IOVP(DEM) is internally trimmed.

7.10 Valley switching (see Figure 7)

Product data sheet Rev. 3.1 — 21 June 2012 8 of 26

primary secondary secondary

A: Start of new cycle at lowest drain voltage.

7.11 OverCurrent Protection (OCP)

Product data sheet Rev. 3.1 — 21 June 2012 9 of 26

7.12 OverPower Protection (OPP)

The OPP curve is given in Figure 8.

Fig 8. OPP correction curve

7.13 Minimum and maximum ‘on-time’

7.14 Short winding protection

Product data sheet Rev. 3.1 — 21 June 2012 10 of 26

7.15 Lock input

7.16 Overtemperature Protection (OTP)

7.17 Soft start-up

Product data sheet Rev. 3.1 — 21 June 2012 11 of 26

Vocp CSS Rsense

Fig 9. Soft start-up

Product data sheet Rev. 3.1 — 21 June 2012 12 of 26

Product data sheet Rev. 3.1 — 21 June 2012 13 of 26

Product data sheet Rev. 3.1 — 21 June 2012 14 of 26

Table 5. Characteristics …continued

5 V output (pin VCC(5V))

Product data sheet Rev. 3.1 — 21 June 2012 15 of 26

Table 5. Characteristics …continued

[1] Guaranteed by design.

Product data sheet Rev. 3.1 — 21 June 2012 16 of 26

11. Application information

Fig 10. Basic application

Product data sheet Rev. 3.1 — 21 June 2012 17 of 26

Product data sheet Rev. 3.1 — 21 June 2012 18 of 26

start-up normal overvoltage normal output

Fig 12. Typical waveforms.