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Users Manual
Page 1
INTRODUCTION:
STM32-LCD is development prototype board with STM32F103ZE micro-
controller from STMicroelectronics. This powerful microcontroller supports various
serial interfaces such as USB, USART, SPI. In addition you will find also accelero-
meter, JTAG, TFT LCD, mini SD/MMC card connector on this board and most of
the GPIOs are on extension headers where you can connect your additional
circuits. All this allows you to build a diversity of powerful applications to be used
in a wide range of situations.
BOARD FEATURES:
– Microcontroller – STM32F103ZE - high-performance ARM® Cortex™-M3 32-bit
RISC core operating at a 72 MHz frequency, high-speed embedded memories
(Flash memory - 512 Kbytes and SRAM - 64 Kbytes), and an extensive range of
enhanced I/Os and peripherals connected to two APB buses.
– JTAG connector
– EXT connector
– UEXT40 connector
– UEXT1 connector
– UEXT2 connector
– EXT_PWR connector
– Mini SD/MMC
– Mini USB
– LCD TFT 320x240 pixels coloured with touch screen
– Power source connector
– Accelerometer
– 8 MHz crystal oscillator
– Reset circuit
– Clock circuit
– PCB: FR-4, 1.5 mm (0,062"), soldermask, silkscreen component print
– Dimensions 79.2x57.6 mm (3.12x2.27”)
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ELECTROSTATIC WARNING:
The STM32-LCD board is shipped in protective anti-static packaging. The board
must not be subject to high electrostatic potentials. General practice for working
with static sensitive devices should be applied when working with this board.
Cables: The cable you will need depends on the programmer/debugger you use. If
you use ARM-JTAG-EW, you will need USB A-B cable.
PROCESSOR FEATURES:
STM32-LCD use High-density performance line ARM-based 32-bit MCU with these features:
– Core: ARM 32-bit Cortex™-M3 CPU
Page 3
– Conversion range: 0 to 3.6 V
– Triple-sample and hold capability
– Temperature sensor
– 2 × 12-bit D/A converters
– DMA: 12-channel DMA controller
– Supported peripherals: timers, ADCs, DAC, SDIO, I2Ss, SPIs, I2Cs and
USARTs
– Debug mode
– Serial wire debug (SWD) & JTAG interfaces
– Cortex-M3 Embedded Trace Macrocell™
– 112 fast I/O ports
– 112 I/Os, all mappable on 16 external interrupt vectors, all 5 V-tolerant
except for analog inputs
– 11 timers
– four 16-bit timers, each with up to 4 IC/OC/PWM or pulse counter and
quadrature (incremental) encoder input
– 2 × 16-bit motor control PWM timers with dead-time generation and
emergency stop
– 2 × watchdog timers (Independent and Window)
– SysTick timer: a 24-bit downcounter
– 2 × 16-bit basic timers to drive the DAC
– 13 communication interfaces
– 2 × I2C interfaces (SMBus/PMBus)
– 5 USARTs (ISO 7816 interface, LIN, IrDA capability, modem control)
– 3 SPIs (18 Mbit/s), 2 with I2S interface multiplexed
– CAN interface (2.0B Active)
– USB 2.0 full speed interface
– SDIO interface
– CRC calculation unit, 96-bit unique ID
Page 4
BLOCK DIAGRAM:
Page 5
MEMORY MAP:
Page 6
BAT_PWR D4 1N5819 S 3.3V
+5V_J-LINK D3 1N5819S
USB CIRCUIT +5V_USB ACCELEROMETER
VIN
+5V_USB D1 1N5819S
POWER SUPPLY CIRCUIT R36 R9
VR1 47K/1% 10K
PWR Q3 3.3V3.3V 3.3V 3.3V
D2 3.3V_E 3.3V R38 DISC
1 1N5819S 2 4 0R BC807 USB_P
VIN VOUT
+
2 2K C33 C58
RF1 R17
RF110_ SMD 1
#SHDN
10K R14 R10 100nF
4V_MIN-6V_MAX
330K/1% 20K R5 R4 U10
C96
+
C97 3 C10 C99 4.7K 4.7K
+
C10 0 GND
6 5 R90 2K 6 4
10uF/6.3V
GND ADJ CS VDD_IO
1uF 100n F I2C2_SCL 5 7
100u F/6.3V/tant 100nF SCL/SPC NC
MCP182 5-ADJE/DC R51 I2C2_SDA 3
100uF/6.3V/tant
SDA/SDI/SDO
1.5K 2
SDO 11 C72
R16 G ND 3.3V VDD
47K/1% 8 13
VDD1
GND1
GND2
U9 SENS_INT R91 CK 100n F
1
VBUS RDY/INT
USBDP 22R R21 6 1
D- 560R
5 2 10 9
D+ GND
USB
USBDM 22R R22 RES_1
4 3 12 14
USB
ID RES_2 GND1
MINI_USB
15 16
GND RES_3 GND2
U1 C16 C17 C32 (NA)USBLC6-2P6
3.3V_MCU_E LIS3LV0 2DL -TR(LG A16)
GND3
GND4
SCHEMATIC:
0R
72 34 USB_P 4 7pF(NA) 47pF(NA) 100 nF
3 .3V VDD_1 PA0/WKUP/USART2_CTS/ADC123_IN0/TIM5_CH1/TIM2_CH1_ETR/TIM8_ETR
108 35 PA1
VDD_2 PA1/USART2_RTS/ADC123_IN1/TIM5_CH2/TIM2_CH2
144 36 USART2_TX R41 C80
VDD_3 PA2/USART2_TX/TIM5_CH3/ADC123_IN2/TIM2_CH3
39 37 USART2 _RX 1M
VDD_4 PA3/USART2_RX/TIM5_CH4/ADC123_IN3/TIM2_CH4 10nF
17 40 SPI1_NSS
VDD_5 PA4/SPI1_NSS/DAC_OUT1/USART2_CK/ADC12_IN4
52 41 SPI1_SCK
VDD_6 PA5/SPI1_SCK/DAC_OUT2/ADC12_IN5
62 42 SPI1_MISO
VDD_7 PA6/SPI1_MISO/TIM8_BKIN/ADC12_IN6/TIM3_CH1/TIM1_BKIN
84 43 SPI1 _MOSI
VDD_8 PA7/SPI1_MOSI/TIM8_CH1N/ADC12_IN7/TIM3_CH2/TIM1_CH1N
95 100 PA8
VDD_9 PA8/USART1_CK/TIM1_CH1/MCO
121 101 USART1_TX
VDD_10 PA9/USART1_TX/TIM1_CH2
131 102 USART1_RX
VDD_11 PA10/USART1_RX/TIM1_CH3 103 USBDM
PA11/USART1_CTS/CANRX/TIM1_CH4/USBDM
104 USBDP
PA12/USART1_RTS/CANTX/TIM1_ETR/USBDP 105 TMS
PA13/JTMS-SWDIO
D5
109 TCK
PA14/JTCK-SWCLK
FB1
110 TDI
FB0805
PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS
BAT54C
B1_0/B1_ 1 3 .3V
C45 100nF
C44 100nF
C40 100nF
C39 100nF
C38 100nF
C23 100nF
C8 100nF
C7 100nF
C6 100nF
C5 100nF
C42 100nF
46 ADC12_IN8 3 1 3.3V UEXT2
71 PB0/ADC12_IN8/TIM3_CH3/TIM8_CH2N/TIM1_CH2N 47
VBAT VSS_1 ADC12_IN9
2
107 PB1/ADC12_IN9/TIM3_CH4/TIM8_CH3N/TIM1_CH3N 48 PB2 10K
VSS_2 PB2/BOOT1 R54 R152 R148 R147 R150 R155 UEXT2_3.3 V
143 133 TDO 10K 10K 10K 10K NA JATG 3.3V 3.3V
VSS_3 PB3/TRACESWO/JTDO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK 0R
38 134 TRST 1 2 3 .3V
VSS_4 PB4/JNTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO
16 135 PB5 TRST 3 4
VSS_5 PB5/I2C1_SMBAI/SPI3_MOSI/I2S3_SD/TIM3_CH2/SPI1_MOSI
51 136 I2C1_SCL1 TDI 5 6
VSS_6 PB6/I2C1_SCL/TIM4_CH1/USART1_TX
61 137 I2C1_SDA1 TMS 7 8 C19 100nF
3.3V VSS_7 PB7/I2C1_SDA/FSMC_NL/TIM4_CH2/USART1_RX
83 139 I2C1_SCL2 TCK 9 10
VSS_8 PB8/TIM4_CH3/SDIO_D4/I2C1_SCL/CANRX
94 140 I2C1_SDA2 R149 10K R151 10K 11 12 R118 UEXT2 R119 R120
VSS_9 PB9/TIM4_CH4/SDIO_D5/I2C1_SDA/CANTX
120 69 I2 C2_SCL TDO 13 14 4.7K 1 2 4.7K 33K
VSS_10 PB10/I2C2_SCL/USART3_TX/TIM2_CH3
B0_1/B0_0 130 70 I2C2_SDA RST 15 16 USART2 _TX 3 4 USART2 _RX
VSS_11 PB11/I2C2_SDA/USART3_RX/TIM2_CH4
1 3 3 .3V_A 73 SPI2_NSS R153 10K 17 18 I2C1_SCL2 5 6 I2C1_SDA2
PB12/SPI2_NSS/I2S2_WS/I2C2_SMBAI/USART3_CK/TIM1_BKIN TRST
33 74 SPI2_SCK 1 2 R1 54 10K +5V_J-LINK 19 20 SPI2_MISO 7 8 SPI2_MOSI
2
VDDA PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N
75 SPI2_MISO SPI2_SCK 9 10 SPI2_NSS
3.3 V_A PB14/SPI2_MISO/USART3_RTS/TIM1_CH2N
+
0 C11 C9 R20 VREF+ 32 76 SPI2_MOSI R-T
VREF+ PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N BH20R
4 7R R40 1 00nF C47 BH10R
100 nF 0R
31 26 YD
10uF/6.3V VREF- PC0/ADC123_IN10
NA C79 27 YU
PC1/ADC123_IN11
30 28 XL
VSSA PC2/ADC123_IN12 29 XR
PC3/ADC123_IN13
6 44 ADC12_IN14
VBAT PC4/ADC12_IN14
45 ADC12_IN15
R15 138 PC5/ADC12_IN15 96
BOOT0
PC6 UEXT1
PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/TIM3_CH1
10K 97 PC7
C12 PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/TIM3_CH2 SD_D0
23 98
OSC_IN PC8/TIM8_CH3/SDIO_D0/TIM3_CH3 UEXT1_3.3V
99 SD_D1 SD/MMC CARD 0R
27pF Q1 PC9/TIM8_CH4/SDIO_D1/TIM3_CH4 SD_D2 3.3V 3.3V 3.3V
R12 24 111
8MHz OSC_OUT PC10/UART4_TX/SDIO_D2/USART3_TX
NA 112 SD_D3
C13 R19 PC11/UART4_RX/SDIO_D3/USART3_RX SD_CLK 3.3V 3.3V
106 113
NC PC12/UART5_TX/SDIO_CK/USART3_CK
3.3V 7 PC13 C18 100 nF
Page 7
27pF 390R PC13/TAMPER-RTC
R8 RST 25 8
NRST PC14/OSC32_IN
U2 9 R104 NA Q2 C15 10pF R6 UEXT1 R11 R13
10K PC15/OSC32_OUT GND
NA 327 68/6pF C14 10pF 4.7K 1 2 4.7K 33K
R69 RST D2
2 VCC RESET 1 PG0 56 114 R108 R107 USART1_TX 3 4 USART1_RX
PG0/FSMC_A10 PD0/OSC_IN/FSMC_D2/CANRX
PG1 57 115 D3 33K 33K I2C1_SCL1 5 6 I2C1_SDA1
GND 560R PG1/FSMC_A11 PD1/OSC_OUT/FSMC_D3/CANTX
87 116 SD_CMD USD SPI1_MISO 7 8 SPI1_MOSI
PG2 PG2/FSMC_A12
3
C28 88 PD2/TIM3_ETR/UART5_RX/SDIO_CMD 117 10 9 10
PG3 PG3/FSMC_A13
DISC WP1
SPI1_SCK SPI1_NSS
PD3/FSMC_CLK/USART2_CTS
PG 4 89 118 /OE 12
PG4/FSMC_A14 PD4/FSMC_NOE/USART2_RTS WP2
1 00nF PG5 90
PG5/FSMC_A15
119 /WE BH10 R
PD5/FSMC_NWE/USART2_TX SD_D3 SD_D3
PG6 91 122 PD6 2
PG6/FSMC_INT2 PD6/FSMC_NWAIT/USART2_RX CD/DAT3/CS
PG7 92 123 /NCE2 SD_CMD SD_CMD 3
PG7/FSMC_INT3 PD7/FSMC_NE1/FSMC_NCE2/USART2_CK CMD/DI
PG8 93 77 D13 6
PG8 PD8/FSMC_D13/USART3_TX VSS
PG 9 124 78 D1 4 L5 4
PG9/FSMC_NE2/FSMC_NCE3 PD9/FSMC_D14/USART3_RX 3 .3V VDD
PG1 0 125 79 D15 SD_CLK 470 nH SD_CLK 5
PG10/FSMC_NCE4_1/FSMC_NE3 PD10/FSMC_D15/USART3_CK CLK/SCLK
EXT PG11 126 80 PD11 SD_D0 SD_D0 7 3.3V 3.3V 3.3V
3.3V PG11/FSMC_NCE4_2 PD11/FSMC_A16/USART3_CTS DAT0/DO
1 2 PG12 127 81 PD12 SD_D1 SD_D1 8
PG12/FSMC_NE4 PD12/FSMC_A17/TIM4_CH1/USART3_RTS DAT1/RES
PE0 3 4 PE1 PG13 128 82 TFT_LIG HT SD_D2 SD_D2 1
PG13/FSMC_A24 PD13/FSMC_A18/TIM4_CH2 DAT2/RES
PE5 5 6 PE6 PG 14 129 85 D0 R10 6 33K
PG14/FSMC_A25 PD14/FSMC_D0/TIM4_CH3 3 .3V
PC6 7 8 PC7 VIN PG1 5 132 86 D1 R100 33K R2 R7 R3 3.3V
PG15 PD15/FSMC_D1/TIM4_CH4 3.3V
PC13 9 10 PB5 R105 33K 9
CP1 NA NA NA
11 12 PF0 10 141 PE0 3.3V 11
3.3V PF0/FSMC_A0 PE0/TIM4_ETR/FSMC_NBL0 CP2 TFT
+
BH40R
BOARD LAYOUT
RESET CIRCUIT:
STM32-LCD reset circuit includes R8 (10k), R69 (560 Ohm), C28 (100nF)
pin 15 of JTAG connector, EXT pin 32, UEXT40 pin 32 and STM32F103ZE pin 25
(NRST).
CLOCK CIRCUIT:
Quartz crystal 8 MHz is connected to STM32F103ZE pin 23 (OSC_IN) and
pin 24 (OSC_OUT).
Quartz crystal 32.768 kHz is connected to STM32F103ZE pin 8
(PC14/OSC32_IN) and pin 9 (PC15/OSC32_OUT).
Page 8
JUMPER DESCRIPTION:
R-T
Connect RST with TRST.
Default state is open.
UEXT1_3.3V
This jumper when closed, supplies 3.3 V voltage to UEXT1 pin 1.
Default state is closed.
UEXT2_3.3V
This jumper when closed, supplies 3.3 V voltage to UEXT2 pin 1.
Default state is closed.
3.3V_E
This jumper, when closed, enable the main 3.3 V regulator VR1 - MCP1825-ADJE/DC.
Default state is closed.
3.3V_MCU_E
This jumper, when closed, enables STM32F103ZE 3.3 V power supply.
Default state is closed.
R_LCD
You can use this jumper, when it's open, to measure the current of LCD backlight.
Default state is closed.
B0_1/B0_0
Select BOOT0 Boot mode.
Default state is in position B0_0.
B1_0/B1_1
Select BOOT1 Boot mode.
Default state – B1_0 – not shorted and B1_1 – not shorted.
INPUT/OUTPUT:
Page 9
EXTERNAL CONNECTORS DESCRIPTION:
UEXT1
1 3.3V
2 GND
3 USART1_TX
4 USART1_RX
5 I2C1_SCL1
6 I2C1_SDA1
7 SPI1_MISO
8 SPI1_MOSI
9 SPI1_SCK
10 SPI1_NSS
UEXT2
1 3.3V
2 GND
3 USART2_TX
4 USART2_RX
5 I2C1_SCL2
6 I2C1_SDA2
7 SPI2_MISO
8 SPI2_MOSI
9 SPI2_SCK
10 SPI2_NSS
Page 10
EXT
Page 11
UEXT40
Page 12
JTAG:
The JTAG connector allows the software debugger to talk via a JTAG (Joint Test Action
Group) port directly to the core. Instructions may be inserted and executed by the core thus allowing
STM32F103ZE memory to be programmed with code and executed step by step by the host software.
1 3.3V 2 3.3V
3 TRST 4 GND
5 TDI 6 GND
7 TMS 8 GND
9 TCK 10 GND
11 pull-down 12 GND
13 TDO 14 GND
15 RST 16 GND
17 pull-down 18 GND
Page 13
USB
1 +5V_USB
2 USBDM
3 USBDP
4 NC
5 GND
PWR
1 VIN (4 – 6) V DC
2 GND
SD/MMC
1 SD_D2
2 SD_D3
3 SD_CMD
4 VDD (3.3V)
5 SD_CLK
6 GND
7 SD_D0
8 SD_D1
9 Not connected
10 Not connected
11 Not connected
12 Not connected
Page 14
SPI
Up to three SPIs are able to communicate up to 18 Mbits/s in slave and
master modes in full-duplex and simplex communication modes. The 3-bit prescaler
gives 8 master mode frequencies and the frame is configurable to 8 bits or 16 bits.
The hardware CRC generation/verification supports basic SD Card/MMC modes.
All SPIs can be served by the DMA controller.
I2S
Two standard I2S interfaces (multiplexed with SPI2 and SPI3) are available,
that can be operated in master or slave mode. These interfaces can be configured to
operate with 16/32 bit resolution, as input or output channels. Audio sampling
frequencies from 8 kHz up to 48 kHz are supported. When either or both of the I2S
interfaces is/are configured in master mode, the master clock can be output to the
external DAC/CODEC at 256 times the sampling frequency.
I2C
Up to two I²C bus interfaces can operate in multimaster and slave modes.
They can support standard and fast modes.
They support 7/10-bit addressing mode and 7-bit dual addressing mode (as
slave). A hardware CRC generation/verification is embedded.
They can be served by DMA and they support SMBus 2.0/PMBus.
Page 15
MECHANICAL DIMENSIONS
Page 16
AVAILABLE DEMO SOFTWARE
– EW-ARM Demo code for MOD-GSM and MOD-GSM-EDGE (high speed) GSM
modules connected to STM32-LCD
Page 17
ORDER CODE: STM32-LCD - assembled and tested board
How to order?
You can order to us directly or by any of our distributors.
Check our web www.olimex.com/dev for more info.
Revision history:
Page 18
Disclaimer:
© 2011 Olimex Ltd. All rights reserved. Olimex®, logo and combinations thereof, are registered
trademarks of Olimex Ltd. Other terms and product names may be trademarks of others.
The information in this document is provided in connection with Olimex products. No license, express
or implied or otherwise, to any intellectual property right is granted by this document or in
connection with the sale of Olimex products.
Neither the whole nor any part of the information contained in or the product described in this
document may be adapted or reproduced in any material from except with the prior written
permission of the copyright holder.
The product described in this document is subject to continuous development and improvements. All
particulars of the product and its use contained in this document are given by OLIMEX in good faith.
However all warranties implied or expressed including but not limited to implied warranties of
merchantability or fitness for purpose are excluded.
This document is intended only to assist the reader in the use of the product. OLIMEX Ltd. shall not
be liable for any loss or damage arising from the use of any information in this document or any error
or omission in such information or any incorrect use of the product.
Page 19