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ColoTrelevision Chassis

TCM3.2L
LA

P&S

18530_000_090319.eps
090319

Contents Page Contents Page


1. RevisionList 2
2. Technical Specifications and Connections 2
3. Precautions, Notes, and Abbreviation List 4
4. MechanicalInstructions 8
5. Service Mo des, Error Codes, and Fa ult Fin ding 12
6. Alignments 20
7. CircuitDescriptions 22
8.I Data
C Sheets 25
9. Block Diagrams
WiringDiagram32"(P&S) 37
WiringDiagram42"(P&S) 38
Block
Diagram 39
10. Circuit Diagrams and PWB Layouts Drawing PWB
Main Power Supply (32") (A1) 40 41-42
Main Power Supply (42") (A1) 43 45-46
Main Power Supply (42") (A2) 44 45-46
SSB: DC/DC (B01) 47 58-63
SSB: MT822x Processor (B02) 48 58-63
SSB: DDR SD-RAM (B03) 49 58-63
SSB: Tuner (B04) 50 58-63
SSB: HDMI (B05) 51 58-63
SSB: I/O - VGA, USB, S-Video (B06) 52 58-63
SSB: Digital Analog Converter, DAC (B07) 53 58-63
SSB: I/O - Connectivity YPbPr (B08) 54 58-63
SSB: MUX and DEMUX (B09) 55 58-63
SSB: Audio Amplifier (B10) 56 58-63
SSB: MCU Stand-by (B11) 57 58-63
Side Control Panel (E) 64 65-65
IR Panel (J) 66 67-67

©
Copyright 2009 Koninklijke Philips Electronics N.V.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic, mechanical,
photocopying, or otherwise without the prior permission of Philips.

Published by JA/JY 0966 BU TV Consumer Care, the Netherlands Subjecttom odification EN 3122 785 18660
2009-Jun-19
EN 2 1. TCM3.2L LA Revision List

1. Revision List
Manual xxxx xxx xxxx.0
 First release.

2. Technical Specifications and Connections


Index of this chapter: user manuals, frequently asked questions and software &
2.1 Technical Specifications drivers.
2.2 Directions for Use
2.3 Connection Overview Table 2-1 Described Model Numbers
2.4 Chassis Overview
CTN Styling Publishedin SM
Notes:
32PFL5604/78 3122 785 18660
• Figures can deviate due to the different set executions.
• Specifications are indicative (subject to change). 32PFL5604/77 P&S 3122 785 18660
42PFL5604/77 3122 785 18660

2 .1 Technical Specifications
2.2 Directions for Use
For on-line product support please use the links in Table 2-1.
Here is product information available, as well as getting started, Click on the hyperlinks in table above.

2.3 Connection O verview

18530_001_090327.eps
090327

Figure 2-1 Rear and side I/O connections

2009-Jun-19
Technical Specifications and Connections TCM3.2L LA 2. EN 3

2.3.1 Side connections 2.3.2 Rear Connections

Note: The following connector color abbreviations are used HDMI 1 & 2: Digital Video, Digital Audio - In
(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= (see HDMI - Side Connections)
Grey, Rd= Red, Wh= White, and Ye= Yellow.
CVI-1&2: Cinch: Video YPbPr - In, Audio - In
USB2.0 Gn -Vide o Y 1 V PP / 75 Ω 
Bu - Video Pb 0.7 V PP / 75 Ω 
Rd - Video Pr 0.7 V PP / 75 Ω 
1 2 3 4 Wh - Audio L 0.5 V RMS / 10 k Ω 
E_06532_022.eps Rd - Audio R 0.5 V RMS / 10 k Ω 
300904

AV-In: Cinch: Video CVBS - In, Audio - In


Figure 2-2 USB (type A) Ye - Video CVBS 1 V PP / 75 Ω 
Wh - Audio L 0.5 V RMS / 10 k Ω 
1 -+ 5V  Rd - Audio R 0.5 V RMS / 10 k Ω 
2 -D ata (-) 
3 -D ata (+)  AV-Out: Cinch: Video CVBS - Out, Audio - Out
4 -Gr ound Gnd  Ye - Video CVBS 1 V PP / 75 Ω 
Wh - Audio L 0.5 V RMS /10 kΩ 
HDMI: Digital Video, Digital Audio - In Rd - Audio R 0.5 V RMS / 10 k Ω 

19 1 Mini Jack: Service Connector (UART)


18 2 1 -Gr ound G nd 
E_06532_017.eps
250505 2 -UAR T_TX Tr ansmit 
3 -UAR T_RX Receive 
Figure 2-3 HDMI (type A) connector
VGA/PC: Video RGB - In
1 5
1 -D2+ Data channel  10
6
2 -Sh ield Gnd  11 15

3 -D2- Data channel  E_06532_002.eps


171108
4 -D1+ Data channel 
5 -Sh ield Gnd 
Figure 2-4 VGA Connector
6 -D1- Data channel 
7 -D0+ Data channel 
8 -Sh ield Gnd  1 -Vi deo Red 0.7 V PP / 75 Ω 
9 -D0- Data channel  2 -Vid eo Green 0.7 V PP / 75 Ω 
10 - CLK+ Data channel  3 -Vid eo Blue 0.7 V PP / 75 Ω 
11 -Shie ld Gnd  4 -n .c.
12 - CLK- Data channel  5 -Gr ound G nd 
13 - Easylink/CEC Control channel  6 -Gro und Red Gnd 
14 -n. c. 7 -Gro und Green Gnd 
15 - DDC_SCL DDC clock  8 -Gro und Blue Gnd 
16 - DDC_SDA DDC data  9 - +5VDC +5 V 
17 -Grou nd Gnd  10 - Ground Sync Gnd 
18 -+5 V  11 -n. c.
19 - HPD Hot Plug Detect  12 - DDC_SDA DDC data 
20 -Grou nd Gnd  13 -H-sy nc 0-5V 
14 -V-sy nc 0-5V 
15 - DDC_SCL DDC clock 
Cinch: Video CVBS - In, Audio - In
Ye - Video CVBS 1 V PP / 75 Ω 
Wh - Audio L 0.5 V RMS / 10 k Ω  PC Audio: Mini Jack: VGA Audio - In
Rd - Audio R 0.5 V RMS / 10 k Ω  Bk - Audio L/R 0.5 V RMS / 10 k Ω 

Mini Jack: Audio Head phone - Out Aerial - In


Bk - Head phone 32 - 600 Ω / 10 mW  - -IEC- type (EU) Coax, 75 Ω 

2.4 Chassis Overview

Refer to chapter Block Diagrams for PWB locations.

2009-Jun-19
Precautions, Notes, and Abbreviation List TCM3.2L LA 3. EN 7

PWM PulseWidthModulation Y Luminancesignal


QRC QuasiResonantConverter Y/C Luminance(Y)andChrominance(C)
QTNR Quality Temporal Noise Reduction signal
QVCP QualityV ideoC ompositionP rocessor YPbPr Componentvideo.Luminance and
RAM RandomAccessMemory scaled color difference signals (B-Y
RGB Red,Green,andBlue.Theprimary and R-Y)
color signals for TV. By mixing levels YUV Componentvideo
of R, G, and B, all colors (Y/C) are
reproduced.
RC RemoteControl
RC5 / RC6 Signal protocol from the remote
control receiver
RESET RESETsignal
ROM ReadOnlyMemory
RSDS Reduced Swing DifferentialSignalling
data interface
R-TXT RedTeleteXT
SAM ServiceAlignmentMode
S/C ShortCircuit
SCART SyndicatdesC onstructeurs
d'Appareils Radiorécepteurs et
Téléviseurs
SCL SerialClockI 2C
SCL-F CLockSignalonFastI 2C bus
SD StandardDefinition
SDA SerialDataI 2C
SDA-F DAtaSignalonFastI 2C bus
SDI Serial Digital Interface, see “ITU-656”
SDRAM SynchronousDRAM
SECAM SEequence Couleur Avec Mémoire.
Color system mainly used in France
and East Europe. Color carriers=
4.406250 MHz and 4.250000 MHz
SIF SoundIntermediateFrequency
SMPS SwitchedModePowerSupply
SoC SystemonChip
SOG SyncOnGreen
SOPS SelfOscillatingPowerSupply
SPI SerialPeripheral Interfacebus;a 4-
wire synchronous serial data link
standard
S/PDIF Sony Philips Digital InterFace
SRAM StaticRAM
SRP ServiceReferenceProtocol
SSB SmallSignalBoard
STBY STand-BY
SVGA 800 × 600(4:3)
SVHS SuperVideoHomeSystem
SW Software
SWAN Spatial temporal Weighted Averaging
Noise reduction
SXGA 1280 × 1024
TFT ThinFilmTransistor
THD TotalHarmonicDistortion
TMDS Transmission Minimized Differential
Signalling
TXT TeleteXT
TXT-DW Dual Window with TeleteXT
UI UserInterface
uP Microprocessor
UXGA 1600 × 1200(4:3)
V V-synctothemodule
VESA VideoElectronicsStandards
Association
VGA 640 × 480(4:3)
VL VariableLevelout:processedaudio
output toward external amplifier
VSB VestigialSideBand;modulation
method
WYSIWYR What You See Is What You Record:
record selection that follows main
picture and sound
WXGA 1280 × 768(15:9)
XTAL Quartzcrystal
XGA 1024 × 768(4:3)

2009-Jun-19
EN 8 4. TCM3.2L LA Mechanical Instructions

4. Mechanical Instructions
Index of this chapter:
4.1 Service Positions
4.2 Cable Dressing and Taping
4.3 Assy/Panel Removal
4.4 Set Re-assembly

Notes:
• Figures below can deviate slightly from the actual situation,
due to the different set executions.

4.1 Service Positions

For easy servicing of this set, there are a few possibilities


created:
• The buffers from the packaging.
• Foam bars (created for Service).

4.1.1 Foam Bars

The foam bars (order code 3122 785 90580 for tw o pieces) can
be used for all types and sizes of Flat TVs.
See figure Figure 4-1 for details. Sets with a display of 42" and
larger, require four foam bars [1]. Ensure that the foam bars
are always supporting the cabinet and never only the display.
Caution: Failure to follow these guidelines can seriously
damage the display!
By positioning the TV face down on the (ESD protectiv e) foam
bars, a stable situation is created to perform measurements
and alignments. By placing a mirror under the TV, the screen
can be monitored.

Required for sets


1 42"

E_06532_018.eps
171106

Figure 4-1 Foam bars

2009-Jun-19
Mechanical Instructions TCM3.2L LA 4. EN 9

4.2 Cable Dressing and Taping

18520_105_090318.eps
090603

Figure 4-2 Cable dressing and taping 32" model

18520_100_090309.eps
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Figure 4-3 Cable dressing and taping 42" model

2009-Jun-19
EN 10 4. TCM3.2L LA Mechanical Instructions

4.3 Assy/Panel Removal 4.3.7 LCD P anel

Caution: It is mandatory to remount screws at their srcinal Description below is based upon the 42" model with LG display.
position during re-assembly. Failure to do so may result in Disassembly method of other LCD panels is comparable to the
damaging the SSB. Refer to Figure 4-4 for details. one described below. See also “Mechanical layout” drawings.
4. Unplug an d remove all cab les.
5. Remove the Main Supply Panel an d Small SIgnal Board as
4.3.1 Rear Cover
described earlier.
6. Remove all metal brackets that are mounted on the panel
Warning/Notes:
(be aware of the different screws used, see figure “Used
• Disconnect the mains power cord before rear cover
screws”):
removal.
– Two VESA holder brackets at the top (screw #2).
• Itis not necessary to remove the stand whil e removing the
– Two SSB holder brackets (screws #2 and #3).
rear cover.
– Two central holder brackets (scr ew #2).
• Re-use the srcinal screws when re-assembling the TV.
– One PSU holder bracket (screw#1).
7. Remove the stand [1] (screw #5).
1. Remove all screws of the rear cover. 8. Remove the subframe of the stand [2] (screw #2).
Important: Be sure to re-use the same screws when 9. Remove the brackets [3] (screw #3) that secure the LCD
remounting the rear cover, as these screws have a 30 panel, and remove screws #4 at the bottom of the LCD.
degrees thread instead of the common used 45 degrees 10. The LCD panel can now be lifted from the front cabinet.
thread.
2. Lift the rear cover from the TV. Make sure that wires and
flat coils are not damaged while lifting the rear cover from
the set.

4.3.2 Speakers

Each speaker unit is mounted (in rubber) with two screws.


When defective, replace the whole unit.

4.3.3 IR & L ED Board

1. Remove the two screws that hold the assy.


2. Unplug the connector on the board (be aware of the
connector lock).
When defective, replace the whole unit. 18520_101_090311.eps
090311

4.3.4 Key Board Control Panel Figure 4-4 Used screws

1. Remove the two screws that hold the assy.


2. Unplug the connectors on the board.
When defective, replace the whole unit.

4.3.5 Main Supply Panel

1. Unplug all connectors (be awar e of the conn ector locks).


2. Remove the fixation screws (screw #1).
3. Take the board out.
When defective, replace the whole unit.

4.3.6 Small Signal Board (SSB)

1. Unplug all connectors on the SSB.


2. Remove all screws ( screw #1) that hold the board.
3. The SSB can now be take n out of the se t, together with the
side connector cover.

2009-Jun-19
Mechanical Instructions TCM3.2L LA 4. EN 11

32 Mechanical layout definition


VESA SSB bracket U
200*200
Panel
Panel bracket R
bracket L
SSB
IP B

Button SIDE AV
bracket

IPBbracket

IR - Lens

2 * Speaker A C -In B ra ck et SSB bracket B


Stand

18520_104_090318.eps
090318

Figure 4-5 Mechanical layout 32" model

42 Mechanical layout definition


VESA
400*400
Panel
Panel bracket R
bracket L
SSB bracket U
IP B
SSB
IPBbracket

SIDE AV
Button
bracket

SSB bracket B

IR -LED

A C -In Br ac ke t Stand
2 * Speaker
bracket
18520_102_090318.eps
090318

Figure 4-6 Mechanical layout 42" model

4.4 Set Re-assembly Notes:


• While re-assembling, make sure that all cables are placed
and connected in their srcinal position.
To re-assemble the whole set, execute all process es in reverse
• Pay special attention not to damage the EMC foams in the
order.
set. Ensure that EMC foams are mounted correctly.

2009-Jun-19
Service Modes, Error Codes, and Fault Finding TCM3.2L LA 5. EN 15

5.4.4 Error C odes 5.5 The B linking LED P rocedure (L AYER-2 c odes)

Take notice that some errors need several minutes before they 5.5.1 Introduction
start blinking or before they will be logged. So in case of
problems wait 2 minutes from start-up onwards, and then
The software is capable of identifying different kinds of errors.
check if the front LED is blinking or if an error is logged.
Because it is possible that more than one error can occur over
time, an error buffer is available that is capable of storing the
Table 5-2 Layer 1 code overview last five errors that occurred. This is useful if the OSD is not
working properly.
Code Board
2 SSB
Errors can also be displayed by the blinking LED procedure.
3 Platform supply (12V detection)
The method is to repeatedly let the LED pulse with as many
pulses as the error code number, followed by a time period of
Table 5-3 Layer-2 code overview 1.5 seconds in which the LED is “off”. Then this sequence is
repeated.
Layer 2 Error Detection Type Remarks E.g. error code 4 will res ult in four times the sequence LED “on”
error code Description Method for 0.25 seconds / LED “off” for 0.25 seconds. After this
0 No
Error N/A N/A N/A sequence the LED will be “off” for 1.5 seconds. Any RC
14 GeneralI 2C I2C Bu s Spontaneous Communication Error command terminates this sequence.
blinking on I2C bus
15 Tuner I2C Bus Error Log Communication Error
+ blinking in SDM with Tuner Displaying the entire error buffer
16 Demodulator I2C Bus Error Log Communication Error The entire error buffer can be displayed when service mode
+ blinking in SDM with TDA9886T “SDM” is entered (by remote control command
17 Audioamplifier I 2C Bus Error Log Communication Error 062596<MENU>). When in protection, this sequence will not
+ blinking in SDM with Audio amplifier work, but than LAYER-1 error code should suffice.
18 NVMEEPROM I 2C Bu s Spontaneous Communication Error
blinking with EEPROM In order to avoid confusion with RC signal reception blinking,
this blinking procedure is terminated when a RC command is
received.

5.5.2 How to Activate

Use one of the following methods:


• Activate the CSM. The blinking front LED will show only
the latest LAYER-1 error.
• Activate the SDM. The blinking front LED will show the
entire contents of the LAYER-2 error buffer.

2009-Jun-19
EN 16 5. TCM3.2L LA Service Modes, Error Codes, and Fault Finding

5.6 Fault Fi nding an d Re pair T ips

5.6.1 Fault Finding Flow Charts

No Picture, no sound, no Back light, Fuse Broken

YES YES YES Check main


For P22 ,Pin 7~8 For P22,pin10 is For P22,pin1 is
board DV10
is 3.3V, OK? 3.3V , OK? 24V , OK? &+3.3V OK?
NO NO NO YES

Check IPB Check Q10, Check IPB Check main board


X5,IR_MCU,KEY, DDRV & AV12, OK?
MCU_RESET,U8.
YES

Check main board


short_protect ,
oreset#,pwr_detect

18520_204_090313.eps
090313

Figure 5-2 No picture, no sound, no backlight. Fuse broken.

No Picture, Back light & Sound OK

Check the 5V-IF No Check the Yes


Replace R48 &
voltage of . is it voltage
OK? U6
of R48,U6

Yes

Yes
Check 33V is
OK? check the
U2,Q13
No

Is No
Q14,C184,C197 check
,L54 shorted to D2,R184,R178
earth?

18520_205_090313.eps
090313

Figure 5-3 No picture. Backlight and sound okay.

2009-Jun-19
Service Modes, Error Codes, and Fault Finding TCM3.2L LA 5. EN 17

Picture OK, No sound

No
Check the voltage of Check
U17.8~11,it 24v? L139,L140

Yes
Yes Change the
Check the voltage of No Check the Q24
software of U10 &
U17.31 & U17.23,is it OK? &,is it OK?
U8
Yes

Check the wave of No Change the


I2C&I2S OK? software of U10

Yes

Check
U17.24,U17.21, No Check the
L103,L101,R361,R362
U17.36 is 3.3V?

Yes
No
Check
Change the U17
R & L speaker
18520_206_090 313.ep s
090 313

Figure 5-4 Picture okay, no sound.

No colour

Colour system is Check the


Yes Dose the TV NO NO
Right & another voltage of Check
channel colour is signal too weak? U2 & I2C
Z1.1 OK?
right ?

No YES YES

Reset Check
To Tuner Input Check E2PROM
Local system cable & antenna U21

YES

Fine Frequency
18520_207_090313.eps
090313

Figure 5-5 No color.

2009-Jun-19
EN 18 5. TCM3.2L LA Service Modes, Error Codes, and Fault Finding

5.7 Software Upgrading 5.7.4 Upgrade HDMI EDID NVM

5.7.1 Introduction To upgrade the HDMI EDID, pin 7 of the EDID NVM [1] has to
be short circuited to ground. See ComPair for further
instructions.
It is possible for the user to upgrade the main software via the
USB port. A description on how to upgrade the main software
can be found in the DFU and below.
1
5.7.2 Main Software Upgrade 1
In “normal” conditions, so when there is no major problem with
the TV, the main software and the default software upgrade
application can be upgraded with the “upgrade.bin”. This can
also be done by the consumers themselves via the Software
Update Assistant in the user menu (see DFU), but they will
have to download their software from the commercial Philips
website.

How to upgrade (see also figure 5-9 User SW upgrade


flowchart):
1. Copy the “upgrade.bin” file to th e root of the US B stick.
18530_201_090327.eps
2. Power “off” the TV and remove all memory devices.
090327
3. Insert the USB stick that cont ains the down loaded software

upgrade.
4. Switch “on” the TV, an d activate the Main men u with the Figure 5-6 HDMI-1 & HDMI-2 EDID NVM
“Menu/House” key on the remote control.
5. In the Main menu, go to the “Software update” item.
6. Press “OK” key to go to the submenu.
7. Select “Local updates” in the submenu and press the “OK”
key to enter the Software Update application.
8. You will be prompted to cancel or to proceed with the
software updating.
9. To proceed, select “Update” and press the “OK” key to
enter the next menu. In the next menu select “Start” and
press “OK” key to start the software update.
10. Upgrading will now begin and the progress of the updating
will be displayed. After the software updating is completed, 1
the TV will automatically restart.

5.7.3 Stand-by Software Upgrade

In this chassis it is not possible to upgrade the Stand-by


software via a USB stick or ComPair. Please order a pre- 18520_210_090313.eps
programmed device via the Philips Spare Part web portal. 090313

Figure 5-7 HDMI-side EDID NVM

5.7.5 Upgrade VGA E DID NV M

To upgrade the VGA EDID NVM, pin 7 of the EDID NVM [2] has
to be short circuited to ground. See ComPair for further
instructions.

18520_209_090313.eps
090313

Figure 5-8 VGA EDID NVM

2009-Jun-19
Service Modes, Error Codes, and Fault Finding TCM3.2L LA 5. EN 19

5.7.6 Main SW upgrade flowchart.

Power o ff the set

A n ew er ver sion of sof tw ar e is de cet ed. Plug-in the USB stick


Do you want to update?

Power on the set


Cancel Upgrade

Layout 1 Detect USB break in  and


check autorun file

Enter into Setup Menu a nd activ e


local upgrades
An eq ua l/old er ver sion of sof tw ar e is
detected .
Y
Do you want to proceed?
Note: Should be don e only if necessary.

Cancel Upgrade N
Valid auto-run file?
Layout 2

Y
Please don  t shut off t he powe r
The software u pdate may takes 3 to 5 N
N
minutes
Is USB file version > Is USB file version <=
Erasing... En d
set SW set SW

Layout 3
Y Y

Display USB sw Displ ay USB sw


newer than the TV equal/older than the
Please don 
t shut off power
sw.Prompt user to TV sw.Prompt user to
The software u pdate may takes 3 to 5 comfirm comfirm
minutes
Upgrading...18%
See Layout 1
See Layout 2

Layout 4
N
N
Proceed?
Software update Y
fail ed! Wo uld you TV auto erase
Valid auto-run
like to try again Y and upgrade
file
software
Layout 5
See La you t 3 See La you t 4

If power drop Power on TV


TV will
during the
Display continue the
Set process with upgrade
upgrade upgrade as
sw upgrade procedure,don’t
progress soon as power
remove the USB comes back.
portabl e memory

TV auto restart Y N
the set, prompt Prompt user to
Successful?
user to remove try again
US B

See Layout 5

N Y
EN D Retry?

18520_215_090325.eps
090325

Figure 5-9 User SW upgrade flowchart

2009-Jun-19
EN 24 7. TCM3.2L LA Circuit Descriptions

7.3.3 IPL42L P SU

Block Diagram
DIM

PFC o u tp u t
3 95 V INVERTER +H V
AC
Re l a y PFC IC IC OZ9926A
Inp u t
L6562A (O2) -HV
(ST) ENABLE

S witchcon trol
BL-ON
Volt a ge Detect

PWM Power
Su pply IC
24 V
P S -ON
FA5571
(FUJI)

S TB Power
Su pply IC
3 .3 V
F S Q510
(FAIRCHILD
18520_214_090319.eps
090319

Figure 7-4 Block diagram IPL42L P SU

Key Components
The key component ICs are:
• Stand-by power sup ply IC: FS Q510 (Fair child).
• PFC control IC: L6562 (ST).
• 24V PWM control IC: FA5571N (FUJI).
• Inverter hig h volta ge con trol IC: OZ9 926 (O 2).

Control Signals

Table 7-4 Control signals

Controlsignal Comments Output


PS-ON 5.0V>=ON>=2.0V ACpoweroutputON
1.0V >= OFF >= 0V AC power output OFF
BL_ON 5.0V>=ON>=2.0V Theinverterisworking
1.0V >= OFF >= 0V The inverter is switched OFF
Burst dimming freq. / duty 100 - 200 Hz / 10 - 100%
PWMDimming Highlevel:2V~5 .0V
Low level: 0V ~ 0.7V

Output Characteristics

Table 7-5 Output characteristics

OutputVol tage Tolerance Min.curr ent Max.curre nt Loadregul ation


+3V3 +/-5% 5
mA 300mA +/-5%
24V +/-
5% 0.5
A 2.5
A +/-
5%

Fault Finding
Normal PSU working order:
• Connect the AC power plug.
• The 3.3V Stand-by power supply (Stand-by uP U801) will
start. This is a “single-ended flyback regulator”. For a good
functioning of this part, check the availability of 1.25V on
U803 (TL431).
• On connector P802, signal line “PS_ON” will go “high”
(3V3) and relay K801 will be activated.
• Also capacitors C811/C812 will be charged, supplying
IC806 with electricity. This will start the PFC circuit and
generate the +24 V control.
• Now, IC805 will start, and will generated the 24V output.
• On connector P802, signal “DIM” sets the PWM dimming
status.
• On connector P802, when signal “BL-ON” goes “high”, the
high voltage Inverter (IC901, OZ9926A) will start.

2009-Jun-19
IC Data Sheets TCM3.2L LA 8. EN 25

8. IC Data Sheets
Index of this chapter: This chapter shows the internal block diagrams and pin
8.1 Diagram B01, LD1117 (IC U4) configurations of ICs that are drawn as “black boxes” in the
8.2 Diagram B01, RT8110 (IC U13) electrical diagrams (with the exception of “memory” and “logic”
8.3 Diagram B01, MP1593 (IC U14) ICs).
8.4 Diagram B01, PQ1CX41 (IC U20)
8.5 Diagram B02, MX25L3205 (IC U10)
8.6 Diagram B02, MT8222 (IC U11)
8.7 Diagram B03, RT9199 (IC U1)
8.8 Diagram B04, TDA9885 (IC U2)
8.9 Diagram B07, WM8501 (IC U9)
8.10 Diagram B09, RC4558 (IC U26/U37)
8.11 Diagram B09, LM833D (IC U27)
8.12 Diagram B10, STA333BW (IC U17)

8.1 Diagram B01, LD1117 (I C U4)

BlockDiagram PinConfiguration
LD1117DT

DPAK

F_15710_166.eps
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Figure 8-1 Internal block diagram and pin configuration

2009-Jun-19
EN 26 8. TCM3.2L LA IC Data Sheets

8.2 Diagram B01, R T8110 (I C U1 3)

Block Dia gram

DRIVE VCC

VCC

V CC Power-
Regulator On Reset IOC
POR
OC R OC
0.8V REF
+ PHASE
UVP Soft-Start
0.5V - -
and Fault
+
Logic -

SSE + 1.5V
S1L PH_M
SS UGATE
+
+ Gm EO + Gate VCC BOOT
FB - + Control
-
Logic LGATE
PW M
GND
Oscillator

Pin Confi guration

(TOP VIEW)
E E E
S T T
A A D A
H G N G
P U G L

8 7 6 5

1 2 3 4

T E B C
O V
I F C
O R V
B D
18520_312_090326.eps
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Figure 8-2 Internal block diagram and pin configuration

2009-Jun-19
IC Data Sheets TCM3.2L LA 8. EN 27

8.3 Diagram B0 1, M P1593 (I C U1 4)

Block Diagram
IN 2
INTERNAL CURRENT
REGULATORS SENSE
AMPLIFIER + 5V
OSCILLATOR
SLOPE
COMP --
1 BS
40/385KHz
CLK M1
+ + S Q
R Q
3 SW
0.7V -- SHUTDOWN -- CURRENT
COMPARATOR COMPARATOR
EN 7 M2
LOCKOUT
-- COMPARATOR
1.8V

2.3V/
2.6V + + -- 4 GND

FREQUENCY -- 0.7V 1.22V + ERROR


FOLDBACK AMPLIFIER
COMPARATOR
5 FB 6 COMP 8 SS

Pin Configuration

TOP VIEW

BS 1 8 SS

IN 2 7 EN

SW 3 6 COMP

GND 4 5 FB

EXPOSED PAD
ON BACKSIDE
18520_307_090325.eps
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CONNECT TO PIN 4
Figure 8-3 Internal block diagram and pin configuration

2009-Jun-19
EN 28 8. TCM3.2L LA IC Data Sheets

8.4 Diagram B0 1, P Q1CX41 ( IC U 20)

Block Diagram

Pin Configuration

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Figure 8-4 Internal block diagram and pin configuration

2009-Jun-19
IC Data Sheets TCM3.2L LA 8. EN 29

8.5 Diagram B02, MX25L3205 (IC U10)

Block Diagram
a
Address X d
- d
D it
Generator e io
c Memory Array n
o a
d l
e 4
r K
b

SI Data
Register

Y-Decoder
SRAM
Buffer

Sense Output
Mode State Amplifier Buffer
CS#, ACC, Logic Machine HV
WP#,HOLD# Generator

SO

SCLK Clock Gener ator

Pin Configuration

PIN DESCRIPTION
SYMBOL DESCRIPTION
16-PIN SOP (300 mil)
CS# ChipSelect
SI SerialDataInput
HOLD# 16 SCLK SO/PO7(1) Serial Data Output or Parallel Data
1
output/input
VCC 2 15 SI
SCLK ClockInput
NC 3 14 PO6
HOLD#(2) Hold, to pause the serial communication
PO2 4 13 PO5
PO1 5 12 PO4 (HOLD# is not for parallel mode)
WP#/ACC Write Protection: connect to GND;
PO0 6 11 PO3
12V for program/erase acceleration:
CS# 7 10 GND
connect to 12V
SO/PO7 8 9 WP#/ACC
VCC + 3.3V Power Supply
GND Ground
PO0~PO6 Parallel data output/input (PO0~PO6 can
be connected to NC in serial mode)
NC NoInternalConnection

Note:
1. PO0~PO7 are not provided on 8-LAND SON package.
2. HOLD# is recommended to connect to VCC during
parallel mode.
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Figure 8-5 Internal block diagram and pin configuration

2009-Jun-19
EN 30 8. TCM3.2L LA IC Data Sheets

8.6 Diagram B02, M T8222 (I C U1 1)

CVBS / SV Analog Front End


(x8) 8032
ADC 3D TVD
Main Path
(Customer) YPbPr ADC MDDi
HDTVD DS
(x2) M
External U
ADC
Switches VGAD X
PIP Path D
VGA ADC R
MDDi DS A
M
HDMIx3
Digital Path OSD

Control ignal
S (GPIO,…) Merge Color US

LVDS Gamma Color US


LVDS Tx

Dithering DSP

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Figure 8-6 Internal block diagram and pin configuration

2009-Jun-19
IC Data Sheets TCM3.2L LA 8. EN 31

8.7 Diagram B03, RT9199 (I C U1)

Block Diagram
VCNTL VIN

Current Limit
Thermal Protection

+
REFEN
EA VOUT
-

GND

Pin Configuration
(TOP VIEW)

VIN 8 VCNTL
GND 2 7 VCNTL
REFEN 3 6 VCNTL
VOUT 4 5 VCNTL

SOP-8

VIN 8 NC
GND 2 7 NC
GND
REFEN 3 6 VCNTL
VOUT 4 5 NC

SOP-8 (Exposed Pad)


18520_314_090327.eps
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Figure 8-7 Internal block diagram and pin configuration

2009-Jun-19
EN 32 8. TCM3.2L LA IC Data Sheets

8.8 Diagram B04, T DA9885 (IC U 2)

Block Diagram
external
VIF-PLL reference crystal
filter

CVAGC pos or 4 MHz

(1)
TOP TAGC VAGC VPLL REF AFC
9 1 4 16 19 1 5 21
CAGC neg CBL

TUNER AGC VIF-AGC RCVCO DIGITALVCOCONTROL AFC DETECTOR

VIF2 2
VIDEO TRAPS 17 CVBS video output 2 V (p-p)
VIF1 1 VIF-PLL
4.5 to 6.5 MHz [1.1 V (p-p) without tra
TDA9885
TDA9886
8 AUD
SINGLE REFERENCE QSS MIXER/ AUDIO PROCESSING
SIF2 24
INTERCARRIER MIXER AND AND SWITCHES 5 DEEM
SIF1 23 AM-DEMODULATOR de-emphasis
network
MAD
NARROW-BAND FM-PLL 6 AFD
OUTPUT
SUPPLY SIF-AGC I2C-BUS TRANSCEIVER DETECTOR CAF
PORTS

CAGC

20 18 13 3 22 11 10 7 12 4
VP AGND n.c. OP1 OP2 SCL SDA DGND SIOMAD FMPLL

sound intercarrier output


(1) Not connected for TDA9885. and MAD select

FM-PLL filter

Pin Configuration

VIF1 1 24 SIF2

VIF2 2 23 SIF1

OP1 3 22 OP2

FMPLL 4 21 AFC

DEEM 5 20 VP
AFD 6 19 VPLL
TDA9885
TDA9886
DGND 7 18 AGND

AUD 8 17 CVBS

TOP 9 16 VAGC(1)

SDA 10 15 REF

SCL 11 14 TAGC

SIOMAD 12 13 n.c. G_16510

Figure 8-8 Internal block diagram and pin configuration

2009-Jun-19
IC Data Sheets TCM3.2L LA 8. EN 33

8.9 Diagram B07, W M8501 (IC U 9)

Block Dia gram

Pin Confi guration

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Figure 8-9 Internal block diagram and pin configuration

2009-Jun-19
EN 34 8. TCM3.2L LA IC Data Sheets

8.10 Diagram B09, RC4558 (IC U26/U37)

Block Dia gram


SCHEMATIC (EACH AMPLIFIER)
VCC+

IN−

IN+

OUT

VCC−

Pin Confi guration

(TOP VIEW)

1OUT 1 8 VCC+
1IN− 2 7 2OUT
1IN+ 3 6 2IN−
VCC− 4 5 2IN+
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Figure 8-10 Internal block diagram and pin configuration

2009-Jun-19
IC Data Sheets TCM3.2L LA 8. EN 35

8.11 Diagram B09 , LM83 3D (I C U27 )

Pin Configuration

Output 1 1 8 VCC

2 1 7 Output 2
Inputs 1
3 6

2 Inputs 2
VEE 4 5

(Top View)
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Figure 8-11 Internal block diagram and pin configuration

2009-Jun-19
EN 36 8. TCM3.2L LA IC Data Sheets

8.12 Diagram B10, STA333BW (IC U17)

Block Diagram

SCL SDA CONFIG

SA
I2C

OUT1A
OUT1B
SDI
POWER OUT2A

LRCKI Serial
Data Input OUT2B

BICKI
Channel mapping
CONTROL
STATUS

RESET
EQ, Tone, DDX3A
INT LINE Volumes… DDX3B
DDX4A/TWARNEXT
PWDN DDX4B/EAPD
Processor

XTI
PLL

PLL_FILTER

Pin Configuration

GND_SUB 1 36 Vdd_DIG
SA 2 35 GND_DIG
TEST MODE 3 34 SCL

VSS 4 33 SDA

VCC_REG 5 32 INT_LINE
OUT2B 6 31 RESET
GND2 7 30 SDI

VCC2 8 29 LRCKI
OUT2A 9 28 BICKI
OUT1B 10 27 XTI
VCC1 11 26 PLL_GND
GND1 12 25 PLL_FILTER
OUT1A 13 24 PLL_Vdd
GND_REG 14 23 POWRDN
Vdd 15 22 GND_DIG
CONFIG 16 21 VDD_DIG
OUT3B/DDX3B 17 20 TWARN/OUT4B
OUT3A/DDX3A 18 19 EAPD/OUT4A 18520_310_090325.eps
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Figure 8-12 Internal block diagram and pin configuration

2009-Jun-19
BlockDiagrams TCM3.2L LA 9. EN 37

9. Block Diagrams
Wiring Diagram 32" (P& S)
WIRING DIAGRAM 32" (P&S)

LCD DISPLAY

F T
F D D S
D L U
/O B D D V ) 1 D
N N S V V V V N L E O 1 1 E IN
O 2 2 S
N N P N N D 1 1 _ R
- V D N N K N N N L T R 4 _ _
S S
O
- 5 D /1 /1 D D D
N N 4 E
3 C 2 1 0 E I B 3 3 1 0 N ( IN Y IO D D IR B
B
B W /.3 4 4 V
L V
L G GE D E P E N I V
S
P P N 2
G+ +
2 . . E
. E
. E
. E
. .S B . O
. V . O
. O
. O
. O
. G
. 5A K GL GO5
P602 2
. . 3
0 . . . .
. . . . 0 2 4 6 8 0 2 4 7 9 3 5 1 8 0
2 4 6 8 1 1 1 1 1 2 2 2 2 2 3 3 2 3 4 1. . . . . . .
1.ADIN1 1 1 8 6 4 2 P7 6 5 4 3 2 1
2.LED-WHITE 2 2 1 1 P2 ) DD D
V V V V ) B
H H 1 J V 0 D X
4H H 11.DIM 12.BL_ON
3.LED-RED 3
. . . . 0 DA V
S
2 1 V V P E
4.GND P1 2 P1 2 9.COM 10.P_ON B
( P- D /5 D D /1 (B D
S S D D
P P
D N N 4
K P P P R R P P P P P D
7. +3.3VSB 8. N.C. N .3 N N 42 7V V 3 C 2 1 O C C B 4 3 2 1 0 N
5.IR 2B . G 3 GG+ 1L L G GE E. E
. E
. E
. E
. D
. N
. V
. O
. O
. O
. O
. O
. G
.
5.COM 6.COM 21 . . . . . . . . . . 1 3 5 7 9 1 3 5 7 1 3 5 7 9
6. 3.3VSB P1 9 7 5 3 1 P1 3 5 7 9 1 1 1 1 1 2 2 2 2 3 3 3 3 3
3.COM 4.+24V
MAIN POWER SUPPLY 1 +24V 2.+24V
P601
1. 3.3V
A IPB
2. IR_IN
3. GND
4. LED-RED
5. GPIO_11 B SSB
6.KEY
7. ADIN1

D
R L
A O
O R
B T
Y N
E O
K C

T3.15A

1N L
. .
) - + + -
0 L
P3 1 1 _ L R R
_ _ _
(B T T T T
5U U U U
2O OOO
. . . .
P1 2 3 4

INLET

TO TO
BACKLIGHT BACKLIGHT

RIG
SHPE
T AKER LS
EPFT
EAKER

1 2 1 IR LED PANEL
IN D D D
D E E N R 5 V J
1A. L
. L
. G
. I. +
.
P1 2 3 4 5 6

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2009-Jun-19
BlockDiagrams TCM3.2L LA 9. EN 38

Wiring Diagram 42" (P& S)


WIRING DIAGRAM 42" (P&S)

LCD DISPLAY

F
F D D S T
D L U 1 D
/O B D D V )
N NS V V
2 2 V V N L SE O 1
1 1
1 E
_ R IN
OV
-O - /5 D D D
S S
D N N K N N N L R N N P N N D _ _I B
D /1 /1 N N 4 3 C 2 1 0 SE IT B 4 3 3 1 0 N (B IN Y IO D D R
B W3. N 42 2
4 V L
L V G G .E .E .E .E .E .E . .B .V .O .O .O .O .O .G 5 D E
P E N I SV
.P .P 3 G+ + . . . . 0 2 4 6 8 0 2 4 7 9 3 5 1 8 0 1 .A .K .G .L .G .O .5
2 0 . . . . 2 4 6 8 1 1 1 1 1 2 2 2 2 2 3 3 2 3 4 P 7 6 5 4 3 2 1
1 1 8 6 4 2
) J B ) D D
X
1 D V 0 D D E
0 S
V 2 1 V V P
P602 B
( P- A D 5
/ D D 1
/ (B SD SD D D P 3P K P P P R R P P P P P D
N3 N N 4
2 C 2 1 OC C B 4 3 2 1 0 N
V N N 4 E E E E E D N V
1.ADIN1 2 .B G 3. 7 V O OOOO G
2.GPIO_11 2 1 . . GG +
. . . 1 .L .L .G .G .E .1 3. .5 .7 .9 .1 3. .5 .7 .1 3. .5 .7 .9
P 1 9 7 5 3 1 P 1 3 5 7 9 1 1 1 1 1 2 2 2 2 3 3 3 3 3
3. LED-RED
2 2 2 1 1 1
P802
4.GND 0 V V 0 V V 11.DIM 12.BL_ON
5.IR_IN 9 .H .H 9 .H .H 9.COM 10.P_ON
P 1 2 P 1 2
6. 3.3V 7. +3.3VS B 8. N.C.
5.COM 6.COM
3.COM 4.+24V
P601 MAIN POWER SUPPLY B SSB
1. 3.3V
2.IR_IN
A IPB
1 +24V 2.+24V

3.GND
4.LED-RED
5.GPIO_11
6.KEY
7.ADIN1

D
R L
A O
O R
B T
Y N
E O
K C

) ) - + + -
0 - + 0
1 WW 1 _L _L _R _R
(B .C B B (B T T T T
3
. U U 5 U U U U
2 .N . . 2 .O .O .O .O
S S
1 T5.0A P 1 2 3 P 1 2 3 4
0 N L
8 . .
P3 1

SUB WOOFER

TO
BACKLIGHT TO
BACKLIGHT

INLET

IR LED PANEL 1 2 1
J IN D D D
D E E N
V
5
1 .A .L .L .G .IR .+
P 1 2 3 4 5 6
RIGHT SPEAKER LEFT SPEAKER

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2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 40

10. Circuit Diagra ms and PWB Layouts


Main Power Supply (32")
8 7 6 5 4 3 2 1

A1 Power Supply Unit (32" Full HD)

F F

E E

D D

C C

B B

A A

8 7 6 5 4 3 2 1

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2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 41

Layout 32" P SU (Top)

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2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 42

Layout 32" P SU (Bottom)

18520_551_090313.eps
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2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 45

Layout 42" P SU (Top)

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2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 46

Layout 42" P SU (Bottom)

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2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 47

SSB: DC/DC
8 7 6 5 4 3 2 1

B01 DC - DC
12_M

12/24V_AUDIO 12_M L25


F 200R F
Z143 R708 R7 L24
Z159 T
P22 0R 0R NC 200R
T
+24/12V +24/12V C164
12_M1 12_M1 R6 R2 D9 0.1U C6
+3V3 5V_M1 2 1 LL4148 C167 5V_OUTSIDE
Z8 0R 0R 4U7
+24/12V GND D 5VSB NC 5V_M R104 0.1U
C137 T N +3 V3 about1mm 16V C101
5VSB 4 3 G 22K U13
1000P G
GND GND C13 2 R103 RT8110 1000U
1000P
N
0R
T
Z243
V
R453 D 6 5 VBR_OUT
B 1 8 Q1
1K 3 .3 /5VSB 3 .3 /5VSB
R BOOT PHASE D13 N03LT
R106 _ R11 5V_M
R451 8 7 2 7 G2 D2B
R8
E
Z4 100R GND PW-ON D R110 DRIVE UGATE 4 5 0R
4K7 NC SW GND
X
R452 R115 N NC Z15
L59 T L60 10K GND C100
T
1K C L15
10 9 GND 3 6 S2 D2A L23 T
4K7 100R 120R BL-ON/OFF PB-ON/OFF PB-ADJ G BL-ADJUST 120R NC B FB GND 3 6 15UH 1000U
16V 200R
R128 12 11 D8 R111 4 5 G1 D1B
C L58 E VCC LGATE 2 7 C7
1K Z5 T LL4148 0R L22
UP34 B Q9 120R S1 D1A 4U7
BT3 904 C144 C13 9 T Q3 1 8
C166 200R
0.1U C135 0.1U R109 R249 BT3904 0.01U
E C543 R114 C
1000P 1000P Z7 4K7 22K 100R PWM0 C165
C268 C555 B
1000P 47U GND 0.1U
GND Q8 C163
GND GND GND 6V3 E
GND BT3904 1U
C269 R124
C143 C4 33P GND 1K2
E GND 470P R126 E
GND 1U GND 10R
R129
GND 220R

U20 C5
12_M 1000P
PQ1CX41H2ZPQ
12_M GND
1 8 C161 Z244
L21 VOUT VB DV10 C87
0.01U T
220R 2 7 Z13 D4 L1 470U GND
VIN GND2 12/24V_AUDIO SR34 15UH 16V
T
3 6 L16 C145 C146
C105 OADJ GND1 33UH 220P 0.1U DV10 L137 U14
C152 C151 R122
100U 4 5 GND 200R MP1593 DN C156
100P 0.1U CONTROL COMP 5K6 C524
C150 16V 1 8 0.1U
L138 C158 BS SS 10U
0.1U 13 -PQ1CX4-1HB R117 200R 0.1U NC
10K 2 7
IN EN R121
C148 C104 110K
470U 3 6 C159
GND G ND GND GND 0.01U C472 SW COMP C157
10V GND GND 1U
470U 0.1U
4 5
35V GND FB
GND GND
R118 GND
C147 R116 C160
D 100P 10K GND C162 12_M D
D5 12K GND 8200P 100P C168
SR23 R123 0.1U
12K4
GND C149 GND
3900P
GND GND
GND R134 R136
R752 GND R102 100K 3K9
47K 5V_M
0R 5VSB D7
5V_M 5V_M1 GND
LL4148 Q7 D12
Q57 U4 5VS B BT3904 LL4148 R130
A03 401A C R101 2K2
5V_M LD1117S33 10K
D B
S 4 R96
R120 4 10K R105
E
22K C541 J R143 12_M 4K7
G D +3V3 Q6 GND
0.1U A
/ T Z14 10K SHORT_PROTECT BT3904 12_IF
R73 1 D U IN T R144
N O V 10K R98 R100
47K R697 G
1 2 3 NC C 8K2 D13
470K SW 10K R99
B LL4148
C 680R R13 1
Q4 R119 Q10 B POWERON/OFF E 1K
BT3904 4K7 BT3 904
C E R97
C D33 C155 C154 10K D10 D11 C
B LL4148 0.1U GND LL4148
0.1U LL4148 GND +3V3
R710 5V_DDR
E GND
C556 10K
4U7 C106 C102 R137 R135
GND GND 100U 100U 3K9 R13 2 2K7
16V 16V GND GND 1K8 R133
4K7
GND
GND GND

R3
5V_M U3 0R NC
R5 R4 LD1117S
2R7 2R7 C129 R9 GND C3
S-NC S -NC R698 0.1U NC
470K NC 120R 10U
4
4 C142
R108 5V_OUTS IDE 0.1U
R10 820R J
D
T 5VSB D34 +3V3
2R7 S-120 /A Z9 DDRV LL4148
D U IN C13 1
S-0 N O V T NC C127
1G 2 3 L14 12_M1 1 8 1U 12_M 0.1U
B 220R S2 D2A
NC B
5V_DDR R13 9 2 7 3
G2 D2B C126 2 1
T
G
22K 3 6
0.1U V O N
D
NC NC C140
I U
Z12
N /
S1 D1A AV12
T A
0.1U
D
SW
J
C94 C345 4 5
C133 C93 G1 D1B
0.1U
4
47U R138
0.22U 47U C170 4
R107 C13 4 6V3 4K7 Q2 1U
910R 6V3 NC NC
0.1U A048 03
S-200 GND U5
NC GND LD1117S12
C103 C141 C128
0.1U GND 0.1U
GND 100U GND
16V NC
GND

A A

8 7 6 5 4 3 2 1

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2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 49

SSB: DDR SD-RAM


8 7 6 5 4 3 2 1

B03 DDR SD-RAM

F F
(DDR SD-RAM with termination) VTT

R671 R668
150R 22R
MEM_VREF
U33 5 4
MEM_DQ0
5 4
RDQ0

C46 C420 MEM_DQ1 RDQ1


U18 MEM_VREF 49 2 MEM_DQ0 6 3 6 3
VREF DQ0 4U7 0.1U
M12L64164A 4 MEM_DQ1 MEM_DQ2 RDQ2
DQ1 7 2 7 2
5 MEM_DQ2
MEM_ADDR0 29 DQ2 7 MEM_DQ3 MEM_DQ3 RDQ3
MEM_ADDR0 23 2 MEM_DQ0 A0 DQ3 8 1 8 1
A0 DQ0 MEM_ADDR1 30 8 MEM_DQ4
MEM_ADDR1 24 4 MEM_DQ1 A1 DQ4
A1 DQ1 MEM_ADDR2 31 10 MEM_DQ5 GND R669 R654
MEM_ADDR2 25 5 MEM_DQ2 A2 DQ5
A2 DQ2 MEM_ADDR3 32 11 MEM_DQ6 150R 22R
MEM_ADDR3 26 7 MEM_DQ3 A3 DQ6
29 A3 DQ3 MEM_ADDR4 35 13 MEM_DQ7 MEM_DQ4 RDQ4
MEM_ADDR4 8 MEM_DQ4 A4 DQ7
30 A4 DQ4 MEM_ADDR5 36 54 MEM_DQ8 5 4 5 4
MEM_ADDR5 10 MEM_DQ5 A5 DQ8 C421
31 A5 DQ5 MEM_ADDR6 37 56 MEM_DQ9 MEM_DQ5 RDQ5
MEM_ADDR6 11 MEM_DQ6 A6 DQ9 3300P
32 A6 DQ6 MEM_ADDR7 38 57 MEM_DQ10 6 3 6 3
MEM_ADDR7 13 MEM_DQ7 A7 DQ10
A7 DQ7 MEM_ADDR8 39 59 MEM_DQ11 MEM_DQ6 RDQ6
MEM_ADDR8 33 42 MEM_DQ8 A8 DQ11
A8 DQ8 MEM_ADDR9 40 60 MEM_DQ12 7 2 7 2
MEM_ADDR9 34 44 MEM_DQ9 A9 DQ12
A9 DQ9 MEM_ADDR10 28 62 MEM_DQ13 MEM_DQ7 RDQ7
MEM_ADDR10 22 45 MEM_DQ10 A10/AP DQ13
A10/AP DQ10 MEM_ADDR11 41 63 MEM_DQ14 1 1
E MEM_ADDR11 35 47 MEM_DQ11 A11 DQ14 8 8 E
A11 DQ11 65 MEM_DQ15 GND
48 MEM_DQ12 DQ15 R497 150R MEM_DQS0 RDQS0
DQ12 R493
50 MEM_DQ13 R496 150R MEM_DQM0 RDQM0 22R
DQ13 14 R490
51 MEM_DQ14 NC R491 150R MEM_DQM1 RDQM1 22R
38 DQ14 17 C429 R489 22R
MEM_CLK0 53 MEM_DQ15 NC1 R495 150R MEM_DQS1 RDQS1
CLK DQ15 MEM_CLK0 45 19 0.1U R488 22R
CK NC2 R498 150R MEM_DQ0
MEM_CLK0# 46 25
CK NC3 R492 150R MEM_DQ8
MEM_CLKEN 44 42 MEM_ADDR12
MEM_CLKEN 37 36 CKE NC7
CKE NC1 DDRV 43 DDRV
40 NC4
NC2 50 R662 R667
NC5
MEM_CS# 24 53 GND 150R 22R
CS NC6
MEM_RAS# 23 MEM_DQ9 RDQ8
MEM_CS# 19 1 RAS
CS VDD MEM_CAS# 22 1
MEM_RAS# 18 14 CAS VDD 5 4 5 4
RAS VDD1 MEM_WE# 21 18 MEM_DQ10
MEM_CAS# 17 27 WE VDD1 RDQ9
CAS VDD2 33
MEM_WE# 16 3 VDD2 6 3 6 3
WE VDDQ 3 C428 MEM_DQ11 RDQ10
9 VDDQ
VDDQ1 MEM_DQS0 16 9 3300P
43 LDQS VDDQ1 7 2 7 2
VDDQ2 MEM_DQS1 51 15 MEM_DQ12 RDQ11
49 UDQS VDDQ2
VDDQ3 55 1 1
MEM_DQM0 15 VDDQ3 8 8
LDQM 61
MEM_DQM1 39 VDDQ4 R665 R666
UDQM MEM_DQM0 20
54 LDM 150R 22R
VSS MEM_DQM1 47 34 GND
28 UDM VSS RDQ12
VSS1 48
41 VSS2 5 4 5 4
VSS2 66
MEM_BA0 20 52 VSS1 MEM_DQ13 RDQ13
A13 VSS Q MEM_BA0 26 6
MEM_BA1 21 6 BA0 VSSQ1 C113 C44 C422 6 3 6 3
A12 VSS Q1 MEM_BA1 27 12
12 BA1 VSSQ2 100U 4U7 0.1U MEM_DQ14 RDQ14
VSS Q2 52
D 46 VSSQ 16V 7 2 7 2 D
VSS Q3 58
VSSQ3 MEM_DQ15 RDQ15
64
VSSQ4 8 1 8 1
SDRAMADD GND HY5DU281622FT R661 R655
GND GND 150R 22R
MEM_WE# RWE#
5 4 5 4
C423 MEM_CAS# RCAS#
3300P 6 3 6 3
MEM_RAS# RRAS#
7 2 7 2

8 1 8 1
R660 R656
GND
150R 22R
MEM_CS# RCS#
5 4 5 4
C425 MEM_BA0 RBA0
6 3 6 3
0.1U
MEM_BA1 RBA1
DDRV +3 V3 7 2 7 2
MEM_ADDR10 RA10
DDRV 8 1 8 1
GND R664 R657
150R 22R
8 1 MEM_ADDR7 RA7
C C114 U1 C8 0
C
R719 47U VTT R4 84 5 4
47U RT9199 6V3 22R RCLK0 C424 7 2 MEM_ADDR6 RA6
6V3 0R NC VTT
MEM_CLK0
3300P
1 8 L 80 R4 87 6 3
VIN NC 3 C111 1K 6 3 MEM_ADDR5 RA5
47U 220R
MEM_VREF 2 7 R721 SDRAMADD SDRAM75R R483 7 2
GND NC2 6V 3 100R
GND MEM_VREF R4 85 5 4 MEM_ADDR4 RA4
NC
3 6 0R SDEAMNC 8 1
GND REFEN VCNTL 22R
C413 SDRAMNC GND R663 R658
4 5 0.1U C575 R499 MEM_CLK0# RCLK0# 22R
VOUT NC1 150R
C412 10U 1K 8 1 MEM_ADDR12 RA12
R720 C415 1000P NC SDRAM75R
SDRAMNC 5 4
0R NC C47 0.1U MEM_CLKEN 7 2 MEM_ADDR11
RCKE RA11
4U7 C426
6 3
C4 30 R4 86 0.1U 6 3 MEM_ADDR9 RA9
0.1U 22R 7 2
GND 5 4 MEM_ADDR8 RA8
GND 8 1
GND GND
R670 R659
GND 150R 22R
MEM_ADDR0 RA0
5 4 5 4
C45 C427 MEM_ADDR1 RA1
4U7 3300P 6 3 6 3
MEM_ADDR2 RA2
7 2 7 2
B MEM_ADDR3 RA3
B
8 1 8 1
DDRV
GND

C8 9 C112 C4 3 C414 C417 C416 C418 C419 C408 C409 C410 C411
470U 4U7 0.1U 3300P 3300P 3300P 3300P 0.1U
100U 0.1U 0.1U 0.1U
10V 16V

GND

A A

8 7 6 5 4 3 2 1

18520_502_090312.eps
090312

2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 50

SSB: Tuner
8 7 6 5 4 3 2 1

B04 TUNER

F Z1 Z2 F

5VOUT

5VOUT
APLS EU TCLAP
R160
22K
R167 R166
4K7 4K7 R153 R161
T 4K7 12K C208
1 2 U
C 1 L A 4 C L A
-O 0.01U
3 D16
G C S C D B B C T C F G S C D C P T F
C187 X3 C186 R156
A N A S S M M N B N I A A S S N B B I BA277 1500P TV-RF-AGC
4M 0.1U 100K
1 2 3 4 5 6 7 8 9 0 1 1 3 4 5 6 7 9 1 NC
1 1 1 Q12 R159
BT3904 GND
Z 39 T NC R158
GND
22K
R756 R168 330R
GND Z38 T 0R C C182
NC 10K
Z3 5 B OP2 0.01U
GND T C1 88
NC
R755 E 0.47U
GND 0R C201 9 885NC
R169 0.01U C204 5VOUT
Z36 NC C177
Z33 T T ZT37 10K NC 20P GND L50
T NC 0.22U
E 5V-IF Z3 4 D6 1000UR E
BA277 R165 5V-IF
470R
L52 C49 C213 RF-AGC CVB S
1000UR 0.1U C205 BA277 GND C117
10U D15
0.01U 100U
C118 GND
4 3 2 1 0 9 8 7 6 5 4 3 C189 16V
47U 2 2 2 2 2 1 1 1 1 1 1 1
6V3 C211 0.01U
0.1U R727 2 1 2 C P L D S C F C C
1 2 3 5
4 IF IF P F V L N B G E G N
C212 R174 0R S S O A P G V A R A R162
1U R154 L51 4K7 NC V A C V T 220R
GND
1UH D 1 2
C214
100R S DA_TV NC R170 N D T T R190
IN G
/ N U U 75R
GND 3300P R189 5VOUT 0R
N G O O
0R GND NC I D TV-CVB S TV1-V
GND R155 NC L D A
100R GND L M M
SCL_TV X7 SAW-D9453 D 2 1 2 1 P E D N D P A L LATAMNCAP-ADD
C438 L-45-SAW9 37-0M0 U F
I F
I P M E F G U O D C O
I E
0.01U GND V V O F D A D A T S S S
C179 R180
47P C180 33R X2 1 2 3 4 5 6 7 8 9 0 1 2 B
SAW- 395 3D/K7270M 1 1 1 TDA9885T C Q13
12_M U6 4 47P R181 R186
BC857C
LD1117S50
4 2K2 2K2 R187 D 1 2
N D T T
5V-IF 5K6 IN G
/ N U U
G
L62 N G O O R172
O N
V U D
/ Z160 I 10K
0R C432 C199
I A
R48 T
N T
GND
D
3 1 2 3 4 5 0.01U
J1
22R 2
33V
1000P MPX2
2W 12_IF GND
D R18 4 2
D
22K TV_AUDIO
C116 D17 L-45-SAWM3 9-530
100U BA277 GND
16V L48 R182 R173
C206 C202 12K
1000UR D2 0.1U 0R
33V 0.01U R152 NC C178 C18 5
2K2 0.47U Z 32 Z31
C176 0.01U
0.1U 5V-IF C43 1 T T
GND 1000P C191
R178 R151
C193 47K L54 R179 GND L55 1000P
L61 0R NC R191
0.1U 1000UH 100K 1000UH C209
D2 8 0.56UH NC R188 0.01U C210 C190 100R S CL_TV
R163
0BAV99 5K6 390P 1000P GND 2K2 R157
R150 NC 100R
12K GND Q14 S DA_TV
TV-RF-AGC 2 BC8 46B
C192 C197 R185
RF-AGC D14 C C
1K
LL414 8 0.1U 200P GND
C198 B C183 Q16 B GND C194 C1 81
0.1U 3
4700P C124ET
C175 47P 47P
E
C115 E
0.1U C18 4
47U 1 C440
270P
6V 3 1000P
GND 5VOUT
GND
C GND C
GND
GND
Far from signal R509 C62
C203
0.1U 22K 0.01U
5V-IF 5VOUT MPX2_P
5VOUT C
MPX2 B
GND Q15
C61
+3V3 R383 E BC 846B 0.01U
R177 R176 R171 MPX2_N
4K7 4K7 L49 82R R503 0R
2.2UH 10R C215 NC
5
TV1-V CVB S0P L63 R507
12UH Q17 0.1U
R192 BC 846B L-ADD 330R
R175 150R L-ADD R193 R518
SDA_TV 3 C196 L-ADD L-ADD C 22K
4K7 C195 TV-CVBS 150R
4 220P X1 B GND
220P 4M5
3 1
L-ADD L-ADD
CVBS0N R501 E R514
SCL_TV 5VOUT R195 0R 100R TV1-V
6
1
R516 1K GND GND
2
GND 10K L-ADD L-ADD(NC) L-ADD
L-ADD J1
C207 0R NC
B U30 0.1U R515
UM6K1N
2
R500 B
C 220R
12-UM6K1N-0BX 4K7 R196 L-ADD J2
OP2 B 0R NC
C119 C120 Q18 0R
47U R512 R513 47U L-ADD BC8 46B L-ADD
C4 34 C433 GND 6V 3 39K 6V3
E L-NC J3
33P 3 9K GND NC
33P TV_AUDIO MPX1 0R
GND GND
R511 J4
100R C439 C4 35 NC
22P 0R
R510 22P GND GND
OSCL0 GND GND 100R

OSDA0
GND

A A

8 7 6 5 4 3 2 1

18520_503_090312.eps
090312

2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 51

SSB: HDMI
8 7 6 5 4 3 2 1

B05 HDMI

P5
MNT-HOLE2
6
MNT-HOLE1
F 5 F
P16
GND GND
1 RX0_2
RX2+ R45 R3 1
RX0_2 1 2 RX0_0 GND-1
GND1 2 1 2 4
USB_DP0
3 RX0_2B R35 R33 DPOS-1
3 5V_M
RX2- RX0_2B 1 2 RX0_0B 1 2 USB_DM0
L65 C219
RX1+ 4 RX0_1 DNEG-1
2 L64
R3 6 R3 0 C91 120R 0.1U 120R
RX0_1 1 2 RX0_C
5 1 2 VCC-1
1
GND2 100U NC +3V3
6 RX0_1B 2 2 16V U12
RX1- R34 R32 R200 TPS2550
RX0_1B RX0_CB F1 F2
RX0_0 1 2 1 2 100K 6 1
7 C90 OUT IN
RX0+
1
8 R22 47U
GND3 GND GND R47 6V3 R201
GND 5 2
RX0_0B ILIM GND 10K
9 1 1 R199
RX0- R52 R541
4 3 100R
RXC+ 10 RX0_C 10K D C217 GND FAULT EN
PWM1
2 N 0.1U +3 V3
G R197
11 OPWR0_5V 13-TPS255-0DB 0R
GND4 GND
NC C218
RXC- 12 RX0_CB R540 R713 0.1U
R53 7 100R GND R198 R202
100R HDMISCL_0 HDMIDDCS CL_0 10K 100R 24K
E 13 HDMI_CEC_3V3 PWM3 E
NC1 HDMISDA_0 HDMIDDCS DA_0 GND
NC2 14 T R53 6 100R UP33
Z103 D GND
15 HDMISCL_0 P13 N
DDCCLK C444 G
GND C469
HDMISDA_0 10P
DDCDA 16 C445 1 RX2_2 1000P
RX2+
10P
17 R561 GND1 2 R46 R38
GND5 Q20 RX2_2 1 2 RX2_0
1K GND 1 2
VCC 18 BT3904 3 RX2_2B
R148 RX2-
C
1K GND R42 R40
19 HDMICAB0 B RX1+ 4 RX2_1 RX2_2B 1 2 RX2_0B 1 2
HPD
E C298 5 R43 R37
GND2
T
Z104 RX2_1 1 2 RX2_C
1000P 1 2
R542 RX1- 6 RX2_1B
100K GND R539 1
47K 7 RX2_0 R41 R39
RX0+ GND RX2_1B 1 2 RX2_CB 1 2
R564
100R U22 GND3 8
R563 AT24C02 R51
GND 1
R538 Z43
100R 8 1 RX2_0B
47K T VCC A0 RX0-
9
C443 R557
7 2 10K
2
R57 WP A1 0.1U RXC+ 10 RX2_C D
N
D R562 1 1
6 3 11 G D
10K SCL A2 GND4 OPWR2_5V
2 Z45
5 4 RXC- 12 RX2_CB R556
SDA GND
T
R53 100R
R54 R549 100R
GND Z42 T 13 HDMI_CEC_3V3
HDMISCL_2 HDMIDDCSCL_2
GND NC1
Z46 T 14
HDMISDA_2 HDMIDDCSDA_2
2 2 T NC2
Z44
T
Z107 R548 100R UP35
15 HDMISCL_2
DDCCLK C447
GND GND
DDCDA 16 HDMISDA_2 10P
C448
GND5 17 R559 10P
Q21 GND
1K
P14 VCC 18 BT3 904 R254
GND C
19 1K GND
1 RX1_2
HPD B
RX2+ R25 R24
RX1_2 1 2 RX1_0 20 C452
2 1 2
T
GND1 NC20 Z108 E 1000P
3 RX1_2B R28 R27 21 R558 R552
RX2- RX1_2B RX1_0B
NC21 100K GND 47K
1 2 1 2
4 RX1_1
RX1+ R29 R23 GND
RX1_1 U23
1
5 1 2 RX1_C 1 2
GND2 GND R545 R551 AT24C02
C 100R Z48 8 1
RX1- 6 RX1_1B
R44 R26
47K T VCC A0 C
R94 C446
RX1_1B RX1_CB
1
RX1_0 1 2 1 2 7 2 0.1U
7 GND WP A1
RX0+ R544 R550
100R 6 3
8 10K
2
GND3 SCL A2
1 1
R56 Z50
RX1_0B 5 4
9 SDA GND
T
RX0- R530 GND R55 R50
10K Z47 T
2
RXC+ 10 RX1_C D GND
N
G Z51 T
11 T
GND4 OPWR1_5V 2 2 Z49
RXC- 12 RX1_CB R529
100R HDMISCL_1 R525 100R HDMIDDCSCL_1 GND GND
13 HDMI_CEC_3V3
HDMISDA_1 HDMIDDCSDA_1
NC1
P11
NC2 14 T R524 100R UP30
Z105 3
+
RX0_2 19 20
15 HDMISCL_1 C449 3
V
DDCCLK
10P RX0_2B 17 18 OSCL0
DDCDA 16 HDMISDA_1 C442 +3V3SB
5V_M
10P RX0_1 15 16 OSDA0
17 R532 +3V3
GND5 Q19
1K GND RX0_1B 13 14 GND
VCC 18 BT3904
R149
B C
1K GND GND 11 12 HDMI_CEC_3V3
19 B R113 B
HPD 33K
C337 RX0_0 9 10 HDMISCL_0
20 E R112 R565
NC20 1000P
T
Z106 33K RX0_0B 7 8 HDMISDA_0
R531 R528 100R
21
NC21 100K GND 47K Q5
2N7002 GND 5 6 GND
R566
RX0_C 3 4 HDMICAB0
1 U24 CEC CEC1 100R HDMI_CEC_3V3
GND R521 AT24C02
100R R527 Z40 RX0_CB 1 2 OPWR0_5V
8 1
47K T VCC A0
GND R8 7 C441
7 2 0.1U
WP A1 NC
R520 R526
6 3
1 1
10K 100R SCL A2
2
Z41
5 4
SDA GND
T
GND R58 R59
Z52 T GND
Z54 T
2 2 T
Z53

GND GND

A A

8 7 6 5 4 3 2 1

18520_504_090312.eps
090312

2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 52

SSB: I/O - VGA, U SB, S-Video


8 7 6 5 4 3 2 1

B06 I/O - VGA, U SB, S-video


GND
P6
R575
100R VGASCL 5V_M
16 U34
F RT9701
F
R574 5 NC-13-RT9701-PBB
100R VGASDA
R63 R62 R64 F3 F4 F6 F5 C200
NC 1 NC 1 NC 1 15 0.1U
NC
VGASCL0_IN 10
5 1 R307
VOUT2 VOUT1 C3 29
RXD0_EXT 4 R321 0R NC 220U
10K 16V GND
VSYNC0 14 NC 2 NC
2 2 2 GND
VGA5V_EXT0 9 GND P12
L71 4 3 C50 10 NC
CE VIN C279 GND 47U
BLUE 120R BLUE0 3 12
0.1U 16V
0 NC NC
HSYNC0 13 8
C291
C2 4
8 0.1U USB_DP0 7
L69 47U NC
5 1 16V USB_DP1 3
GREEN 120R GREEN0 2 VOUT2 VOUT1 NC USB_DM0 6
0 USB_DM1 2
VGASDA0_IN 12 2 R305
GND VCC_0 5
0RNC 1
VCC_1
7 GND
L70 4 3
CE VIN 2 2 F13
RED 120R RED0 1 F14 9
E 0 GND 11 E
U35
TXD0_EXT 11 R49
R229
1 Z75 T RT9701
NC
R231 T NC-13-RT9701-PBB
75R NC Z74 6
75R R66 T
1 2 Z73 GND
R67 T 17 1 1
Z72
NC T
F9 Z71 R304
R23 0 Z70 T NC
GND 75R Z69 T GND 47-VGA019-XX0
2
F10
R577 L72 T R326
Z68 GND
560R
VGAHSYNC# 120R
NC Z67 T 100R
GND R65 Z66 T USB_DP1_1 NC USB_DP1 P36
R578 L66 1 2 Z
1
560R 120R 3 VCC_0 VCC_1 9
VGAVSYNC# Z T
1 T
R725 1 2
GND R570 R569 HPOUTL1 100R 6 USB_DM0 USB_DM1 Z
Z T
T
D32
2
1 1 VGA_PLUGPWR0 10K 22K 3 4 0
3 US B_DP0
R567 R571 BAV70 NC 0 USB_DP1
Z
F8 F7 1
Z T
T 2
2K2 2K2 Z65 U25 R576 R505 5 6
1
R568 T AT24C02 10K
100R NC 1 GND GND
Z
R61 2 R572 1 T
T
TZ64 Z
2
100R 1 8 USB_DM1_1 USB_DM1 7 8
6
NC
100R A0 VCC
8
GND 2 R6
NC
2 2 7 VGAROMWP0 R726 NC
A1 WP 100R
C23 0 HPOUTR1
3 6
0.1U A2 SCL
D NC D
4 5
GND 5
V GND S DA

T Z61
_
Z57
M
GND T Z62
C56 T
T Z63 R206 L123
VGAS DA0 8 K2 2U2
VGA_L 120R Z56 P7
VGASCL0 2
R205 C58 L124 T
8 K2 2U2
C225 R228 VGA_R 120R
REDP 0.01U 68R 3
RED
Z55 T
R203 1
R204 22K 47-MIC012-XX0
C227 22K C551 C544
C224 10P
L133 C55 R210 470P 470P
0.01U 2U2 GND
VGAGND YPBPR2_R 120R 8K2
Y2_R
VGAVSYNC# GND GND
GND GNDGND
L13 1 C57 R209
120R 2U2 8 K2 C222
YPBPR2_L Y2_L
10P

C229 R226
C 0.01U R319
68 R BLUE C550 R207 R208 100R C
BLUP C548 22K VSCL_T
470P 22K GND TXD0_EXT
470P

C221 VGAHSYNC# VSDA_R RXD0_EXT


10P GNDGND R194
GND GND R312 2 2
100R
C234
10P F38 F3 9
C66 R214
GND YPBPR1_R 2U2 8 K2
Y1_R
R147
GND 1 1
C223 R225 C63 R213
4700P 0R 2U2 8 K2
VGASOG YPBPR1_L Y1_L

GND
C226 R227
0.01U 68R
GRNP GREEN R212
22K
P39
C228 R211 GND
10P R233 Z59
22K C220 R216 75R P9
C233
1 0.047U 100R T 6
B GND GND US B_DP1 47P SY1_IN B
CVBS 6 L68 120R
2 2
GND US B_DM1 CVBS 7 L67 120R SC1_IN 1
3 5
C70 C68 R224 F12
R222 2U2 VCC_1
8 K2 C231 R232 Z58
1
AV1R_IN 2U2 8K2 AV2R_IN AV2_R 4
AV1_R 0.047U F11
100R R60 T
NC C23 2 R215 7
47P R69
R223 75R
C71 R221 C69 2 1
8K2 AV2L_IN 2U2 8K2 AV2_L
AV1L_IN 2U2 AV1_L GND
GND 2 3

T 4
R217 R218
22K 22K R219 R220 GND Z60
22K 22K
GND

GND GND GND GND

A A

8 7 6 5 4 3 2 1

18520_505_090312.eps
090312

2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 53

SSB: Digital Analog Converter, DAC


8 7 6 5 4 3 2 1

B07 Digital Analog Converter, DAC


Z155
Z154 Z156
T T T
P1
F SHIELD 11 F
R506
1 SCT1_AV_IN 0R NC ADIN3 _1
VIN P28
4 YPBPR2_R
VOUT 12 S CT1_AV_OUT R278
SCT1_FS_IN 33K NC ADIN3
RED
2
BLNKGND 1
2 YPBPR2_L
VGND 13
Z
3 SCT1_FB_IN 1
T 5 WHITE R259
BLNK 2 3 R75 10K
Z R272 NC NC
R 14 PR1/R_IN T 1 L78 C259
5 68 R F22
3 0.01U 2
6 PR1/R_IN 120R PR1P
4
DATAGND
RED
RGND 15 R270
8 C258 GND
75R 15P
5
DATA Z
1
T 5 9 PB1/B_IN
G 16 Y1/G_IN
1 R271
BLUE 75R
6 R714
CLKOUT S CT1_FS_IN 0R
17 1 R273 C260
GGND 7 Y1/G_IN L77 0.01U
Z
GREEN 120R 68 R PB1P
SCT1_FS _IN T 1
E 7 4 Z76
T E
SWITCH 4 Z 5 R253
1 1 1
1 C257
B 18 PB1/B_IN T 4 15P SCT1_FB_IN
0R NC SOY1
6 F15 R72 R74 C261
Z R269
8 YPBPR2_L T 1 GND C264 4700P 1
4 0R
AIL 5 15P SOY1 R70
R73
BGND 19 NC NC
NC 2NC L83 R275 C263 F23 R252
2 2
9 F17 F16 120R 68R 0.01U Y1P 75R
AGND NC
AOL 20 SCT1_AUL_OUT 2
Z147
T
10 YPBPR2_R R277
AIR 75R R274
GND 100R C262
AOR 21 SCT1_AUR_OUT 0.01U GND
GND YPBPR1_GND

R276
NC 47-SCA014-XX0G GND 0R

T T T 5V_M ADCVA +3 V3 DACVL


Z148 Z150
Z149 L81 L82
120R ADCVA 120R
NC NC
C245
D C243 1U C265 D
1U C244 NC 1U
NC NC
0.1U
NC +3V3 C136 R236
33P 10K
NC NC
GND GND
C130 C138
33P 33P GND C153
R238 NC NC
47K 33P
U9 NC
NC WM8501
R241

GPIO_3 R239 33R NC 1 LRCLK MCLK 14 33R GPIO_2 R242 +


NC 10K NC 3
R255 R257 C248 GPIO_6 R240 33R NC 2 13 V
L76 DIN FORMAT + 3
10R 100R 0.047U 3
S CT1_AV_IN 120R CVBS3 GPIO_5 R23 4 33R NC 3 12 D V
BCLK DEEMPH A 3
NC C
NC NC NC 4 11 V
R247
2
R258 ENABLE DVDD C238 L 10K
F18 NC
C247 75R C249 5 10 0.1U R235
C236 VMID DGND
22P NC 47P 0.1U C235 NC R243 10K
NC NC 6 9 10K NC
R71 NC C237 0.1U ROUT LOUT NC
NC 1U NC
NC 7 8
1 GND AGND AVDD
A GND
C D C
C
NC V C23 9
R267 R265 C255 GND A 1U
GND GND 100R 0.01U NC
0R C240
YPBPR0_GND DA_AUL
0.1U
NC
R268 C241
GND GND 75R 1U
C266 GND NC DA_AUR
L75 R266
68R 0.01U
R78 120R Y0P
2 2 2
F20 R260 C254
R77 F19 F21 4700P
GND 0R S OY0
R76 C256
T NC 15P
1NC1 NC 1
Z8 2 L74 15P R264 C253
P19 68R 0.01U
120R C250 PB0P 5V_M
12
11
GREEN C242
T C52 R375
10 R262 1U 0.1U
75R R740 NC NC 10K
Z8 1 1K NC
B 9 NC C Q26 B
C436
TV-CVBS R743 47U BT3904
BLUE GND B
T 1K 6V3 NC R280
8 R261 C251 NC NC R3 76 75R
75R R279 E SCT1_AV_OUT
Z80 15P C 15K
L73 UP3 1 1K NC
B
7 120R PR0P Q27 NC
NC BT3 904 R28 2
E
RED Z79 T R263 C252 220R
Z163 0.01U C470 NC
6 68R
T 1000P GND
L134 NC
120R YPBPR1_L GND
5 GND
WHITE R350 GND
4 0R Z188
NC L136
T
120R YPBPR1_R
3
2
RED
1
C546 C553
470P 470P

A A
GNDGND

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2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 54

SSB: I/O - Connectivity YPbPr


8 7 6 5 4 3 2 1

B08 I/O - Connectivity YP bPr


Z18 2
T
P2

SHIELD 11
F F
GND GND
1 AV2_IN Z88
VIN
SCT2_AV_OUT T C288 C271
VOUT 12 2200P
2200P
2 C270
BLNKGND P31 Z191 C289 2200P
AV2R_IN_1 R316 C273 2200P
VGND 13 1 L88 Z175
RED 120R 100R 0.047U
Z86 CVBS5 P27 1 T T
3 L89
BLNK T NC 2.2UH
NC NC 2 HPOUTR1
R 14 SCT2_R/C_IN AV2L_IN_1
3 R297 C287 L90
4 75R 47P 2.2UH HPOUTL1
DATAGND WHITE SCT2_R/C_IN NC NC 3

RGND 15 2 Z87 Z17


T
3
6 9
T 5 8
Z177
5 SCT2_R/C_IN GND 4 7
DATA 5 R1 L8 5 R296 C272 T
16 0R 120R 100R 0.047U
G YELLOW AV2_IN CVBS4
Z196 Z178
6 T T 4 2 C290
CLKOUT 89 HPDET# GND
Z
T R287 C267 0.1U
GGND 17 75R 47P
T
7 SCT2_FS _IN GND R8 4 F24
SWITCH NC R579 Z176
E GND GND R315 E
B 18 1
1K 100R
GND GPIO_10
8 AV2L_IN_1
AIL
BGND 19
L142 GND +3V3
9 2.2UH
AGND
NC
AOL 20 AUL_OUT0_1 L132
AV2L_IN_1 120R AV2L_IN
10 AV2R_IN_1
AIR L143
2.2UH AUR_OUT0_1
AOR 21
NC L135
AV2R_IN_1 120R AV2R_IN
T T
NC C586 C588
Z245 2200P 2200P Z172 5V_M
Z246 NC NC C547
C585 C545 T
C587
2200P 2200P 470P 470P
NC C1
NC 100U
16V R301 R300 R299
NC C278
GND 4K7 4K7 4K7
GND GND GND 0.1U R298 NC NC NC
Z165 NC 4K7
D Z166 NC D
P4 T T
P38
Z91 R735
1 T 10
RED R753 100R
1K P35 GND L92
AUR_OUT0_1 AUR_OUT0 GAME_DA2 120R NC GPIO_22
1
2 HPDET# AV1L_IN NC
Z181 R736
1 2 6 T
AV1R_IN L93 100R
Z90 NC
3 3 4 2 GAME_DA1 120R GPIO_24
WHITE T R754 HPOUTL1
1K Z171 NC
AUL_OUT0_1 AUL_OUT0 R3 10 C284 5 6 7 T R737
4 HPOUTR1 AV1_IN L94 100R
10K 0.1U
5V_M 7 8 3 GAME_LOAD 120R NC GPIO_25
Z92 Z18 6 NC
5 8 R738
YELLOW T C54 T L95 100R
1U NC NC
4 GAME_CLK 120R GPIO_23
6 GND R79 R81 NC C274
C437 F28 F30 C275 C276 C277
C
9 NC 2 NC2
1 1 4700P 4700P 4700P 4700P
GND 47U
B GND CVBS_BYPASS NC NC NC NC
Q30 5
R325
75R BT3904
SCT2_AV_OUT E 6V3 11

F29 F31 1 1
2 2
C R3 18 R317 NC
220R 15K R80 R82 C
NC NC
R519 GND
0R ADIN4_1 GND
GND
GND NC
R294
GND SCT2_FS_IN
33K ADIN4
1
GND NC
1

F25 R295
R83 10K
C281 NC NC
Z169 22P F27
T 2
2 R8 6 R302 R3 09 C283
NC 10R 100R 0.047U C531
P30 6 AV1_IN CVBS 1 R288 R758 R741
GND 10U 470R 1K 100R SCT1_AUL_OUT
AL0 DA_AUL
YELLOW
5 Z164 R308 C282 16V NC A_MUTE R291 C NC NC
75R 47P NC R293 1K C583 C451
T L8 7 B
120R 47K 2200P 2200P
4 AV1L_IN NC NC NC NC
Q28 E
B BT3904
WHITE C53 0 NC B
3 Z170 GND R759 R742
C286 10U 1K GND 100R GND S CT1_AUR_OUT
T Z8 5 Z84 R313 AR0 DA_AUR
L91 0.1U GND
T T NC 100R
2 120R AV1R_IN NC SPDIFOUT R289 R292 C NC NC
16V
2 NC R290 470R A_MUTE 1K B C584 C450
RED NC
BLACK 47K 2200P 2200P
1 R85 NC NC NC E NC NC
1 R314 Q29
C549 C552 2 1 C285 BT3904
100R NC
470P 470P 33P NC
GND NC GND GND
F26
P18 GND
GND GND
GND GND NC 47-RCA276-XX0G
GND

A A

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2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 55

SSB: MUX and DEMUX


8 7 6 5 4 3 2 1

B09 MUX and DEMUX

F F
C5 33
C540 100U R602
12_M 10U 16V 10R
R612 16V HPOUTL1
100R AUL_OUT0
R600 12_MA C
U27 A_MUTE R603 1K Q36 R335
R611 33K B
U26 1 3-LM833D-00B BT3904 4K7
33K
RC4558 C5 32
R340 1 8 C457 E
1 8 C460 R617 10U 1OUT VCC C5 39 R597
C5 35 R609 1OUT VCC+ C536 16V 15K 0.1U 100U
R608 10U 10U AL2 100R AL21 2 7 10R HPOUTR1
100R 10K 0.1U C463 1IN- 2OUT GND 16V GND
AL 3 C465 2 7 16V AUR_OUT0
1IN- 2OUT GND 100P C462 100P C
100P C464 100P 3 6 A_MUTE
16V 3 6 0.022U 1IN+ 2IN- B
GND
1IN+ 2IN- C456 Q33
C296 C459 C294 1000P 4 5 BT3904
GND 2IN+ R599 R336
0.022U 1000P 4 5 R334 1K
E
R338 VCC- 2IN+ R616 4K7
R606 13 K LM35 8 33K
13K C534 GND GND
GND 33K R339
C5 37 R598 10U
R607
10U
R610 R6 30 AR2 100R AR21GND 15K
GND
AR3 100R GND 10K 33K
R627
16V C96 33K
16V C458 R629 C293
1000P C95 C467 33K C455 C468 22U
C295 0.022U
22U 0.1U D R333 1000P 0.1U 16V
0.022U R337 16V N
13 K G 13 K
R628
E 33K E
GND GND GND GND GND
GND

GND
12/24V_AUDIO 12_M

R3 47 12_M R396
D19 33K R387 C581
LL4148 100R 4U7 1K MICOUT_L
D
N
+12V 5V-IF R728 R729 G U37
C492 C563 RC4558
0R 0R 220U 120P
NC R3 03 R384 1 8 C562
12_M R749 16V C576 R3 46 1OUT VCC+ C5 80 R404
47K 5K1 0.1U MICOUT_R
10R AV1L_IN 4U7 1K 2 7 4U7 1K
1IN- 2OUT GND
D25 R594 C572 120P
LL4148 D21 3 6
1K R140 1IN+ 2IN- R417 R418
BAV70 820R C564
1
1000P 4 5 22K 22K
C466 C92 VCC- 2IN+
C538 330U
0.1U C122 10U C461 R 345
100U 16V R715 R593 16V A_MUTE GND 5K1
16V 0.1U 1K E Q5 3 3
C577 R3 48 R386
100R BT3906 GND 33K
B AV1R_IN GND 4U7 1K
D GNDGND D
GND GND GND 2
GND C
OFF_MUTE
R306 C53 R 373
GND 100K
C59 R595 R95 C568 10U C330 33K
10U 100K 820R 1000P 0.1U
+3V3SB
R366
+3V3 R142 33K
100K D
GND GND GND N
GND GND G
GND R3 90
GND 10K R389
38
R10K
5 A_MUTE 100R PWDN
D20 +12V
+12V R349 LL414 8 R3 65 C +12V
R5 88 R58 6 R584 100R 10K Q43
22K 22K 22K GPIO_21 B
R589 R58 7 BT3904
R5 85
22K 22K 22K E
D100 R581
MCU_M LL4148
R4 32 10K
C121 C495 GND
1000P 10K
10U NC MUX_CTL2
R583 16V MUX_CTL3 R58 0
R590
22K 22K R43 5 10K C
10K NC C GPIO_20 B Q32
C GND GND +12V GPIO_8 B Q24 BT3904
BT 3904 C
R146 R624 E
+12V E NC
22K 22K
C494
C574 1000P GND
Y1_L GND
1000P
VGA_L 16 1 R141 C123 NC
AV2_L VDD Y0B 0.1U
22K
Y2_L 15 2 GND
Y2A Y2B GND
14 3 MUX1-R
Y1A ZB
MUX1-L 12_M R244
13 4 12_MA
ZA Y3 B +12V 0R GND
Q100
12 5 R620 U16
Y1_R Y0A Y1B NC BT3904 22K +12V HEF4052B
11 6
VGA_R Y3 A E C E
R604 16 1
10 7 C76 VDD Y0B
AV2_R A0 VEE 10R B
10U C502 15 2 AUD_ROUT
9 8 MUX1-L Y2A Y2B
Y2_R A1 VSS C453 R246 0.1U
1K8 AV1_L 14 3
0.1U Y1A ZB +12V
R631 MICOUT_L AUD_LOUT
MUX_CTLC0 C216 13 4 C67
100R U15 ZA Y3 B R341
HEF4052B 10U 10U
GND GND 12 5 AUD_LOUT
1K2 AUD_L
MUX_CTLC1 C MUX1-R Y0A Y1B
B MCU_M Q101 C454 B
B AV1_R 11 6 0.1U R 332
BT3 904 MICOUT_R Y3 A E C75 1K2
R632 AUD_ROUT AUD_R
100R R127 E 10 7 10U
A0 VEE
4K7 C60
9 8 10U
R633 A1 V SS
GND GND 100R
MUX_CTL2
+12V +12V GND
R426 R748
MUX_CTL3 100R 0R

R6 35 NC
R5 82
10K
10K GND
MUX_CTLC0
MUX_CTLC1
R6 38
R6 37 C 10K C
GPIO_7 Q39
GPIO_1 10K Q38 B
B
BT3 904 BT3 904
E
E
C471
C493 1000P GND
1000P GND
A A
GND
GND

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090312

2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 56

SSB: Audio Amplifier


8 7 6 5 4 3 2 1

B10 Audio Amplifier


LVD SVDD

C500 33P LVDS CONNECTOR


R643 R642
C501 33P 100R 100R AOBCK R757
F 100R F
AOLRCK
G
N C499 33P NC C571
D AOMCLK 1000P
C498 33P AOSDATA0 C3 23 1 2
R644
0.1U T87
Z1
GND GND R641 R 362 GND 3 4
100R 100R 3R3
G
D
U17 N GND N
AMP_3V3 5 6
STA 333BW G
D
R 378 Z118
R3 67 STA 335 0R NC T
AMP_SA GND 7 8 LVDSVDD
C496 100K AMP_3V 3 E4N_1
C301 C302 36 1 E4P_1
33P VDD_DIG2 GND_SUB
C497 D27 0.1U 9 10 R3 70
LL414 8 1000P 2 E3 P_1
R372 33P 35 R3 79 E3N_1 3K3
GND_DIG SA 11 12
100R 0R
OSCL0 AMP_S CL 34 3 D ECKP_1 ECKN_1
GND SCL TESTMODE N 13 14 C573
G
OSDA0 R371 AMP_S DA 33 4 C3 00 AMP_12/24V E2P_1 E2N_1 0.1U
SDA VSS 15 16
100R C473 Z109 Z116 0.1U GND
4U7 32 5 E1P_1 E1N_1 Z132
INT T T INT_LINE VCC_REG 17 18 Z1 31
16V Z13 0 T R3 77 1K2
31 6 OUT2B E0P_1 E0N_1 T
R250 R723 RE SET OUT2B R696 T +3V3
19 20
100R 100R 30 7 GPIO_9 1K ROT/DCR SEL_LVD S
R3 68 SDI GND2 C85 C522 R647 GND
33R 1U C523 21 22 10K
C505 C
R3 63 29 8 220U NC ODSEL BIT_ SEL
LRCKL VCC2 220U
1000P B 33R 35V 23 24 T
35V Z1 35 Z1 33
Q42 R3 64 28 9 OUT2A C504 T VBR_EXT VBR_OUT R652
E E
BICKL OUT2A 25 26 E
BT3 904 33R C324 0.1U 100R D
GND GND R369 27 10 OUT1B O4P_1 O4N_1 N
NC XT1 OUT1B 0.1U
GND C3 08 33R 27 28 G
4700P 26 11 C84 O3P_1 O3N_1
PLLGND VCC1 29 30
L105 680P C3 26 1U AMP_12/24V
120R 0.1U 25 12 D GND OCKP_1 OCKN_1
C3 05 PLL_FILTER GND1 N 31 32
GND
C79 G R164
D101 24 13 OUT1A 12/24V_AUDIO NC O2P_1 O2N_1
10U PLL_VDD OUT1A 0.22R Z117
LL414 8 R3 53 33 34
2K2 PWDN 23 14 C 322 C325 T O1P_1 O1N_1
POWERDN GND_REG 0.1U L13 9 35 36
0.1U 200R
L104 22 15 O0P_1 O0N_1
VSS_DIG VDD R360
120R L140 37 38
AMP_3V 3 16 AMP_CF 0R NC G
D
R352 21 AMP_3V3 200R N
VDD_DIG CONFIG
N
D 39 40 G
10K C309 R3 61 C569
0.1U 20 17 C570
3R3 OUT4B OUT3 B 1U T
L103 R3 51 NC 0.1U P17 T
19 18 0R Z93
120R OUT4A OUT3 A Z128
+3V3
C78
10U GND
GND GND

R12 L13 L3
0R NC 33R 33R
D E4P_1 E4P O4N_1 O4P D
R21 3 2 3 2
0R NC E4P_1 C169 10P O4P_1 C491 10P E4N_1 E4N O4P_1 O4N
5V_M 4 1 4 1
U2 8 E3 P_1 C246 10P O3P_1 C490 10P E 3P_1 E3P O3 P_1 O3P
R20 A0480 3 LVDSVDD 3 2 3 2
0R ECKP_1 C327 OCKP_1 C4 89 E3N_1 E3 N O3N_1 O 3N
12_M 1 8 10P 10P
S2 D2A 4 1
L12 4 1 L2
2 7 E2P_1 C280 10P O2P_1 C4 88 10P 33R L11 33R L5
+3V3 G2 D2B 33R 33R
3 6 E1P_1 C475 10P O1P_1 C4 87 10P ECKP_1 ECKP OCKP_1 OCKP
R380
S1 D1A
22K 3 2 3 2
4G1 5 E0P_1 C407 10P O0P_1 C4 86 10P ECKN_1 ECKN OCKN_1 OCKN
D1B 4 1 4 1
R381 R3 74
R382 4K7 E4N_1 C336 10P O4N_1 C4 85 10P E2P O2P_1 O2P
470K E2P_1
10K 3 2 3 2
E3N_1 C328 10P O3N_1 C4 84 10P E2N_1 O2N_1 O2N
R73 2 E2N
C C86 4 1
ADIN5 1K
Q45 0.22U ECKN_1 C479 OCKN_1 C4 83 L10 4 1 L4
B 10P 10P 33R L9 33R L7
BT 3904 D26 33R 33R
LL414 8 E2N_1 C478 10P O2N_1 C4 82 10P O1P_1 O1P
E E1P_1 E1P
R3 91 3 2 3 2
E1N_1 C477 10P O1N_1 C4 81 10P
4K7 E1N_1 E1N O1N_1 O1N
4 1 4 1
E0N_1 C476 10P O0N_1 C4 80 10P O0P_1
E0P_1 E0P O0P
3 2 3 2
C E0N_1 E0N O0N_1 O0N C
GND 4 1 L6 4 1
GND GND L8
33R 33R

Z115
T Z112
T Z113
P25 T Z114
T
NC/OUT_L- L17
1 L18 OUTR+/SUBW+ 22UH
OUT2A
OUTL+/OUT_L+ 22UH OUT1A
2 CLICKNC
OUTL-/OUT_R+
C 303 C3 19
3 C3 13
0.1U 0.1U
NC/OUT_R- 330P CLICKNC R16
4 C314 C83
AMP_12/24V 1000P 0.47U C320 6R8
P23
R1 3
22R CLICK&32"P S NC Z110
1000P
CLICKNC
C3 18
0.1U
CLICKNC Audio VMID control
R18 T C306 C3 16 R653
330P
C315 R355 C3 10 6R8 R354 3 1000P CLICKNC CLICKNC 200R AUD_VMID
R359 R356 1000P CLICKNC C 82
C518 3K 3 3 K3
0R 0.1U 0R 0.47U
C521 NC R6 39 NC
220U 2 CLICKNC
C
220U C3 04 C317 OFF_MUTE 10K
B 35V GND 0.1U GND B C77 C503
35V GND 0.1U GND R14 GND 1 R15 Q40 10U B
T CLICKNC R17 NC 0.1U
R19 22R C321 22R E BT3904
C307 C81 Z111 6R 8 CLICKNC NC
0.47U 6R 8 1000P CLICKNC
C520 1000P CLICKNC
C519
220U 220U GND GND GND
R357
35V 3K3 C3 12 C299
35V
C3 11
330P 0.1U L20
0.1U
L19 R712 CLICKNC 22UH OUT2B
R358 22UH OUT1B 0R OUT2A
OUTR-/S UBW-
GND 3K 3 CLICKNC
NC

FOR 2.1 CONFIG:


R13 --- 22R ,R354 --- 0R , C312 --- 330P;
C81 --- 0.47U ,R355 --- 0R;
C518/C519/C520/C521 --- 330U/16;
R356/R357/R358/R359 --- 3K3;
C317/C318/C319/C299/R16/R17 --- NC
A A

8 7 6 5 4 3 2 1

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090312

2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 57

SSB: MCU Stand-by


8 7 6 5 4 3 2 1

B11 MCU Stand-by

+3V3SB +3V 3SB


F F
R443 R285
ADIN2 47K 47K 12_M Z225 Z226 Z227 P21
KEY 12/24V_AUDIO
T T T
Q49 Q47 +3 V3SB
BT3904 C R3 98 BT3904 C R3 92
1K NC 1K OIRI_IS 1
B
OIRI_IS B C561 MODE
R446 +3V3SB R183 R2 84
R444 R724 NC 1000P 1K 2
E 100R E 33K TXD_PBS
OIRI 1K 100R IR_MCU R711 GND NC
100R 3
NC GND RXD_PBS
+3V3SB 4
C513 R43 0 +3 V3SB
R419 100R CWSS
R445 C558 R 393 C559 U29 0.1U 5
1000P 4K7 1000P 10K F
4K7 AT24C02 F C511 D3 MCU_RESET
NC O
NC NC / 1 1 0.1U 8V2 6
N C # C Z221
1 8 Z218 O E T # E T
A0 VCC T C515 R C E C C
E Q54 7
0.1U E S N BT3906
2 7 R424 E Y
GND A1 WP W R S
B T T T
GND R403 O 100R O H GND
P A GND C PWR_DETECT Z222
3 6 PBS_S CL 10K R400
A2 S CL NC G Z223
GND V 10K Z224
4 5 PBS_S DA R425 R399
GND S DA 100R
R421 22K
C338
22P 4K7
GND
T NC T GND
E U R4 31 E
5VSB O +3V3SB
C339 _ IN
Z217
C _ 100R GND
R450 22P H C R695
NC E _ E 10K
0R C C C
P
GND U8
Z203 4 3 2 1 0 9 8 7
+3 V3SB U32 R433 R8 C11 2 2 2 2 2 1 1 1
T RT9166- 33 10K
Z202 R751 0 C 0 1 F 2 N
NC N C 1 S
S 1 E 1 I
C332 T P P P C R694
L122 +3 V3SB MCU_M 0R /A V
I M
V
A M
R
M /T
0.1U 7
0 /V # 10K
120R 2 3 P /C /C C /C 3 +3 V3SB
OUT IN 5V SB # T C 1 T
0 U V R N
GND
T
R O A T /I
Z N 3 R415 R401
C98 N /T C
/ 3
C99 1 25 C/ 1 2 P R422 10K 10K
C344 C331 47U R420 P06/AN1 0 3 T 5V_M
47U 3 P N 10K
1U 0.1U 6V 3 5K1 26 P I/
6V 3
NC NC P05/AN2 2 PC_V VGAV SYNC#
3 R716
P P45/INT0#
16
SHORT_PROTECT R405 27 100R R416
P04/AN3 PWR_DETECT
1K 15 R411 10K
P10/KI0#/AN8/CMPO0
MODE R402 28 4K7
GND MODE R704
100R P11/KI1#/AN9/CMPO1
14 R705
R449 R448 KEY R406 29 C508 100R
10K P03/AN4 PB S_SDA 0.1U 5K6 NC
10K 100R 13 R407
ADIN4 30
P12/KI2#/AN10/CMPO2 NC
R412 P02/AN5 100R GND
100R 12 R408 PB S_SCL E Q58
ADIN3 31
P13/KI3#/AN11 BT3906
D R414 P01/AN6 100R D
100R 11 R409 U1RX B NC
TXD_PB S R413 32
P14/TXD0
C
100R
P
P00/AN7/TXD11 3
P 1
10 R410 U1TX P34
100R 7
/R
7
/I P15/RXD0
RXD_PBS
N
100R Z220 4
T
X
LED_RED
T
D
1 O
X 1
# P16/CLK0
9 R706
10K
0 X /
R718 3
C R U I C
R717
/R N
NC
E T N
S
Z199 Z197
W
0R
/P V /P V
S S
X T
D
S
E 4 S
4 C R 100R NC Q59 2
1 T 7 6 C 0
Z200 Z198
T T T T 3 8 BT 3904
P32 R707
1 2 4 5 6 7
R447 NC C 1
GPIO_4 10K
+3V3SB L112 100R IR_MCU B
120R 1 CWSS NC T NC
E
PBS _SDA L113 Z219
2 Z214 Z215
120R T T +3V3SB C554
PBS_ SCL L114 R440
3 L111 T +3V3SB 1000P
120R C510 120R E 1M NC GND
TXD_PBS S
10P 4 E
C512 2 R
L110 _
0.1U
C516 120R RXD_PBS U GND
5
R427 C
C509 3 10P M
F3 5 5K1 X5
10P 1 1
P8 1 R93 16M
47-MIC012-XX0 C514 C517
C 10P
C340 0.1U C
GND C341
Z216 10P 10P
T
2 2
IRPA SSTHROUGH
GND
F3 6 R92
Z229
GND GND Z23 0 P3
T T
3
5V SB
+3V 3SB 1 2
C506 F37
GND GND 10P
R429 1
10K Z206
NC Z205 +3V3SB U36 R90
Z204 Z207 MAX809 NC
R428 L117 NC
10K T T T T L108 2
NC 120R OIRI_IN 120R
R423 C3 42 C3 43 3 2
6K8 P15 VCC RESET TO_STB
100P 100P GND

R43 4 1 D1 R438 1 IRLINK


Z23 1 T P29
OIRI_IN 10K L118 120R LL414 8 4K7
2 2
B Z209 T R394
L121 GND OIRI_IS B
3 0R 4
120R MCU_RESET
LED_RED R251 R88
GND
100R 4 NC 5
GPIO_11 L116 120R LED Z210 T C474 NC
5 4U7 2 3
Z211
2
KEY L115 120R T 16V C72 F32
T
6 0.1U 1
ADIN1 R28 1 Z234
100R 7 R89
1 F34 C58 2 NC
R283 F100 F33
100R 1000P 1
1 1
C542 R91
1000P GND

2 GND
C334 2 R125
C557 C335 100P
GND 100P
1000P C560
1000P GND
C333 GND
100P

A A

8 7 6 5 4 3 2 1

18520_510_090312.eps
090312

2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 58

Layout Small Signal Board (Top)

PART 1
18530_552a_090319.eps

PART 2
18530_552b_090319.eps

18520_556_090319.eps
40-T8222P-MAD2XG 090324

2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 59

Layout Small Signal Board (Top, Part1)

PART 1

18520_556a_090313.eps
090324

2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 60

Layout Small Signal Board (Top, Part 2)

PART 2

18520_556b_090313.eps
090324

2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 61

Layout Small Signal Board (Bottom)

PART 1
18520_557a_090313.eps

PART 2
18520_557b_090313.eps

18520_557_090313.eps
40-T8222P-MAD2XG 090324

2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 62

Layout Small Signal Board (Bottom, Part1)

PART 1

18520_557a_090313
090324

2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 63

Layout Small Signal Board (Bottom, Part 2)

PART 2

18520_557b_090313.eps
090324

2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 64

Side Control Panel


8 7 6 5 4 3 2 1

E Side Control Panel

F F

E E

R602
22K K1
P601
vol+ 12 11
7 R601
3K3 vol-
6 KEY 10 9
R603
5 5K6 menu 8 7

R605 ch+
4 6 5
9K1
ch- 4 3
3 R604
1.2K POWER
D 2 2 1 D
C1
1 0.1U
R606
0R

P602
C C
+3.3V 6

IR_IN 5

GND 4
LED_RED 3

GPIO_11 2

ADIN1 1

B B

A A

8 7 6 5 4 3 2 1

18520_520_090312.eps
090324

2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 65

Layout Side Control Panel

15820_559_090313.eps
40-T8222P-KED2XG 090324

2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 66

IR Panel
8 7 6 5 4 3 2 1

J IR Panel

F F
IR
VCC G1
GND
R7 R10
100R 4K7

R8
100R

P1
R5
6 +3.3V 22K
E E
5IR_IN

4 GND C1 R3
10U R9
4K7 1K8
3LED_RED
GPIO_11
2

1 ADIN1

D2
D1
D D

R1 C R4
C
4K7 Q1 Q2 1K
B BC847BW B

BC847BW
E E

+3.3V +3.3V

C C
R20
R15
4K7
NC 100K
NC

+3.3V
R2 C
4K7 G2
B
Q3 C
BC847BW 2
E R19
0R E
NC
R11
B
10K C B
NC Q4
BC847BW B
R16
E 10K
R13 NC
ADIN1 1K
R17
100K

R14
2
U U U 1 10K R18
0 0 0 R K
2 1 3 1 4 1 3 100K
3
C C C

A A

8 7 6 5 4 3 2 1

18530_530_090325.eps
090505

2009-Jun-19
Circuit Diagrams and PWB Layouts TCM3.2L LA 10. EN 67

Layout IR Panel
Personal Notes:

40-T8222P-IRF2XG 18530_531_090505.eps
090505

10000_012_090121.eps
090121

2009-Jun-19

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