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 Master’s Thesis

A Design of Highly Efficient Triple-

Mode Wireless Power Transmitter and
Receiver IC for Mobile Application

Chang Seok Lee

Department of Electrical and Computer Engineering

The Graduate School
Sungkyunkwan University
 A Design of Highly Efficient Triple-
Mode Wireless Power Transmitter and
Receiver IC for Mobile Application

Chang Seok Lee

Department of Electrical and Computer Engineering

The Graduate School
Sungkyunkwan University
 A Design of Highly Efficient Triple-
Mode Wireless Power Transmitter and
Receiver IC for Mobile Application

Chang Seok Lee

A Master's Thesis Submitted to the Department of Electrical

and Computer Engineering and the Graduate School of
Sungkyunkwan University

in partial fulfillment of the requirements

for the degree of Master of Science in Engineering

April 2017

Approved by
Professor Kang Yoon Lee
This certifies that the master's thesis
of Chang Seok Lee is approved.

Committee Chair

Committee Member

Major Advisor

The Graduate School

Sungkyunkwan University
June 2017
 Contents
List of Tables ························· ii

List of Figures ························· ii

Abstract ························· v

I. Introduction ························· 1

II. Wireless power transfer ············ 3

1. Principle of the wireless power transfer ············ 3

2. Previous work ············ 6

III. System design ············ 9

1. Conventional structure ············ 9

2. The Proposed structure ············ 11

IV. Basic block operation ············ 15

1. Rectifier ············ 15

2. Inverter ············ 16

3. Buck converter ············ 17

4. Boost converter ············ 21

V. The proposed block design ············ 23

1. Rectifier ············ 23

2. Inverter ············ 33

3. Buck converter ············ 36

4. Boost converter ············ 44

VI. Simulation result ············ 47

1. Rectifier and inverter ············ 47

i
 2. Buck and Boost converter ············ 50

VII. Conclusion ············ 56

Reference ············ 59

List of Tables
Table 1. Wireless power transfer product summary ··········· 7

Table 2. Special functions of the product ··········· 7

Table 3. Performance summary of this work ··········· 57

Table 4. Performance comparison of Rx ··········· 58

Table 5. Performance comparison of Tx ··········· 58

List of Figures
Fig.1. Inductive coupling principle ···· 4

Fig.2. Magnetic resonance method ···· 5

Fig.3. Block diagram of the wireless receiver diagram ···· 9

Fig.4. Block diagram of the wireless transmitter diagram. ···· 10

Fig.5. Triple-mode (WPC, PMA and A4WP) compatible

···· 12
wireless power transmitter and receiver diagram.

Fig.6. Efficiency along to the geometry and the distance. ···· 14

ii
Fig.7. Basic rectifier schematic. ···· 15

Fig.8. Operation of the rectifier ···· 16

Fig.9. Basic inverter circuit diagram. ···· 17

Fig.10. Buck converter circuit diagram. ···· 18

Fig.11. Operation of the buck converter. ···· 19

Fig.12. (a) Continuous conduction mode

···· 19
(b) Discontinuous conduction mode.

Fig.13. Boost converter circuit diagram. ···· 21

Fig.14. Mosfet switch turn on/off waveform ···· 24

Fig.15. Body-diode loss diagram. ···· 25

Fig.16. Structure of the rectifier. ···· 27

Fig.17. conventional current sensing schematic ···· 28

Fig.18. proposed current sensing schematic ···· 29

Fig.19. WPC, PMA mode Rectifier timing diagram. ···· 30

Fig.20. the A4WP mode Rectifier timing diagram. ···· 31

Fig.21. Efficiency comparison along to load current and the

···· 32
rectifier mode.

Fig.22. Full-bridge synchronous inverter. ···· 33

Fig.23. Operation of the full-bridge synchronous inverter. ···· 34

Fig.24. Gate driver control block. ···· 35

Fig.25. Synchronous switch buck converter. ···· 36

Fig.26. Current mode control operation. ···· 40

iii
Fig.27. PFM modulation diagram. ···· 41

Fig.28. Discrete charging solution and direct charging solution. ···· 42

Fig.29. Battery charging profile. ···· 43

Fig.30. Current sensing block. ···· 45

Fig.31. Rectifier and inverter schematic ···· 47

Fig.32. Operation of rectifier in WPC, PMA mode with the light

···· 48
load.

Fig.33. Operation of rectifier in WPC, PMA mode with the heavy

···· 49
load

Fig.34. Operation of rectifier in A4WP mode with the heavy load ···· 49

Fig.35. Buck/boost converter schematic. ···· 50

Fig.36. Efficiency of the buck/boost with input voltage and the load
···· 52
current

Fig.37. Operation of the buck converter ···· 53

Fig.38. Boost converter operation ···· 54

iv
Abstract

A Design of Highly Efficient Triple-Mode Wireless

Power Transmitter and Receiver IC for Mobile

Application

A wireless power transfer can charge several receivers simultaneously. It

also provides power without space limitation. Despite of low efficiency, it
substitutes a cable charge due to the advantages described above. To design

the wireless power transfer for mobile application, the following

characteristics should be considered.

First, to specify which standards the IC should support. The wireless

power transfer standards in a mobile application are the WPC, the PMA, and
the A4WP. The WPC and the PMA standards adopt the inductive coupling
method. The A4WP standard is the magnetic resonance method. The inductive

coupling method is highly efficient and already commercialized, but its

charging distance is limited and it has FOD problem. The magnetic resonance
method can extend a charging distance at the expense of its efficiency.

Considering all advantages and disadvantages, there is no dominant winner in

the market yet.

Second, the IC need to be able to not only receive the power but also

transmit the power for mobile application. Recently, by increasing small

v
wearable device, the meaning of the wireless power transfer in the mobile

application expanded to the charger of the small wearable device.

Third, the efficiency of the IC should be increased up to maximum. The

wireless power transfer system has inherently low efficiency. The wireless

power transfer system consists of transmitter, receiver and the coil. Each
block’s efficiency is similar to total efficiency of the cable charger. It is hard

to achieve 70% efficiency between both coils. As a result, it is most important

to design every building block with its maximal efficiency.
In this paper, the triple-mode wireless power transmitter and receiver in
one chip IC in 0.18 um BCD process is presented. It supports WPC and Airfuel
(PMA and A4WP) standards in a receiver mode and WPC standard in a
transmitter mode. The implemented system has the overall efficiency of 82%.
For the high efficiency, the rectifier adopts the synchronous structure and the

zero current prevention block. And the design of switch is optimized to

compromise switching loss and conduction loss. A buck converter also adopts

the synchronous structure and PFM control for the high efficiency. To
implement both the transmitter and the receiver into a single chip, the

proposed synchronous rectifier alternatively acts as an inverter and the buck

converter also operates as a boost converter bi-directionally. The die area of
the whole fabricated system is 3.5 x 4.4 mm2.

Keywords: Wireless power transfer, WPC, PMA, A4WP, T-Rx, High efficiency

vi
 Ⅰ. Introduction

The wireless power transfer is a term that refers to a number of different

technologies for transmitting energy by means of electromagnetic fields. For

the first time, Nikola Tesla succeeded in transmitting power by inductive and

capacitive coupling using resonant transformer in the 19th century. [1] But

the wireless power transfer has not spread widely owing to limitation in
charging distance and low efficiency. In 2007, Marin Soljacic at MIT

transmitted 60W power over 2 meters distance by resonant coupling [1].

After this recent success, the wireless power transfer gets the spotlight again.
Up to recently the mobile device with the wireless power transfer means
that it has the receiver to charge the battery. After the wearable device

excessively increases, it requires not only more extra charger but also
necessity of the convenient access to the charger. So the mobile device is

going to evolve to receive wireless power and also to transmit power to the
wearable device.
Because of the advantages above, various topologies have been used to

overcome the low efficiency. Since the total efficiency is calculated by

multiplying that of the receiver, the transmitter, and the coils, it is most

important to design every block has its maximal efficiency.

In this paper, the IC supports all three representative standards, the WPC,
the PMA, and the A4WP in receiver mode and the WPC in the transmitter to

support as many standards as possible. The Bi-directional DC/DC converter

and a Multi-mode Rectifier make the wireless power receiver and transmitter

1
together in one chip to minimize the size of IC. The IC focuses on the

efficiency of power transfer. In receiver mode, the synchronous full-bridge

rectifier, zero current prevention and synchronous buck converter with

PWM/PFM mode improve total efficiency. In transmitter mode, the full-bridge

inverter and the synchronous boost converter increase the efficiency.

2
 II. Wireless power transfer

1. Principle of the wireless power transfer.

The wireless power transfer in the mobile application is generally classified

in two ways - inductive coupling method and magnetic resonance method. The

inductive coupling method is supported by the WPC and the Airfuel (PMA)
standard. It is the oldest and most widely used wireless power technology. Its
advantage is high efficiency and its disadvantage is limitation in charging
distance. There were already the commercialized products like the electric
toothbrush in the end of the 20th century. The other is the magnetic
resonance method represented by the Airfuel (A4WP). It has longer charging

distance but its efficiency is lower than the former method. Resonant method
transfers power via magnetic fields between two resonant circuits (tuned

circuits), one in the transmitter and one in the receiver. [2] Each resonant
circuit consists of a coil of wire connected to a capacitor, or a self-resonant
coil or other resonator with internal capacitance. The two are tuned to

resonate at the same resonant frequency.

In inductive coupling method, power is transferred between coils of wire by

a magnetic field. [2] Fig. 1 shows the inductive coupling principle. The

transmitter and receiver coils together form a transformer [3]. An alternating

current through the transmitter coil makes a magnetic field oscillate according

to Ampere's law. A magnetic field passes through a receiving coil, where it

3
induces an alternating electromotive force (EMF) according to Faraday's law

of induction. Finally, an AC current is generated in the receiver. [2]

Fig. 1 Inductive coupling principle

M= √ × × ( ) (1)

m= (2)
( )

A mutual inductance and an impedance of a coil decide the total transfer

power. Geometries of both transmitter and receiver coils and distance

between them determine the mutual inductance and the impedance. Eq. 1
shows the relationship of the distance and the mutual inductance. A and B are

the radii of the coils and h is the distance between the coils. The mutual

inductance decreases rapidly inversely proportional over the distance of the

4
coil diameter. So it is impossible to charge the receiver in the inductive

coupling when the gap between the coils is larger than several centimeters.
The small mutual inductance means a small available transfer power. To

maximize the efficiency in the inductive power transmission, following rules

should be kept. First, minimize the distance between coils and maximize
mutual inductance by matching axes of the coils. Second, optimize switching

frequency according to the coil size. In other words, by sweeping switching

frequency the transmitter can get the maximal Q factor between transmitter
and receiver. Maximum mutual inductance enables maximum absolute power
transfer and the maximal Q factor improves efficiency up to 70%.

Fig. 2 magnetic resonance method

5
 The concept behind resonant coupling is that high Q factor resonators

exchange energy at a much higher rate than their energy loss due to internal
damping.[4] The resonant coupling method can transfer the same amount of

power at greater distances with much weaker magnetic fields. Resonant

inductive coupling can achieve high efficiency at ranges of 4 to 10 times than

the coil diameter. This is called "mid-range" transfer, [5] in contrast to the

"short range" of non-resonant inductive transfer, which can achieve similar

efficiencies only when the coils are adjacent.

2. Previous works

Table.1 shows wireless power transfer product summary of

representative companies. Overseas trends are focused on the WPC standard.

Output power varies from 2.5W to 15W. With less than 2.5W output, the
receiver (Rx) and transmitter (Tx) are applicable to wearable devices and low

power sensing. Over 2.5W and under 5W output, they are for smart device.
And over 5W, they are used for mid power range device such as laptop and

smart device for fast charging. MAPS leads domestic trend in the A4WP

application. For an optimal cost, the companies divide product group along to
the standard and the output power. Only IDT and MAPS have triple-mode

applicable IC. Until now there is no transmitter and receiver one chip IC.

6
 Table.1 Wireless power transfer product summary

Company Mode Support standard Output power

WPC 2.5W, 5W, 10W
Rx
TI WPC, PMA 10W
Tx WPC 2.5W, 5W, 10W

WPC 57W
Rx
Rohm WPC, PMA 10W
WPC 5W
Tx
Overseas trends 15W
Rx WPC 5W, 10W, 15W
Toshiba
Tx WPC 10W, 15W
3W, 5W, 7.5W, 8W,
WPC
15W
Rx WPC, PMA 5W
IDT
WPC, PMA,
5W
A4WP
Tx WPC 3W, 7.5W, 8W, 15W

A4WP 0.36W 5W
Rx
Domestic trends MAPS WPC, PMA,
2.5W, 10W, 20W
A4WP
Tx A4WP

Table.2. Special functions of the product

Company Mode Special Function

Dynamic voltage scaling, DCS control for
Rx smooth transition, Rectifier + LDO
TI structure
Overseas trends
Tx Free position
Rohm Rx Automatic PFM/PWM, Fast transient

7
 response with on time control overshoot
reduction, synchronous rectifier

Tx

Digital control suppress heat generation

Rx
Toshiba and load regulation

Tx

Full-bridge synchronous rectifier,

Rx
IDT Rectifier + buck converter structure

Tx

NFC protection, Current control mode,

Rx
Domestic trends MAPS Green driver for high efficiency

Tx

Table.2 shows special functions of the wireless power transfer product.

These functions are classified by three characteristics. First, the combination
of rectifier and LDO, the combination of rectifier and buck converter,

automatic PFM/PWM mode control, synchronous full-bridge rectifier

structure and Green driver, these functions are for the high efficiency. Second,
DCS control, on time control for fast transient response, digital control for load

regulation and current control mode, these functions are used for better

regulation. Third, dynamic voltage scaling and NFC protection reduce the
communication error.

8
 III. System design

1. Conventional Structure

Fig.3. Block diagram of the wireless receiver diagram.

Fig.3 shows a block diagram of the conventional wireless receiver diagram.

[6] When the power transmitter unit sends AC power, the rectifier converts it
to DC power. After the rectifier output reaches at a target level, a low-

dropout regulator starts to supply the IC. And then the IC communicates with
transmitter by modulation block in the WPC and the PMA standards, whereas
the A4WP requires an external Bluetooth IC for the same communication

purpose. To supply power to the Bluetooth IC, the 3.3V and 1.8V low-dropout

regulators are required in general. The DC-DC converter adjusts the

rectifier’s output to an accuracy voltage or a specific current according to a

9
charging profile. Usually, the low-dropout regulator acts as DC-DC converter

in the WPC and PMA standards. But, in the A4WP standard, the low-dropout
regulator could result in heavy loss. When a transmitter simultaneously

charges multiple devices with different power requirement in the A4WP

standard, it concentrates on the device with the lowest power level. It

simultaneously sends all receivers higher power than what they require

except the receiver with the lowest power level. This operation increases the
other rectifier output voltage. When the low-dropout regulator used as the
DCDC converter, the loss increases to be directly proportional to the
difference between the rectifier output and the DCDC converter output. So to
support A4WP standards, the DCDC converter has to adopt the buck converter.

Fig. 4 Block diagram of the wireless transmitter diagram.

10
 Fig. 4 shows a block diagram of the wireless transmitter diagram. All

operation is opposite to that of receiver block. The step up converter converts

a battery voltage higher to provide the inverter. After the converter output

reaches at a target level, a low-dropout regulator starts to supply the IC. And

then the inverter converts the dc power to ac power through the coil. The
transmitter receives the information about specifications which the receiver

has through the modulated signal from the receiver. It also communicates with
transmitter through an external Bluetooth IC in the A4WP standard. The
transmitter sweeps the switching frequency to match the impedance between
the transmitter and the receiver. Then the transmitter transfers the power
until receiving a charging completion signal. So far this part shows the
necessary block according to the receiver and the transmitter.

2. The proposed structure

The triple-mode (WPC, PMA and A4WP) compatible wireless power

transmitter and receiver one chip IC needs following structure and

specification. First of all, the receiver and transmitter must be implemented

one chip for a minimum size for the mobile application. The mobile device
interior space is going narrower. All circuit needs to be reduced to adapt the

space. Of course, reducing the size of the circuit also can decrease the cost of

whole circuit. For minimizing size of IC, a feasible common circuit must be
shared. The previous section shows the block diagram of transmitter and the

receiver. Each block is very similar but the function is opposite. To

11
implement the receiver and transmitter to one chip, rectifier alternatively acts

as the inverter and the voltage converter also operates bi-directional

buck/boost converter. Fig. 5 shows the triple-mode (WPC, PMA and A4WP)

compatible wireless power transmitter and receiver diagram.

Fig. 5 Triple-mode (WPC, PMA and A4WP) compatible wireless power

transmitter and receiver diagram.

Second, the design must focus on the high efficiency. The wireless power
transfer system has inherent low efficiency. The loss between the

transmitter’s coil and the receiver’s coil is worst and it is impossible to

12
improve by the circuit level. Fig. 6 shows power efficiency for an inductive

power transfer system depending upon a rate of coil diameter and distance.
The efficiency decreases drastically along to an increasing distance and a

decreasing coil diameter. [7] This result is even in the maximum power

transfer efficiency that supposes to be quality factor of 100. In real state, it is

hard to get 70% efficiency between the coils. Furthermore, the transmitter

and receiver consist of at least two blocks from the supply to coil or from the
coil to battery. It also reduces the total efficiency. For example, suppose that
the rectifier, the buck converter, the inverter, and the boost converter
efficiency each are 90% and the efficiency between the coils is 70%. And then
total efficiency from power supply to battery in wireless system barely is 46%
according to Eq.2. In this paper, the total efficiency target is over 60%.

η η ×η ×η ×η ×η (3)

13
Fig. 6 Efficiency along to the geometry and the distance.

14
 IV. Basic Block operation

1. Rectifier

Fig. 7 Basic rectifier schematic.

Fig. 7 shows a basic rectifier schematic. Four passive diodes D1~4 and a

passive capacitor Crect convert alternating voltage to unregulated DC voltage.

When input voltage is a positive signal and over an output voltage, current
flows to charge Crect through D1, D4. And when input is a negative signal and

over an output voltage, the current flows through D2, D3.

15
 Fig. 8 Operation of the rectifier.

Fig. 8 shows an operation of the rectifier. VAC is an input of the rectifier.

VRECT is an output voltage of the rectifier. And IRECT is a current flowing from

the rectifier to CRECT. VRECT increases keeping track the input ac signal until
input voltage is higher than Vrect. After VRECT is higher than the VAC, then the
diode is reverse-biased and the CRECT supplies current to the load. The VRECT

decreases until the Vrect equals to the VAC.

2. Inverter

Fig. 9 shows a basic inverter circuit diagram. Two mosfet switch M1, 2 and
a passive capacitor Crect make an alternating voltage. When the M1 is closed

16
and the M2 is opened, input directing voltage Vin appears in the output. And

then the M1 is opened and M2 is closed, the output connects the gnd. By this
operation repeating, an alternation voltage having a peak to peak voltage of

VDC is generated.

Fig.9. Basic inverter circuit diagram.

3. Buck converter

The buck converter makes an output voltage lower than an input voltage. In

the dc to dc converter, it relatively has high efficiency over 80% regardless of

input and output voltage level. But it inherently has high switching noise level
compared to a linear regulator. It generally consists of inductor L1, output
capacitor Cout, main switch M1 and freewheeling diode D1. Fig. 10 shows the

buck converter circuit diagram.

17
 Fig. 10 Buck converter circuit diagram.

( )
= (4)

=− (5)

× (6)

An operation of buck converter is divided into two parts. Fig. 11 shows an

operation of the buck converter. When the M1 is closed, current flows from
input to output through the L1 and increases with a slope according to the Eq.
4 and the M1 is opened, inductor current move from a ground to output

through free-wheeling diode, D1 and L1 with a slope of Eq. 5. Because the

current flows through inductor cannot abruptly change by Eq. 6. When Vin is
applied for the first time, there’s no charge in the output capacitor, Cout. So

the inductor current only increases according to Vin. Even in switch open

operation, it barely decreases. Over time, the Cout is charged by the inductor

18
current and the rate of increase and decrease is balanced by a duty of switch

D1.

Fig. 11 Operation of the buck converter.

Fig. 12 (a) Continuous conduction mode (b) Discontinuous conduction mode

In continuous conduction mode, the buck converter operates with the

inductor current that don’t falls below zero in normal switching cycle. Fig.

12(a) shows the relationship of switch control voltage and the inductor

19
current. Eq. 7 shows a relationship between D1, VIN and VOUT. In this equation,

a ratio of VIN and VOUT determines the duty of switch D1, not the value of L1
and a switching frequency.

= (7)

A discontinuous conduction mode is a state that the load current is small

enough to fall below zero. In more detail, the inductor current is discharged
fully and free-wheeling diode is reverse-biased. The relationship of VIN, VOUT
and D Eq. 7 is changed to Eq. 8 in the discontinuous mode. In discontinuous
mode, the ratio of VIN and VOUT becomes more complicated. The VOUT is a
function of not only VIN and switching duty D1, but also of the inductor value
L1, switching frequency and the output current.

×
= ×
(8)

×
= ×
(9)

20
4. Boost converter

Fig. 13 Boost converter circuit diagram.

The boost converter makes input voltage higher than the output voltage. It
generally consists of inductor L1, output capacitor Cout, main switch M1 and

freewheeling diode D1. It is the same structure with the buck converter and
has the opposite input and output. Even the locate of freewheeling diode is
different but all is same in the synchronous structure.

= (10)

= (11)

= (12)

= (13)

K= (14)

21
 An operation of boost converter divided into two parts. When the M1 is

closed, the inductor current flows from input to GND through the L1
increasing with a slope of Eq. 10. Second, the M1 is opened, the inductor

current moves from input to output through free-wheeling diode decreasing

with a slope Eq. 11. When VIN is applied for the first time, there’s no charge
in the output capacitor COUT. So the inductor current only increases according

to VIN. Even in switch open operation, it continues to increase. Over time, the
COUT is charged by the inductor current and the rate of increase and decrease
is balanced. Eq.12 is the relationship between the duty of switch D, input and
output voltage in the continuous conduction mode. The above equations show
that the output voltage is always higher than the input voltage. Theoretically
the output voltage increase to infinite value as D approaches 1. The ratio of
VIN and VOUT becomes more complicated Eq. 13 in discontinuous mode.

22
 V. The proposed block design

1. Rectifier

A forward bias loss of the passive diode is almost 12% loss in the heavy
load state. The forward bias drop voltage or the forward current must be

reduced to decrease loss. First method is to replace the passive diode to a

mosfet switch. Second method is to replace the diode to schottky diode. [6]
Both way reduce drastically the forward bias voltage. But the schottky diode
size is three times larger than mosfet switch with a same specification. [9]
And the passive diode must be replaced to the mosfet switch to make rectifier
alternatively acts as the inverter for the transmitter.

Before the mosfet switch size is determined, analysis of the switch loss is
needed. First, Fig. 14 shows the mosfet switch turn on and off waveform. A

conduction loss happens when the switch is on-state in the T5 region. It is

directly proportional to the switch current IOUT, mosfet on-state resistance
RON and the duty of switching cycle, D. Eq. 15 shows the conduction loss. The

large size of mosfet reduce the conduction loss by decreasing the Ron. But the
large size mosfet has more parasitic capacitances that make another loss

called a switching loss.

P =R ×I × (15)
( )
P =V × × × (16)

23
 ( )
I =( )
(14)

Fig.14. Mosfet switch turn on/off waveform

The switching loss comes from on/off switch transition state. When the

switch state is going from off-state to on-state, charges in the parasitic

mosfet capacitance (CDS) take time to discharge during T3 area. At that time
the Iout is already a maximum value and the mosfet VDS is not yet discharged.

The product of the IOUT and VDS value between T2 and T3 is called the

24
switching loss. Eq.16 shows the mosfet switching loss. It is directly

proportional to the input voltage VIN, IOUT, the switching frequency and a sum
of the switch loss period. The switch loss period increases along to the

parasitic capacitance. Smaller size of mosfet switch can reduce the switching

loss.

Fig. 15 Body-diode loss diagram.

25
 The switching frequency in the A4WP standard is high enough to consider

a body diode loss. The body diode loss takes place off transition in a dead-
time that both mosfets are off. Specifically when the low side mosfet body

diode conducts the inductor current during the rise edge dead time, minority

carriers are injected into and stored in the diode PN junction. As the high side
mosfet starts to turn on, a negative current must first flow through the diode

to remove the stored charge before the diode can block any negative voltage.
As depicted in Fig. 15, during this time, the high side drain-source voltage
remains as input voltage until the entire diode minority carriers are exhausted
at T1 when the diode reverse-recovery current reaches the negative
maximum IRR. Then, the diode begins to block negative voltage and the reverse
current continues to flow to charge the body diode depletion capacitance. The
total charge involved in this period is called reverse-recovery charge QRR.

The diode reverse-recovery loss at high side mosfet in the turn-on can be
calculated as follows [10].

P =Q × × (18)

The IC is compatible to the WPC, PMA and A4WP standards. An operating

frequency range is 110 ~ 470 kHz in the WPC, the PMA standards. The

conduction loss is a dominant source among the three losses. Optimal mosfet

switch size in this area is relatively large. So the switch ron resistance is
confirmed 30mohm through Eq. 15, 16 and 18 in this area. For A4WP standard,

the operating frequency is 6.78MHz. Switching loss is much bigger than

26
conduction loss. Minimizing parasitic capacitance is most effective way to

increase efficiency. Optimal mosfet switch size is relatively small. So the

switch ron resistance is determined 90mohm in this area. Fig. 16 shows the

structure of the rectifier. The mosfet switch is divided to Mx_A4WP and

Mx_WPC. Mx_A4WP operates solely to reduce the switching loss in the A4WP
standard. Both Mx_A4WP and MX_WPC operates to reduce the conduction

loss in the WPC, PMA standards.

Fig.16 Structure of the rectifier.

When the output voltage is bigger than the input, the diode turns off

automatically in the basic rectifier. There is no reverse current. But using

mosfet switch has no function to prevent reverse current. The mosfet switch

rectifier need to sense a switch current to prevent the reverse current.

27
 Fig. 17 conventional current sensing schematic

Fig. 17 shows the conventional current sensing schematic to prevent the

reverse current. By connecting a sensing resistor RON under low side mosfet
source, when the switch current flows, the low side mosfet source voltage
compares with a reference voltage to find out zero current voltage. The zero

current voltage is used to prevent the reverse current. This method is simple

and exact way to sense and prevent the reverse current. [11] But a whole
current flows thorough the RON makes the conduction loss.

28
 Fig.18 proposed current sensing schematic.

A proposed method is to mirror the switch current with small ratio to

reduce the conduction loss. Fig.18 shows the structure of the proposed zero

current detection circuit. When a current flows through M3 or M4, a current

mirrored 1/100 ratio flows through M3_Mirror. This current can be changed to

a voltage by ron of Msensep to detect reverse current. Reduction of sensing

current decreases the conduction loss. But this structure can produce the
reverse current in case that there is a mismatch between Rsensep and
Rsensen or in case that there is a mismatch between comp1, comp2. A

common centroid layout and selecting low mismatch characteristic resistor

reduce the mismatch. And the comp1, comp2 is combined one by sharing one

comparator. Fig. 19 shows WPC, PMA mode Rectifier timing diagram. Vac, Iac

29
is input coil voltage and current. Vzcs is the zero current sensing voltage and

VZCS is high when Iac > 0. As using Vzcs, VG3 (the rectifier gate driving signal)
prevents reverse current.

Fig. 19 WPC, PMA mode Rectifier timing diagram.

30
 Fig. 20 the A4WP mode Rectifier timing diagram.

Fig. 20 shows the A4WP mode Rectifier timing diagram. The operating
frequency is fixed 6.78MHz in the A4WP standard. If the rectifier core delay

time increases, the reverse current also grows. But It is impossible to

compensate delay by previous zero current sensing method. Because a control

core delay is several nanoseconds. Using DLL loop, a replica delay is made

31
according to previous driving signal. The replica delay compensates rectifier

gate driving signal to get rid of reverse current [12], [13]

100

95

90

85 half
full
80

75

70
54.03
59.8
76.34
92.08
97.09
101.7
120.4
125.6
147.6
152.6
156.8
162.9
177.4
184.4
188.2
193.7
203.3
212.3
289.2
384
476.8
586.6

Fig. 21 Efficiency comparison along to load current and the rectifier mode.

Fig. 21 shows full, half mode rectifier efficiency comparison along to the
load current. The full mode rectifier means using all switch to regulate voltage.
The half mode rectifier means only using low side switch to regulate the

output. And the rectifier turns off the high side switch mosfet and only uses

their parasitic body diode in the half mode. In the light load, the switching loss
becomes dominant loss and the conduction loss is small enough to ignore. The

efficiency of rectifier is better to take the diode drop loss than to take the

32
switching loss in the light load. This graph shows that the half mode rectifier

efficiency is better than full mode one under 200mA load current. In this paper,
the rectifier operation divided by three modes, passive, half and full mode to

increase efficiency in the light load.

2. Inverter

Fig. 22 Full-bridge synchronous inverter.

Fig. 22 shows a full-bridge synchronous inverter circuit diagram. Four

mosfet switch M1~4 and a passive capacitor CRECT make an alternating voltage.
The operation is almost same to the basic model. When the M1, 4 is closed

and the M2, 3 is opened, input directing voltage VIN appears in the output. And

then the M1, 4 is opened and M2, 3 is closed, the output connects minus VIN. It

33
makes the alternating voltage with twice larger peak to peak voltage than the

basic model.

Fig. 23 Operation of the full-bridge synchronous inverter.

The operating frequency range of full-bridge inverter is 110 ~ 205 kHz for
WPC standard. Conduction loss is a dominant loss. Using the same size switch

mosfet in the rectifier is enough to get high efficiency with the rectifier.

Turning off other function blocks which is used only for the rectifier reduces
the loss.

34
 Fig. 24 Gate driver control block.
.

Fig. 24 represents a gate driver control block. This block selects each kind
of gate driving signal corresponding to IC mode. First, we adopt the driving

signal made by ZCD signal or DLL output signal according to WPC, PMA and

A4WP mode. Second, this block decides inverter driving signal or rectifier
driving signal according to Tx, Rx mode. Finally, it selects whether to use

passive, half or full rectifier according to output current. In the power-up

sequence, it is defaulted to operate as passive rectifier to supply Vrect to

increase without IC operation

35
3. Buck converter

The inductor L1 is the biggest external component. To adopt the small size

inductor, the switching frequency needs to increase for the mobile application.

Eq. 19 shows the relationship of the inductor and the switching frequency.
ΔIL is estimated inductor ripple current. The switching frequency is inverse

proportional to the inductor size. The switching frequency is 2MHz for 2uH

inductor through Eq. 19.

×( − )
=
∆ × ×

M1 L1 VOUT

M2
VIN DC COUT LOAD

Fig. 25 Synchronous switch buck converter.

In the conventional buck converter, on the switching off-state, a load

current that flows through the diode becomes a loss. Especially when the load

36
current increases or the duty cycle decreases, the loss of the diode becomes

large. It takes near several percent losses for whole converter efficiency. [14]
Fig. 25 shows the buck converter with synchronous switch. The switch mosfet

substitutes the free-wheeling diode. It reduces a forward bias voltage 0.7V of

the free-wheeling diode to several dozens of milli-voltage. For example the

conventional structure makes 0.1W loss by the wheeling diode. But the

synchronous structure makes only 0.036W using the synchronous switch.

Unlike the free-wheeling diode automatically prevents a reverse current, it
requires an additional zero current detection to prevent the reverse-current
to adopt the synchronous structure. Because the buck convert’s free-
wheeling diode position is not matched the boost converter’s. The
synchronous switch structure is also essential for bi-directional dc-dc
converter.

The buck converter structure and the switching frequency are confirmed.
Next step is to choosing the size of switch mosfet. A sizing the switch mosfet

need to consider the conduction and the switching losses. And also the
switching frequency is high enough to consider the body-diode loss. The

mosfet size is determined as 75mohm ron resistance in normal condition

through Eq. 15, 16 and 18.
The PWM is the abbreviation of pulse width modulation. The pulse width

modulation controls a duty cycle of the switch according to the feedback

voltage. It operates in a fixed frequency. It is relatively easy to filter out

switching noise and low output ripple. And it also can optimize the efficiency

of a specific load condition. A current control mode is a representative one of

37
the PWM control. In this work, the DCDC converter operates for current mode

control. But it has several disadvantages as following. First, the control loop
becomes unstable at duty cycles above 50% unless slope compensation is

added. But it can easily overcome by simply sub-harmonic oscillation circuit.

Second, with the control loop forcing a current drive, load regulation is worse
and coupled inductors are required to get acceptable cross-regulation with

multiple outputs. But the advantages of this control technique offer more
necessary performances include the following. First, the current control mode
is the faster response to various changes in input, output state than a voltage
mode control. Since inductor current rises with a slope determined by Vin-Vo,
this waveform will respond immediately to line voltage changes, eliminating
both the delayed response and gain variation with changes in input voltage.
Second, it has both simpler compensation and a higher gain bandwidth over the

voltage-mode circuit. Since the error Amplifier is now used to command an

output current rather than voltage, the effect of the output inductor is

minimized and the filter now offers only a single pole to the feedback loop
Third, Additional benefits with current-mode circuits include inherent pulse-

by-pulse current limiting by merely clamping the command from the Error
Amplifier, and the ease of providing load sharing when multiple power units
are paralleled. [15]

Fig. 26 shows the current mode control operation. The buck output voltage

is divided to make a feedback voltage VFB. An error amplifier integrates the

difference between the VFB and a reference voltage. To prevent inrush

current in the initial condition, the reference voltage comes from soft-start

38
block. The reference voltage slow increases after the IC reset signal is on.

The soft-start time is 0.7ms according to the Cout value. And then Vc which
is the error amplifier output compares with Vsum to make gate driving reset

signal. Vsum signal is the sum of high side switch current sensing voltage and

the ramp signal to prevent sub-harmonic oscillation. To use the high side
switch current is a crucial difference between the voltage mode control and

the current mode control. The voltage control only uses the ramp signal to
make the gate reset signal.

39
Fig. 26 Current mode control operation.

40
 Fig. 27 PFM modulation diagram.

The efficiency of the PWM control in the light load is low. Because the

switching loss still remains same value independent to the load change in the
light load condition. Pulse frequency modulation is one of the best methods to

improve efficiency in the light load. Unlike the PWM, the PFM control the
switching frequency according to the load condition. When the feedback signal

goes under the low limit reference, the switch mosfet turns on until switch
current reference. So the PFM control makes high switching frequency in the

41
heavy load and low switching frequency in the light load. The PFM reduces the

switching loss drastically in the light load. It is possible to get high efficiency
in the light load. [16] Fig. 27.\ shows the PFM modulation. PFM mode

operates like above. When output voltage is lower than reference voltage, the

high side gate driving set signal is created. And then the switch current is
over IDAC reference, the gate driving reset signal turn off the high side gate

driving signal. When reverse current is detected, the IC turn off the low side
switch. While the load current decreases under discontinuous conduction mode,
the reverse current appears. After several reverse current are detected and
then the IC changes the PWM mode to the PFM mode.

Fig. 28 Discrete charging solution and direct charging solution.

According to the mobile maker, each product has different solutions to

charge the battery. Fig. 28 shows a discrete and a direct charging solution.

The discrete charging solution is that the power receiver and the charger IC

42
are independent. So the buck converter regulates DC voltage which the

charger IC needs. The direct charging solution is to charge the battery by the
receiver. It can improve efficiency by eliminating the loss of the charger IC.

But the buck converter needs to operate three standard charging phases

(pre-charge, CC and CV). In the work, the buck converter also provides
5/9/12V, programmable maximum current 1.44A for fast charging.

Fig.29. Battery charging profile.

Fig. 29 shows a battery charging profile. When the battery is discharged, a

constant current supplies for the fast charging. After the battery output

voltage reaches in a target level, the buck converter gives the constant
voltage to stable charging. The buck converter needs not only controlling the

43
buck output voltage but also adjusting the output current. The constant current

mode should be added to the existing PWM control. Fortunately, the constant
current mode is almost same operation to the voltage mode. Fig. 26 shows the

constant current mode. The constant current mode simply is realized by

adding a new feedback block. The constant current mode operates as follows.
When over current state is detected, current error amplifier controls Vc

(feedback error voltage output) on the base of programmable reference and

load current sensed.

4. Boost converter

For bi-directional dc-dc converter, the synchronous switch structure is

adopted. The boost converter control block is the same with the buck

converter’s. It controls the current control mode for the PWM. And in the
light load, it uses the PFM for high efficiency. The switch current sensing

block locates at both side switch for the current control mode and zero current
prevention. The boost converter step the battery 3.6V ~ 4.2V voltage input up

to 5V~ 15.2V.

A current sensing block is designed exactly same structure in the high-

side and low-side switches. This is to use each function as a simple routing

replacement when used as the buck converter and the boost converter. Fig. 30

shows the current sensing block. The mirrored current from the synchronous
switch mosfet is sent to the zero current detection block and PWM control

block. When the buck converter operates, high-side switch current is used for

44
the PWM control and low-side switch current is for the zero current detection.

When the boost converter operates, low-side switch current is used for the
PWM control and high-side switch current is for the zero current detection.

Fig.30 Current sensing block.

Until now, this section introduces the structure of the rectifier/inverter and

DCDC converter that combine the wireless power transmitter and receiver and
improve the efficiency. The rectifier that acts as inverter adopts the full-
bridge synchronous structure for high efficiency. And it adopts zero current

prevention block for the WPC, PMA and DLL-compensation for the A4WP.

According to the three different standards, the switch mosfet size is selected
optimally for minimum loss. The buck converter that acts as the boost

converter has the current mode PWM. And it controls synchronous structure

45
with automatic PWM/PFM and adaptable to two kind of the charging method

with high efficiency. By the simple routing replacement, the buck converter
operates as the boost converter with the same structure of the current

sensing block.

46
 VI. Simulation result

This section shows the design of the rectifier/inverter and DCDC converter

design and simulation result.

1. Rectifier and inverter

Fig.31 Rectifier and inverter schematic.

A mode decoder counts the frequency of the input signal and then selects
the mode between the WPC, PMA and the A4WP. The mode decoder also

decides passive, half and full mode operation according to the load condition. A

bootstrap circuit is used to drive high side gate. It boosts the input voltage
VACP and VACN up to as much as the input voltage added the internal supply

47
voltage. It can reduce the size of high side mosfet one half by using n-type

switching mosfet instead of using p-type switching mosfet. The zero current
detection, DLL and core operation already are introduced in the previous

section.

Fig. 32 Operation of rectifier in WPC, PMA mode with the light load

Fig. 32 shows the operation of rectifier in WPC and PMA mode with the
light load. GD_ON_P, N are the gate driving signal. IAC_N, P is the input

current and VRECT is the rectifier output voltage. There is no reverse current

by the operation of the zero current detection block. Vrect is well saturated to
8 volt. The ripple of Vrect is under 100mV. The efficiency of the rectifier is

95.6% in the light load and 98.3% in the heavy load. Because the switching
loss remains the same value independent of the load condition. In the case that

48
total power is small, relatively the switching loss looks larger. In the inverter

mode, the efficiency is 97.9% with 5.354W and 145 KHz switching frequency.

Fig. 33 Operation of rectifier in WPC, PMA mode with the heavy load

Fig. 34 Operation of rectifier in A4WP mode with the heavy load

49
 VCTRL_DLL is locked at 1.6 volt. It means that replica delay matches the
internal delay to prevent the reverse current. VRECT is well saturated to 7.8

volt. The ripple of VRECT is under 10mV. The VRECT ripple is better than the

WPC, PMA’s by higher switching frequency. The efficiency of the rectifier is

93.1% in the heavy load.

2. Buck/Boost converter

Fig. 35 Buck/boost converter schematic.

The error amp block consists of the constant voltage, the current error

amp and a clamp circuit. The clamp circuit limits high, low level of error amp

50
output to make the switch duty the maximum 90% and minimum 10% in the

PWM. Over current signal automatically enables the current error amp output.
The R, C compensation array has two bits trim to adapt the load variation.

Comparing error amp output and the slope compensation ramp signal added

the switch mosfet current sensing signal makes the PWM reset signal. And
over current, voltage is also used for the PWM reset signal. When the

feedback signal decreases under the low limitation in the PFM, then the PFM
gate driving signal is turned on. And when the feedback signal increase over
the high limitation or the switch mosfet current rises over the high limitation,
then the PFM switch control signal is turned off. From above signals, the
PWM/PFM ctrl block makes the switch mosfet control signal.
The DRV data block is designed for selecting DCDC control signal path
according to the buck/boost mode. This block has the adaptive dead time

control to prevent the high, low side switch shoot-through from the gate
driving signal. And it decides the PWM/PFM mode from an counting of the

zero current detection signal.

The Driver block is designed for driving the switch mosfet with minimum

delay and rising, falling time. As the high side mosfet has a floating ground
that varies with the switch cycle, the signals for high side driver block need to
level shift. Each signal is delivered through the current to voltage converter.

The power switch with current sensing block is for both the buck and boost

converter. First, it focuses on the optimal efficiency to balance the conduction

and the switching loss. Second, the low side block needs to adopt the current

sensing circuit for zero current sensing in the buck converter and for the

51
current control PWM in the boost converter. The high side block also has the

current sensing circuit for contrary reason.

For the direct charging method, the voltage reference provides 7bits DAC

and the reference has 4bits DAC to match the charging profile. And in the

power-up state, soft-start block provides slow increasing reference prevent

inrush current.

The FB discharger block is designed for preventing over voltage situation

with charging the device of different charging specification. This block
discharges the buck converter output voltage according to the target reference.
The load current sensing block senses the load current to send the
receiver condition to the transmitter.

Efficiency of buck/boost converter

97

96

95

94

93

92
6.2 11 15

ILOAD 1A BUCK ILOAD 0.1A BUCK ILOAD 1A BOOST

Fig. 36 Efficiency of the buck/boost with input voltage and the load current

52
 Fig. 36 shows the efficiency of the buck/boost converter with input voltage

and the load current. Synchronous and the optima design of the mosfet size
make all efficiency over 93% independent of the load condition. The heavy

load condition efficiency is almost the same with the efficiency of the light

load condition by using the PFM.

Fig. 37 Operation of the buck converter

Fig. 37 shows the operation of the buck converter. The soft start is skipped
and the buck output is biased 5V in the initial condition for the fast simulation.
The load current increases 0.1A to1.1A with 1ps rising time at 20us and
keeps 1.1A until 100us. In this section, the buck converter operates as PWM.

In the PWM region, the buck output has small ripple. Because the buck
converter operates with the duty control in the same frequency. The inductor

53
current shows the continuous conduction mode. From 100us to 150us, the load

current changes 0.1A. The buck converter operates as the PFM after the
inductor current keeps to decreases under zero value. The switching

frequency is reduced under several hundred kilo Hz to improve efficiency. But

the ripple is bigger than the PWM control. From 150us to 250us, the load
current changes 0.1A to 2.5A. In this section, the buck converter operates as

the constant current mode. The over current signal enable the constant
current amp output. The PWM focuses on the load current, 1.36A then the
buck output voltage is out of control. After the load current changes to 0.1A,
but the constant current mode still control the signal until the buck converter
output increases over 5V and then the constant current mode is disabled.

Fig.38. Boost converter operation

54
 Fig.38. shows the boost converter operation. This operation looks alike the
buck converter operation.

55
 VII. Conclusion

In this thesis, the triple-mode wireless power transfer receiver and

transmitter implemented in one chip IC is presented. It supports WPC and

Airfuel (PMA and A4WP) standards in the receiver mode and supports WPC

standard in the transmitter mode. To implement the transmitter and the

receiver into one chip, the synchronous rectifier alternatively acts as inverter
and buck converter also operates as boost converter bi-directionally.

In the power receiver mode, the rectifier converts alternating signal at the
frequency of 110~410 kHz to the directing signal in the WPC and the PMA
standards. And it changes the fixed 6.78MHz alternating signal to the directing
signal in the A4WP. The full-bridge synchronous structure and the zero

current prevention improves the efficiency of the rectifier. The rectifier

selects among three modes depending on the amount of the load current for its

high efficiency. The buck converter provides up to 15W power to the charger
for fast charging. It can supply constant 5V, 9V, and 12V and various constant
current up to 1.44A. It can also directly charge the battery using the constant

current mode. It improves efficiency by using the synchronous structure, PFM

control, and reverse current prevention. In power transmitter mode, the boost

converter supplies up to 5W power using the WPC standard. The buck and

boost converter in the PWM operation adopts current mode control for fast
response, simple PID structure, and low output ripple. In a light load condition,

PFM control increases efficiency by reducing switching loss.

56
 The die area of the fabricated the triple-mode wireless power transmitter

and receiver in one chip IC is 3.5 x 4.4 mm2. The overall system efficiency of
IC is 82%. Simulation results show that the triple-mode wireless power

transmitter and receiver in one chip IC can operate both power receiver and

transmitter with high efficiency. The rectifier converts direct 8V output direct
voltage flowing 1.2A with 98.3% efficiency in the WPC and PMA standards.

And it also makes 7.8V output direct current flowing 1.2A with 93.1%
efficiency in the A4WP standard. The inverter converts 145 KHz alternating
5.354W power with 97.9% efficiency with the WPC standard. The buck/boost
converter steps down 5W power flowing 1A with 93.6% efficiency. The total
efficiency of transmitter to receiver is over 60% with the maximum efficiency
of each block. Table 3 shows the summary of this work. And table 4, 5 shows
the performance comparison of Rx, Tx.

Table 3. Performance summary of this work

Reference This work

Technology 0.18u BCD

Power transfer mode Rx Tx
Support standard WPC PMA A4WP WPC
Overall efficiency 82% 77% 79%

Input voltage range 6~18V 4.2V

Output power 5W, 9W, 15W 5W

Output voltage 5, 9, 12V ~12V

Die Area 3.5mm x 4.4mm

57
 Table 4. Performance comparison of Rx
Reference This work [13] [16] [17] [18]
0.35u 0.18u 0.18u 0.18u
Technology 0.18u BCD
BCD BCD BCD CMOS
Support WPC,
A4WP A4WP WPC A4WP A4WP
standard PMA
Overall
82% 77% 0.75 70% 70% 50%
efficiency
Input voltage
6~18V 4~8V ~8 4.2V 20V
range
Output power 5W, 9W, 15W 3W 5W 6W 1
Output voltage 5, 9, 12V 5V 5V 5V 3.1V
2
Die Area(mm ) 15.2 18.3 - - 6.25

Table 5. Performance comparison of Tx

Reference This work [18] [19] [20]
Technology 0.18u BCD 0.18u CMOS - -
Support standard WPC A4WP WPC WPC
Overall efficiency 79% 50% 77% 75%
Input voltage range 4.2V 20V 4.2~5.3 5V
Output power 5W 1W 5W 5W
Output voltage ~12V 3.1V 5V -
Die Area(mm2) 15.2 6.25 - -

The proposed IC supports triple-mode differently from the other ICs while
being the most efficient as the receiver. In addition, it has wide output power

range up to 15W and is designed with less area than the other ICs that support
a relatively single standard. It also has high efficiency as a transmitter.

58
 Reference
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Wiley & Sons Inc, 2014, pp10-11

[2] Sazonov Edward, Neuman Michael R. Wearable Sensors: Fundamentals,

Implementation and Applications. Elsevier. 2014, pp. 253–255.
[3] Valtchev Stanimir S., Baikova Elena N., Jorge Luis R. "Electromagnetic

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Electrical Engineering. Serbia: University of Niš. 25 (3),pp. 171–181., Dec.

2014.
[4] Karalis Aristeidis, Joannopoulos, J. D., Soljačić Marin "Efficient wireless
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[5] Baarman David W. , Schwannecke Joshua. "White paper: Understanding

Wireless Power" Fulton Innovation. Jan. 2015.

[6] Moh, K.-G. et al., “A fully integrated 6W wireless power receiver

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[7] “Transfer efficiency” WP consortium. Internet :

https://www.wirelesspowerconsortium.com/technology/transfer-
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[8] Christian Peters et al., "A CMOS integrated voltage and power efficient

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[9] David Jauregui, Bo Wang, and Rengang Chen "Power Loss Calculation With

Common Source Inductance Consideration for Synchronous Buck Converters",

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[10] Yan Lu et al., “A 13.56 MHz CMOS Active Rectifier With Switched-

Offset and Compensated Biasing for Biomedical Wireless Power Transfer

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Issue 3, pp. 334-344, Jul. 2013.

[11] Hyung-Gu Park, Jae-Hyeong Jang, Hong-Jin Kim, Young-Jun Park,

SeongJin Oh, YoungGun Pu, Keum Cheol Hwang, Youngoo Yang and Kang-
Yoon Lee. “A Design of a Wireless Power Receiving Unit With a High-
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Resonant A4 WP Applications” IEEE Transactions on Power Electronics

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[12] Young-Jin Moon et al. A 3.0-W wireless power receiver circuit with
75-% overall efficiency”, solid state circuit conference(A-SSCC), 2012

IEEE Asian, pp,97-100, Nov 2012

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[14] Robert Mammano. “Switching power s upply topology voltage mode vs

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[16] P9022, Integrated Device Technology, Inc., San Jose, California, 2014.

[17] NX1A4WP, NXP Semiconductors, Inc., Eindhoven, Netherlands, 2015.

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61
논문요약

모바일 용 고효율 트리플 모드 무선 전력 송, 수신기 칩

설계

성균관대학교
전자전기컴퓨터공학과
이창석

무선 충전은 하나의 송신기로 여러 수신기를 동시에 충전할 수 있을 뿐 아니라

공간의 제약 없이 전력을 공급할 수 있다. 유선 전력 전송 방식에 비해 효율이

낮고 전력에 제한이 있지만 위에서 설명한 장점들 때문에 많은 영역에서 무선

충전이 급격하게 증가하고 있다. 본 논문에서는 모바일 애플리케이션을 위한 무선

전력 전송 IC을 설계 하려한다. IC를 설계에서 다음과 세가지 특성을 중점적으로

고려 하려 한다.

먼저, 모바일 용 IC 설계를 위해서는 지원할 표준을 정해야 한다. 무선 전력

전송은 대표적으로 WPC, PMA, A4WP 표준이 있다. WPC, PMA는 자기 유도
방식의 표준이고, A4WP는 Airfuel로 대표되는 자기 공진 방식의 표준이다. 자기

유도 방식은 효율이 좋고 상용화가 많이 되었으나 충전 거리의 제한과 FOD 등

단점이 있고 자기 공진 방식은 상대적으로 넓은 거리를 충전할 수 있으나 효율이

떨어지는 단점이 있다. 각기 장 단점이 있어 아직까지 지배적인 표준은 없다.

두 번째로 IC에 무선 전력 수신 뿐만 아니라 송신 기능도 가능해야 한다. 무선

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전력 전송은 수 년 전에 휴대용 기기 용으로 상용화 되었다. 지금까지는 무선 전력

전송 기능이 있는 휴대용 기기는 내부 배터리를 충전하는 리시버는 용도로 국한

되었다. 그러나 최근 휴대 전화와 연동하는 웨어러블 디바이스가 많아 지면서 이

기기들을 충전하는 기능을 즉 무선 전력 전송기의 기능을 휴대 전화에 내장하려고

한다.
마지막으로 IC 효율을 최대로 하려한다. 무선 전력 전송은 본질적으로 효율이

낮은 단점이 있다. 유선 전력 전송은 일반적으로 AC/DC 컨버터, DC/DC 컨버터,

충전 IC로 구성 된다. 그러나 무선 전력 전송은 송신기, 수신기, 코일로 구성되는데
각 부분들의 효율과 크기가 하나하나가 유선 전력 전송 전체의 크기와 효율에
맞먹는다. 특히 코일의 효율은 코일의 크기, 거리, 각도 등 다양한 요소에 의해
영향을 받기 때문에 최적의 조건에서도 70% 효율을 얻는 것이 어렵다. 그 결과
무선 전력 전송을 설계에서 각 부분의 효율을 최적화 하는 것이 매우 중요하다.
본 논문에서는 0.18um BCD 공정을 사용하여 트리플 모드 무선 전력 송,

수신기 단일 칩을 설계 하였다. 설계한 IC는 수신기로 동작 시에는 WPC, PMA,

A4WP 표준을 지원하고 송신기로 동작 시에는 WPC 표준을 지원한다. IC의 전체

효율은 82%이고 고효율을 위해 정류기는 Synchronous 구조를 채택하고 zero

current detection, DLL을 사용하여 역 전류 방지 한다. 또한 각 스위치 설계는

전도 손실과 스위치 손실 사이에 각 표준에 따라 최적화하였다. 벅 컨버터는 역시

고효율을 위해 Synchronous 구조와 부하가 작을 때 PFM 제어를 한다. 송신기와
수신기를 단일화 하기 위해 동기 식 정류기는 인버터로도 동작하고 벅 컨버터는

부스트 컨버터로 양방향 동작이 가능하게 설계 하였다. 제작된 IC는 3.5 x 4.4

mm2 의 면적을 가진다.

주제어: 무선 전력 전송, 송수신 단일, 고효율 무선 전력 송, 수신기, WPC, PMA

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A Design of Highly Efficient Triple-Mode Wireless Power Transmitter and
2016 Changseok Lee
Receiver IC for Mobile Application