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PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

ANALOG
AND
DIGITAL
LAB
REC-452

1|Page
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

Experiment No.1
BASIC INTRODUCTION TO MULTISIM

Statement Of Objective : General Introduction to multisim and there various commands


and functions .

Apparatus Used : NI MULTISIM 11.0

Theory :

 Multisim is the schematic capture and simulation program designed for schematic entry, simulation,
and feeding to downstage steps, such as PCB layout. It also includes mixed analog/digital simulation
capability, and microcontroller co-simulation.

FIGURE -1

1 Menu Bar 2 Design Toolbox


3 Component Toolbar 4 Standard Toolbar
5 View Toolbar 6 Simulation Toolbar
7 Main Toolbar 8 In Use List
9 Instruments Toolbar 10 Scroll Left/Right
11 Circuit Window 12 Spreadsheet

2|Page
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

13 Active Tab

 Multisim includes the following toolbars:


Standard Toolbar—Contains buttons for commonly-performed Windows functions.
Main Toolbar—Contains buttons for commonly-performed Multisim functions.
Simulation Toolbar—Contains buttons used during simulation.
View Toolbar—Contains buttons used to manipulate the appearance of the workspace.
Components Toolbar—Contains buttons used to place components onto the workspace.
Virtual Toolbar—Contains buttons used to place virtual components on the workspace.
Graphic Annotation Toolbar—Contains buttons used to draw graphic elements such as lines
and circles on the workspace. You can also place comments and pictures from here.
Instruments Toolbar—Contains buttons used to place instruments on the workspace.

Placing Components :-

The first step in schematic capture is to place the appropriate components on your circuit window.
You typically do this via the component browser (that is, the Select a Component dialog box) . Refer
to the figure below.

FIGURE-2

You can also select Place»Component to display the Select a Component dialog box. Components
are organized by database, group, and family (for example, Master Database, Sources Group, Power
Sources Family).
Type-ahead allows you to type a few characters to jump to the component you are looking for. Search
capabilities allow you to find components using generalized wildcard searches throughout all the
databases.

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Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

Labeling :
There are many ways that you can label your designs in Multisim:
• Adding a Title Block—You can use the Title Block Editor to create customized title blocks.
If desired, a title block can be included on every page of your design.

• Adding Miscellaneous Text—You can use the Place»Text command to place text anywhere
on the workspace.
• Adding a Comment—You can add comments to show engineering change orders, to
facilitate collaborative work among team members, or to allow
background information to be attached to a design. You can “pin” a
comment to the workspace, or directly to a component. When a
component with a “pinned” comment is moved, the comment also
moves.
• Using Graphic Annotation—Use this functionality to add the following graphic elements to
your workspace:
– Text
– Line
– Multiline
– Rectangle
– Ellipse
– Arc
– Polygon
– Picture
– Comment
• Modifying Net Names—Multisim automatically assigns a net name to each node in the
circuit. If desired, you can modify a net name to something more
meaningful to the circuit design. For example, you may wish to
change a net name to “Output.”

4|Page
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

Circuit of Voltage Calculator Circuit

FIGURE-3

Circuit of Voltage Calculator Circuit

5|Page
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

FIGURE-4
Result : We successfully understand and learn the basic introduction of MULTISIM
and we have successfully design a circuit.
Precautions :
1.All connection should be properly connected.
2.Correct value of component should be selected.
3. Re-Check the output manually .
4.The circuit design should be proper .

Possible Source Of Error :

1.Ground should not connected


2.Resistors of correct value is not selected
3.Capacitors of correct value is not selected

Reference :

1.http//Voltage Calculator /wikipedia.org


2.NI.Multisim 11.0

6|Page
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

Experiment No. 2
Statement Of Objective : DC analysis of the given n-type Enhancement MOSFET
circuit.

Apparatus Used : NI MUTISIM 11.0

Theory :

MOSFET Field effect transistor is a unipolar- transistor, which acts as a voltage-controlled current
device and is a device in which current at two electrodes drain and source is controlled by the action of
an electric field at another electrode gate having in-between semiconductor and metal very a thin metal
oxide

Enhancement N-channel MOSFET

7|Page
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

FIGURE -1

Note that the fundamental differences between a Bipolar Junction Transistor and a FET are that a BJT
has terminals labelled Collector, Emitter and Base, while a MOSFET has terminals labelled Drain,
Source and Gate respectively.

Also the MOSFET differs from the BJT in that there is no direct connection between the gate and
channel, unlike the base-emitter junction of the BJT, as the metal gate electrode is electrically insulated
from the conductive channel giving it the secondary name of Insulated Gate Field Effect Transistor, or
IGFET.

We can see that for the n-channel MOSFET (NMOS) above the substrate semiconductor material is p-
type, while the source and drain electrodes are n-type. The supply voltage will be positive. Biasing the
gate terminal positive attracts electrons within the p-type semiconductor substrate under the gate region
towards it.

DATE:28/01/2019

This over abundance of free electrons within the p-type substrate causes a conductive channel to appear
or grow as the electrical properties of the p-type region invert, effectively changing the p-type substrate
into a n-type material allowing channel current to flow.

The reverse is also true for the p-channel MOSFET (PMOS), where a negative gate potential causes a
build of holes under the gate region as they are attracted to the electrons on the outer side of the metal
gate electrode. The result is that the n-type substrate creates a p-type conductive channel.

So for our n-type MOS transistor, the more positive potential we put on the gate the greater the build-
up of electrons around the gate region and the wider the conductive channel becomes. This enhances
the electron flow through the channel allowing more channel current to flow from drain to source
leading to the name of Enhancement MOSFET.

N-channel E-MOSFET I-V Characteristics

FIGURE-2

8|Page
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

With a fixed VDS drain-source voltage connected across the eMOSFET we can plot the values of drain
current, ID with varying values of VGS to obtain a graph of the mosfets forward DC characteristics.
These characteristics give the transconductance, gm of the transistor.

This transconductance relates the output current to the input voltage representing the gain of the
transistor. The slope of the transconductance curve at any point along it is therefore given as:
gm = ID/VGS for a constant value of VDS.

So for example, assume a MOS transistor passes a drain current of 2mA when VGS = 3v and a drain
current of 14mA when VGS = 7v. Then:

This ratio is called the transistors static or DC transconductance which is short for “transfer
conductance” and is given the unit of Siemens (S), as its amps per volt. Voltage gain of a mosfet
amplifier is directly proportional to the transconductance and to the value of the drain resistor.

At VGS = 0, no current flows through the MOS transistors channel because the field effect around the
gate is insufficient to create or “open” the n-type channel. Then the transistor is in its cut-off region
acting as an open switch. In other words, with zero gate voltage applied the n-channel eMOSFET is
said to be normally-off and this “OFF” condition is represented by the broken channel line in the
eMOSFET symbol (unlike the depletion types that have a continuous channel line).

As we now gradually increase the positive gate-source voltage VGS , the field effect begins to enhance
the channel regions conductivity and there becomes a point where the channel starts to to conduct. This
point is known as the threshold voltage VTH. As we increase VGS more positive, the conductive channel
becomes wider (less resistance) with the amount of drain current, ID increases as a result. Remember
that the gate never conducts any current as its electrical isolated from the channel giving a mosfet
amplifier an extremely high input impedance.

Therefore the n-channel enhancement mosfet will be in its cut-off mode when the gate-source voltage,
VGS is less than its threshold voltage level, VTH and its channel conducts or saturates when VGS is above
this threshold level. When the eMOS transistor is operating in the saturation region the drain current, ID
is given by:

E- MOSFET Drain Current

Note that the values of k (conduction parameter) and VTH (threshold voltage) vary from one eMOSFET
to the next and can not be physically changed. This is because they are specific specification relating to
the material and device geometry which are in-built during the fabrication of the transistor.

The static transfer characteristics curve on the right is generally parabolic (square law) in shape and
then linear. The increase in drain current, ID for a given increase in gate-source voltage, VGS determines
the slope or gradient of the curve for constant values of VDS.
9|Page
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

Then we can see that turning an enhancement MOS transistor “ON” is a gradual process and in order
for us to use the MOSFET as an amplifier we must bias its gate terminal at some point above its
threshold level.

There are many different ways we can do this from using two separate voltage supplies, to drain
feedback biasing, to zener diode biasing, etc, etc. But whichever biasing method we use, we must make
sure that the gate voltage is more positive than the source by an amount greater than VTH. In this mosfet
amplifier tutorial we will use the now familiar universal voltage divider biasing circuit

CIRCUIT OF n-Channel E-MOSFET DC ANALYSIS

FIGURE-3

10 | P a g e
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

FIGURE -4

Result : We successfully analyse the DC Analysis of n- Channel Enhancement


MOSFET.

Precautions :

1. All connections should properly connected


2.All components should be selected of correct value.
3.Calculate the analysed value manually to cross verify.

Possible Source Of Error :

1.Ground should not connected


2.Resistors of correct value is not selected
3.Capacitors of correct value is not selected

11 | P a g e
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

Reference :

1.http//DC Analysis of N-channel E-MOSFET /wikipedia.org


2.NI.Multisim 11.0

Experiment No.3

Statement Of Objective : Analysis of Common Source MOSFET

Apparatus Used : NI – MULTISIM 11.0

Theory :

In electronics, a common-source amplifier is one of three basic single-stage field-effect


transistor (FET) amplifier topologies, typically used as a voltage or transconductance
amplifier. The easiest way to tell if a FET is common source, common drain, or common
gate is to examine where the signal enters and leaves. The remaining terminal is what is
known as "common". In this example, the signal enters the gate, and exits the drain. The
only terminal remaining is the source. This is a common-source FET circuit. The
analogous bipolar junction transistor circuit may be viewed as a transconductance
amplifier or as a voltage amplifier. (See classification of amplifiers). As a
12 | P a g e
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

transconductance amplifier, the input voltage is seen as modulating the current going to
the load. As a voltage amplifier, input voltage modulates the amount of current flowing
through the FET, changing the voltage across the output resistance according to Ohm's
law. However, the FET device's output resistance typically is not high enough for a
reasonable transconductance amplifier (ideally infinite), nor low enough for a decent
voltage amplifier (ideally zero). Another major drawback is the amplifier's limited high-
frequency response. Therefore, in practice the output often is routed through either a
voltage follower (common-drain or CD stage), or a current follower (common-gate or
CG stage), to obtain more favorable output and frequency characteristics. The CS–CG
combination is called a cascode amplifier.

Bandwidth :

Figure 1: Basic N-channel MOSFET common-source amplifier with active load ID.

Figure 4: Small-signal circuit for N-channel MOSFET common-source amplifier.

Figure 5: Small-signal circuit for N-channel MOSFET common-source amplifier using Miller's
13 | P a g e
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

theorem to introduce Miller capacitance CM.

Figure -6 : Circuit Diagram Of Common Source

DATE:4/02/2019

Result : We successfully analyse the common source amplifier of E- MOSFET.

Precaution :
1.All connection should be properly connected.
2.Correct value of component should be selected.
3. Re-Check the output manually .
4.The circuit design should be proper

Possible Source Of Error :

1.Ground should not connected


2.Resistors of correct value is not selected
3.Capacitors of correct value is not selected
14 | P a g e
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

Reference :

1.http//N-channel Common source amplifier/wikipedia.org


2.NI.Multisim 11.0

Experiment No.4
Statement Of Objective : Modelling and Stimulating Of Common Drain MOSFET.

Apparatus Used : NI MULTISIM 11.0

Theory :
In electronics, a common-drain amplifier, also known as a source follower, is one of
three basic single-stage field effect transistor (FET) amplifier topologies, typically used
as a voltage buffer. In this circuit (NMOS) the gate terminal of the transistor serves as
the input, the source is the output, and the drain is common to both (input and output),
hence its name. The analogous bipolar junction transistor circuit is the common-collector
amplifier. This circuit is also commonly called a "stabilizer."
In addition, this circuit is used to transform impedances. For example, the Thévenin
resistance of a combination of a voltage follower driven by a voltage source with high
Thévenin resistance is reduced to only the output resistance of the voltage follower (a
15 | P a g e
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

small resistance). That resistance reduction makes the combination a more ideal voltage
source. Conversely, a voltage follower inserted between a driving stage and a high load
(i.e. a low resistance) presents an infinite resistance (low load) to the driving stage—an
advantage in coupling a voltage signal to a large load.

Characteristics

FIGURE -1
Basic N-channel JFET source follower circuit (neglecting biasingdetails).
At low frequencies, the source follower pictured at right has the following small
signal characteristic.

FIGURE -2

Result : We successfully do modelling and simulating the COMMON DRAIN


MOSFET.
16 | P a g e
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

Precaution :

1. All connections should properly connected


2.All components should be selected of correct value.
3.Calculate the analysed value manually to cross verify.

Possible Source Of Error :

1.Ground should not connected


2.Resistors of correct value is not selected
3.Capacitors of correct value is not selected

Reference :

1.http//Common Drain Amplifier /wikipedia.org


2.NI.Multisim 11.0

DATE:11/02/2019

17 | P a g e
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

FIGURE -3
CIRCUIT DIAGRAM OF COMMON DRAIN MOSFET

FIGURE -4
OUTPUT CHARACTERISTIC OF COMMON DRAIN MOSFET

Experiment No.5
Statement Of Objective :. Modelling and Simulation Of Current mirror using MOSFET.

18 | P a g e
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

Apparatus Used : NI MULTISIM 11.0

Theory :
A current mirror is a circuit designed to copy a current through one active device by controlling the
current in another active device of a circuit, keeping the output current constant regardless of loading.
The current being "copied" can be, and sometimes is, a varying signal current. Conceptually, an ideal
current mirror is simply an ideal inverting current amplifier that reverses the current direction as well.
Or it can consist of a current-controlled current source (CCCS). The current mirror is used to provide
bias currents and active loads to circuits. It can also be used to model a more realistic current source
(since ideal current sources don't exist). The circuit topology covered here is one that appears in many
monolithic ICs. It is a Widlar mirror without an emitter degeneration resistor in the follower (output)
transistor. This topology can only be done in an IC, as the matching has to be extremely close and
cannot be achieved with discretes .

There are three main specifications that characterize a current mirror. The first is the transfer ratio (in
the case of a current amplifier) or the output current magnitude (in the case of a constant current source
CCS). The second is its AC output resistance, which determines how much the output current varies
with the voltage applied to the mirror. The third specification is the minimum voltage drop across the
output part of the mirror necessary to make it work properly. This minimum voltage is dictated by the
need to keep the output transistor of the mirror in active mode. The range of voltages where the mirror
works is called the compliance range and the voltage marking the boundary between good and bad
behavior is called the compliance voltage. There are also a number of secondary performance issues
with mirrors, for example, temperature stability.

CIRCUIT DIAGRAM OF CURRENT MIRROR USING MOSFET

Result : We Successfully mirror the current using MOSFET (2N7000)

Precaution :
19 | P a g e
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

1. All connections should properly connected


2.All components should be selected of correct value.
3.Calculate the analysed value manually to cross verify.

Conclusion : Finally after performing the practical now we have to conclude that our
circuit word is working properly for the modelling and simulation of current mirror
MOSFET.

Possible Source Of Error :

1. Ground should not connected


2. Resistors of correct value is not selected
3. Capacitors of correct value is not selected

Reference : http//Current Mirroring//wikipedia.org

Experiment No.6

Statement Of Objective : Modelling and Simulation Of DC-DC converter.


20 | P a g e
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

Apparatus Used : NI MULTISIM 11.0

Theory :

DC to DC converters are used in portable electronic devices such as cellular phones and
laptop computers, which are supplied with power from batteries primarily. Such
electronic devices often contain several sub-circuits, each with its own voltage level
requirement different from that supplied by the battery or an external supply (sometimes
higher or lower than the supply voltage). Additionally, the battery voltage declines as its
stored energy is drained. Switched DC to DC converters offer a method to increase
voltage from a partially lowered battery voltage thereby saving space instead of using
multiple batteries to accomplish the same thing.

Most DC to DC converter circuits also regulate the output voltage. Some exceptions
include high-efficiency LED power sources, which are a kind of DC to DC converter that
regulates the current through the LEDs, and simple charge pumps which double or triple
the output voltage.

DC to DC converters developed to maximize the energy harvest for photovoltaic systems


and for wind turbines are called power optimizers.

Transformers used for voltage conversion at mains frequencies of 50–60 Hz must be large
and heavy for powers exceeding a few watts. This makes them expensive, and they are
subject to energy losses in their windings and due to eddy currents in their cores. DC-to-
DC techniques that use transformers or inductors work at much higher frequencies,
requiring only much smaller, lighter, and cheaper wound components. Consequently these
techniques are used even where a mains transformer could be used; for example, for
domestic electronic appliances it is preferable to rectify mains voltage to DC, use switch-
mode techniques to convert it to high-frequency AC at the desired voltage, then, usually,
rectify to DC. The entire complex circuit is cheaper and more efficient than a simple
mains transformer circuit of the same output.

21 | P a g e
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

FIGURE 1. Circuit Diagram Of DC-DC Converter

Result : We Successfully stimulate the DC-DC converter and o/p voltage of boost up
circuit is 19.384V.
Precautions :
1. All connections should properly connected
2.All components should be selected of correct value.
3.Calculate the analysed value manually to cross verify.

Conclusion : The Boost Up circuit is working properly and given the scaled up
version of the output.

Possible Source Of Error :

1.Ground should not connected


2.Resistors of correct value is not selected
3.Capacitors of correct value is not selected

Reference :

1.http//DC-DC converter /wikipedia.org


2.NI.Multisim 11.0
3. https://en.wikipedia.org/wiki/DC-to-DC_converter

Experiment No.7

Statement Of Objective : Stimulation and modulation of BUCK converter.


22 | P a g e
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

Apparatus Used : NI MULTISIM 11.0

Theory :
A buck converter (step-down converter) is a DC-to-DC power converter which steps down voltage
(while stepping up current) from its input (supply) to its output (load). It is a class of switched-mode
power supply (SMPS) typically containing at least two semiconductors (a diode and a transistor,
although modern buck converters frequently replace the diode with a second transistor used for
synchronous rectification) and at least one energy storage element, a capacitor, inductor, or the two in
combination. To reduce voltage ripple, filters made of capacitors (sometimes in combination with
inductors) are normally added to such a converter's output (load-side filter) and input (supply-side
filter).[1]
Switching converters (such as buck converters) provide much greater power efficiency as DC-to-DC
converters than linear regulators, which are simpler circuits that lower voltages by dissipating power as
heat, but do not step up output current.[2]
Buck converters can be highly efficient (often higher than 90%), making them useful for tasks such as
converting a computer's main (bulk) supply voltage (often 12 V) down to lower voltages needed by USB,
DRAM and the CPU (1.8 V or less).

FIGURE 1: CIRCUIT DIAGRAM OF BUCK CONVERTER

Result : We Successfully stimulate the BUCK converter and o/p voltage of buck up
circuit is 1.432V.
Precautions :
1. All connections should properly connected
2.All components should be selected of correct value.
3.Calculate the analysed value manually to cross verify.

Conclusion : The Buck Up circuit is working properly and given the scaled up
version of the output.

Possible Source Of Error :

1.Ground should not connected


2.Resistors of correct value is not selected
3.Capacitors of correct value is not selected

Reference :

23 | P a g e
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

1.http//DC-DC converter /wikipedia.org


2.NI.Multisim 11.0
3. https://en.wikipedia.org/wiki/DC-to-DC_converter

Experiment No.8

Statement Of Objective : Stimulation and modulation of Ring Oscillator(3 Stage).

Apparatus Used : NI MULTISIM 11.0

Theory :
A ring oscillator is a device composed of an odd number of NOT gates in a ring, whose output
oscillates between two voltage levels, representing true and false. The NOT gates, or inverters, are
attached in a chain and the output of the last inverter is fed back into the first.
To understand the operation of a ring oscillator, one must first understand gate delay. In a physical
device, no gate can switch instantaneously. In a device fabricated with MOSFETs, for example, the
gate capacitance must be charged before current can flow between the source and the drain. Thus, the
output of every inverter in a ring oscillator changes a finite amount of time after the input has changed
. From here, it can be easily seen that adding more inverters to the chain increases the total gate delay,
reducing the frequency of oscillation.

24 | P a g e
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

.[2]

FIGURE 1: CIRCUIT DIAGRAM OF RING OSCILLATOR

FIGURE 2. OUPUT OF RING OSCILLATOR

Result : We Successfully stimulate the BUCK converter and o/p voltage of buck up
circuit is 1.432V.
Precautions :
1. All connections should properly connected
2.All components should be selected of correct value.
3.Calculate the analysed value manually to cross verify.

25 | P a g e
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A
PRANVEER SINGH INSTITUTE OF TECHNOLOGY , KANPUR

Conclusion : The Ring Oscillator circuit is working properly and given the waveform version of
the output.

Possible Source Of Error :

1.Ground should not connected


2.Resistors of correct value is not selected
3.Capacitors of correct value is not selected

Reference :
1.http//DC-DC converter /wikipedia.org
2.NI.Multisim 11.0 .
https://en.wikipedia.org/wiki/DC-to-DC_converter

26 | P a g e
Name : ADITYA SAXENA Date :04/03/2019
Roll No. : 1716431012 Class :EC – 2 A

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