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INTEL 845PE Preliminary Customer Reference Schematics


Revision 1.01

D D

TITLE SHEET
COVER SHEET 1

PROCESSOR (SOCKET478) 2,3

NORTH BRIDGE (845PE) 4,5,6,7

SOUTH BRIDGE (ICH4) 8,9,10

DDR Damping 11

DDR SDRAM 12

C DDR TERMINATIONS 13 C

CLOCK 14

AGP SLOT 15

AMR SLOT & IDE 16,17

PCI SLOT 18,19

VGA CONNECTOR 20

SUPER I/O 21

AC97 22
B B

POK_DUALSW 23

I/O CONNECTOR 24

FWH 25

DC-DC CONVERTERS 26

PHY_RTL8101L 27

USB 2.0 28

VCORE 29

A MECHANICAL 30 A

NOT

Title : COVER SHEET


ASRock Computer Inc. Engineer: Mars Tseng
Size Project Name Rev
P4I45PE

www.vinafix.vn
Custom 1.01
Date: Wednesday, March 12, 2003 Sheet 1 of 30
5 4 3 2 1
5 4 3 2 1

Max :1.5" ,10mils wide & 10mil spacing

CPUPWRGD
VCORE

PROCHOT#

HDSTBN#3
HDSTBN#2
HDSTBN#1
HDSTBN#0
HGTLREF1

HDSTBP#3
HDSTBP#2
HDSTBP#1
HDSTBP#0

HDEFER#
HDRDY#
HFERR#
HREQ#2
HREQ#1

HDBSY#
HIGNNE#
HREQ#0

HLOCK#

DBR#
HDBI#3
HDBI#2
HDBI#1
R1

IERR#
HINTR

HINIT#

HITM#
HNMI
D 1 2 HGTLREF1 D

HIT#
49.9

1
1%

AD26
AC26
AB23

AA21

AE25
W23

W22
AC3

AA6

G25
R22
P23

K22
E22

K26
K25

V21
P26
F20

F21

L25

1
J23

J26
W5
SOCKET1A R2 CB1 CB2

G4
C3

D1

H2

H5
K5

V6

E5

B2

E3

B6

E2
F3
F6
J4

J1
9 HA20M# HA#3 HDBI#0 100 220P 1U
K2 E21

PROCHOT#
MCERR#
LOCK#
LINT1
LINT0
ITP_CLK1
ITP_CLK0
INIT#
IGNNE#
IERR#
HITM#
HIT#
GTLREF4
GTLREF3
GTLREF2
GTLREF1
FERR#

DRDY#

DEFER#
DBSY#
DBR#
PWRGOOD
REQ#[2]
REQ#[1]
REQ#[0]

DSTBP#[3]
DSTBP#[2]
DSTBP#[1]
DSTBP#[0]
DSTBN#[3]
DSTBN#[2]
DSTBN#[1]
DSTBN#[0]

DBI#[3]
DBI#[2]
DBI#[1]
DP#[3]
DP#[2]
DP#[1]
DP#[0]
4 HADS# HA#4 A#[03] DBI#[0] HD#63 1%
K4 AA24

2
4 HASTB#0 HA#5 A#[04] D#[63] HD#62
L6 AA22

2
4 HASTB#1 HA#6 A#[05] D#[62] HD#61
14 HCLK_CPU K1 A#[06] D#[61] AA25
HA#7 L3 Y21 HD#60
5 HITM# HA#8 A#[07] D#[60] HD#59
M6 Y24

(O)
9 HIGNNE#

(O)
HA#9 A#[08] D#[59] HD#58
9,25 HINIT# L2 A#[09] D#[58] Y23 GND
HA#10 M3 W25 HD#57
9 HINTR A#[10] D#[57]

(O)
HA#11 M4 Y26 HD#56
9 HNMI HA#12 A#[11] D#[56] HD#55
5 HLOCK# N1 A#[12] D#[55] W26
HA#13 M1 V24 HD#54
5 HIT# HA#14 A#[13] D#[54] HD#53
N2 V22 R3 51
4 HDRDY# HA#15 A#[14] D#[53] HD#52 HCOMP0
4 HDEFER# N4 A#[15] D#[52] U21 1 2
HA#16 N5 V25 HD#51
4 HDBSY# HA#17 A#[16] D#[51] HD#50
T1 U23 R4 51
14 HCLK_CPU# HA#18 A#[17] D#[50] HD#49 HCOMP1
4 BNR# R2 A#[18] D#[49] U24 1 2
HA#19 P3 U26 HD#48
HA#20 A#[19] D#[48] HD#47
5,14 BSEL0 P4 A#[20] D#[47] T23
HA#21 R3 T22 HD#46
4 BPRI# HA#22 A#[21] D#[46] HD#45
T2 A#[22] D#[45] T25 GND
HA#23 U1 T26 HD#44
HA#24 A#[23] D#[44] HD#43
P6 A#[24] D#[43] R24
HA#25 U3 R25 HD#42 Placed inside the socket cavity
C 4 HA#[3..31] HA#26 A#[25] D#[42] HD#41 C
T4 A#[26] D#[41] P24
HA#27 V2 R21 HD#40
HA#28 A#[27] D#[40] HD#39
4 HD#[0..58] R6 A#[28] D#[39] N25
HA#29 W1 N26 HD#38 VCORE
HA#30 A#[29] D#[38] HD#37
5 HD#[59..63] T5 A#[30] D#[37] M26
HA#31 U4 N23 HD#36
A#[31] D#[36] HD#35 R5 51
V3 A#[32] D#[35] M24
W2 P21 HD#34 1 2 PREQ#
4 HDBI#[0..3] A#[33] D#[34] HD#33
Y1 A#[34] D#[33] N22
AB1 M23 HD#32
3,5 HREQ#[0..4] HA20M# A#[35] D#[32]

(O) PRDY#
C6 H25 HD#31
HADS# A20M# D#[31] HD#30
5 HDSTBP#[0..3] HASTB#0
G1
L5
ADS#
ADSTB#[0]
D#[30]
D#[29]
K23
J24 HD#29 NEAR CPU
HASTB#1 R5 L22 HD#28
5 HDSTBN#[0..3] ADSTB#[1] D#[28]

L24 COMP[0]
P1 COMP[1]
HD#27
AC6 BPM#[0]
AB5 BPM#[1]
AC4 BPM#[2]
Y6 BPM#[3]
AA5 BPM#[4]
AB4 BPM#[5]
AF23 BCLK[1]

AC1 AP#[0] D#[27] M21


AA3 BINIT#

AD6 BSEL0
AD5 BSEL1

B22 D#[01]
A23 D#[02]
A25 D#[03]
C21 D#[04]
D22 D#[05]
B24 D#[06]
C23 D#[07]
C24 D#[08]
B25 D#[09]
G22 D#[10]
H21 D#[11]
C26 D#[12]
D23 D#[13]
J21 D#[14]
D25 D#[15]
H22 D#[16]
E24 D#[17]
G23 D#[18]
F23 D#[19]
F24 D#[20]
E25 D#[21]
F26 D#[22]
D26 D#[23]
L21 D#[24]
D2 BPRI#
HD#26
G2 BNR#

V5 H6 BR0# H24

B21 D#[0]
HCLK_CPU AF22 AP#[1] D#[26] HD#25
BCLK[0] D#[25] G26

SOCKET478

VCORE VCORE VCORE

CB107 10UF/10V CB108 C CB109 C


VCORE 1 2 1 / 2 1 / 2
BSEL TABLE:
BSEL0 BSEL1 FSB CB110 10UF/10V CB111 C CB112 10UF/10V
HCLK_CPU#

B B
/ 2
HCOMP0
HCOMP1

0 0 100MHz 1 2 1 1 2
HBREQ#0

HD#12
HD#10
HD#11

HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
0 1 133MHz
BNR#

1
PREQ#

CT1 CB113 10UF/10V CB114 10UF/10V CB115 C


BSEL1
BPRI#

1 0 200MHz +
1 2 1 2 1 / 2
1 1 Rsvd
(OD needs pull up to +3V) CAP CB116 C CB117 10UF/10V
FSB / / 2
1 1 2

2
BSEL1 1
BSEL0 2 CB118 10UF/10V CB119 C GND
3 1 2 1 / 2
C1206 for 10U/10V(Y5V)
GND CB120 10UF/10V CB121 10UF/10V
HEADER_1X3P VCORE 1 2 1 / 2
Placed on the socket's Cave
CB122 10UF/10V CB123 10UF/10V
FSB 1 2 1 / 2
R6 62 "ASYNC GTL+ OUTPUT"
1 2 HFERR# 9
1-2 Normal (533/400) GND GND
2-3 Test (800) R7 Do Not
/ Stuff
1 2 IERR# "SYNC GTL+ OUTPUT, NO ON-DIE TERMINATION" Placed near the socket 11/13 Update

R8 Do Not
/ Stuff
1 2 PROCHOT# "SYNC GTL+ OUTPUT, NOT TERMINATED ON PROCESSOR"

R9 51
1 2 NEAR CPU.
HBREQ#0 4

A R10 300 A
1 2 CPUPWRGD
CPUPWRGD 9
"ASYNC GTL+ INPUT, NO ON-DIE TERMINATION"
R11 Do Not
/ Stuff NOT
2 1 DBR#

Title : P4 SOCKET478-1
VeryTek Computer Inc. Engineer: Mars Tseng
Size Project Name Rev
A3 P4I45PE 1.01
Date: Wednesday, March 12, 2003 Sheet 2 of 30
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

5 HRS#[0..2]

21,29 HVID[0..4] VCCIOPLL


2,5 HREQ#[0..4]

4 CPURST# VCCVID VCCA VCORE


9 HSLP#
9 HSMI#
9 HSTPCLK#
21 CPUDXP_VTIN1

5 HTRDY#
D 9 THERMTRIP# D

HVID4
HVID3
HVID2
HVID1
HVID0
VSSA

AD20

AD22
AB14
AB12
AB10

AA26
AA23
AA19
AA17
AA15
AA13
AA11

AE23

W24
W21

M25
M22
AA9
AA7
AA4

AA1

AE1
AE2
AE3
AE4
AE5
D10

AF4

U25
U22

R26
R23

N24
N21
A26
A24
A21
A19
A17
A15
A13
A11

Y25
Y22

V26
V23

P25
P22
F19
F17
F15
F13
F11

T24
T21
W6
W3
SOCKET1B GND SOCKET1C

M5

M2
U5

U2

R4

R1

N6
N3
A9
A3

A5

A4

Y5

Y2

V4

V1

P5

P2
F9

T6
T3

L4
HREQ#3 J3 E8 AB16 L26

VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10
VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
VID4
VID3
VID2
VID1
VID0

VCC85
VCC84
VCC83
VCC82
VCC81
VCC80
VCCVID
VCCSENSE
VCCIOPLL
VCCA

VSSSENSE
VSSA
VSS181
VSS180
VSS179
VSS178
VSS177
VSS176
VSS175
VSS174
VSS173
VSS172
VSS171
VSS170
VSS169
VSS168
VSS167
VSS166
VSS165
VSS164
VSS163
VSS162
VSS161
VSS160
VSS159
VSS158
VSS157
VSS156
VSS155
VSS154
VSS153
VSS152
VSS151
VSS150
VSS149
VSS148
VSS147
VSS146
VSS145
HREQ#4 REQ#[3] VCC79 VSS26 VSS144
H3 REQ#[4] VCC78 E20 AB18 VSS27 VSS143 L23
A22 RESERVED1 VCC77 E18 AB20 VSS28 VSS142 L1
A7 RESERVED2 VCC76 E16 AB21 VSS29 VSS141 K6
AD2 RESERVED3 VCC75 E14 AB24 VSS30 VSS140 K3
AD3 RESERVED4 VCC74 E12 AB3 VSS31 VSS139 K24
AE21 RESERVED5 VCC73 E10 AB6 VSS32 VSS138 K21
AF3 RESERVED6 VCC72 D9 AB8 VSS33 VSS137 J5
AF24 RESERVED7 VCC71 D7 AC11 VSS34 VSS136 J25
AF25 RESERVED8 VCC70 D19 AC13 VSS35 VSS135 J22
CPURST# AB25 D17 AC15 J2
HRS#0 RESET# VCC69 VSS36 VSS134
F1 RS#[0] VCC68 D15 AC17 VSS37 VSS133 H4
HRS#1 G5 D13 AC19 H26
HRS#2 RS#[1] VCC67 VSS38 VSS132
F4 RS#[2] VCC66 D11 AC2 VSS39 VSS131 H23
AB2 RSP# VCC65 C8 AC22 VSS40 VSS130 H1
AF26 SKTOCC# VCC64 C20 AC25 VSS41 VSS129 G6
HSLP# AB26 C18 AC5 G3
HSMI# SLP# VCC63 VSS42 VSS128
B5 SMI# VCC62 C16 AC7 VSS43 VSS127 G24
HSTPCLK# Y4 C14 AC9 G21
TCK STPCLK# VCC61 VSS44 VSS126
D4 TCK VCC60 C12 AD1 VSS45 VSS125 F8
TDI C1 C10 AD10 F5
C TDI VCC59 VSS46 VSS124 C
D5 TDO VCC58 B9 AD12 VSS47 VSS123 F25
TESTHI0 AD24 B7 AD14 F22
TESTHI1 TESTHI0 VCC57 VSS48 VSS122
AA2 TESTHI1 VCC56 B19 AD16 VSS49 VSS121 F2
TESTHI2 AC21 B17 AD18 F18
TESTHI2 VCC55 VSS50 VSS120
AC20 TESTHI3 VCC54 B15 AD21 VSS51 VSS119 F16
AC24 TESTHI4 VCC53 B13 AD23 VSS52 VSS118 F14
AC23 TESTHI5 VCC52 B11 AD4 VSS53 VSS117 F12
TESTHI6 AA20 AF9 AD8 F10
TESTHI6 VCC51 VSS54 VSS116
AB22 TESTHI7 VCC50 AF7 AE11 VSS55 VSS115 E9
TESTHI8 U6 AF5 AE13 E7
TESTHI8 VCC49 VSS56 VSS114
W4 TESTHI9 VCC48 AF21 AE15 VSS57 VSS113 E4
Y3 TESTHI10 VCC47 AF2 AE17 VSS58 VSS112 E26
TESTHI11 A6 AF19 AE19 E23
TESTHI11 VCC46 VSS59 VSS111
AD25 TESTHI12 VCC45 AF17 AE22 VSS60 VSS110 E19
CPUDXP_VTIN1 B3 AF15 AE24 E17
THERMDA VCC44 VSS61 VSS109
C4 THERMDC VCC43 AF13 AE26 VSS62 VSS108 E15
THERMTRIP# A2 AF11 AE7 E13

D21 VSS100
D24 VSS101
D3 VSS102
D6 VSS103
D8 VSS104
AA14 VCC10
AA16 VCC11
AA18 VCC12
AA8 VCC13
AB11 VCC14
AB13 VCC15
AB15 VCC16
AB17 VCC17
AB19 VCC18
AB7 VCC19
AB9 VCC20
AC10VCC21
AC12VCC22
AC14VCC23
AC16VCC24
AC18VCC25
AC8 VCC26
AD11VCC27
AD13VCC28
AD15VCC29
AD17VCC30
AD19VCC31
AD7 VCC32
AD9 VCC33
AE10 VCC34
AE12 VCC35
AE14 VCC36
AE16 VCC37
AE18 VCC38
AE20 VCC39
THERMTRIP# VCC42 VSS63 VSS107
E6 TRST#

AF10 VSS66
AF12 VSS67
AF14 VSS68
AF16 VSS69
AF18 VSS70
AF20 VSS71
AF6 VSS72
AF8 VSS73
B10 VSS74
B12 VSS75
B14 VSS76
B16 VSS77
B18 VSS78
B20 VSS79
B23 VSS80
B26 VSS81
B4 VSS82
B8 VSS83
C11 VSS84
C13 VSS85
C15 VSS86
C17 VSS87
C19 VSS88
C2 VSS89
C22 VSS90
C25 VSS91
C5 VSS92
C7 VSS93
C9 VSS94
D12 VSS95
D14 VSS96
D16 VSS97
D18 VSS98
D20 VSS99
TMS
A10 VCC1
A12 VCC2
A14 VCC3
A16 VCC4
A18 VCC5
A20 VCC6
A8 VCC7
AA10 VCC8
AA12 VCC9

F7 TMS VCC41 AE8 AE9 VSS64 VSS106 E11


HTRDY# J6 AE6 AF1 E1
TRDY# VCC40 VSS65 VSS105
SOCKET478
SOCKET478
GND GND GND

TRST#

GND
B SOCKET1D B

5 post_gnd5 post_gnd36 36
6 post_gnd6 post_gnd35 35
7 post_gnd7 post_gnd34 34
8 post_gnd8 post_gnd33 33
9 post_gnd9 post_gnd32 32
10 post_gnd10 post_gnd31 31
VCORE 11 30
VCORE 9/23 post_gnd11 post_gnd30
12 post_gnd12 post_gnd29 29
13 post_gnd13 post_gnd28 28
1

C1 VCCA VCCIOPLL 14 27
VCCVID VCORE post_gnd14 post_gnd27
15 post_gnd15 post_gnd26 26
R12 51 NEAR CPU. Do Not Stuff L1 L2 16 25
VCORE 1 VCORE post_gnd16 post_gnd25
1 2 CPURST# / 2 1 2 17 24
2

post_gnd17 post_gnd24
18 post_gnd18 post_gnd23 23
1

1.0UH 1.0UH 19 22
C2 TESTHI0 R13 51 post_gnd19 post_gnd22
1 2 20 post_gnd20 post_gnd21 21
1

1
0.1U TESTHI2 R14 1 2 51
R16

post_nc1
post_nc2
post_nc3
post_nc4
Do Not Stuff TESTHI6 R15 1 2 51 C3 C4
2

2 / 1 TDI TESTHI8 R17 1 2 51


TESTHI1 R18 51 10UF/10V 10UF/10V
1 2
2

2
R20 Do Not Stuff GND TESTHI11 R19 1 2 51
1 / 2 TMS SOCKET478
VSSA VSSA

1
2
3
4
GND GND

R21 560 "THESE TWO 1206 10U/10V ARE CT 10U/16V C3528B ORIGINALLY"
TRST# 1 2
A A

R22 Do Not Stuff


TCK 1 / 2
NOT

GND Title : P4 SOCKET478-2


VeryTek Computer Inc. Engineer: Mars Tseng
Size Project Name Rev
A3 P4I45PE 1.01
Date: Wednesday, March 12, 2003 Sheet 3 of 30
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

15 GADSTB0
15 GADSTB#0
15 GADSTB1
15 GADSTB#1

HD#58

HD#56

HD#54
HD#53

HD#47

HD#15
HD#57

HD#55

HD#52
HD#51
HD#50
HD#49
HD#48

HD#46
HD#45
HD#44
HD#43
HD#42
HD#41
HD#40
HD#39
HD#38
HD#37
HD#36
HD#35
HD#34
HD#33
HD#32
HD#31
HD#30
HD#29
HD#28
HD#27
HD#26
HD#25
HD#24
HD#23
HD#22
HD#21
HD#20
HD#19
HD#18
HD#17
HD#16

HD#14
HD#13
HD#12
HD#11
HD#10
2 HADS#

HD#9
15 AGPVREF_CG
14 HCLK_NB#
14 HCLK_NB

M35
M30
G27

G29

G31

G36
G34
2 BNR#

C24

H26

D28
D26

C28

C32

D31

C34
D32

D29
D30
D33
C36

H35
D36

H34

D35

H36
E23
B24
B23

B25

B26

B27

E27
B29
B30
B32
B31

B34

E31

B35
E34
E33

E36

K35

K36
K34
F35

F34
F36

L34
J33
2 BPRI# U1A
2 HBREQ#0 HADS# HD#8
T36 J36

HD_58#
HD_57#
HD_56#
HD_55#
HD_54#
HD_53#
HD_52#
HD_51#
HD_50#
HD_49#
HD_48#
HD_47#
HD_46#
HD_45#
HD_44#
HD_43#
HD_42#
HD_41#
HD_40#
HD_39#
HD_38#
HD_37#
HD_36#
HD_35#
HD_34#
HD_33#
HD_32#
HD_31#
HD_30#
HD_29#
HD_28#
HD_27#
HD_26#
HD_25#
HD_24#
HD_23#
HD_22#
HD_21#
HD_20#
HD_19#
HD_18#
HD_17#
HD_16#
HD_15#
HD_14#
HD_13#
HD_12#
HD_11#
HD_10#
HD_9#
3 CPURST# GRCOMP ADS# HD_8# HD#7
D
2 HDBSY# L2 AGP_RCOMP HD_7# P35 D
AGPVREF_CG W2 L36 HD#6
2 HDEFER# LB AGP_VREF HD_6# HD#5
2 HDRDY# G15 BLUE HD_5# L33
LB# H16 R31 HD#4
BNR# BLUE# HD_4# HD#3
T34 BNR# HD_3# N34
BPRI# M34 R34 HD#2
15 GST[0..2] HBREQ#0 BPRI# HD_2# HD#1
U33 BREQ0# HD_1# R33
CPURST# D22 T30 HD#0
2 HDBI#[0..3] HDBSY# CPURST# HD_0# HCLK_NB
U31 DBSY# HCLKP K30 CAP SHOULD BE CLOSE TO GMCH PIN
DDCCLK D7 J31 HCLK_NB#
2 HD#[0..58] DDCDATA DDCA_CLK HCLKN GTLREF_MCH VCORE R23
C7 DDCA_DATA HCC_VREF P30 GTLREF_MCH 5
HDEFER# N36 AF30 HASTB#1 1 2 GTLREF_MCH
15 GAD[0..31] HDBI#0 DEFER# HADSTB_1# HASTB#0
N33 DINV_0# HADSTB_0# AB35
HDBI#1 C35 AD30 1%
49.9Ohm
15 GC/BE#[0..3] DINV_1# HA_VREF

1
HDBI#2 B33 AG31 HA#31
DINV_2# HA_31#

1
HDBI#3 C26 AG33 HA#30 R24
2 HA#[3..31] HDRDY# DINV_3# HA_30# HA#29 C5
U36 DRDY# HA_29# AH35 100Ohm
48M_VGA D14 AE31 HA#28 0.1U
GAD0 DREFCLK HA_28# HA#27
V4 AG36 12 MIL TRACE, 10 1% X7R

2
GAD1 GAD_0 HA_27# HA#26
V2 AG34

2
GAD2 W4
GAD_1 HA_26#
AF34 HA#25 MIL SPACE
15 GDEVSEL# GAD3 GAD_2 HA_25# HA#24
15 GFRAME# W5 GAD_3 HA_24# AE33 GND GND
GAD4 U5 AF36 HA#23
15 GGNT# GAD5 GAD_4 HA_23# HA#22
15 GIRDY# U4 GAD_5 HA_22# AE36
GAD6 U2 AD34 HA#21
15 GPAR GAD7 GAD_6 HA_21# HA#20
15 GREQ# V3 GAD_7 HA_20# AE34
GAD8 T2 AD35 HA#19
15 GSTOP# GAD9 GAD_8 HA_19# HA#18
15 GTRDY# T3 GAD_9 HA_18# AD36
GAD10 T4 AF35 HA#17
C 2 HASTB#0 GAD11 GAD_10 HA_17# HA#16 R25 C
2 HASTB#1 R2 GAD_11 HA_16# AC31
GAD12 R5 AC36 HA#15 1 2 GRCOMP
GAD13 GAD_12 HA_15# HA#14
R7 GAD_13 HA_14# AB36
GAD14 T8 Y34 HA#13 1%
40.2Ohm
15 GSBSTB GAD15 GAD_14 HA_13# HA#12
15 GSBSTB# P3 GAD_15 HA_12# AB34
GAD16 P8 AC34 HA#11

U7 GADSTB_0#

L7 GADSTB_1#
15 GWBF# GAD_16 HA_11#

N2 GDEVSEL#
V8 GADSTB_0

M8 GADSTB_1
GAD17 HA#10

M4 GFRAME#
K4 AA36 GND

E5 GSBSTB#
R4 GCBE_0#
N4 GCBE_1#
M2 GCBE_2#
H2 GCBE_3#
14 66M_NB GAD_17 HA_10#

F16 GREEN#

P2 GSTOP#
F4 GSBSTB

N5 GTRDY#
GAD18 HA#9

C3 GSBA_0
C2 GSBA_1
D3 GSBA_2
D2 GSBA_3
E4 GSBA_4
E2 GSBA_5
F3 GSBA_6
F2 GSBA_7
L5 GAD_21
L4 GAD_22
H4 GAD_23
G2 GAD_24
K3 GAD_25
J4 GAD_26
J5 GAD_27
J7 GAD_28
H3 GAD_29
K8 GAD_30
G4 GAD_31

N7 GIRDY#
AE7 GCLKIN
K2 Y35

H8 GPIPE#

E15 GREEN

G5 GWBF#
D5 GREQ#
B5 GGNT#

G7 GRBF#
GAD_18 HA_9#

C4 GST_0
B4 GST_1
B3 GST_2

W31 HA_3#
AA33 HA_4#
AB30 HA_5#
V34 HA_6#
GAD19 HA#8

P4 GPAR
J2 GAD_19 HA_8# AC33
GAD20 M3 Y36 HA#7
GAD_20 HA_7#

BROOKDALE-G
15 GSBA[0..7]

GDEVSEL#
GADSTB#0

GADSTB#1

15 GPIPE#

GFRAME#

GSBSTB#
GADSTB0

GADSTB1

GC/BE#0
GC/BE#1
GC/BE#2
GC/BE#3

GTRDY#
GSTOP#
GSBSTB
66M_NB

GIRDY#

GPIPE#

GREQ#
GGNT#

GWBF#
GSBA0
GSBA1
GSBA2
GSBA3
GSBA4
GSBA5
GSBA6
GSBA7
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31

GRBF#
GPAR
15 GRBF#

GST0
GST1
GST2

HA#3
HA#4
HA#5
HA#6
LG#
LG
20 LB
20 LG
20 DDCCLK
20 DDCDATA
14 48M_VGA

B B

LB# LG#
2

2
1

R300 R301
40.2Ohm C257 40.2Ohm C258
/845GE 33P /845GE 33P
/845GE /845GE
2

2
1

Place at the connector side

A A

NOT

Title : 845PE-1
ASRock Computer Inc. Engineer: Mars Tseng
Size Project Name Rev
A3 P4I45PE 1.01
Date: Wednesday, March 12, 2003 Sheet 4 of 30
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

11 RMD0 12,13 BAA0


11 RDQS0 11 RMD1 12,13 BAA1
11 RDQS1 11 RMD2 12,13 CKE0
11 RDQS2 11 RMD3 12,13 CKE1
11 RDQS3 11 RMD4 12,13 CKE2

RDQS6
RDQS5
RDQS4
RDQS3
RDQS2
RDQS1
RDQS0
RMD63
RMD62
RMD61
RMD60
RMD59
RMD58
RMD57
RMD56
RMD55
RMD54
RMD53
RMD52
RMD51
RMD50
RMD49
RMD48
RMD47
RMD46
RMD45
RMD44
RMD43
RMD42
RMD41
RMD40
RMD39
RMD38
RMD37
RMD36
RMD35
RMD34
RMD33
RMD32
RMD31
RMD30
RMD29
RMD28
RMD27
RMD26
RMD25
RMD24
RMD23
RMD22
RMD21
11 RDQS4 11 RMD5 12,13 CKE3
11 RDQS5 11 RMD6
11 RDQS6 11 RMD7
11 RMD8 12,13 SCASA#
11 RMD9

AM35

AM36
AR24

AN36

AR36

AR32

AR28

AR30

AR26

AR22
AR20

AR16

AR14
AR12
AK34
AK35

AP36

AK36

AP34

AP32
AP35

AP30

AP26

AP24
AP22

AP18

AP16

AP14
AT34
AT29

AT17
AT12

AT35

AT33

AT32

AT31
AT30

AT27

AT28

AT25
AT23
AT22
AT26

AT16

AT19
AT18

AT15
AJ36
2 HD#[59..63]

AR2
11 RMD10

AT7
U1B 11 RMD11
HD#59 RMD20 11 RMD12 12,13 CS#0
D C22 AT10 D

SDQS_6
SDQS_5
SDQS_4
SDQS_3
SDQS_2
SDQS_1
SDQS_0
SDQ_63
SDQ_62
SDQ_61
SDQ_60
SDQ_59
SDQ_58
SDQ_57
SDQ_56
SDQ_55
SDQ_54
SDQ_53
SDQ_52
SDQ_51
SDQ_50
SDQ_49
SDQ_48
SDQ_47
SDQ_46
SDQ_45
SDQ_44
SDQ_43
SDQ_42
SDQ_41
SDQ_40
SDQ_39
SDQ_38
SDQ_37
SDQ_36
SDQ_35
SDQ_34
SDQ_33
SDQ_32
SDQ_31
SDQ_30
SDQ_29
SDQ_28
SDQ_27
SDQ_26
SDQ_25
SDQ_24
SDQ_23
SDQ_22
SDQ_21
HD#60 HD_59# SDQ_20 RMD19 11 RMD13 12,13 CS#1
G25 HD_60# SDQ_19 AT14 11 RMD14 12,13 CS#2
HD#61 B22 AT13 RMD18
3 HTRDY# HD#62 HD_61# SDQ_18 RMD17 11 RMD15 12,13 CS#3
D24 HD_62# SDQ_17 AT11 11 RMD16
HD#63 G23 AP10 RMD16
2,3 HREQ#[0..4] HDSTBN#0 HD_63# SDQ_16 RMD15 11 RMD17 12 DDRCLK#0
2 HDSTBP#[0..3] N31 HDSTB_N0# SDQ_15 AP8 11 RMD18 12 DDRCLK#1
HDSTBN#1 G33 AT8 RMD14
2 HDSTBN#[0..3] HDSTBN#2 HDSTB_N1# SDQ_14 RMD13 11 RMD19 12 DDRCLK#2
C30 HDSTB_N2# SDQ_13 AP6 11 RMD20 12 DDRCLK#3
HDSTBN#3 D25 AT6 RMD12
HDSTBP#0 HDSTB_N3# SDQ_12 RMD11 11 RMD21 12 DDRCLK#4
8 HLSTB# L31 HDSTB_P0# SDQ_11 AR10 11 RMD22 12 DDRCLK#5
HDSTBP#1 J34 AT9 RMD10
8 HLSTB HDSTBP#2 HDSTB_P1# SDQ_10 RMD9 11 RMD23 12 DDRCLK0
E29 HDSTB_P2# SDQ_9 AR6 11 RMD24 12 DDRCLK1
HDSTBP#3 E25 AT5 RMD8
GTLREF_MCH HDSTB_P3# SDQ_8 RMD7 11 RMD25 12 DDRCLK2
8 HL[0..10] H30 HDVREF_0 SDQ_7 AT4 11 RMD26 12 DDRCLK3
H24 AR4 RMD6
HDVREF_1 SDQ_6 RMD5 11 RMD27 12 DDRCLK4
4 GTLREF_MCH D27 HDVREF_2 SDQ_5 AP3 11 RMD28 12 DDRCLK5
HL0 AA7 AN2 RMD4
HL1 HI_0 SDQ_4 RMD3 11 RMD29
AB8 HI_1 SDQ_3 AP5 11 RMD30
HL2 AC7 AT3 RMD2
HL3 HI_2 SDQ_2 RMD1 11 RMD31 11 RDQM0
AC5 HI_3 SDQ_1 AP2 11 RMD32 11 RDQM1
HL4 AD8 AN4 RMD0
HL5 HI_4 SDQ_0 RDQM7 11 RMD33 11 RDQM2
AF4 HI_5 SDM_7 AL34 11 RMD34 11 RDQM3
HL6 AE4 AR34 RDQM6
HL7 HI_6 SDM_6 RDQM5 11 RMD35 11 RDQM4
3 HRS#[0..2] AE5 HI_7 SDM_5 AP28 11 RMD36 11 RDQM5
HL8 AF3 AT24 RDQM4
HL9 HI_8 SDM_4 RDQM3 11 RMD37 11 RDQM6
2 HITM# AE2 HI_9 SDM_3 AR18 11 RMD38 11 RDQM7
HL10 AF2 AP12 RDQM2
2 HIT# HLRCOMP AC2 HI_10 SDM_2 RDQM1 11 RMD39
2 HLOCK# HI_RCOMP SDM_1 AR8 11 RMD40
HLSTB# AC4 AP4 RDQM0
C8,15,21,23,25,27 PCIRST_SB#_UBF HLSTB HI_STBF SDM_0 CS#3 11 RMD41 C
AD4 HI_STBS SCS_3# AN31 11 RMD42
HLSWING AD2 AK30 CS#2
HLREF HI_SWING SCS_2# CS#1 11 RMD43 11 RMD56
20 LR AD3 HI_VREF SCS_1# AP31 11 RMD44 11 RMD57
HIT# P36 AL29 CS#0
20 HSYNC HIT# SCS_0# DDRCLK#5 11 RMD45 11 RMD58
HITM# M36 AN34
HLOCK# HITM# SCMDCLK_5# DDRCLK5 11 RMD46 11 RMD59
9,23 PWROK T35 AP33

AK22 SCMDCLK_0#

AP11 SCMDCLK_1#
HREQ#0 HLOCK# SCMDCLK_5 DDRCLK#4 11 RMD47 11 RMD60

AL21 SCMDCLK_0

AN11SCMDCLK_1

AM34SCMDCLK_2
V36 AN9
B28 HX_RCOMP

V35 HY_RCOMP
HREQ_0# H28 HX_SWING SCMDCLK_4# 11 RMD48 11 RMD61
Y30 HY_SWING
HREQ#1 AA31 AP9 DDRCLK4

Y2 MEM_SEL

Y3 PSB_SEL
HREQ_1# SCMDCLK_4 11 RMD49 11 RMD62
V30 HTRDY#

HREQ#2 DDRCLK#3

B16 REFSET

AP13 SCKE_0
AN13SCKE_1
AK14 SCKE_2
AL13 SCKE_3
E7 PWROK
W33 AN21

AJ31 RSTIN#
B7 HSYNC

A37 RSVD0
W7 RSVD1
Y4 RSVD2
Y8 RSVD3
AA2 RSVD4
AA3 RSVD5
AA4 RSVD6
AA5 RSVD7
AB2 RSVD8
AB3 RSVD9

AN29SCAS#
HREQ_2# SCMDCLK_3# 11 RMD50 11 RMD63

AN27SBA_0
AP27 SBA_1
R36 RS_0#
U34 RS_1#
P34 RS_2#
HREQ#3 DDRCLK3

D16 RED#
AA34 AP21

AU36NC10
AU37NC11

C15 RED
HREQ_3# SCMDCLK_3 11 RMD51
A2 NC0
A36 NC1
B1 NC2
B37 NC3
AH34NC4
AJ35 NC5
AT1 NC6
AT37 NC7
AU1 NC8
AU2 NC9
HREQ#4 W35 AL33 DDRCLK#2
HREQ_4# SCMDCLK_2# 11 RMD52
Place at the connector side 11 RMD53
BROOKDALE-G 11 RMD54
LR#
11 RMD55

DDRCLK#0

DDRCLK#1
HXRCOMP

HYRCOMP

DDRCLK0

DDRCLK1

DDRCLK2
2

PCIRST_SB#_UBF
HTRDY#

SCASA#
PSBSEL

REFSET
PWROK
1

HSYNC

R302

HRS#0
HRS#1
HRS#2

CKE0
CKE1
CKE2
CKE3
BAA1
BAA0
40.2Ohm C259

LR#
LR
/845GE 33P
/845GE
2
1

HSWING

CLKVCC
R303
REFSET 1 2

2
B B
137Ohm R26
2.2K
R27
GND
PSBSEL 1 2

1
BSEL0 2,14

1
VDDQ
HLSWING 8

1
R28 8.2KOhm
1

CB3 8.2KOhm
R29 0.01U
226Ohm

2
1%

2
HYSWING VOLTAGE "10 MIL GND
2

TRACE, 7 MIL SPACE" HLSWING GND


1

1
1

CB4 CB5
R30 0.1UF/25V 0.1UF/25V
VCORE VDDQ R31 100Ohm
2

1 2 HLRCOMP 1%
GND GND
1%
68.1Ohm
2
1

HLREF
1

R32
CB6 R33 CB7 CB8
301Ohm 100Ohm 0.1UF/25V 0.1UF/25V
0.01U
1% 1%
2

HSWING
2

R34 GND GND


2

1 2 HXRCOMP
A A
1

GND
R35 1%
24.9Ohm
150Ohm HLREF 10
1

R36 NOT
1% 1 2 HYRCOMP RESISTOR DIVIDER PLUS 1 CAP PLACED AT CB9
0.1UF/25V
2

MIDPOINT OF BUS.
1%
24.9Ohm Title : 845PE-2
2

GND TWO OTHER CAPS PLACED 1 EA AT GMCH


GND AND ICH GND ASRock Computer Inc. Engineer: Mars Tseng
USE 10 MIL TRACE, 7 MIL SPACE Size Project Name Rev
A3 P4I45PE 1.01
Date: Wednesday, March 12, 2003 Sheet 5 of 30
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

VCCM VDDQ L3 +1.5V_FSB


1 2

1
+
120Ohm/100Mhz CE1 CB10
100UF/16V 0.1UF/25V

AM30
AM26
AM22
AM18
AM14
AU17
AU13

AH26
AH22
AH18
AH14
AH12
AH10
AP20
AP15

AK32
AK10
AL37
AL11

AJ27
AJ23
AJ19
AJ15
AJ11

2
AU9
AU5

AH8
AH6
AH4
AH3
AP7

AK8
AK6
AK4
AK3
AK2
AL9
AL7
AL5
AL4
AL3
AL2
AL1

AJ9
AJ7
AJ5
AJ4
AJ3
AJ2
AJ1

2
U1C GND
MAA5 AL17 AH2 GND

VCCSM9
VCCSM8
VCCSM7
VCCSM56
VCCSM55
VCCSM54
VCCSM53
VCCSM52
VCCSM51
VCCSM50
VCCSM49
VCCSM48
VCCSM47
VCCSM46
VCCSM45
VCCSM44
VCCSM43
VCCSM42
VCCSM41
VCCSM40
VCCSM39
VCCSM38
VCCSM37
VCCSM36
VCCSM35
VCCSM34
VCCSM33
VCCSM32
VCCSM31
VCCSM30
VCCSM29
VCCSM28
VCCSM27
VCCSM26
VCCSM25
VCCSM24
VCCSM23
VCCSM22
VCCSM21
VCCSM20
VCCSM19
VCCSM18
VCCSM17
VCCSM16
VCCSM15
VCCSM14
VCCSM13
VCCSM12
VCCSM11
VCCSM10
MAA6 SMAA_5 VCCSM6
AP19 SMAA_6 VCCSM5 AG9
MAA7 AP17 AG7 VCCM L4 VCCMQ
MAA8 SMAA_7 VCCSM4
AN17 SMAA_8 VCCSM3 AD24 1 2

1
D MAA9 AK16 AD22 D
MAA10 SMAA_9 VCCSM2 C6 CB12
AK26 AD20 70Ohm/100Mhz
MAA11 SMAA_10 VCCSM1 VCCMQ 0.1UF/25V
AL15 SMAA_11 VCCSM0 AD18 4.7u
MAA12 AN15 AU21

2
MAB1 SMAA_12 VCCQSM2
AP25 SMAB_1 VCCQSM1 AT21

2
MAB2 AN23 AT20 GND
MAB4 SMAB_2 VCCQSM0 R37
AN19 SMAB_4 VCCHI4 AE3
MAB5 AK18 AD6 VDDQ
SMAB_5 VCCHI3 1Ohm
AD16 SMXRCOMP0 VCCHI2 AC9
SMRCOMP1 AF10 AC1
SMRCOMP2 AJ34 SMXRCOMP1 VCCHI1
AB14

1
SRASA# SMY_RCOMP VCCHI0 +3V
AK28 SRAS# VCCGPIO B6
AL23 SRCVEN_IN# VCCAGP19 AB10 GND
TESTPOINT NET AK24 Y14
SRCVEN_OUT# VCCAGP18

1
SWEA# AP29 W9
SWE# VCCAGP17 CB11
A9 VCC0 VCCAGP16 V14
Trace Length A11 V10 0.1U
VCC1 VCCAGP15
50 mil B9 V6

2
VCC2 VCCAGP14
B10 VCC3 VCCAGP13 T14
VDDQ R304 L33 +1.5V_DPLL VDDQ R305 +1.5V_DAC
B11 VCC4 VCCAGP12 R9 GND
B12 VCC5 VCCAGP11 R1 1 2 1 2 1 2

1
C9 VCC6 VCCAGP10 P10

1
C10 P6 1Ohm 1.0UH 0 CB124 CB125
VCC7 VCCAGP9 +
C11 L9 CB126 CE36 1UF/10V
VCC8 VCCAGP8 0.1UF/25V 1000U 0.01UF/50V
C12 L1

2
VCC9 VCCAGP7
D9 K6

2
VCC10 VCCAGP6
D10 G1 GND GND

2
VCC11 VCCAGP5
D11 VCC12 VCCAGP4 D6
D12 VCC13 VCCAGP3 D4 GND
C E9 C1 C
VCC14 VCCAGP2
E11 VCC15 VCCAGP1 A7
+1.5V_SM

A15 VCCA_DAC0
B14 VCCA_DAC1
F10 A3

A13 VCCA_DPLL
VCC16 VCCAGP0

A17 VCCA_FSB
F12 AG2

AM2 SM_VREF
VCC17 VCCA_SM1
AN25SMAA_1
AP23 SMAA_2
AK20 SMAA_3
AL25 SMAA_0

AL19 SMAA_4
AL36 SDQS_7
G11 AG1
H12 VCC21
H14 VCC22
J11 VCC23
J13 VCC24
J15 VCC25
K10 VCC26
K12 VCC27
K14 VCC28
K16 VCC29
P14 VCC30
P15 VCC31
P16 VCC32
P17 VCC33
P18 VCC34
T16 VCC35
T18 VCC36
T20 VCC37
T22 VCC38
U17 VCC39
U19 VCC40
U21 VCC41
V16 VCC42
V19 VCC43
V22 VCC44
W17 VCC45
W18 VCC46
W19 VCC47

W20 VCC48
W21 VCC49
Y16 VCC50
Y19 VCC51
Y22 VCC52
AA17 VCC53
AA19 VCC54
AA21 VCC55
AB16 VCC56
AB18 VCC57
AB20 VCC58
AB22 VCC59
VCC18 VCCA_SM0
G13 VCC19 VCCA_HI1 AD14
H10 VCC20 VCCA_HI0 AD10

BROOKDALE-G

AG37
AG35
AG29

AD32
AD23
AD21
AD19
AD17
AD15
AC35
AC29
AC24
AC14
AE37
AE35
AE29

AB32
AB28
AB21
AB19
AB17

AA37
AA35
AA29
AA24
AA22
AA20
AA18
AA16
AA14
AF32
AF28
AG5
AG4
AG3

AC3
AE9
AE1

AB6
AB4

AA9
AA1
AF8
AF6

Y32
Y21
Y20
Y18
Y17
Y10
RDQS7
U1D
VDDQ AU25 Y6
DDR_VREF

VSS177
VSS176
VSS175
VSS174
VSS173
VSS172
VSS171
VSS170
VSS169
VSS168
VSS167
VSS166
VSS165
VSS164
VSS163
VSS162
VSS161
VSS160
VSS159
VSS158
VSS157
VSS156
VSS155
VSS154
VSS153
VSS152
VSS151
VSS150
VSS149
VSS148
VSS147
VSS146
VSS145
VSS144
VSS143
VSS142
VSS141
VSS140
VSS139
VSS138
VSS137
VSS136
VSS135
VSS134
VSS133
VSS132
VSS131
VSS130
VSS129
VSS128
VCCM VCCSM57 VSS127
+1.5V_FSB AU29 VCCSM58 VSS126 W36
AU33 VCCSM59 VSS125 W34
MAA1
MAA2
MAA3
MAA0

MAA4

A5 VSS0 VSS124 W29


+1.5V_DAC A21 W24
VSS1 VSS123
A23 VSS2 VSS122 W22
+1.5V_DPLL A25 W16
VSS3 VSS121
11 RDQS7 A27 VSS4 VSS120 W14
A29 VSS5 VSS119 W3
12,13 SWEA# A33 VSS6 VSS118 V32
12,13 SRASA# A35 VSS7 VSS117 V28
B2 VSS8 VSS116 V21
B8 VSS9 VSS115 V20
12,13 MAA0 B13 VSS10 VSS114 V18
12,13 MAA1 B17 VSS11 VSS113 V17
12,13 MAA2 B21 VSS12 VSS112 U37
12,13 MAA3 B36 VSS13 VSS111 U35
B B
12,13 MAA4 R38 , R39 , R40 , R41 Use 56 Ohm (10-003405600) C5 VSS14 VSS110 U29
12,13 MAA5 C8 VSS15 VSS109 U24
12,13 MAA6 C13 VSS16 VSS108 U22
12,13 MAA7 C16 VSS17 VSS107 U20
VCCM R38 C17 U18
12,13 MAA8 SMRCOMP1 VSS18 VSS106
12,13 MAA9 1 2 C21 VSS19 VSS105 U16
12,13 MAA10 C23 VSS20 VSS104 U14
1

60.4Ohm C25 U9
12,13 MAA11 VSS21 VSS103
1

1% R39 C27 U3
12,13 MAA12 CB13 VSS22 VSS102
60.4Ohm C29 VSS23 VSS101 U1
0.1UF/25V C31 T32
1% VSS24 VSS100
C33 T21
2

12,13 MAB1 VSS25 VSS99


C37 T19
2

12,13 MAB2 VSS26 VSS98


12,13 MAB4 D8 VSS27 VSS97 T17
12,13 MAB5 D13 VSS28 VSS96 T10
12 DDR_VREF GND GND D15 VSS29 VSS95 T6
D17 VSS30 VSS94 R35
VCCM R40 D21 R29
SMRCOMP2 VSS31 VSS93
1 2 D23 VSS32 VSS92 R24
D34 VSS33 VSS91 R14
1

60.4Ohm E1 R3
VSS34 VSS90

VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
1

1% R41 E3 P32
CB14 VSS35 VSS89
60.4Ohm E13 VSS36 VSS88 P28
0.1UF/25V
1%

M10
M32
G17
G21
G35

H22
H32

N29
N35
N37
E17
E21
E35
E37

K24
K28
K32

P19
P21
P23
F14
F22
F24
F26
F28
F30
F32
2

L29
L35
J17
J21
J23
J25
J27
J29
J35
J37
BROOKDALE-G

M6
G3
G9

H6

N1
N3
N9
F6
F8

L3
J1
J3
J9
2

A VDDQ L5 +1.5V_SM GND GND A


1 2
1

+ SMRCOMP -> SDR Pull down 20 Ohm 1%


70Ohm/100Mhz CE2 CB15
100UF/16V 0.1UF/25V GND NOT
2
2

GND
GND Title : 845PE-3
ASRock Computer Inc. Engineer: Mars Tseng
Size Project Name Rev
A3 P4I45PE 1.01
Date: Thursday, March 13, 2003 Sheet 6 of 30
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

SYSTEM MEMORY DECOUPLING


U1E VCORE
AH16 VSS178 VTTFSB30 AD28
AH20 AB24 VCCM
VSS179 VTTFSB29
AH24 VSS180 VTTFSB28 Y28

1
AH28 Y24 CB16 CB17 CB18 CB19 CB20 CB21 CB22 CB23
VSS181 VTTFSB27 +
AH30 V24 CE4
VSS182 VTTFSB26 0.1U 0.1U 0.1U 0.1U 0.01U 0.1U 0.1U 0.1U
AH32 VSS183 VTTFSB25 T28
AH36 T24 1000U

2
VSS184 VTTFSB24 /
AJ13 P24

2
VSS185 VTTFSB23
D AJ17
AJ21
VSS186 VTTFSB22 P22
P20
0.1U CAPS ALL ARE X7R GND
D

VSS187 VTTFSB21
AJ25 VSS188 VTTFSB20 M28
AJ29 VSS189 VTTFSB19 K26
AJ33 VSS190 VTTFSB18 K22
AJ37 VSS191 VTTFSB17 K20
AK12 VSS192 VTTFSB16 K18
AL27 J19 VCORE
VSS193 VTTFSB15
AL31 VSS194 VTTFSB14 H20

1
AL35 H18 CB24 CB25 CB26 CB27
VSS195 VTTFSB13
AM3 VSS196 VTTFSB12 G19
AM4 F20 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V
VSS197 VTTFSB11
AM6 F18

2
VSS198 VTTFSB10
AM8 VSS199 VTTFSB9 E19
AM10 VSS200 VTTFSB8 D20
AM12 VSS201 VTTFSB7 D19 GND
AM16 VSS202 VTTFSB6 D18
AM20 VSS203 VTTFSB5 C20
AM24 VSS204 VTTFSB4 C19
AM28 VSS205 VTTFSB3 C18
AM32 VSS206 VTTFSB2 B20
AN1 VSS207 VTTFSB1 B19
AN3 VSS208 VTTFSB0 B18
AN5 AC37 VTT_CAP4 VDDQ
VSS209 VTT_DECAP4

1
AN7 R37 VTT_CAP3 CB31
VSS210 VTT_DECAP3

1
AN33 L37 VTT_CAP2 CB32 CB35 CB36 CB37 CB38 CB39 CB40 CB41 CB42
VSS211 VTT_DECAP2 + +

1
AN35 G37 VTT_CAP1 CB43 0.1U CE5 CB33 CB34 CE6
VSS212 VTT_DECAP1

1
AN37 A31 VTT_CAP0 CB44 0.1U 100U 4.7U 4.7U 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 0.1UF/25V 100U

2
VSS213 VTT_DECAP0 VSYNC 0.1U
AR1 C6

2
VSS214 VSYNC

1
C AR3 C14 CB45 0.1U GND C

2
VSS215 VSSA_DAC1
AR5 B15 GND

2
VSS216 VSSA_DAC0 0.1U
AR7 VSS217 VSS242 AU35 GND GND
AR9 AU31 GND
2
VSS218 VSS241
AR11 VSS219 VSS240 AU27
AR13 VSS220 VSS239 AU23 GND
AR15 VSS221 VSS238 AU15
AR17
AR19
VSS222 VSS237 AU11
AU7
0.1U CAPS ALL ARE X7R
VSS223 VSS236
AR21 VSS224 VSS235 AU3
AR23 VSS225 VSS234 AT36
AR25 VSS226 VSS233 AT2
AR27 VSS227 VSS232 AR37
AR29 VSS228 VSS231 AR35
AR31 VSS229 VSS230 AR33

BROOKDALE-G
GND GND

VSYNC 20

B B

CLIP1 CLIP3
HEATSINK1

8 1
7 2
6 3
5 4
CLIP2 CLIP4
HeatSink

11/11 UPDATE

A A

NOT

Title : 845PE-4
ASRock Computer Inc. Engineer: Mars Tseng
Size Project Name Rev
A3 P4I45PE 1.01
Date: Wednesday, March 12, 2003 Sheet 7 of 30
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

5 HL[0..10] BAT 23 10,21,23 BATT U2B


U2A PDD0 SDD0
21,25 LAD[0..3] AB11 PDD0 SDD0 W17
HL0 L19 H5 AD0 PDD1 AC11 AB17 SDD1
HL1 HI0 AD0 AD1 R42 10MOhm C9 R43 PDD2 PDD1 SDD1 SDD2
18,19,27 AD[0..31] L20 HI1 AD1 J3 Y10 PDD2 SDD2 W16
HL2 M19 H3 AD2 RTCX2 GND RTCX11 2 2 1 1 2 BAT PDD3 AA10 AC16 SDD3
HL3 HI2 AD2 AD3 PDD4 PDD3 SDD3 SDD4
18,19,27 GNT#[0..5] M21 HI3 AD3 K1 AA7 PDD4 SDD4 W15
HL4 P19 G5 AD4 3 X1 1KOhm PDD5 AB8 AB15 SDD5
HI4 AD4 0.047U PDD5 SDD5
HL5 R19 J4 AD5 1 GND 2 PDD6 Y8 W14 SDD6
18,19,27 REQ#[0..5] HI5 AD5 CAP 0.047UF/16V (0603)X7R(473) PDD6 SDD6
HL6 T20 H4 AD6 GND PDD7 AA8 AA14 SDD7
HL7 HI6 AD6 AD7 4 32.768KHZ PDD8 PDD7 SDD7 SDD8
18,19,27 C/BE#[0..3] R20 HI7 AD7 J5 AB9 PDD8 SDD8 Y14
HL8 P23 K2 AD8 PDD9 Y9 AC15 SDD9
HL9 HI8 AD8 AD9 PDD10 PDD9 SDD9 SDD10
L22 HI9 AD9 G2 VBIAS 10 AC9 PDD10 SDD10 AA15
D R44 62Ohm HL10 N22 L1 AD10 PDD11 W9 Y15 SDD11 D
HLPAR_PU HI10 AD10 AD11 PDD12 PDD11 SDD11 SDD12
2 1 K21 HI11 AD11 G4 GND AB10 PDD12 SDD12 AB16
GND L2 AD12 PDD13 W10 Y16 SDD13
HLSTB# AD12 AD13 R45 10MOhm PDD14 PDD13 SDD13 SDD14
N20 HI_STB#/HI_STBF AD13 H2 W11 PDD14 SDD14 AA17
R46 68.1Ohm HLSTB P21 L3 AD14 1 2 PDD15 Y11 Y17 SDD15
1% HI_STB/HI_STBS AD14 AD15 PDD15 SDD15
2 1 R23 HICOMP AD15 F5
VDDQ HLSWING R22 F4 AD16 PDA0 AA13 AA20 SDA0
HI_VSWING AD16 PDA0 SDA0

1
N1 AD17 PDA1 AB13 AC20 SDA1
AD17 AD18 PDA2 PDA1 SDA1 SDA2
Place R as D10 EE_CS AD18 E5 C10 C11 W13 PDA2 SDA2 AC21
D11 N2 AD19
close as A8
EE_DIN AD19
E3 AD20 15P 15P PDCS1# Y13 AB21 SDCS#1

2
EE_DOUT AD20 AD21 17 PDCS1# PDCS3# PDCS1# SDCS1# SDCS#3 SDCS1# 17
possible to C12 EE_SHCLK AD21 N3 17 PDD[0..15] 17 PDCS3# AB14 PDCS3# SDCS3# AC22 SDCS3# 17
E4 AD22 GND GND
ICH4 LAD0 T2
AD22
M5 AD23 PDIORDY AB12 AC19 SDIORDY
LAD1 LAD0/FWH0 AD23 AD24 17 SDD[0..15] 17 PDIORDY PDIOW# PIORDY SIORDY SDIOW# SDIORDY 17
R4 LAD1/FWH1 AD24 E2 17 PDIOW# W12 PDIOW# SDIOW# AA18 SDIOW# 17
LAD2 T4 P1 AD25 PDIOR# AC12 Y18 SDIOR#
LAD3 LAD2/FWH2 AD25 AD26 17 PDA[0..2] 17 PDIOR# PDDACK# PDIOR# SDIOR# SDDACK# SDIOR# 17
U2 LAD3/FWH3 AD26 E1 17 PDDACK# Y12 PDDACK# SDDACK# AB19 SDDACK# 17
LFRAME# T5 P2 AD27 PDDREQ AA11 AB18 SDDREQ
LFRAME#/FWH4 AD27 AD28 17 SDA[0..2] 17 PDDREQ PDDREQ SDDREQ SDDREQ 17
U4 LDRQ1# AD28 D3
LDRQ#0 U3 R1 AD29 C11 C13 ACRST#
LDRQ0# AD29 AD30 LAN_CLK AC_RST# SYNC ACRST# 16,22
AD30 D2 A10 LAN_RXD0 AC_SYNC C9 SYNC 16,22
P4 AD31 A9 B8 BITCLK
AD31 BATT LAN_RXD1 AC_BIT_CLK SDOUT BITCLK 16,22
5 HLSTB# A11 LAN_RXD2 AC_SDOUT D9 SDOUT 16,22
J2 C/BE#0 B10 D13 SDIN0
5 HLSTB C/BE0# C/BE#1 LAN_TXD0 AC_SDIN0 SDIN1 SDIN0 22
5 HLSWING C/BE1# K4 C10 LAN_TXD1 AC_SDIN1 A13 SDIN1 16,22
DEVSEL# M3 M4 C/BE#2 A12 B13
21,25 LFRAME# FRAME# DEVSEL# C/BE2# C/BE#3 LAN_TXD2 AC_SDIN2 R47 8.2K
21 LDRQ#0 F1 FRAME# C/BE3# N4 B11 LAN_RSTSYNC
IRDY# L5 R48 W6 INTRUDER# 1 2
18,19,27 DEVSEL# TRDY# IRDY# REQ#0 BATT INTRUDER# SERIRQ INTRUDER#
18,19,27 FRAME# F2 TRDY# REQ0# B1 1 2 21 SERIRQ J22 SERIRQ SMLINK0 AC3
C STOP# F3 A2 REQ#1 INTA# D5 AB1 C
18,19,27 IRDY# PAR STOP# REQ1# REQ#2 10MOhm 15,18,19,27 INTA# INTB# PIRQA# SMLINK1
18,19,27 TRDY# G1 PAR REQ2# B3 15,18,19,27 INTB# C2 PIRQB# GND
PERR# L4 C7 REQ#3 INTC# B4 T21 66M_SB
18,19,27 STOP# PERR# REQ3# REQ#4 18,19 INTC# INTD# PIRQC# CLK66 48M_SB 66M_SB 14
18,19,27 PAR REQ4# B6 18,19 INTD# A3 PIRQD# CLK48 F19 48M_SB 14
A6 REQ#5 INTE# C8 J23 14M_SB
18,19,27 PERR# SERR# REQB#/REQ5#/GPIO1 GPIO0 19 INTE# INTF# PIRQE#/GPIO2 CLK14 14M_SB 14
18,19,27 SERR# K5 SERR# REQA#/GPIO0 B5 GPIO0 9 19 INTF# D7 PIRQF#/GPIO3
PME# W2 PME# INTG# C3 W7 RTCRST#
18,19,27 PME# PLOCK# GNT#0 19 INTG# INTH# PIRQG#/GPIO4 RTCRST#
18,19 PLOCK# M2 PLOCK# GNT0# C1 19 INTH# C4 PIRQH#/GPIO5
PCIRST_SB#_UBF
U5 PCIRST# E6 GNT#1 IRQ14 AC13
5,15,21,23,25,27 PCIRST_SB#_UBF PCLK_SB GNT1# GNT#2 17 IRQ14 IRQ15 IRQ14 SB_SPKR
14 PCLK_SB P5 PCICLK GNT2# A7 17 IRQ15 AA19 IRQ15 SPKR H23 SB_SPKR 22,23
GPIO24 AC2 CLKRUN#/GPIO24 B7 GNT#3 J19
GNT3# GNT#4 R49 10KOhm APICCLK TP0
GNT4# D6 H19 APICD0 BATLOW#/TP[0] AB2
C5 GNT#5 2 1 K20
GNTB#/GNT5#GPIO17 APICD1
GNTA#/GPIO16 E8 GND SMBALERT#/GPIO11 AA5 SMBALERT#
RTCX2 AC6 AC4 SMBCLK
GND RTCX1 AC7
RTCX2 SMBCLK
AB4 SMBDATA SMBCLK 12,14,21
ICH4 RTCX1 SMBDATA SMBDATA 12,14,21

ICH4

+3VSB

GPIO24 R50 2 1 4.7KOhm


TP0 R51 2 1 4.7KOhm

B B
R52
SMBALERT# 1 2 +3V

22KOhm
1 RN1A
4.7KOhm2
SMBCLK 3 RN1B
4.7KOhm4
SMBDATA 5 RN1C
GPIO25 4.7KOhm6
7 RN1D
BATT 9 GPIO25 4.7KOhm8

R53
1 2 RTCRST#
1

180KOhm
C12 R54
0.1U R
2

/
2

GND

A A

NOT

Title : ICH4-1
ASRock Computer Inc. Engineer: Mars Tseng
Size Project Name Rev
A3 P4I45PE 1.01
Date: Wednesday, March 12, 2003 Sheet 8 of 30
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

D D

U2C
P-0 D20 R3 GPIO7
27 P-0 P+0 USBP0N GPIO7 GPIO8 SDET80P# 17
27 P+0 C20 USBP0P GPIO8 V4
P-1 B21 V5 IOPME#
27 P-1 P+1 USBP1N GPIO12 GPIO13 IOPME# 21
27 P+1 A21 USBP1P GPIO13 W3
P-2 D18 V2 GPIO25
28 P-2 P+2 USBP2N GPIO25 GPIO27 GPIO25 8
28 P+2 C18 USBP2P GPIO27 W1
P-3 B19 W4 GPIO28
28 P-3 P+3 USBP3N GPIO28 GPI0 GPIO28 27
28 P+3 A19 USBP3P GPIO32 J20 GPI0 21
P-4 D16 G22 GPI1
28 P-4 P+4 USBP4N GPIO33 GPI2 GPI1 21
LESS THAN 500 28 P+4 C16 USBP4P GPIO34 F20 GPI2 21
P-5 B17 G20 GPI3
MILS FROM 28 P-5 P+5 A17
USBP5N GPIO35
F21
GPI3 21
28 P+5 USBP5P GPIO36
C ICH4 GPIO37 H20 C
R55 22.6Ohm A23 F23
USBRBIAS USBRBIAS GPIO38
2 1 B23 USBRBIAS# GPIO39 H22
+3V G23
GPIO40
28 OC#01 B15 OC0# GPIO41 H21
C14 OC1# GPIO42 F22
R56 R GND A15 E23
GPIO0 / OC2# GPIO43
8 GPIO0 1 2 B14 OC3#
A14 Y22 A20GATE
28 OC#2 OC4# A20GATE HA20M# A20GATE 21
R57 R D14 AB23
GPIO7 OC5# A20M# HA20M# 2
1 / 2 CPUPWRGD Y23 CPUPWRGD CPUPWRGD 2
R2 U21 HSLP#
17 PDET80P# AGPBUSY#/GPIO6 CPUSLP# HSLP# 3
T3 C3_STAT#/GPIO21 DPSLP# U23
GPIO22 Y20 AA21 HFERR#
CPUPERF#/GPIO22 FERR# HIGNNE# HFERR# 2
V20 DPRSLPVR IGNNE# W21 HIGNNE# 2
R58 8.2K Y5 V22 HINIT#
KBDRST# LAN_RST# INIT# HINTR HINIT# 2,25
1 2 PWRBTN# AA1 AB22
21,23 PWRBTN# PWROK PWRBTN# INTR HNMI HINTR 2
5,23 PWROK AB6 PWROK NMI V21 HNMI 2
RINGIN# Y1 W23 HSMI#
23 RINGIN# RSMRST# AA6 RI# SMI# HSMI# 3
GPIO23 1 8.2K 2 RN2A
23 RSMRST# RSMRST# STPCLK# V23 HSTPCLK# HSTPCLK# 3
GPIO22 3 4 RN2B W18 U22 KBDRST#
8.2K SLP_S3# SLP_S1#/GPIO19 RCIN# KBDRST# 21
A20GATE 5 6 RN2C Y4
8.2K 23 SLP_S3# SLP_S3#
2

VRMPG 7 8 RN2D Y2
8.2K SLP_S5# SLP_S4#
R59 AA2
23 SLP_S5# SLP_S5#
8.2K Y21 STP_PCI#/GPIO18
R60 8.2K W19
GPIO27 GPIO23 STP_CPU#/GPIO20
1 2 25 FWHWP# J21 SSMUXSEL/GPIO23
SUSCLKIN AA4
1

21 SUSCLKIN SUSCLK
AB3 SUS_STAT#/LPCPD#
B SYS_RESET# Y3 B
R61
THERM# SYS_RESET# RSMRST#
21 THERM# V1 THRM# 1 2
THERMTRIP#W20
VRMPG THRMTRIP# 22KOhm
V19 VGATE/VRMPWRGD R62
PWROK 1 2
ICH4
22KOhm

+3VSB
GND
R63 8.2K
GPIO8 1 2 VCORE
21 GPIO8

SYS_RESET# 1 2 RN3A
IOPME# 8.2K
3 4 RN3B R64 51
8.2K
GPIO13 5 6 RN3C 1 2 THERMTRIP#
8.2K THERMTRIP# 3
7 8 RN3D
8.2K

A A

NOT

Title : ICH4-2
ASRock Computer Inc. Engineer: Mars Tseng
Size Project Name Rev
A3 P4I45PE 1.01
Date: Wednesday, March 12, 2003 Sheet 9 of 30
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

+3V +3VSB U2E


U2D
A1 VSS_1 VSS_52 G21
A5 VCC3_3_1 VCCSUS3_3_1 E11 A16 VSS_2 VSS_53 G3
AC17 VCC3_3_2 VCCSUS3_3_2 F10 A18 VSS_3 VSS_54 G6
AC8 VCC3_3_3 VCCSUS3_3_3 F15 A20 VSS_4 VSS_55 H1
B2 VCC3_3_4 VCCSUS3_3_4 F16 A22 VSS_5 VSS_56 J6
H18 F17 A4 K11 VDDQ
VCC3_3_5 VCCSUS3_3_5 VSS_6 VSS_57
H6 VCC3_3_6 VCCSUS3_3_6 F18 AA12 VSS_7 VSS_58 K13 PLACE THIS 1000U
C13 C14 C15
J1 VCC3_3_7 VCCSUS3_3_7 K14 AA16 VSS_8 VSS_59 K19 NEAR TO ICH4
D J18 V7 AA22 K23 +1.5VSB 1 2 1 2 1 2 D
VCC3_3_8 VCCSUS3_3_8 VSS_9 VSS_60

1
K6 VCC3_3_9 VCCSUS3_3_9 V8 AA3 VSS_10 VSS_61 K3 +
M10 V9 AA9 L10 CE7
VCC3_3_10 VCCSUS3_3_10 VSS_11 VSS_62 0.1U 0.1U 0.1U
P12 VCC3_3_11 +1.5VSB AB20 VSS_12 VSS_63 L11 1000U
P6 VCC3_3_12 VCCSUS1_5_1 E12 AB7 VSS_13 VSS_64 L12
U1 E13 AC1 L13

2
VCC3_3_13 VCCSUS1_5_2 VSS_14 VSS_65 C16 C17
V10 VCC3_3_14 VCCSUS1_5_3 E20 AC10 VSS_15 VSS_66 L14
V16 VCC3_3_15 VCCSUS1_5_4 F14 AC14 VSS_16 VSS_67 L21 1 2 1 2
V18 VCC3_3_16 VCCSUS1_5_5 G18 AC18 VSS_17 VSS_68 M1
VDDQ R6 AC23 M11 GND
VCCSUS1_5_6 VSS_18 VSS_69 0.1U GND 0.1U
K10 VCC1_5_1 VCCSUS1_5_7 T6 AC5 VSS_19 VSS_70 M12 GND GND
K12 VCC1_5_2 VCCSUS1_5_8 U6 B12 VSS_20 VSS_71 M13 PLACE WITHIN 40 MILS
K18 VCC1_5_3 B16 VSS_21 VSS_72 M20 OF ICH4
K22 E15 +5VSB B18 M22
VCC1_5_4 V5REF_SUS VSS_22 VSS_73
P10 VCC1_5_5 B20 VSS_23 VSS_74 N10
T18 AB5 BATT B22 N11
VCC1_5_6 VCCRTC BATT 8,21,23 VSS_24 VSS_75 C18
U19 VCC1_5_7 B9 VSS_25 VSS_76 N12
+3VSB C19
V14 VCC1_5_8 VCCPLL C22 VDDQ C15 VSS_26 VSS_77 N13 1 2
C17 N14 BATT 1 2
VSS_27 VSS_78
L23 VCCHI_1 VBIAS Y6 VBIAS 8 C19 VSS_28 VSS_79 N19
M14 C21 N21 0.1U +3V +3V
VCCHI_2 VSS_29 VSS_80 C20 C21
P18 VCCHI_3 HIREF M23 HLREF HLREF 5 C23 VSS_30 VSS_81 N23 0.1U
T22 VCCHI_4 C6 VSS_31 VSS_82 N5 1 2 1 2
C22
V_CPU_IO_2 U18 VCORE D1 VSS_32 VSS_83 P11
C23
E7 V5REF_1 V_CPU_IO_1 P14 D12 VSS_33 VSS_84 P13 1 2
V5REF V6 AA23 D15 P20 VCORE 1 2 0.1U 0.1U
V5REF_2 V_CPU_IO_0 VSS_34 VSS_85
D17 VSS_35 VSS_86 P22
F6 D19 P3 0.1U GND
VCCLAN1_5/VCCSUS1_5_1 VSS_36 VSS_87 0.1U C24 C25
VCCLAN1_5/VCCSUS1_5_2 F7 D21 VSS_37 VSS_88 R18
C E9 D23 R21 1 2 1 2 C
VCCLAN3_3/VCCSUS3_3_1 VSS_38 VSS_89
VCCLAN3_3/VCCSUS3_3_2 F9 D4 VSS_39 VSS_90 R5
C26
D8 VSS_40 VSS_91 T1
D22 T19 +5VSB 1 2 0.1U 0.1U
VSS_41 VSS_92
ICH4 E10 VSS_42 VSS_93 T23
C27 C28
E14 VSS_43 VSS_94 U20
E16 V15 0.1U GND 1 2 1 2
VSS_44 VSS_95
E17 VSS_45 VSS_96 V17
E18 VSS_46 VSS_97 V3
E19 W22 0.1U GND 0.1U GND
VSS_47 VSS_98
E21 VSS_48 VSS_99 W5
E22 VSS_49 VSS_100 W8
VDDQ F8 Y19
VSS_50 VSS_101
G19 VSS_51 VSS_102 Y7
1

ICH4
C29 C30 GND
0.01U 0.1U
CAP 0.1UF/16V (0603) X7R (104)
2

CAP 0.01UF/50V (0603)X7R (103)

GND

B B
+3V D1
1 2 V5REF

1N5817Y

+5V R65 C31


1 2 1 2

R 0.1U GND
/

A A

NOT

Title : ICH4-3
ASRock Computer Inc. Engineer: Mars Tseng
Size Project Name Rev
A3 P4I45PE 1.01
Date: Wednesday, March 12, 2003 Sheet 10 of 30
5 4 3 2 1

www.vinafix.vn
DDR Damping Resistor VTT_DDR

C32 0.1U
2 1

VTT_DDR VTT_DDR C33 0.1U


2 1 VTT_DDR

C34 0.1U C35 0.1U C36 0.1U


2 1 2 1 2 1
RMD3 1 10 2 RN4A MD3
5 RMD3 RMD7 10 RN4B MD7 12,13 MD3 C37 0.1U C38 0.1U C39 0.1U
5 RMD7 3 4 12,13 MD7
RMD6 10 RN4C MD6 C40 0.1U
5 RMD6 5 6 12,13 MD6 2 1 2 1 2 1
RMD2 7 10 8 RN4D MD2 2 1
5 RMD2 12,13 MD2
C41 0.1U C42 0.1U C43 0.1U
RMD1 RN5A MD1 C44 0.1U
5 RMD1 1 10 2 12,13 MD1 2 1 2 1 2 1
RMD5 3 4 RN5B MD5 2 1
5 RMD5 10 MD4 12,13 MD5
RMD4 5 6 RN5C
5 RMD4 10 MD0 12,13 MD4 C45 C46 C47
RMD0 7 8 RN5D 0.1U 0.1U 0.1U
5 RMD0 10 12,13 MD0 C48
2 1 2 1 2 1 0.1U
2 1
RMD13 1 2 RN6A MD13
5 RMD13 10 MD12 12,13 MD13 C49 C50 C51
RMD12 3 4 RN6B 0.1U 0.1U 0.1U
5 RMD12 RMD9 10 12,13 MD12 C52
5 6 RN6C MD9 2 1 2 1 2 1 0.1U
5 RMD9 RMD8 10 MD8 12,13 MD9
7 8 RN6D 2 1
5 RMD8 10 12,13 MD8
C53 0.1U CE8
RMD11 RN7A MD11 C54 0.1U

+
5 RMD11 1 10 2 12,13 MD11 2 1 1 2
RMD10 3 4 RN7B MD10 2 1
5 RMD10 RMD15 10 MD15 12,13 MD10
5 6 RN7C 1000U
5 RMD15 10 MD14 12,13 MD15 C55
RMD14 7 8 RN7D 0.1U
5 RMD14 10 12,13 MD14 CE9 C56
2 1 0.1U

+
1 2 2 1
RMD21 1 2 RN8A MD21
5 RMD21 RMD17 10 MD17 12,13 MD21
3 4 RN8B 1000U
5 RMD17 RMD16 10 MD16 12,13 MD17 C57
5 6 RN8C 0.1U
5 RMD16 RMD20 10 MD20 12,13 MD16
7 8 RN8D 2 1
5 RMD20 10 12,13 MD20

RMD23 1 2 RN9A MD23


5 RMD23 RMD19 10 MD19 12,13 MD23
3 4 RN9B
5 RMD19 RMD22 10 MD22 12,13 MD19
5 6 RN9C
5 RMD22 RMD18 10 MD18 12,13 MD22
7 8 RN9D
5 RMD18 10 12,13 MD18

RMD25 1 2 RN10A MD25


5 RMD25 RMD29 10 MD29 12,13 MD25
3 4 RN10B
5 RMD29 RMD28 10 MD28 12,13 MD29
5 6 RN10C
5 RMD28 RMD24 10 MD24 12,13 MD28
7 8 RN10D
5 RMD24 10 12,13 MD24

RMD31 1 2 RN11A MD31


5 RMD31 RMD27 10 MD27 12,13 MD31
3 4 RN11B
5 RMD27 RMD30 10 MD30 12,13 MD27
5 6 RN11C
5 RMD30 RMD26 10 MD26 12,13 MD30
7 8 RN11D
5 RMD26 10 12,13 MD26

RMD37 1 2 RN12A MD37


5 RMD37 RMD33 10 MD33 12,13 MD37
3 4 RN12B R66 10
5 RMD33 RMD36 10 MD36 12,13 MD33 RDQS0 DQS0
5 6 RN12C 1 2
5 RMD36 RMD32 10 MD32 12,13 MD36 5 RDQS0 12,13 DQS0
7 8 RN12D R67 10
5 RMD32 10 12,13 MD32 RDQS1 DQS1
5 RDQS1 1 2 12,13 DQS1
R68 10
RMD35 1 2 RN13A MD35 RDQS2 1 2 DQS2
5 RMD35 RMD39 10 MD39 12,13 MD35 5 RDQS2 12,13 DQS2
3 4 RN13B R69 10
5 RMD39 RMD38 10 MD38 12,13 MD39 RDQS3 DQS3
5 6 RN13C 1 2
5 RMD38 RMD34 10 MD34 12,13 MD38 5 RDQS3 12,13 DQS3
7 8 RN13D R70 10
5 RMD34 10 12,13 MD34 RDQS4 DQS4
5 RDQS4 1 2 12,13 DQS4
R71 10
RMD41 1 2 RN14A MD41 RDQS5 1 2 DQS5
5 RMD41 RMD45 10 MD45 12,13 MD41 5 RDQS5 12,13 DQS5
3 4 RN14B R72 10
5 RMD45 RMD44 10 MD44 12,13 MD45 RDQS6 DQS6
5 6 RN14C 1 2
5 RMD44 RMD40 10 MD40 12,13 MD44 5 RDQS6 12,13 DQS6
7 8 RN14D R73 10
5 RMD40 10 12,13 MD40 RDQS7 DQS7
6 RDQS7 1 2 12,13 DQS7
RMD47 1 2 RN15A MD47
5 RMD47 RMD43 10 MD43 12,13 MD47
3 4 RN15B R74 10
5 RMD43 RMD46 10 MD46 12,13 MD43 RDQM0 DQM0
5 6 RN15C 1 2
5 RMD46 RMD42 10 MD42 12,13 MD46 5 RDQM0 12,13 DQM0
7 8 RN15D R75 10
5 RMD42 10 12,13 MD42 RDQM1 DQM1
5 RDQM1 1 2 12,13 DQM1
R76 10
RMD53 1 2 RN16A MD53 RDQM2 1 2 DQM2
5 RMD53 RMD52 10 MD52 12,13 MD53 5 RDQM2 12,13 DQM2
3 4 RN16B R77 10
5 RMD52 10 MD49 12,13 MD52 RDQM3 DQM3
RMD49 5 6 RN16C 1 2
5 RMD49 10 MD48 12,13 MD49 5 RDQM3 12,13 DQM3
RMD48 7 8 RN16D R78 10
5 RMD48 10 12,13 MD48 RDQM4 DQM4
5 RDQM4 1 2 12,13 DQM4
R79 10
RMD51 1 2 RN17A MD51 RDQM5 1 2 DQM5
5 RMD51 RMD50 10 MD50 12,13 MD51 5 RDQM5 12,13 DQM5
3 4 RN17B R80 10
5 RMD50 RMD55 10 MD55 12,13 MD50 RDQM6 DQM6
5 6 RN17C 1 2
5 RMD55 RMD54 10 MD54 12,13 MD55 5 RDQM6 12,13 DQM6
7 8 RN17D R81 10
5 RMD54 10 12,13 MD54 RDQM7 DQM7
5 RDQM7 1 2 12,13 DQM7
RMD57 1 2 RN18A MD57
5 RMD57 RMD61 10 MD61 12,13 MD57
3 4 RN18B
5 RMD61 RMD56 10 MD56 12,13 MD61 NOT
5 6 RN18C
5 RMD56 RMD60 10 MD60 12,13 MD56
7 8 RN18D
5 RMD60 10 12,13 MD60
Title : DDR Damping
RMD59 1 2 RN19A MD59
5 RMD59 RMD62 3
10
4 RN19B MD62 12,13 MD59 ASRock Computer Inc. Engineer: Mars Tseng
5 RMD62 RMD58 10 MD58 12,13 MD62
5 6 RN19C Size Project Name Rev
5 RMD58 RMD63 10 MD63 12,13 MD58
7 8 RN19D
5 RMD63 10 12,13 MD63 A3 P4I45PE 1.01
Date: Wednesday, March 12, 2003 Sheet 11 of 30

www.vinafix.vn
11,13 DQS[0..7] 11,13 MD32 11,13 MD0 5,13 BAA0
11,13 MD33 11,13 MD1 5,13 BAA1
11,13 MD34 11,13 MD2 6,13 MAB1
11,13 MD35 11,13 MD3 6,13 SWEA# 6,13 MAB2
6,13 MAA0 11,13 MD36 11,13 MD4 5,13 SCASA# 6,13 MAB4
6,13 MAA1 11,13 MD37 11,13 MD5 6,13 SRASA# 6,13 MAB5
6,13 MAA2 11,13 MD38 11,13 MD6
6,13 MAA3 11,13 MD39 11,13 MD7 5,13 CS#0
6,13 MAA4 11,13 MD40 11,13 MD8 5,13 CS#1 VCCM
6,13 MAA5 11,13 MD41 11,13 MD9 5,13 CS#2
6,13 MAA6 11,13 MD42 11,13 MD10 5,13 CS#3
6,13 MAA7 11,13 MD43 11,13 MD11
6,13 MAA8 11,13 MD44 11,13 MD12 5 DDRCLK0
6,13 MAA9 11,13 MD45 11,13 MD13 5 DDRCLK1
6,13 MAA10 11,13 MD46 11,13 MD14 5 DDRCLK2

1
CB46 CB47 CB48 CB49 CB50 CB51 CB52 CB53 CB54
6,13 MAA11 11,13 MD47 11,13 MD15 5 DDRCLK3 + + + + +
CE10 CE11 CE12 CE13 CE14
6,13 MAA12 11,13 MD48 11,13 MD16 5 DDRCLK4 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
11,13 MD49 11,13 MD17 5 DDRCLK5 1000U 1000U 1000U 1000U 1000U

2
11,13 MD50 11,13 MD18 /

2
11,13 MD51 11,13 MD19 5 DDRCLK#0
11,13 MD52 11,13 MD20 5 DDRCLK#1
11,13 MD53 11,13 MD21 5 DDRCLK#2
11,13 MD54 11,13 MD22 5 DDRCLK#3
11,13 MD55 11,13 MD23 5 DDRCLK#4 GND
11,13 MD56 11,13 MD24 5 DDRCLK#5
11,13 MD57 11,13 MD25 VCCM
11,13 MD58 11,13 MD26 5,13 CKE0
11,13 MD59 11,13 MD27 11,13 DQM0 5,13 CKE1
11,13 MD60 11,13 MD28 11,13 DQM1 5,13 CKE2

2
11,13 MD61 11,13 MD29 11,13 DQM2 5,13 CKE3
11,13 MD62 11,13 MD30 11,13 DQM3 R82
11,13 MD63 11,13 MD31 11,13 DQM4 150
11,13 DQM5 1%
11,13 DQM6

1
11,13 DQM7 DDR_VREF

DDR SLOT1 DDR SLOT2 DDR_VREF 6

1
DDR1A DDR2A R83 C58 C59 C60
MAA0 48 2 MD0 MAA0 48 2 MD0 150 0.1U 0.1U 0.1U
MAA1 A0 DQ0 MD1 MAB1 A0 DQ0 MD1 1%
43 4 43 4

2
MAA2 A1 DQ1 MD2 MAB2 A1 DQ1 MD2 NEAR NB
41 6 41 6

1
MAA3 A2 DQ2 MD3 MAA3 A2 DQ2 MD3
130 A3 DQ3 8 130 A3 DQ3 8
MAA4 37 94 MD4 MAB4 37 94 MD4
MAA5 A4 DQ4 MD5 MAB5 A4 DQ4 MD5 NEAR DDR1 NEAR DDR2
32 A5 DQ5 95 32 A5 DQ5 95
MAA6 125 98 MD6 MAA6 125 98 MD6
MAA7 A6 DQ6 MD7 MAA7 A6 DQ6 MD7
29 A7 DQ7 99 29 A7 DQ7 99
MAA8 122 12 MD8 MAA8 122 12 MD8
MAA9 A8 DQ8 MD9 MAA9 A8 DQ8 MD9
27 A9 DQ9 13 27 A9 DQ9 13
MAA10 141 19 MD10 MAA10 141 19 MD10
MAA11 A10 DQ10 MD11 MAA11 A10 DQ10 MD11
118 A11 DQ11 20 118 A11 DQ11 20
MAA12 115 105 MD12 MAA12 115 105 MD12
A12 DQ12 MD13 A12 DQ12 MD13
103 A13 DQ13 106 103 A13 DQ13 106
109 MD14 VCCM 109 MD14 VCCM
BAA0 DQ14 MD15 BAA0 DQ14 MD15
59 BA0 DQ15 110 59 BA0 DQ15 110
BAA1 52 23 MD16 BAA1 52 23 MD16
BA1 DQ16 MD17 BA1 DQ16 MD17
113 BA2 DQ17 24 113 BA2 DQ17 24
28 MD18 DDR1B 28 MD18 DDR2B
DQ18 MD19 DQ18 MD19
44 CB0 DQ19 31 3 VSS0 VDD0 7 44 CB0 DQ19 31 3 VSS0 VDD0 7
45 114 MD20 11 38 45 114 MD20 11 38
CB1 DQ20 MD21 VSS1 VDD1 CB1 DQ20 MD21 VSS1 VDD1
49 CB2 DQ21 117 18 VSS2 VDD2 46 49 CB2 DQ21 117 18 VSS2 VDD2 46
51 121 MD22 26 70 51 121 MD22 26 70
CB3 DQ22 MD23 VSS3 VDD3 CB3 DQ22 MD23 VSS3 VDD3
134 CB4 DQ23 123 34 VSS4 VDD4 85 134 CB4 DQ23 123 34 VSS4 VDD4 85
135 33 MD24 42 108 135 33 MD24 42 108
CB5 DQ24 MD29 VSS5 VDD5 CB5 DQ24 MD29 VSS5 VDD5
142 CB6 DQ25 35 50 VSS6 VDD6 120 142 CB6 DQ25 35 50 VSS6 VDD6 120
144 39 MD30 58 148 144 39 MD30 58 148
CB7 DQ26 MD27 VSS7 VDD7 CB7 DQ26 MD27 VSS7 VDD7
DQ27 40 66 VSS8 VDD8 168 DQ27 40 66 VSS8 VDD8 168
DDRCLK0 137 126 MD28 74 15 DDRCLK3 137 126 MD28 74 15
DDRCLK#0 CLK0 DQ28 MD25 VSS9 VDDQ9 DDRCLK#3 CLK0 DQ28 MD25 VSS9 VDDQ9
138 CLK#0 DQ29 127 81 VSS10 VDDQ10 22 138 CLK#0 DQ29 127 81 VSS10 VDDQ10 22
DDRCLK1 16 131 MD26 89 30 DDRCLK4 16 131 MD26 89 30
DDRCLK#1 CLK1 DQ30 MD31 VSS11 VDDQ11 DDRCLK#4 CLK1 DQ30 MD31 VSS11 VDDQ11
17 CLK1# DQ31 133 93 VSS12 VDDQ12 54 17 CLK1# DQ31 133 93 VSS12 VDDQ12 54
DDRCLK2 76 53 MD32 100 62 DDRCLK5 76 53 MD32 100 62
DDRCLK#2 CLK2 DQ32 MD33 VSS13 VDDQ13 DDRCLK#5 CLK2 DQ32 MD33 VSS13 VDDQ13
75 CLK2# DQ33 55 116 VSS14 VDDQ14 77 75 CLK2# DQ33 55 116 VSS14 VDDQ14 77
57 MD34 124 96 57 MD34 124 96
CKE0 DQ34 MD35 VSS15 VDDQ15 CKE2 DQ34 MD35 VSS15 VDDQ15
21 CKE0 DQ35 60 132 VSS16 VDDQ16 104 21 CKE0 DQ35 60 132 VSS16 VDDQ16 104
CKE1 111 146 MD36 139 112 CKE3 111 146 MD36 139 112
CKE1 DQ36 MD37 VSS17 VDDQ17 CKE1 DQ36 MD37 VCCM VSS17 VDDQ17
DQ37 147 145 VSS18 VDDQ18 128 DQ37 147 145 VSS18 VDDQ18 128
DQS0 5 150 MD38 152 136 DQS0 5 150 MD38 152 136
DQS1 DQS0 DQ38 MD39 VSS19 VDDQ19 DQS1 DQS0 DQ38 MD39 VSS19 VDDQ19
14 DQS1 DQ39 151 160 VSS20 VDDQ20 143 14 DQS1 DQ39 151 160 VSS20 VDDQ20 143
DQS2 25 61 MD40 176 156 DQS2 25 61 MD40 176 156
DQS3 DQS2 DQ40 MD41 VSS21 VDDQ21 DQS3 DQS2 DQ40 MD41 VSS21 VDDQ21
36 DQS3 DQ41 64 VDDQ22 164 36 DQS3 DQ41 64 VDDQ22 164
DQS4 56 68 MD42 181 172 DQS4 56 68 MD42 181 172
DQS4 DQ42 SA0 VDDQ23 DQS4 DQ42 SA0 VDDQ23

2
DQS5 67 69 MD46 182 180 DQS5 67 69 MD46 182 180
DQS6 DQS5 DQ43 MD44 SA1 VDDQ24 DQS6 DQS5 DQ43 MD44 R84 SA1 VDDQ24
78 DQS6 DQ44 153 183 SA2 78 DQS6 DQ44 153 183 SA2
DQS7 86 155 MD45 157 CS#0 DQS7 86 155 MD45 8.2K 157 CS#2
DQS7 DQ45 MD43 CS0 CS#1 DQS7 DQ45 MD43 CS0 CS#3
47 DQS8 DQ46 161 9 NC0 CS1 158 47 DQS8 DQ46 161 9 NC0 CS1 158
DQM0 97 162 MD47 VCCMP 90 71 DQM0 97 162 MD47 VCCMP 90 71
DQM1 DM0 DQ47 MD48 NC1 CS2 DQM1 DM0 DQ47 MD48 NC1 CS2
107 72 101 163 107 72 101 163

1
DQM2 DM1 DQ48 MD49 NC2 CS3 DQM2 DM1 DQ48 MD49 NC2 CS3
119 DM2 DQ49 73 102 NC3 119 DM2 DQ49 73 102 NC3
DQM3 129 79 MD55 173 91 DQM3 129 79 MD55 173 91 SMBDATA
DQM4 DM3 DQ50 MD51 NC4 SDA SMBDATA 8,14,21DQM4 DM3 DQ50 MD51 NC4 SDA SMBCLK
149 DM4 DQ51 80 SCL 92 SMBCLK 8,14,21DQM5 149 DM4 DQ51 80 SCL 92
DQM5 159 165 MD52 167 159 165 MD52 167
DQM6 DM5 DQ52 MD53 FETEN DQM6 DM5 DQ52 MD53 FETEN
169 DM6 DQ53 166 VDDID 82 169 DM6 DQ53 166 VDDID 82
DQM7 177 170 MD54 DDR_VREF 1 184 DQM7 177 170 MD54 DDR_VREF 1 184
185 Post1
186 Post2
187 Post3

185 Post1
186 Post2
187 Post3
DM7 DQ54 MD50 VREF VDSPD DM7 DQ54 MD50 VREF VDSPD
140 DM8 DQ55 171 140 DM8 DQ55 171
83 MD56 83 MD56
DQ56 DQ56
1

SCASA# 65 84 MD57 184P C61 SCASA# 65 84 MD57 184P


SRASA# CAS DQ57 MD58 SRASA# CAS DQ57 MD58
154 RAS DQ58 87 154 RAS DQ58 87
SWEA# 63 88 MD59 C SWEA# 63 88 MD59
WE DQ59 MD60 / WE DQ59 MD60
174 174
2

DQ60 DQ60
1

10 175 MD61 C62 10 175 MD61


RESET DQ61 MD63 RESET DQ61 MD63
DQ62 178 DQ62 178
179 MD62 C 179 MD62
DQ63 DQ63 NOT
/
2

184P 184P
Title : DDR DIMM 1,2
ASRock Computer Inc. Engineer: MARS_TSENG
Size Project Name Rev
A3 P4I45PE 1.01
Date: Wednesday, March 12, 2003 Sheet 12 of 30

www.vinafix.vn
VTT_DDR VTT_DDR VTT_DDR VTT_DDR VTT_DDR

RP9A RP10B RP11A RP12A RP13A


MD59 1 DQS5 BAA1 DQS2 DQS0
75Ohm 5 2 75Ohm 5 1 75Ohm 5 1 75Ohm 5 1 75Ohm 5
10 RP9B 10 RP10A 10 RP11B 10 RP12B 10 RP13B
MD62 2 DQM5 MAA10 MD21 DQM0
75Ohm 5 1 75Ohm 5 2 75Ohm 5 2 75Ohm 5 2 75Ohm 5
10 RP9C 10 RP10C 10 RP11C 10 RP12C 10 RP13C
MD58 3 CS#1 MAA0 MD17 MD1
75Ohm 5 3 75Ohm 5 3 75Ohm 5 3 75Ohm 5 3 75Ohm 5
10 RP9D 10 RP10E 10 RP11D 10 RP12D 10 RP13D
MD63 4 CS#0 MD31 MAA12 MD5
75Ohm 5 6 75Ohm 5 4 75Ohm 5 4 75Ohm 5 4 75Ohm 5
10 RP9E 10 RP10D 10 RP11E 10 RP12E 10 RP13E
DQS7 6 CS#3 MD27 MD16 MD4
75Ohm 5 4 75Ohm 5 6 75Ohm 5 6 75Ohm 5 6 75Ohm 5
10 RP9F 10 RP10F 10 RP11F 10 RP12F 10 RP13F
DQM7 7 SCASA# MD30 MD20 MD0
75Ohm 5 7 75Ohm 5 7 75Ohm 5 7 75Ohm 5 7 75Ohm 5
10 RP9G 10 RP10G 10 RP11G 10 RP12G 10 RP13G
MD57 8 CS#2 MD26 CKE0
75Ohm 5 8 75Ohm 5 8 75Ohm 5 8 75Ohm 5 8 75Ohm 5
10 RP9H 10 RP10H 10 RP11H 10 RP12H 10 RP13H
MD61 9 MD41 MAA3 CKE2
75Ohm 5 9 75Ohm 5 9 75Ohm 5 9 75Ohm 5 9 75Ohm 5
10 10 10 10 10

VTT_DDR VTT_DDR VTT_DDR VTT_DDR

RP14A RP15A RP16A RP17A


MD56 1 MD45 DQM3 MD11
75Ohm 5 1 75Ohm 5 1 75Ohm 5 1 75Ohm 5
10 RP14B 10 RP15B 10 RP16B 10 RP17B
MD60 2 SWEA# DQS3 CKE1
75Ohm 5 2 75Ohm 5 2 75Ohm 5 2 75Ohm 5
10 RP14C 10 RP15C 10 RP16C 10 RP17C
MD51 3 SRASA# MD25 MD10
75Ohm 5 3 75Ohm 5 3 75Ohm 5 3 75Ohm 5
10 RP14D 10 RP15D 10 RP16D 10 RP17D
MD50 4 MD44 MD29 CKE3 VTT_DDR
75Ohm 5 4 75Ohm 5 4 75Ohm 5 4 75Ohm 5
10 RP14E 10 RP15E 10 RP16E 10 RP17E
MD55 6 MD40 MD28 MD15
75Ohm 5 6 75Ohm 5 6 75Ohm 5 6 75Ohm 5 MAA1
10 RP14F 10 RP15F 10 RP16F 10 RP17F R109 1 2 40.2Ohm
MD54 7 MD35 MAA6 MD14
75Ohm 5 7 75Ohm 5 7 75Ohm 5 7 75Ohm 5
10 RP14G 10 RP15G 10 RP16G 10 RP17G
DQS6 8 MD39 MD24 DQM1 MAB1 R106 1 2 40.2Ohm
75Ohm 5 8 75Ohm 5 8 75Ohm 5 8 75Ohm 5
10 RP14H 10 RP15H 10 RP16H 10 RP17H
DQM6 9 BAA0 MD23 DQS1
75Ohm 5 9 75Ohm 5 9 75Ohm 5 9 75Ohm 5 MAA2
10 10 10 10 R320 1 2 40.2Ohm

MAB2 R321 1 2 40.2Ohm

VTT_DDR VTT_DDR VTT_DDR VTT_DDR


MAA4 R111 1 2 40.2Ohm

RP18A RP19A RP20A RP21A


MD53 1 MD38 MD19 MD13 MAB4 R315 1 2 40.2Ohm
75Ohm 5 1 75Ohm 5 1 75Ohm 5 1 75Ohm 5
10 RP18B 10 RP19B 10 RP20B 10 RP21B
MD52 2 MD34 MAA8 MD12
75Ohm 5 2 75Ohm 5 2 75Ohm 5 2 75Ohm 5 MAA5
10 RP18C 10 RP19C 10 RP20C 10 RP21C R319 1 2 40.2Ohm
MD49 3 DQM4 MD22 MD9
75Ohm 5 3 75Ohm 5 3 75Ohm 5 3 75Ohm 5
10 RP18D 10 RP19D 10 RP20D 10 RP21D
MD48 4 DQS4 MAA7 MD8 MAB5 R95 2 40.2Ohm
75Ohm 5 4 75Ohm 5 4 75Ohm 5 4 75Ohm 5 1
10 RP18E 10 RP19E 10 RP20E 10 RP21E
MD47 6 MD37 MD18 MD3
75Ohm 5 6 75Ohm 5 6 75Ohm 5 6 75Ohm 5
10 RP18F 10 RP19F 10 RP20F 10 RP21F
MD43 7 MD33 DQM2 MD7
75Ohm 5 7 75Ohm 5 7 75Ohm 5 7 75Ohm 5
10 RP18G 10 RP19G 10 RP20G 10 RP21G
MD46 8 MD36 MAA9 MD6
75Ohm 5 8 75Ohm 5 8 75Ohm 5 8 75Ohm 5
10 RP18H 10 RP19H 10 RP20H 10 RP21H
MD42 9 MD32 MAA11 MD2
75Ohm 5 9 75Ohm 5 9 75Ohm 5 9 75Ohm 5
10 10 10 10

5,12 CS#0
6,12 SWEA# 11,12 MD0 11,12 MD32 5,12 CS#1
5,12 SCASA# 11,12 MD1 11,12 MD33 5,12 CS#2
6,12 SRASA# 11,12 MD2 11,12 MD34 5,12 CS#3
11,12 MD3 11,12 MD35 5,12 CKE0
11,12 MD4 11,12 MD36 5,12 CKE1
11,12 DQM0 11,12 MD5 11,12 MD37 5,12 CKE2
11,12 DQM1 11,12 MD6 11,12 MD38 5,12 CKE3
11,12 DQM2 11,12 MD7 11,12 MD39
11,12 DQM3 11,12 MD8 11,12 MD40 6,12 MAA0
11,12 DQM4 11,12 MD9 11,12 MD41 6,12 MAA1
11,12 DQM5 11,12 MD10 11,12 MD42 6,12 MAA2
11,12 DQM6 11,12 MD11 11,12 MD43 6,12 MAA3
11,12 DQM7 11,12 MD12 11,12 MD44 6,12 MAA4
11,12 MD13 11,12 MD45 6,12 MAA5
11,12 MD14 11,12 MD46 6,12 MAA6
6,12 MAB1 11,12 MD15 11,12 MD47 6,12 MAA7
6,12 MAB2 11,12 MD16 11,12 MD48 6,12 MAA8
6,12 MAB4 11,12 MD17 11,12 MD49 6,12 MAA9
6,12 MAB5 11,12 MD18 11,12 MD50 6,12 MAA10
11,12 MD19 11,12 MD51 6,12 MAA11
11,12 MD20 11,12 MD52 6,12 MAA12
11,12 MD21 11,12 MD53
11,12 MD22 11,12 MD54 5,12 BAA0
11,12 MD23 11,12 MD55 5,12 BAA1
11,12 MD24 11,12 MD56 NOT
11,12 MD25 11,12 MD57
11,12
11,12
MD26
MD27
11,12
11,12
MD58
MD59
11,12 DQS[0..7]
Title : DDR TERMINATION
11,12 MD28 11,12 MD60
11,12 MD29 11,12 MD61 ASRock Computer Inc. Engineer: Mars Tseng
11,12 MD30 11,12 MD62 Size Project Name Rev
11,12 MD31 11,12 MD63
A3 P4I45PE 1.01
Date: Wednesday, March 12, 2003 Sheet 13 of 30

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5 4 3 2 1
L6
U3 +3V 1 2 CLKVCC
CLKVCC 1 48 R14M_SB
14M_X1 VDDREF REF/FS2 RHCLK_CPU
2 47 120Ohm/100Mhz
14M_X2 XIN CPUCLKT0 RHCLK_CPU#
3 XOUT CPUCLKC0 46

1
4 GND_1 VDDCPU_1 45
RPCLK_SB 5 44 RHCLK_NB C63 C64 C65 C66 C67 C68 C69 C70 C71 C72 C73 C75
RPCLK_FWH FS0/PCICLK_F1 CPUCLKT1 RHCLK_NB#
6 FS1/PCICLK_F2 CPUCLKC1 43 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
7 42

2
VDDPCI_1 GND_9
8 GND_2 VDDCPU_0 41
RPCLK_LAN 9 40 CLKVCC
D RPCLK_S2
RPCLK_S3
10
11
ENWD/PCICLK0
PCICLK1
CPUCLKT2
CPUCLKC2 39
38
R115 8.2K
1 2 GND
D
RPCLK_S4 PCICLK2 MULTISEL0 R1161
12 PCICLK3 IREFF 37 2 470
13 36 CLKVCC
VDDPCI_2 GND_8 R48M_SB
14 GND_3 48MHZ_USB/FS3 35
15 34 R48M_VGA GND
RPCLK_S5 PCICLK4 48MHZ_DOT
16 PCICLK5 AVDD48 33

2
RPCLK_S1 17 32
PCICLK6 GND_7 BSEL0 R118
18 VDD3V66_0 3V66_0/VCH_CLK/FS4 31
19 GND_4 VDD3V66_1 30 10K
R66M_NB 20 29
R66M_SB 3V66_1 GND_6
21 3V66_2 SCLK 28 SMBCLK 8,12,21
R66M_AGP 22 27

1
3V66_3 SDATA SMBDATA 8,12,21
23 RESET# VTT_PWRGD/PD# 26
24 25 X2
VDDA GND_5 14M_X1 1 2 14M_X2
W83194BR_B GND
3 14.31818MHZ

1
C76 C77
R119 22 R120 49.9 C78 C GND 22P 22P
RHCLK_CPU 1 2 HCLK_CPU 1 2 HCLK_CPU 1 2 /

2
HCLK_CPU 2
R121 22 R122 49.9 C79 C
RHCLK_CPU# 1 2 HCLK_CPU# 1 2 HCLK_CPU# 1 2 / HCLK_CPU# 2
GND
R123 22 R124 49.9 C80 C
RHCLK_NB 1 2 HCLK_NB 1 2 HCLK_NB 1 2 / HCLK_NB 4
+3V
C RHCLK_NB#
R125
1
22
2 HCLK_NB#
R126 49.9
1 2 HCLK_NB#
C81
1
C
2 / HCLK_NB# 4
C

2
R117
GND 8.2K
R127 22 C82 10P C83 C /
R66M_NB 1 2 66M_NB 1 2 66M_NB 1 2 / BSEL0

1
66M_NB 4 BSEL0 2,5
R128 22 C84 10P C85 C
R66M_SB 1 2 66M_SB 1 2 66M_SB 1 2 / 66M_SB 8
R129 R
R130 22 C86 10P C87 C RPCLK_SB 2 / 1
R66M_AGP 1 2 66M_AGP 1 2 66M_AGP 1 2 / 66M_AGP 15
R131 R
FS4 FS3 FS2 FS1 FS0 MHz RPCLK_FWH 2 / 1
GND L L L L L 100 R132 R
R133 22 C88 C C89 R14M_SB /
RPCLK_SB PCLK_SB / 2 PCLK_SB
H L L L L 133 2 1
1 2 1 1 2 / PCLK_SB 8
R134 R
R135 22 C90 C C91 R48M_SB /
2 1
RPCLK_S1 1 2 PCLK_S1 1 / 2 PCLK_S1 1 C 2 / PCLK_S1 18

C
GND
R136 22 C92 C C93 C
RPCLK_FWH 1 2 PCLK_FWH 1 / 2 PCLK_FWH 1 2 / PCLK_FWH 25
B B
GND

C94 C C95 C
PCLK_S5 1 / 2 PCLK_S5 1 2 / PCLK_S5 19
C96 C C97 C
RPCLK_S5 1 2 RN40A PCLK_S4 1 / 2 PCLK_S4 1 2 /
RPCLK_S4 22 PCLK_S4 19
3 4 RN40B R306 22 C260 C C261 C
RPCLK_S3 22 R48M_VGA 48M_VGA 48M_VGA 1
5 6 RN40C C98 C C99 C 1 2 1 / 2 2 / 48M_VGA 4
RPCLK_S2 22 PCLK_S3 1 PCLK_S3
7 8 RN40D / 2 1 2 /
22 PCLK_S3 18
C100 C C101 C
PCLK_S2 1 / 2 PCLK_S2 1 2 / PCLK_S2 18

R137 22 C102C C103 C


RPCLK_LAN 1 2 PCLK_LAN 1 / 2 PCLK_LAN 1 2 / PCLK_LAN 27
GND GND

R138 22 C104C C105 C


1 2 PCLK_SIO 1 / 2 PCLK_SIO 1 2 / PCLK_SIO 21

GND
R139 22 C106 C C107 C
R48M_SB 1 2 48M_SB 1 / 2 48M_SB 2 1 /
A R140 22 C108 C C109 C
48M_SB 8
A
1 2 48M_SIO 1 / 2 48M_SIO 1 2 / 48M_SIO 21
NOT
R141 22 C110 C C111 C
R14M_SB 14M_SB / 2 14M_SB 1 /
1 2 1 2 14M_SB 8
Title : CLOCK
R142 22 C112 C C113 C
14M_AC97 / 2 14M_AC97 2 / Engineer:
1 2 1 1 14M_AC97 22 Asustek Computer INC. Mars Tseng
Size Project Name Rev

GND GND
A3 P4I45PE 1.01
Date: Wednesday, March 12, 2003 Sheet 14 of 30

5 4 3 2 1

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5 4 3 2 1

VDDQ

4 GST[0..2]
VDDQ VDDQ RP1 STUB MAX 500MIL
RP1A
GDEVSEL# 1
4 GSBA[0..7] +5V +3V +3V +12V 8R10Ps 5
10 RP1B
D GSTOP# 2 D
4 GAD[0..31] /8R10Ps 5
AGP1 10 RP1C
4 GC/BE#[0..3] 3 8R10Ps
/ 5
B1 A1 10 RP1D
OVRCNT# +12V GTRDY#
B2 +5V1 TYPEDET# A2 4 /8R10Ps 5
B3 A3 10 RP1E
+5V2 RESERVED1
B4 USB+ USB- A4 6 /8R10Ps 5
B5 A5 10 RP1F
GND10 GND1
8,18,19,27 INTB# B6 INTB# INTA# A6 INTA# 8,18,19,27 7 8R10Ps
/ 5
B7 A7 PCIRST_SB#_UBF 5,8,21,23,25,27 10 RP1G
14 66M_AGP CLK RST# GFRAME#
4 GREQ# B8 REQ# GNT# A8 GGNT# 4 8 /8R10Ps 5
B9 A9 10 RP1H
GST0 VCC3E VCC3A GST1 GIRDY#
B10 ST0 ST1 A10 9 /
8R10Ps 5
GST2 B11 A11 10
ST2 RESERVED2
4 GRBF# B12 RBF# PIPE# A12 GPIPE# 4 /
B13 GND11 GND2 A13
B14 A14 GWBF# 1 2 RN41A
GSBA0 RESERVED6 WBF# GSBA1 GWBF# 4 8.2K
B15 A15 GRBF# 3 4 RN41B
SBA0 SBA1 8.2K
B16 A16 GREQ# 5 6 RN41C
GSBA2 VCC3F VCC3B GSBA3 GPIPE# 8.2K
B17 A17 7 8 RN41D
SBA2 SBA3 8.2K
4 GSBSTB B18 SB_STB SB_STB# A18 GSBSTB# 4
B19 GND12 GND3 A19
GSBA4 B20 A20 GSBA5
GSBA6 SBA4 SBA5 GSBA7 RN42A
B21 SBA6 SBA7 A21 1 8.2K 2
B22 A22 GPERR# 3 4 RN42B
+3VSB RESERVED7 RESERVED3 8.2K
B23 A23 GSERR# 5 6 RN42C
GND13 GND4 8.2K
B24 A24 GPAR 7 8 RN42D
RESERVED8 RESERVED4 8.2K
B25 VCC3G VCC3C A25
GAD31 B26 A26 GAD30 R322 8.2K
GAD29 AD31 AD30 GAD28 GGNT#
B27 AD29 AD28 A27 1 2
C C
B28 VCC3H VCC3D A28
GAD27 B29 A29 GAD26
GAD25 AD27 AD26 GAD24
B30 AD25 AD24 A30
B31 GND14 GND5 A31
B32 A32 VDDQ
4 GADSTB1 GAD23 AD_STB1 AD_STB1# GC/BE#3 GADSTB#1 4
B33 A33 R143 R
AD23 C/BE3# R144 R GSBSTB#
B34 VDDQ1.5F VDDQ1.5A A34 1 / 2
GAD21 B35 A35 GAD22 GSBSTB 1 2
GAD19 AD21 AD22 GAD20 / R145 R
B36 AD19 AD20 A36
B37 A37 R146 R GADSTB#0 1 2
GAD17 GND15 GND6 GAD18 GADSTB0 /
B38 AD17 AD18 A38 1 2
GC/BE#2 B39 A39 GAD16 / R147 R
C/BE#2 AD16 R148 R GADSTB#1 1
B40 VDDQ1.5G VDDQ1.5B A40 2
B41 A41 GADSTB1 1 2 /
4 GIRDY# IRDY# FRAME# GFRAME# 4
/
GND

4 GDEVSEL# B46 DEVSEL# TRDY# A46 GTRDY# 4


B47 VDDQ1.5H STOP# A47 GSTOP# 4
GPERR# B48 A48
PERR# PME#
B49 GND16 GND7 A49
GSERR# B50 A50 VDDQ
GC/BE#1 SERR# PAR GAD15 GPAR 4
B51 C/BE1# AD15 A51
B52 VDDQ1.5I VDDQ1.5C A52
GAD14 B53 A53 GAD13 R277 6.8KOhm
GAD12 AD14 AD13 GAD11 GST0
B54 AD12 AD11 A54 1 2
B55 GND17 GND8 A55
GAD10 B56 A56 GAD9 R278 6.8KOhm
GAD8 AD10 AD9 GC/BE#0 GST1
B57 AD8 C/BE0# A57 1 2
B B
B58 VDDQ1.5J VDDQ1.5D A58
B59 A59 R279 6.8KOhm
4 GADSTB0 GAD7 AD_STB0 AD_STB0# GAD6 GADSTB#0 4 GST2
B60 AD7 AD6 A60 1 2
B61 GND18 GND9 A61
GAD5 B62 A62 GAD4
GAD3 AD5 AD4 GAD2
B63 A63
hold_NC1
hold_NC2
hold_NC3

AD3 AD2
B64 VDDQ1.5K VDDQ1.5E A64
GAD1 B65 A65 GAD0
AGPVREF_CG AD1 AD0
4 AGPVREF_CG B66 RESERVED9 RESERVED5 A66
1
2
3

SLOT_124P
VDDQ GND GND
2

R150
1K
+5V VDDQ
AGPVREF_CG one 1000U for VDDQ between AGP/NB +3V
12

R151
1

1K C114
C115
1

0.1U 0.1U CB55 CB56 CB57 CB58 CB59 CB60 CB61 CB62
A + +
CE15 CE38 A
1

NEAR AGP NEAR MCH C C C C C C C C


/ / / / / 1000U 1000U / / /
2

PLace C133 near AGP


2

slot near AGP Slot NOT


GND C134 near MCH
4 CB for AGP slot
GND GND GND near AGP Slot Title : AGP SLOT
VeryTek Computer Inc. Engineer: Mars Tseng
Size Project Name Rev
Custom P4I45PE
1.01
Date: Wednesday, March 12, 2003 Sheet 15 of 30
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

D
AMR SLOT D

AMR1

B1 AUDIO_MUTE AUDIO_PWRDN A1
B2 GND1 MONO_PHONE A2
B3 MONO_OUT/PC_BEEP RESERVED5 A3
B4 RESERVED1 RESERVED6 A4
B5 RESERVED2 RESERVED7 A5
B6 PRIMARY_DN GND8 A6
B7 -12V +5VDUAL/+5VSB A7
B8 GND2 USB_OC A8
B9 +12V GND9 A9
B10 GND3 USB+ A10
B11 +5VD USB- A11

B12 GND4 GND10 A12


B13 RESERVED3 S/P-DIF_IN A13
C B14 A14 +3VSB C
RESERVED4 GND11
B15 +3.3VD +3.3VDUAL/+3.3VSB A15
B16 GND5 GND12 A16
8,22 SDOUT B17 AC97_SDATA_OUT AC97_SYNC A17 SYNC 8,22
8,22 ACRST# B18 AC97_RESET GND13 A18
B19 AC97_SDATA_IN3 AC97_SDATA_IN1 A19 SDIN1 8,22
B20 GND6 GND14 A20
B21 AC97_SDATA_IN2 AC97_SDATA_IN0 A21
B22 GND7 GND15 A22
B23 AC97_MSTRCLK AC97_BITCLK A23 BITCLK 8,22
1 NC1 NC2 2

46P

B Note: This AMR Slot only support MODEM B

A NOT A

Title : AMR SLOT


ASRock Computer Inc. Engineer: Mars Tseng
Size Project Name Rev
A4
P4I45PE 1.01
Date: Wednesday, March 12, 2003 Sheet 16 of 30
5 4 3 2 1

www.vinafix.vn
IDE1
23 IDERST#

8 PDD[0..15] R275 33 IDE1


8 PDA[0..2] IDERST#
8 PDDREQ 1 2 1 RESET# GND1 2
PDD7 3 4 PDD8
8 PDDACK# DD7 DD8
PDD6 5 6 PDD9
8 IRQ14 DD6 DD9
PDD5 7 8 PDD10
8 PDIOR# DD5 DD10
PDD4 9 10 PDD11
8 PDIORDY DD4 DD11
PDD3 11 12 PDD12
8 PDIOW# DD3 DD12
PDD2 13 14 PDD13
DD2 DD13
PDD1 15 16 PDD14
DD1 DD14
PDD0 17 18 PDD15
DD0 DD15
19 GND2
PDDREQ 21 DMARQ GND3 22
PDIOW# 23 DIOW# GND4 24
PDIOR# 25 DIOR# GND5 26
8 SDD[0..15] PDIORDY R1521
8 SDA[0..2] 27 IORDY CSEL 28 2 470
PDDACK# 29 DMACK# GND6 30
8 SDDACK# IRQ14
8 IRQ15 31 INTRQ NC 32
PDA1 33 34
8 SDIOR# DA1 CABLE_80P# PDET80P# 9
PDA0 35 DA0 DA2 36 PDA2
8 SDIOW# PDCS1# PDCS3#
8 SDIORDY 8 PDCS1# 37 CS0# CS1# 38 PDCS3# 8
IDEACTP# 39 IDEACT# GND7 40
8 SDDREQ
IDE_BLUE

+3V
R153
PDIORDY 1 2 4.7K
SDIORDY 1 2 4.7K

R154

IRQ14
R155 8.2K
1R156 8.2K2
+3V
IDE2
IRQ15 1 2

R276 33 IDE2
IDERST# 1 2 1 RESET# GND1 2
SDD7 3 4 SDD8
DD7 DD8
SDD6 5 DD6 DD9 6 SDD9
SDD5 7 8 SDD10
DD5 DD10
SDD4 9 10 SDD11
DD4 DD11
SDD3 11 12 SDD12
DD3 DD12
SDD2 13 14 SDD13
DD2 DD13
D2 SDD1 15 16 SDD14
DD1 DD14
IDEACTP# 2 1 SDD0 17 18 SDD15
DD0 DD15
19 GND2
SDDREQ 21 DMARQ GND3 22
1N4148W-A2 SDIOW# 23 DIOW# GND4 24
D3 SDIOR# 25 26
DIOR# GND5
IDEACTS# 2 1 SDIORDY 27 28 R1571 2 470
HDLED- 23 IORDY CSEL
SDDACK# 29 DMACK# GND6 30
IRQ15 31 INTRQ NC 32
1N4148W-A2 SDA1 33 34
DA1 CABLE_80P# SDET80P# 9
SDA0 35 DA0 DA2 36 SDA2
SDCS1# 37 38 SDCS3#
8 SDCS1# CS0# CS1# SDCS3# 8
IDEACTS# 39 IDEACT# GND7 40

2X20P_K20
R158 4.7K
1 2 PDET80P#

4.7K NOT
1 2 SDET80P#

R159 Title : IDE 1&2


<OrgName> Engineer: Mars Tseng
Size Project Name Rev
Custom P4I45PE 1.01
Date: Wednesday, March 12, 2003 Sheet 17 of 30

www.vinafix.vn
8,19,27 AD[0..31] 8,15,19,27 INTA# 8,19,27 PME#
8,19,27 C/BE#[0..3] 8,15,19,27 INTB# 19,23 PCIRST_SB#
19 REQ64#S[4..5] 8,19 INTC# 8,19,27 FRAME#
8,19,27 DEVSEL# 8,19 INTD# 8,19,27 TRDY#
8,19,27 IRDY# 8,19,27 SERR# 8,19 PLOCK#
8,19,27 STOP# 8,19,27 PAR 8,19,27 PERR#

8,19,27 REQ#[0..5]

8,19,27 GNT#[0..5]

PCI SLOT1 PCI SLOT2 PCI SLOT3


BCDA CDAB DABC
+3V +5V -12V IDSEL AD20 +12V +5V +3V +3VSB
+3V +5V -12V IDSEL AD21
PCI1
+12V +5V +3V +3VSB +3V +5V -12V IDSEL AD22
PCI2
+12V+5V +3V +3VSB

PCI3
B1 -12V TRST A1 B1 -12V TRST A1
B1 -12V TRST A1 B2 TCK +12V A2 B2 TCK +12V A2
B2 TCK +12V A2 B3 GND11 TMS A3 B3 GND11 TMS A3
B3 GND11 TMS A3 B4 TDO TDI A4 B4 TDO TDI A4
B4 TDO TDI A4 B5 +5V22 +5V1 A5 B5 +5V22 +5V1 A5
B5 A5 B6 A6 INTC# B6 A6 INTD#
+5V22 +5V1 INTB# INTD# +5V23 INTA INTA# INTA# +5V23 INTA INTB#
B6 +5V23 INTA A6 B7 INTB INTC A7 B7 INTB INTC A7
INTC# B7 A7 INTD# INTB# B8 A8 INTC# B8 A8
INTA# INTB INTC INTD +5V2 INTD +5V2
B8 INTD +5V2 A8 B9 PRSNT1 RESERVED1 A9 B9 PRSNT1 RESERVED1 A9
B9 PRSNT1 RESERVED1 A9 B10 RESERVED5 +5V3 A10 B10 RESERVED5 +5V3 A10
B10 RESERVED5 +5V3 A10 B11 PRSNT2 RESERVED2 A11 B11 PRSNT2 RESERVED2 A11
B11 PRSNT2 RESERVED2 A11 B12 GND12 GND1 A12 B12 GND12 GND1 A12
B12 GND12 GND1 A12 B13 GND13 GND2 A13 B13 GND13 GND2 A13
B13 GND13 GND2 A13 B14 RESERVED6 RESERVED3 A14 B14 RESERVED6 RESERVED3 A14
B14 A14 B15 A15 PCIRST_SB# B15 A15 PCIRST_SB#
RESERVED6 RESERVED3 PCIRST_SB# PCLK_S2 GND14 RST PCLK_S3 GND14 RST
B15 GND14 RST A15 14 PCLK_S2 B16 CLK +5V4 A16 14 PCLK_S3 B16 CLK +5V4 A16
PCLK_S1 B16 A16 B17 A17 GNT#1 B17 A17 GNT#2
PCLK_S1 CLK +5V4 GNT#0 REQ#1 GND15 GNT GND15 GNT
B17 A17 B18 A18 REQ#2 B18 A18
REQ#0 GND15 GNT REQ GND3 PME# REQ GND3 PME#
B18 REQ GND3 A18 B19 +5V8 RESERVED4 A19 B19 +5V8 RESERVED4 A19
B19 A19 PME# AD31 B20 A20 AD30 AD31 B20 A20 AD30
AD31 +5V8 RESERVED4 AD30 AD29 AD31 AD30 AD29 AD31 AD30
B20 AD31 AD30 A20 B21 AD29 +3.3V1 A21 B21 AD29 +3.3V1 A21
AD29 B21 A21 B22 A22 AD28 B22 A22 AD28
AD29 +3.3V1 AD28 AD27 GND16 AD28 AD26 AD27 GND16 AD28 AD26
B22 GND16 AD28 A22 B23 AD27 AD26 A23 B23 AD27 AD26 A23
AD27 B23 A23 AD26 AD25 B24 A24 AD25 B24 A24
AD25 AD27 AD26 AD25 GND4 AD24 AD25 GND4 AD24
B24 AD25 GND4 A24 B25 +3.3V7 AD24 A25 B25 +3.3V7 AD24 A25
B25 A25 AD24 C/BE#3 B26 A26 AD21 C/BE#3 B26 A26 AD22
C/BE#3 +3.3V7 AD24 AD20 AD23 C/BE3 IDSEL AD23 C/BE3 IDSEL
B26 C/BE3 IDSEL A26 B27 AD23 +3.3V2 A27 B27 AD23 +3.3V2 A27
AD23 B27 A27 B28 A28 AD22 B28 A28 AD22
AD23 +3.3V2 AD22 AD21 GND17 AD22 AD20 AD21 GND17 AD22 AD20
B28 GND17 AD22 A28 B29 AD21 AD20 A29 B29 AD21 AD20 A29
AD21 B29 A29 AD20 AD19 B30 A30 AD19 B30 A30
AD19 AD21 AD20 AD19 GND5 AD18 AD19 GND5 AD18
B30 AD19 GND5 A30 B31 +3.3V8 AD18 A31 B31 +3.3V8 AD18 A31
B31 A31 AD18 AD17 B32 A32 AD16 AD17 B32 A32 AD16
AD17 +3.3V8 AD18 AD16 C/BE#2 AD17 AD16 C/BE#2 AD17 AD16
B32 AD17 AD16 A32 B33 C/BE2 +3.3V3 A33 B33 C/BE2 +3.3V3 A33
C/BE#2 B33 A33 B34 A34 FRAME# B34 A34 FRAME#
C/BE2 +3.3V3 FRAME# IRDY# GND18 FRAME IRDY# GND18 FRAME
B34 GND18 FRAME A34 B35 IRDY GND6 A35 B35 IRDY GND6 A35
IRDY# B35 A35 B36 A36 TRDY# B36 A36 TRDY#
IRDY GND6 TRDY# DEVSEL# +3.3V9 TRDY DEVSEL# +3.3V9 TRDY
B36 +3.3V9 TRDY A36 B37 DEVSEL GND7 A37 B37 DEVSEL GND7 A37
DEVSEL# B37 A37 B38 A38 STOP# B38 A38 STOP#
DEVSEL GND7 STOP# PLOCK# GND19 STOP PLOCK# GND19 STOP
B38 GND19 STOP A38 B39 LOCK +3.3V4 A39 B39 LOCK +3.3V4 A39
PLOCK# B39 A39 PERR# B40 A40 PERR# B40 A40
PERR# LOCK +3.3V4 PERR SDONE PERR SDONE
B40 PERR SDONE A40 B41 +3.3V10 SBO A41 B41 +3.3V10 SBO A41
B41 A41 SERR# B42 A42 SERR# B42 A42
SERR# +3.3V10 SBO SERR GND8 PAR SERR GND8 PAR
B42 SERR GND8 A42 B43 +3.3V11 PAR A43 B43 +3.3V11 PAR A43
B43 A43 PAR C/BE#1 B44 A44 AD15 C/BE#1 B44 A44 AD15
C/BE#1 +3.3V11 PAR AD15 AD14 C/BE1 AD15 AD14 C/BE1 AD15
B44 C/BE1 AD15 A44 B45 AD14 +3.3V5 A45 B45 AD14 +3.3V5 A45
AD14 B45 A45 B46 A46 AD13 B46 A46 AD13
AD14 +3.3V5 AD13 AD12 GND20 AD13 AD11 AD12 GND20 AD13 AD11
B46 GND20 AD13 A46 B47 AD12 AD11 A47 B47 AD12 AD11 A47
AD12 B47 A47 AD11 AD10 B48 A48 AD10 B48 A48
AD10 AD12 AD11 AD10 GND9 AD9 AD10 GND9 AD9
B48 AD10 GND9 A48 B49 GND21 AD9 A49 B49 GND21 AD9 A49
B49 A49 AD9
GND21 AD9
AD8 B52 A52 C/BE#0 AD8 B52 A52 C/BE#0
AD8 C/BE#0 AD7 AD8 C/BE0 AD7 AD8 C/BE0
B52 AD8 C/BE0 A52 B53 AD7 +3.3V6 A53 B53 AD7 +3.3V6 A53
AD7 B53 A53 B54 A54 AD6 B54 A54 AD6
AD7 +3.3V6 AD6 AD5 +3.3V12 AD6 AD4 AD5 +3.3V12 AD6 AD4
B54 +3.3V12 AD6 A54 B55 AD5 AD4 A55 B55 AD5 AD4 A55
AD5 B55 A55 AD4 AD3 B56 A56 AD3 B56 A56
AD3 AD5 AD4 AD3 GND10 AD2 AD3 GND10 AD2
B56 AD3 GND10 A56 B57 GND22 AD2 A57 B57 GND22 AD2 A57
B57 A57 AD2 AD1 B58 A58 AD0 AD1 B58 A58 AD0
AD1 GND22 AD2 AD0 AD1 AD0 AD1 AD0
B58 A58 B59 A59 B59 A59

hold_NC1

hold_NC2

hold_NC1

hold_NC2
AD1 AD0 +5V9 +5V5 REQ64#S2 +5V9 +5V5 REQ64#S3
B59 A59 B60 A60 B60 A60
hold_NC1

hold_NC2

+5V9 +5V5 REQ64#S1 ACK64 REQ64 ACK64 REQ64


B60 ACK64 REQ64 A60 B61 +5V10 +5V6 A61 B61 +5V10 +5V6 A61
B61 +5V10 +5V6 A61 B62 +5V11 +5V7 A62 B62 +5V11 +5V7 A62
B62 +5V11 +5V7 A62 1

2
1

120P 120P
120P
+3V +3V +3V

RP2A RP4B
REQ#0 1 5 TRDY# 7 5 RP3F REQ64#S1 2 5
2.7K 8.2K 2.7K
10 RP2B 10 10 RP4A
REQ#2 2 5 STOP# 1 5 RP3A REQ64#S2 1 5
2.7K 8.2K 2.7K
10 RP2C 10 10 RP4E
REQ#1 3 5 SERR# 4 5 RP3D REQ64#S3 6 5
2.7K 8.2K 2.7K
10 RP2D 10 10 RP4C
INTC# 4 5 PLOCK# 3 5 RP3C REQ64#S4 3 5
2.7K 8.2K 2.7K
10 RP2E 10 10 RP4D
INTB# 6 5 DEVSEL# 6 5 RP3E REQ64#S5 4 5
2.7K 8.2K 2.7K
10 RP2F 10 10 RP4G NOT
INTD# 7 5 IRDY# 8 5 RP3G REQ#5 8 5
2.7K 8.2K 2.7K
10 RP2G 10 10 RP4H
8,19 REQ#3 8 2.7K 5
10 RP2H
FRAME# 9 8.2K 5
10
RP3H
8,27 REQ#4 9 2.7K 5
10 RP4F
Title : PCI SLOT 1,2,3
INTA# 9 5 PERR# 2 5 RP3B 7 5 Engineer: Mars Tseng
2.7K 8.2K 2.7K <OrgName>
10 10 10
Size Project Name
A3
P4I45PE Rev
1.01
Date: Wednesday, March 12, 2003 Sheet 18 of 30

www.vinafix.vn
8,18,27 AD[0..31] 8,15,18,27 INTA# 8,18,27 PME# 8 INTE#
8,18,27 C/BE#[0..3] 8,15,18,27 INTB# 18,23 PCIRST_SB# 8 INTF#
18 REQ64#S[4..5] 8,18 INTC# 8,18,27 SERR# 8 INTG#
8,18,27 FRAME# 8,18 INTD# 8,18,27 PAR 8 INTH#
8,18,27 DEVSEL# 8,18,27 TRDY# 8,18,27 PERR#
8,18,27 IRDY# 8,18 PLOCK# 8,18,27 STOP#
8,18,27 REQ#[0..5]

8,18,27 GNT#[0..5]

PCI SLOT4 PCI SLOT5


ABCD EFGH
+3V +5V -12V IDSEL AD23 +12V +5V +3V +3VSB
+3V +5V -12V IDSEL AD24
PCI4
+12V +5V +3V +3VSB

PCI5
B1 -12V TRST A1
B1 -12V TRST A1 B2 TCK +12V A2
B2 TCK +12V A2 B3 GND11 TMS A3
B3 GND11 TMS A3 B4 TDO TDI A4
B4 TDO TDI A4 B5 +5V22 +5V1 A5
B5 A5 B6 A6 INTE#
+5V22 +5V1 INTA# INTF# +5V23 INTA INTG#
B6 +5V23 INTA A6 B7 INTB INTC A7
INTB# B7 A7 INTC# INTH# B8 A8
INTD# INTB INTC INTD +5V2
B8 INTD +5V2 A8 B9 PRSNT1 RESERVED1 A9
B9 PRSNT1 RESERVED1 A9 B10 RESERVED5 +5V3 A10
B10 RESERVED5 +5V3 A10 B11 PRSNT2 RESERVED2 A11
B11 PRSNT2 RESERVED2 A11 B12 GND12 GND1 A12
B12 GND12 GND1 A12 B13 GND13 GND2 A13
B13 GND13 GND2 A13 B14 RESERVED6 RESERVED3 A14
B14 A14 B15 A15 PCIRST_SB#
RESERVED6 RESERVED3 PCIRST_SB# GND14 RST
B15 GND14 RST A15 14 PCLK_S5 B16 CLK +5V4 A16
B16 A16 B17 A17 GNT#5
14 PCLK_S4 CLK +5V4 GNT#3 REQ#5 GND15 GNT
B17 GND15 GNT A17 B18 REQ GND3 A18
REQ#3 B18 A18 B19 A19 PME#
REQ GND3 PME# AD31 +5V8 RESERVED4 AD30
B19 +5V8 RESERVED4 A19 B20 AD31 AD30 A20
AD31 B20 A20 AD30 AD29 B21 A21
AD29 AD31 AD30 AD29 +3.3V1 AD28
B21 AD29 +3.3V1 A21 B22 GND16 AD28 A22
B22 A22 AD28 AD27 B23 A23 AD26
AD27 GND16 AD28 AD26 AD25 AD27 AD26
B23 AD27 AD26 A23 B24 AD25 GND4 A24
AD25 B24 A24 B25 A25 AD24
AD25 GND4 AD24 C/BE#3 +3.3V7 AD24 AD24
B25 +3.3V7 AD24 A25 B26 C/BE3 IDSEL A26
C/BE#3 B26 A26 AD23 AD23 B27 A27
AD23 C/BE3 IDSEL AD23 +3.3V2 AD22
B27 AD23 +3.3V2 A27 B28 GND17 AD22 A28
B28 A28 AD22 AD21 B29 A29 AD20
AD21 GND17 AD22 AD20 AD19 AD21 AD20
B29 AD21 AD20 A29 B30 AD19 GND5 A30
AD19 B30 A30 B31 A31 AD18
AD19 GND5 AD18 AD17 +3.3V8 AD18 AD16
B31 +3.3V8 AD18 A31 B32 AD17 AD16 A32
AD17 B32 A32 AD16 C/BE#2 B33 A33
C/BE#2 AD17 AD16 C/BE2 +3.3V3 FRAME#
B33 C/BE2 +3.3V3 A33 B34 GND18 FRAME A34
B34 A34 FRAME# IRDY# B35 A35
IRDY# GND18 FRAME IRDY GND6 TRDY#
B35 IRDY GND6 A35 B36 +3.3V9 TRDY A36
B36 A36 TRDY# DEVSEL# B37 A37
DEVSEL# +3.3V9 TRDY DEVSEL GND7 STOP#
B37 DEVSEL GND7 A37 B38 GND19 STOP A38
B38 A38 STOP# PLOCK# B39 A39
PLOCK# GND19 STOP PERR# LOCK +3.3V4
B39 LOCK +3.3V4 A39 B40 PERR SDONE A40
PERR# B40 A40 B41 A41
PERR SDONE SERR# +3.3V10 SBO
B41 +3.3V10 SBO A41 B42 SERR GND8 A42
SERR# B42 A42 B43 A43 PAR
SERR GND8 PAR C/BE#1 +3.3V11 PAR AD15
B43 +3.3V11 PAR A43 B44 C/BE1 AD15 A44
C/BE#1 B44 A44 AD15 AD14 B45 A45
AD14 C/BE1 AD15 AD14 +3.3V5 AD13
B45 AD14 +3.3V5 A45 B46 GND20 AD13 A46
B46 A46 AD13 AD12 B47 A47 AD11
AD12 GND20 AD13 AD11 AD10 AD12 AD11
B47 AD12 AD11 A47 B48 AD10 GND9 A48
AD10 B48 A48 B49 A49 AD9
AD10 GND9 AD9 GND21 AD9
B49 GND21 AD9 A49

AD8 B52 A52 C/BE#0


AD8 C/BE#0 AD7 AD8 C/BE0
B52 AD8 C/BE0 A52 B53 AD7 +3.3V6 A53
AD7 B53 A53 B54 A54 AD6
AD7 +3.3V6 AD6 AD5 +3.3V12 AD6 AD4
B54 +3.3V12 AD6 A54 B55 AD5 AD4 A55
AD5 B55 A55 AD4 AD3 B56 A56
AD3 AD5 AD4 AD3 GND10 AD2
B56 AD3 GND10 A56 B57 GND22 AD2 A57
B57 A57 AD2 AD1 B58 A58 AD0
AD1 GND22 AD2 AD0 AD1 AD0
B58 A58 B59 A59
hold_NC1

hold_NC2
AD1 AD0 +5V9 +5V5 REQ64#S5
B59 A59 B60 A60
hold_NC1

hold_NC2

+5V9 +5V5 REQ64#S4 ACK64 REQ64


B60 ACK64 REQ64 A60 B61 +5V10 +5V6 A61
B61 +5V10 +5V6 A61 B62 +5V11 +5V7 A62
B62 +5V11 +5V7 A62
1

2
1

PCI5,AD24,INTE#
PCI4,AD23,INTA#
120P
120P
+3VSB
1

+ +3V
1

CE16
C116 NOT
C 1000U
/
2

INTE#
INTF#
RN43A
RN43B
2
4
2.7K 1
3
Title : PCI Slot 4,5
2.7K
INTG#
INTH#
RN43C 6 2.7K 5 <OrgName> Engineer: Mars Tseng
RN43D 8 7
Placed near PCI Slot 2.7K Size Project Name Rev
A3 P4I45PE 1.01
Date: Wednesday, March 12, 2003 Sheet 19 of 30

www.vinafix.vn
5 4 3 2 1

D D

C C

D+5V

1
R298 R299
2.7KOhm 2.7KOhm
/845GE /845GE

2
LR&LG&LB to 75 Ohm Trace
impedance must be 37.5 Ohm L30 60Ohm/100MHz
1 2 /845GE R
5 LR
L31 60Ohm/100MHz VGA1
1 2 /845GE G R 1 2 G
4 LG DDCDATA B
4 DDCDATA 3 4
L32 60Ohm/100MHz 5 6
1 2 /845GE B 7 8
4 LB HSYNC
5 HSYNC IO+5V 9 10
B DDCDATA B
11 12
HSYNC 13 14 VSYNC
VSYNC DDCCLK 15
7 VSYNC
HEADER_2X8P_K16
DDCCLK /845GE
4 DDCCLK

GND
1

1
R307 R308 R309

1
75 75 75 C286 C287 C254 C255 C256
/845GE /845GE /845GE
C C C C C
2

2
/ / / / /

GND

A A

NOT

Title : VGA CONNECTOR


ASRock Computer Inc. Engineer: MARS_TSENG
Size Project Name Rev
A3 P4I45GL 1.01
Date: Wednesday, March 12, 2003 Sheet 20 of 30
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1
JAB1 22
+3V
JBB1 22
JAX 22
R160 2.7K
JBX 22
JBY 22 9 THERM# 1 2
JAY 22 3,29 HVID[0..4]
R161 2.7K
JBB2 22
JAB2 22 8 SERIRQ 1 2
R162 TRMB1
VREF MIDI_OUT 22
1 2 1 2 MIDI_IN 22
10K 10K
LDRQ#0 8
D VTIN2
1%
+5V
D

CPUDXP_VTIN1
CPUDXP_VTIN1 3
R163

JAB1
JBB1

JBB2
JAB2

FANIN_CPU
FANIN_CHA
R164 8.2K

GND
1 2

HVID0
HVID1
HVID2
HVID3
HVID4
JBY

+5V

THERM#

VTIN2
JAX
JBX

JAY

MIDI_OUT
MIDI_IN
KBLOCK# 1 2
30K TRCPU1
1%
CPUDXP_VTIN1 C117
2 1

C U4

128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
104
103
/
GND W83627HF
VCORE +5V

GPSA2/GP17

VID1
VID2
VID3
VID4
GPSA1/P12/GP10
GPSB1/P13/GP11
GPX1/P14/GP12
GPX2/P15/GP13
GPY2/P16/GP14
GPY1/GP15
GPSB2/GP16

MSO/IRQIN0
MSI/GP20

VSS4
FANPWM1
FANPWM2
VCC4
FANIO1
FANIO2
FANIO3
VID0
BEEP

OVT#
VTIN1
VTIN2
24 DENSEL 1 DRVDEN0 VTIN3 102
GPO2 2 101 VREF
DRVDEN1/SMI#/GP27 VREF
24 IDX# 3 INDEX# VCOREA 100
24 MTR#0 4 MOA# VCOREB 99
5 98 +3V
24 DRV#1 DSB# +3.3VIN
24 DRV#0 6 DSA# AVCC 97
7 96 +12VIN
24 MTR#1 MOB# +12VIN
24 DIR# 8 DIR# -12VIN 95
24 STEP# 9 STEP# -5VIN 94
10 93 GND
24 WD# WD# AGND R1651
24 WG# 11 WE# SCL/GP21 92 2 300 SMBCLK 8,12,14
+5V 12 91 R1661 2 300
VCC1 SDA/GP22 GPO0 SMBDATA 8,12,14
24 TRAK0# 13 TRAK0# PLED/GP23 90
C 24
24
WP#
RD#
14
15
WP#
RDATA#
WDTO/GP24
IRRX/GP25
89
88 IRRX
GPO1
C
16 87 IRTX +12VIN
24 HDSEL# HEAD# IRTX/GP26 GND
24 DSKCHG# 17 DSKCHG# VSS3 86
18 85 +3VSB BATT
14 48M_SIO CLKIN RIB# IRRX 24
19 84 R167 R168
9 IOPME# GND PME# DCDB#
20 VSS1 SOUTB 83 IRTX 24 +12V 1 2 1 2
14 PCLK_SIO 21 PCICLK SINB 82
LDRQ#0 22 81 9/23 28K 10K
LDRQ# DTRB#

2
SERIRQ 23 80 1% 1% GND
LAD3 SERIRQ RTSB# R169
24 LAD3 DSRB# 79
LAD2 25 78
8,25 LAD[0..3] LAD1 LAD2 CTSB# +5V 0
26 77 R170
LAD0 LAD1 VCC3
27 LAD0 CASEOPEN# 76 1 2
+3V 28 75 SUSCLKIN R /

1
VCC3V SUSCLKIN
8,25 LFRAME# 29 LFRAME# VBAT 74
30 73 GPO3
5,8,15,23,25,27 PCIRST_SB#_UBF LRESET# SLP_SX#/GP30 GPO4
24 XSLCT 31 SLCT PWRCTL#/GP31 72 SUSCLKIN 9
32 71 GPO5
24 PE PE PWROK/GP32 GPO6
24 BUSY 33 BUSY RSMRST#/GP33 70 8,10,23 BATT
34 69 GPO7
24 ACK# XPD7 ACK# CIRRX/GP34 R171 /
35 PD7 PSIN# 68
XPD6 36 67 2 1
XPD5 PD6 PSOUT# LMSDATA PWRBTN# 9,23 +12V
37 66

SUSLED/GP35
XPD4 PD5 MDAT LMSCLK R R172
38 PD4 MCLK 65
2 1 +5V
KBLOCK#
A20GATE

GPIO8 9 CPU_FAN1 R173


SOUTA

DCDA#
DSRA#

KBRST
DTRA#
CTSA#

RTSA#

FANIN_CPU
SLIN#

0
ERR#

VCC2

KDAT
KCLK

1 1 2
AFD#

VSS2
STB#

SENSE
INIT#

SINA

RIA#

VSB
PD3
PD2
PD1
PD0

+12V
2
8.2K
B 3 4
B

1
GND NC C118 CB63
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64

3 PIN
GND C C
24 XPD[0..7]
/ /

2
24 PE
KBLOCK#

LKBDATA
KBDRST#
A20GATE
ERROR#

24 BUSY PLED+ 23
LKBCLK
XSLIN#

XAFD#

DSR#1

DTR#1

DCD#1
XINIT#

+5VSB
XSTB#

CTS#1

RTS#1

24 ACK#
XPD3
XPD2
XPD1
XPD0

RXD1
TXD1

GND
GND

RI#1

GND
+5V

24 ERROR# +5V +5VSB


24 XSLIN#
24 XINIT# +12V
24 XAFD#
24 XSTB#

1
C119
24 XSLCT +5V

1
C120 C121 C122 C123
0.1U CHA_FAN1 R174
24 DCD#1 FANIN_CHA
C 0.1U 0.1U 0.1U 1 1 2

2
SENSE
24 DSR#1
/ 2

2
+12V
24 RXD1

1
3 4 CB64 8.2K
24 RTS#1

1
C124
EASY IO
GND NC
24 TXD1 Super IO +12V +5V +3V 3 PIN C
24 CTS#1
GND GND C /

2
24 DTR#1
EASY_IO1 GND /

2
24 RI#1 GPO0 -> GP23
GPI0 1 2 ICH4
GPO1 -> GP24 GPI1 3 4
GPO2 -> GP27 GPI2 GND GND
5 6 GPI0 -> GPIO32
GPO3 -> GP30 GPO0 7 8 GPI3
GPO1 GPO4 GPI1 -> GPIO33
GPO4 -> GP31 9 10
GPO2 GPO5 GPI2 -> GPIO34
GPO5 -> GP32 11 12
GPO3 13 14 GPO6 GPI3 -> GPIO35
GPO6 -> GP33 GPO7
15 16
A GPO7 -> GP34
HEADER_2X8P
A
9 A20GATE GND NOT

9 KBDRST# GPI0
GPI1
9
9 Title : SIO W83627HF-AW
24 LKBDATA GPI2 9
24 LKBCLK GPI3 9 ASRock Computer Inc. Engineer: Mars Tseng
24 LMSDATA Size Project Name Rev
24 LMSCLK
A3 P4I45PE 1.01
Date: Wednesday, March 12, 2003 Sheet 21 of 30

5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

+5V

Note : L34
8,16 SYNC +5VA 2 1
AGND_A 透過 ( 與 Copper 8,16 BITCLK
0 R0805
Hole ) 切割與 GND 連接.
8,16 SDOUT
R175 +5VA
1 2 AGND_A
8,16 ACRST#

CCENTER
XTLSEL

CBASE
R /

1
8,16 SDIN1 3 8.2K 4 RN44B
CB65 1 2 RN44A
X3 8 SDIN0 /8.2K
0.1U
D 1 2 D
ACXI ACXO R176

2
1 2 near AMR

48
47
46
45
44
43
42
41
40
39
38
37
GND
3 CRYSTAL_1GND 14 14M_AC97 +3V U5 AGND_A
1

1
C125 /9738 ALC201 C126 0 GND

SPDIFO

XTLSEL
GPIO0

AVss2

NC6
S_OUT_L
AVdd2
NC5
EAPD/SPDIF IN

LFE_OUT
CENTER_OUT

S_OUT_R
/9739 For 14.318MHz
C C C127
/9738 AL201A /9738 AL201 1 36 LINE_OUT_R C
2

2 DVdd1 LINE_OUT_R
ACXI 2 35 LINE_OUT_L /
ACXO XTL_IN LINE_OUT_L CX3D
3 XTL_OUT NC4 34 1 2
4 33 RX3D +5VA
R177 SDOUT DVss1 NC3
GND 5 SDATA_OUT HP_OUT_R 32
BITCLK 1 2 RBITCLK 6 31 AUDIO1
BIT_CLK HP_OUT_L XTALS1 MIC1
7 DVss2 AFILT2 30 1 2
22 SDIN0 8 29 XTALS0 CE17 100U MICPWR 3 4
SDATA_IN AFILT1
1

VREFOUT ALC200: 1uF LINE_OUT_R LOUT_R BLOUT_R

+
9 DVdd2 Vrefout 28 1 2 5 6
C128 SYNC 10 27 AVREF ALC201: None 7
ACRST# SYNC Vref LINE_OUT_L LOUT_L BLOUT_L

+
C 11 RESET# AVss1 26 1 2 9 10

1
PCBEEP

LINE_IN_R
/ C129 C130 C131 C132 C133 C134 C135

LINE_IN_L
12 25
2

PC_BEEP AVdd1

CD_GND
+5VA CE18 100U HD_2X5P_K8

PHONE

AUX_R
AUX_L
1
0.1U 1U 1000P 1000P C C C

CD_R
CD_L

MIC1
MIC2
NC1
NC2
CB66 / AGND_A

2
0.1U
GND CMI9739 /ALC201 /ALC201 When front panel isn't installed or for some

13
14
15
16
17
18
19
20
21
22
23
24
chassis, the jumper must be added on JR1,JL1.

1
AGND_A Otherwise, the backpanel can't use
GND CB67

LINE_IN_L
LINE_IN_R
VREFOUT

CD_GND
0.1U

AUX_L
AUX_R

CMIC1

2
CD_R
CD_L
+3V JR_JL1
R178 R179 LOUT_R
1
1 2 XTLSEL AGND_A 1 2 2 BLOUT_R Pin 1,2 => JR1
+5VA LOUT_L
3 Pin 3,4 => JL1
R /9739 For 24.576MHz R 4 BLOUT_L
C R180 R /ALC201 C

1
R181 2 /ALC201
1 PCBEEP1 2 1 PCBEEP IO+5V HEADER_1X4P
8,23 SB_SPKR
1 2 C137

2
1U C136 11/13 UPdate

1
8.2K /9739 For 14.318MHz R182 C138 C

2
GND MIC1 R C /ALC201 CB68 C
/ALC201 /ALC201 1 2 / C139 0.01U
JAX 2 1

2
XTALS0 XTALS1 PIN2.XIN

1
0 0 12.288MHz CB69 C GND C140 0.01U
0 1 14MHz 1 2 / JBX 2 1
BLOUT_L 1 2 LINE_OUT_LT AGND_A
1 x 14.318MHz
R183 100 C141 0.01U
D+5V AGND_A JBY 2 1
+3V
R184 C142 0.01U
1 2 XTALS0 BLOUT_R 1 2 LINE_OUT_RT JAY 2 1
R185 100 CB70 C
8.2K /9739 For 14.318MHz D+5V +5V 1 2 /

1
C143 C144
R186 D4 AGND_A
2 1 C C 2 1 D+5V GND
/ / C145 0.01U

2
47K JAB1 2 1
/ 1N5817
AGND_A CE19 F1 C146 0.01U
AGND_A JBB1
+

1 2 1 2 IO+5V 2 1
/
JUMPER_WIRE C147 0.01U

2
2

2
4
6
8
ALC201=0.33U/9738=104P 100U JBB2 2 1
C148 0.1U AUX1 C149 L8 R187 R188 RN45A 4R8Ps
AUX_R 2 1 AUXR 4 AUX R LINE_IN_R 2 1 LIN_R 1 2 LINE_IN_RT 8.2K R RN45B 4R8Ps
/ C150 0.01U
GND2
3 / RN45C 4R8Ps
/ JAB2 2 1
B C151 0.1U GND1
2 1U 120Ohm/1 00Mhz RN45D 4R8Ps
/ B
AUX_L 2 1 AUXL 1 IO+5V /

1
1
AUX L C152 L9

1
3
5
7
ALC201=0.33U/9738=104P WAFER_4P AGND_A LINE_IN_L LIN_L LINE_IN_LT GAME_AUDIO1
2 1 1 2
SIDE_G31 31 AGND_A
1U 120Ohm/1 00Mhz LINE_OUT_RT 16 LINE OUT R
1

1 17 NC1 VCC1 1
CE20
18 NC2 VCC3 9
RN46A C153 C154 LINE_OUT_LT
+

1 4R8Ps 2 1 2 19 JAB1 2 JAB1 21


3 4 RN46B / 270P 270P 20 LINE OUT L 10
2

/4R8Ps JBB1 JBB1 21


5 6 RN46C / / AGND 3
/4R8Ps LINE_IN_RT
JAX
7 8 RN46D R189 100U 21 LINE IN R 11 RN47A 2 1
4R8Ps
/ JBX 2.7K JAX 21
R190 2 1 22 AGND1 4 RN47B 4 3
/ GND1 2.7K JBX 21
1 2 23 AGND2 12 RN47C 6 5
LINE_IN_LT
MSO 2.7K JBY 21
AGND_A 47K 24 5 RN47D 8 7
GND2 2.7K JAY 21
R AGND_A / AGND_A 25 LINE IN L
JBY 13
ALC201=0.33U/9738=104P / AGND3
JAY 6
C156 0.1U CD1 AGND_A MICPWR 26 MIC PWR 14
CD_R
JBB2 JBB2 21
2 1 CDR 4 CD R R191 47Ohm 27 NC3 JAB2 7 JAB2 21
C155
GND2 3 CDG C157 1 2 28 AGND4 MSI 15 1 2 MIDI_IN 21
C158 0.1U GND1 2 2 1 CD_GND BASE 1 2 CBASE MIC_IN 29 MIC VCC2 8 1 2 R192 100
MIDI_OUT 21
CD_L 2 1 CDL 1 30 AGND5 R193 100
CD L ALC201=0.33U/9738=104P 1U /9739 SIDE_G32 32 C159 C
ALC201=0.33U/9738=104P WAFER_HD_4P 0.1U 2 1 /
R194
1 2 MICPWR AGND_A D_SUB_25P AGND_A C161 C
+5VA
2 1 /
2.2K
/ JBY 3 4R8Ps 4 RN48B reserved
AGND_A
C160
1

/
R195 1 2 CCENTER JAY 1 4R8Ps 2 RN48A
5.6K 1U /9739 /
A A
L10 JAX 7 4R8Ps 8 RN48D
MIC1 1 2 CENTER 1 2 MIC_IN
2

/
1

R196 120Ohm/100Mhz JBX 5 4R8Ps 6 RN48C


1

C162 1K CB71
C R324 C /
/ / GND NOT
2

5.6K

Title : AC97
2

AGND_A
VeryTek Computer Inc. Engineer: Mars Tseng
Size Project Name Rev
AGND_A
Custom P4I45PE 1.01

www.vinafix.vn
Date: Wednesday, March 12, 2003 Sheet 22 of 30
5 4 3 2 1
5 4 3 2 1

+3VSB +3VSB +12V

8,10,21 BATT
BATT 14 14
U6A U6B

2
1 VCC 4 VCC +3VSB_GATE R197
D5 5,9 PWROK
3 6 2.7K
+3VSB 1 9 SLP_S3# 2 5
3 GND GND +5VSB +3VSB
BAT 1 2 BAT1 2

1
8 BAT 7 74HC132 7 74HC132
+3V_GATE

2
R198 1K RB715F 3

14

14
D

1
CB72 U7A 74HC14 R199
1

R200 GND 1 VCC VCC Q1


BAT1 0.1U 1 10K
220 3 1 2
BATT 2 G 2N7002

2
D D
R0603 +5VSB GND GND 2 S

1
CLRCOMS1 74HCT32 U8A
2

2
1

7
2 R201
+5VSB
HEADER_1X2P R202 R R
GND /
GND 1 / 2
9 SLP_S3#

14
GND U7B
VCC

FRONT PANEL
4
+3VSB 6 +3VSB +3V +3V_DUAL
5
+5VSB GND Q2
PWR_LED1 74HCT32
14 U6C
+5V 1 1 8

7
2 9 VCC S1 D1
2

3 S5 8 +3V_GATE 2 N 7
9 SLP_S5#
2

R203 10 G1 D1

2
R204 330 GND 3 6
330 2X5P_K10 R0805 HEADER_1X3P SLP_S5 R205 S2 D2
7 74HC132
R0805 11/18 Update 1 2 RN49A PWRBTN# +3VSB_GATE 4 5
+3VSB 8.2K 0 P
PANEL1 3 4 RN49B RESETCON#
1

8.2K G2 D2
HDLED+ 1 2 PLED+ DPWROK_PS 5 6 RN49C
1

PLED+ PLED- 21 8.2K


3 4 7 8 RN49D PGX# SI4542DY

1
17 HDLED- PWRBTN# 8.2K
5 6
RESETCON# +5VSB
7 8 替代料:07-005086110 ap4500

1
9 GND +5VSB U9A
S5 3 6 +5VSB

CLR
CK Q#

14
2 5 U7C
GND D Q VCC
5,8,15,21,25,27 PCIRST_SB#_UBF 9
silk screen? 7 14 8
ACPILED is Hi-Z in S4/S5. defined in others. 9,21 PWRBTN# GND VCC PCIRST_SB# 18,19
+5V +3V 10

PR
1

C After RSMRST#, it's "Output Low"! C164 GND C


74HC74 74HCT32
C

7
/
2

+5VSB

2
+5VSB

10
R280 R281 U9B
12 9

14

PR
51OHM 33Ohm U7D D Q
/ / 12 VCC 11 8
+3VSB r0805 R0805 SLP_S5 PLED- CK Q#
11

1
13 7 GND VCC 14

CLR
GND
+3VSB +3VSB +3VSB 74HCT32
1

11/13 Update 74HC74

13
2
R206 D6
R207
47K 1N4148W-A2 +3VSB
14

14

74HC14 74HC14 2.7K


VCC VCC
2

3 RINGIN# 9
3 4 5 6

1
RSMRST# 9 D
Q3
D7
1

C165 GND GND R208 560


U8B U8C 1 2N7002
24 RRI#1 1 2 1 2
1U G
7

2 S

2
R209
2

1N4148W-A2
1.2K
GND GND GND

GND GND

SPEAKER1
B 1 +5V B
2 +3VSB +3VSB
26 PSON#
3
4

HEADER_1X4P +5V
1 2 BUZZ-C

14

14
R210 74HC14 74HC14
1

+5VSB BUZZ1 33 3 Q4 R211 VCC VCC


1 C166 C PMBS3904 2.7K 9 8 11 10
BUZZ- B 1 5,8,15,21,25,27 PCIRST_SB#_UBF IDERST# 17
2 C 1 2 SB_SPKR 8,22
2

1
+12V +5VSB +5V +3V ATXPWR1 +3V +5V -12V / GND CB73 GND
2
21

R212 BUZZER E U8D U8E


1 11 /BUZZ 2 C

7
hold1

R213 1K +3V1 +3V3 2.7K /


2 12

2
+3V2 -12V
+5V 2 1 3 GND1 GND4 13
4 14 PSON#
1

+5V1 PSON
5 GND2 GND5 15
6 16 3
+5V2 GND6 D
7 17 Q5 RESETCON# GND
PWROK_PS GND3 GND7
8 PWR0K -5V 18 2N7002 GND
9 19 1
hold2

5VSB +5V3
1

10 20 G C167
+12V +5V4 2 S
1

CB74 C +3VSB +3VSB


/ +3V
22

C
2

/ 20P
2

14

14
U6D 74HC14

1
GND 12 VCC R214 VCC
9 SLP_S3# +

1
GND GND GND R215 11 1 2 PGX# 13 12 CE35 CB76 CB77 CB78 CB79 CB80 CB81 CB83 CB84
PWROK_PS DPWROK_PS PWROK 5,9
1 2 13
GND 8.2K GND C C C C C C C C
2.7K U8F 1000U / / / / / / / /

2
7 74HC132

7
1

A +5VSB +3V +12V -12V +5V C168 C169 A


0.1U 0.1U

GND
2

2
1

+
1

CB85 CE21 CB86 CB87 CB88 CB89 CB90 CB91 CB92 CB93 CB94 CB95 CB96 CB97 CB98 CB99 CB100 CB101 CB102 CB103 CB104 CB105

C 1000U 0.1U 0.1U 1000P 0.01U 1000P 0.01U C 1000P 0.01U 0.01U C C C C C C C C C C NOT
GND
/ / / / / / / / / / / / GND GND GND
2

Title :POK_DUALSW
VeryTek Computer Inc. Engineer: Mars Tseng

www.vinafix.vn
GND GND GND GND GND Size Project Name Rev
Custom P4I45PE
Around the ATX Power Connector 1.01
Date: Wednesday, March 12, 2003 Sheet 23 of 30
5 4 3 2 1
+12V -12V +5V Parallel Port
LPT1 C173

1
2
C170
C
/
C171
C
/
C172
C
/
COM1 SIDE_G26 26

13 SLCT
2 1 SLCT

2
SLCT 150P
GND8 25
12 PE C1742 1 150P PE
PE
GND7 24 C1752 1 150P BUSY
11 BUSY C1762 1 150P ACK#
BUSY
23 C1772 1 150P SPD7 1 2 RN50A XPD7
GND6
ACK# 33 XPD6
10 3 4 RN50B
ACK# 33 XPD5
-12V +12V +5V GND5 22 5 6 RN50C
9 SPD7 C1782 1 150P SPD6 7 33 8 RN50D XPD4
U10 SPD7
21 C1792 1 150P SPD5 33
GND4
1 20 8 SPD6 C1802 1 150P SPD4
VCC+ VCC SPD6
DDCD#1 2 19 28 20 C1812 1 150P SPD3
DDSR#1 RA1 RY1 DCD#1 21 GND3
SPD5
3 RA2 RY2 18 DSR#1 21 SIDE_G28 SPD5 7
RRXD1 4 17 19
RRTS#1 RA3 RY3 RXD1 21 GND2
SPD4
5 DY1 DA1 16 RTS#1 21 SPD4 6
TTXD1 6 15 18
CCTS#1 DY2 DA2 TXD1 21 GND1
SPD3 XPD3
7 14 5 1 2 RN51A
DDTR#1 RA4 RY4 CTS#1 21 SPD3
SLIN# 33
8 13 17 C1822 1 150P SPD2 3 4 RN51B XPD2
RRI#1 DY3 DA3 DTR#1 21 SLIN#
SPD2 SPD1 33 XPD1
9 12 4 C1832 1 150P 5 6 RN51C
RA5 RY5 RI#1 21 SPD2
PINIT# SPD0 XPD0
10 11 PINIT# 16 C1842 1 150P 7 33 8 RN51D
VCC- GND SPD1 C1852 150P SLIN# 33
SPD1 3 1
gd75232d 15 ERROR#
ERROR#
06-015000110 2 SPD0 C1862 1 150P ERROR# 1 2 RN52A XSLIN#
SPD0
AFD# 33
14 C1872 1 150P PINIT# 3 4 RN52B XINIT#
AFD#
STB# AFD# 33 XAFD#
STB# 1 C1882 1 150P 5 6 RN52C
C1892 1 150P STB# 7 33 8 RN52D XSTB#
SIDE_G27 27 33
RRXD1 C190 2 1 150P TTXD1 C191 2 1 150P
DDTR#1 C192 2 1 150P RRI#1 C193 2 1 150P 25P
D+5V

KB/MOUSE PE 1 2.7K 5
RP5A PE 21
BUSY 21
10 RP5B ACK# 21
PS2/USB+5V BUSY 2 5
2.7K ERROR# 21
10 RP5C
PS2VCC ACK# 3 5
2.7K XSLIN# 21
F2 R216 10 RP5D
DDCD#1 C194 2 1 150P 1 2 1 2 SPD7 4 5
DDSR#1 RRTS#1 2.7K
C195 2 1 150P C196 2 1 150P 10 RP5E
SPD6 XINIT# 21
CCTS#1 C197 2 1 150P JUMPER_WIRE 0 R0805 6 5
2.7K XAFD# 21

1
C198 10 RP5F
SPD5 XSTB# 21
7 2.7K 5
C 10 RP5G
SPD4 XPD[0..7] 21
/ 8 5

2
2.7K SLCT
10 RP5H XSLCT 21
SPD3 9 5
2.7K
PS2VCC 10
COM1
10 KBDATA C1992 1 150P D+5V
SIDE_G10
KBCLK C2002 1 150P
MSDATA C2012 1 150P
MSCLK C2022 1 150P RP6A

2
4
6
8
DDCD#1 1 2.7K SPD0 1 5
DDSR#1
DDCD# 2.7K
6 DDSR#
RN53A 2.7K 10 RP6B
RRXD1 2 RN53B 2.7K ERROR# 2 5
RRTS#1
RRXD 2.7K
7 RRTS#
RN53C 2.7K 10 RP6C
TTXD1 3 RN53D AFD# 3 5
CCTS#1
TTXD 2.7K
8 CCTS# 10 RP6D
DDTR#1 4 STB# 4 5

1
3
5
7
DDTR# 21 LKBDATA 2.7K
9 RRI# 10 RP6E
23 RRI#1 21 LKBCLK KBCLK SLIN#
5 GND1 21 LMSDATA 6 2.7K 5
KBDATA 10 RP6F
21 LMSCLK MSCLK SPD2 7 2.7K 5
MSDATA 10 RP6G
11 PINIT# 8 5
SIDE_G11 2.7K
10 RP6H
D_SUB_9P SPD1 9 5
2.7K
10
PS2VCC D+5V

R217
SLCT

FDD
4 1 2

FLOPPY1 PS2_KB1 2.7K


+5V SIDE_G1
1 GND1 RWC# 2 DENSEL 21
3 4 3 VCC NC1 6
GND2 NC1
RP7A NC2 6 1 NC
STEP# L11

IR
1 8R10Ps 5 7 GND3 IDX# 8 IDX# 21 9 SIDE_G3
10 RP7B 9 10 LKBDATA 1 2 KBDATA 2 DATA L12
WD# / GND4 MTR0# MTR#0 21 KBCLK LKBCLK
2 8R10Ps 5 11 GND5 DRV1# 12 DRV#1 21 5 GND CLK 8 1 2
10 RP7C 13 14 120Ohm/100Mhz IR1
/ GND6 DRV0# DRV#0 21
TRAK0# 3 120Ohm/100Mhz +5V
8R10Ps 5 15 16 SIDE_G2
GND7 MTR1# MTR#1 21
/ 10 RP7D 17 GND8 DIR 18 DIR# 21 6
WP# 4 MINI_DIN_6P
8R10Ps 5 19 20 4 3
7

GND9 STEP# STEP# 21


/ 10 RP7E 21 GND10 WD# 22 WD# 21 2 1 IRRX 21
RD# 21 IRTX
6 8R10Ps 5 23 GND11 WG# 24 WG# 21
/ 10 RP7F 25 GND12 TRK0# 26 TRAK0# 21
4

1
HDSEL# 7 PS2_MS1 HD_2X3P
8R10Ps 5 27 GND13 WP# 28 WP# 21 SIDE_G1
10 RP7G 29 30 C203 C204
DSKCHG# / GND14 RD# RD# 21
8 NC1 C C
8R10Ps 5 31 GND15 HDSEL 32 HDSEL# 21 3 VCC 6
10 RP7H 33 34 1 / /

2
/ GND16 DSKCHG# DSKCHG# 21 NC
IDX# 9 L13
8R10Ps 5 LMSDATA MSDATA
9 SIDE_G3
10 FLOPPY 1 2 2 DATA L14
/ MSCLK LMSCLK
5 GND CLK 8 1 2 NOT
120Ohm/100Mhz
SIDE_G2 120Ohm/100Mhz
Title : IO Connector
MINI_DIN_6P
7

<OrgName> Engineer: Mars Tseng


Size Project Name
A3
P4I45PE Rev
1.01
Date: Wednesday, March 12, 2003 Sheet 24 of 30

www.vinafix.vn
5 4 3 2 1

D D

+3V

U11 +3V

FWHHINIT# 24 1
PCIRST_SB#_UBF INIT# VPP
5,8,15,21,23,27 PCIRST_SB#_UBF 2 RST# VCC1 25
32 U12
PCLK_FWH VCC2 FWHHINIT#
14 PCLK_FWH 31 CLK VCC3 27 1 NC1 OE#(INIT#) 32
2 31 LAD4
FGPI4 NC2 WE#(FWH4)
30 FGPI4 3 NC3 VDD2 30
FGPI3 3 FGPI3 8 4 29
FGPI2 TBL# FWHWP# IC VSS1 DQ7(RES)
4 FGPI2 WP# 7 FWHWP# 9 5 IC DQ6(RES) 28
FGPI1 5 FGPI1 FGPI4 6 27
FGPI0 LAD4 PCLK_FWH A10(FGP14) DQ5(RES)
6 FGPI0 FWH4 23 LFRAME# 8,21 7 R/C#(CLK) DQ4(RES) 26
17 LAD3 8 25 LAD3
FWH3 LAD2 VDD1 DQ3(FWH3)
9 ID3 FWH2 15 LAD[0..3] 8,21 9 NC4 VSS2 24
10 14 LAD1 PCIRST_SB#_UBF 10 23 LAD2
ID2 FWH1 LAD0 R218 FGPI2 RST# DQ2(FWH2) LAD1
11 ID1 FWH0 13 11 A9(FGP13) DQ1(FWH1) 22
GND 12 2.7K FGPI3 12 21 LAD0
ID0 IC FGPI1 A8(FGP12) DQ0(FWH0)
IC 29 1 2 13 A7(FGP11) A0(ID0) 20
FGPI0 14 19
A6(FGP10) A1(ID1)
C 16
26
GND1
GND2
RSVD5
RSVD4
22
21 GND
FWHWP# 15
16
A5(WP#)
A4(TBL#)
A2(ID2)
A3(ID3)
18
17
C
28 GND3 RSVD3 20
19 HUB_TSOP_32P
RSVD2 /
RSVD1 18
GND

49LF002A
GND

+3V

4
RN54A RN54B
2.7K 2.7K

B B
1

3 FWHHINIT#

Q6 3
C Max : 10"
1 B

E
2
PMBS3904
Q7 3
C
5 6 RN54C 1 B
2,9 HINIT# 2.7K
E
2
PMBS3904
Max : 2" ICH4

GND

R219
1 2

R
/
A A
NOT

Title : FWH
ASRock Computer Inc. Engineer: Mars Tseng
Size Project Name Rev
A3 P4I45PE 1.01
Date: Wednesday, March 12, 2003 Sheet 25 of 30

5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

R220 U13
1 2 +2.5VREF VTT_DDRDRV 1 14 +3VSBDRV
+5VSB U14 VTT_DDRFB OUT_1 OUT_4 +2.5VREF
2 IN_1- IN_4- 13
220 R0603 VCCVIDDRV 1 14 VTT_DDRREF 3 12 +3VSBFB
VCCVIDFB OUT_1 OUT_4 IN_1+ IN_4+
2 IN_1- IN_4- 13 +5VSB 4 V+ GND 11
+1.25VREF 3 12 +1.25VREF 5 10 VCCMFB
IN_1+ IN_4+ +1.25VSBFB IN_2+ IN_3+ +2.5VREF
+12V 4 V+ GND 11 6 IN_2- IN_3 9

1
U15 5 10 +1.5VSB +1.5VSBDRV 7 8 VCCMDRV
IN_2+ IN_3+ VDDQFB OUT_2 OUT_3
6 IN_2- IN_3 9
2 7 8 VDDQDRV LM324MX
OUT_2 OUT_3
LM324MX
D LM431BCM3X GND D
/

3
GND GND

GND VCCM

+3V R222
1K
5% 2
VCCM 1 2 VTT_DDRREF C Q9
+5VSB + VTT_DDRDRV 1 B 2SD2150
Q8 3 VTT_DDRFB - SOT89

1
+1.25VREF C 3 E 07-003055010
VCORE_EN 29 D

1
+ VCCVIDDRV 1 B R224 3
VCCVIDFB - MMBT3904R-DK R221 1K Q11
E 3 VTT_DDR
D 5% 1
R223 2 4.7K G 2N7002 3
1 2 Q10 2 S E Q13

2
VCCVID 1 2SB1424

2
0 G 2N7002 B 1
SOT89
2 S
1

3 complementary to 2SD2150
C
R0603 Q12 GND
R225 R226 C R227
2
1 B PSON# 23
R 2 1 1 2
/ MMBT3904R-DK

1
47K E 0 R0603
C205 2 R228 GND +3VSB
2

0.01U R
11/13 Update /

2
GND GND

2
GND GND GND
C 3 C
GND
R231 C
+2.5VREF 1 2 +1.25VREF + +1.5VSBDRV 1 B Q15
+1.25VSBFB - MMBT3904R-DK
1K E SOT23
5% R232 2
+3V 1 2 +1.5VSB

1
R233 200
1K R234 1%
5% 1K
2D 1.5V ONLY 5%

2
+1.5VSB Q20 Use 5706 or 2118 ( BJT ) 1 33 2

2
+ VDDQDRV 1 +5VSB
R235 2
VDDQFB - G TM3055-TL GND C
S 1 B
3 GND 1 2 Q18
R242
1 2 VDDQ 3 R236 0 R0603 E 2SD1802
D 3
0 +3VSBFB Q19
1

+2.5VREF + +3VSBDRV 1
R243 +2.5VREF - G 2N7002
1K 2 S
5% R239
/ 1 2 +3VSB
3 Q16
2

390 5%

1
1
GND R240 2.5v*(1+0.36)/1=3.4v
TL431CP 1K
to92 5%
B B
2

GND

2
UPDATE FOR 9/25
GND GND

+5VA +12V

R241
U21 2 1 +5VSB +3V_DUAL
100 1% 2D
1 Vout Vin 8
Q21
2 7 1
GND1 GND4 3 G AP9916H
D S
1

3 6 3
+ GND2 GND3
1

CE37 C262 Q22


4 5 1
100U 0.1U NC1 NC2 G 2N7002
2 S
2

LM78L05ACM VCCMFB
+ VCCMDRV
+2.5VREF - GND

R244 150
AGND_A GND 2 1 VCCM
UPDATE FOR 8/30
A A
2

R310
2KOhm

NOT
1

Title : POWER

www.vinafix.vn
GND Engineer: Mars Tseng
VeryTek Computer Inc.
Size Project Name Rev
Custom P4I45PE 1.01
Date: Thursday, March 13, 2003 Sheet 26 of 30
5 4 3 2 1
5 4 3 +3VSB 2 1
LAN_+3VSB +3VSB
C/BE#[0..3] 8,18,19

2
L17 L18
AD[0..31] 8,18,19

2
L15 L16 1 2 +2.5LAN 1 2
+3VSB L19
PCLK_LAN 14 0 0

2
+3V C206 0 R0805 10Ohm/100Mhz
C207 0 R0805 R0805
/LAN
R0805

2
2 1 2 1 2 1 0.1U

1
2
R245 /LAN

1
R246 C208 C209 +3VSB
2.7K 0.1U 0.1U 0.1U +3VSB
/LAN R /LAN /LAN /LAN U16
/ EECS R247
1 8

1
D CS Vcc
D

2
EESK EEDI

RESET
2 7 C210 2 1

21

PH25M1
PH25M2
TRXN
SK NC

PME#
TTXP

TRXP
TTXN
Q23 3 EEDI

GND

VCTRL
3 DI ORG/NC 6
C R248 EEDO 4 5 0.1U
1 R-1 B DO GND /LAN 2.7K

1
9 GPIO28 R AT93C46
47K /
E
R-2

1
47K R249
GND

75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
U17 RESET 2 1
FRAME# 8,18,19
PDTC144EK2

TXD-

RXIN-
AVDD_2

GND_6
RTSET

RTT3
GND_5
X1
X2
AVDD_1

VCTRL
AVDD
ISOLATEB
GND_7
TXD+

RXIN+
NC

LWAKE

AVDD25_1
PMEB

EECS
EESK

ROMCS/OEB
EEDI
EEDO
/LAN LED2 76 50
IRDY# 8,18,19 LED3 LED2 CLKRUNB LAN_+3VSB
77 49 5.6K
LED1 VDD_4 +2.5LAN
TRDY# 8,18,19 78 LED0 VDD25_1 48
INTA# 79 47 AD0 +3V
INTB# INTBB AD0 AD1
DEVSEL# 8,18,19 IDSEL AD26 80 INTAB AD1 46
PCIRST_SB#_UBF
81 45 AD2
GNT#4 RTSB AD2 GND
STOP# 8,18,19 INTA# INTB# 82 GNTB GND_4 44
REQ#4 83 43 AD3 2
C/BE#3 REQB AD3 AD4
PAR 8,18,19 GNT#4 84 CBE3B AD4 42
E Q24
AD31 85 41 AD5 VCTRL
AD30 AD31 AD5 AD6 PNP_SOT23
PERR# 8,18,19 REQ#4 86 AD30 AD6 40
B 1
/ X4
AD29 AD7
C
87 AD29 AD7 39
GND 88 38 C/BE#0
3 PH25M1 1 2 PH25M2
SERR# 8,18,19 AD28 GND_8 CBE0B LAN_+3VSB +2.5LAN
89 AD28 VDD_3 37 GND
LAN_+3VSB 90 36 AD8 3 25MHZ
PME# 8,18,19 VDD_5 AD8

1
AD27 91 35 AD9 C211 C212
AD26 AD27 AD9 AD10
INTF# 8,19 92 AD26 AD10 34

2
AD25 93 33 AD11 C213 22P 22P
+2.5LAN AD25 AD11 AD12 +
94 32 CE22 /LAN /LAN

2
INTG# 8,19 VDD25_2 AD12
C LAN_+3VSB 95
AD24 96
VDD_6 GND_3 31
30
GND
AD13 CAP
0.1U
/LAN C

1
GNT#4 8 PCLK_LAN AD24 AD13 AD14
97 29

2
REQ#4 8,18 AD26 PCICLK AD14 AD15 /
98 28

AC_DOUT
AC_SYNC
AC_RSTB

DEVSELB
IDSEL AD15

FRAMEB
AC_BCK
99 27 C/BE#1

AC_DIN

PERRB
TRDYB

STOPB
GND_1

GND_2
INTA# 8,15,18,19

CBE2B
VDD_1

VDD_2
GPIO1 CBE1B

IRDYB
100 26 SERR#

AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
GPIO0 SERRB

PAR
INTB# 8,15,18,19
RTL8101L
PCIRST_SB#_UBF 5,8,15,21,23,25

10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
/LAN

1
2
3
4
5
6
7
8
9
LAN_+3VSB

LAN_+3VSB
DEVSEL#
FRAME#
C/BE#2

STOP#

PERR#
TRDY#
IRDY#
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
P+0
GND

GND

PAR
9 P+0

R250 R P-0
9 P-0
1 2 10MLEDN
/

P+1
9 P+1
R251 R
Placed near RTL8201 1 2 100MLEDN
/
P-1
1 LTDCOMM

9 P-1
TDCOMM

1
pin 18 ---|>|---- pin 17
B for TXP/TXN, they are near driver so the unbalanced pin 20 ---|>|---- pin 19 C214 C215 C216 C217 B
1

C218 common mode signals shall be very small, hence do C C C C


LAN_USB01 / / / /

2
not stuff the CT cap for TX side
1

0.1U
R252 R253 100MLEDN 19 17 10MLEDN
2

+3VSB LED3 LILEDN ACTLEDP LED2


20 LILEDP ACTLEDN 18
49.9 49.9
/LAN /LAN TXP 9 25
TXN TXP CHAGND25
10 26
2

TXN CHAGND26
2

RXP 11 27
TXCT RXP CHAGND27
12 PIN4 CHAGND28 28
R254 L21 1 2 0 13 LAN
R U18 RXN PIN5
14 RXN USBGND21 21
/ TTXP 1 16 LTXP RXCT 15 22
TTXN TD+ TX+ LTXN L22 PIN7 USBGND22
3 14 1 2 0 16 23
1

TDCT TD- TX- LTXCT SBV0123 PIN8 USBGND23 SBV0123


2 TDCT TXCT 15 USBGND24 24
TRXP HA003 LRXP L23
6 RD+ RX+ 11 1 2 0 8 VCC1 VCC2 7
1

C219 TRXN 8 9 LRXN 6 5


RD- RX- 9 P-1 2P- 1P- P-0 9

1
RDCT 7 10 LRXCT 4 USB 3
RDCT RXCT 9 P+1 2P+ 1P+ P+0 +9

1
C L24 1 2 0 2 1 CE23 CB106
TAIMIC GND1 GND2
1

/ C220 4 12
2

NC1 NC3 1000U C


5 13 USB_LAN_LED
0.1U NC2 NC4 /
/LAN

2
/LAN
2

10/100MB
2
4
6
8

/LAN RN55A 75
RN55B 75
RN55C 75
RN55D 75 C221 C / GND
A /LAN TXP 2 1
apply MAC addr. from IEEE
A
C222 C / a. ASROCK, b. MOBO, c.
1
3
5
7

R255 49.9 C223 TXN 2 1 工廠, d. experiment NOT


TRXP 1 2 RDCOMM 2 1
/LAN C224 C / PHY-RTL8101L
Title :
1

C225 RXP 2 1
0.1U
1

/ /LAN C226

TRXN
C R256 49.9 /LAN
RXN
C227 C /
VeryTek Computer Inc. Engineer: Mars Tseng
1 2 0.1U 2 1
2

/LAN Size Project Name Rev


2

Placed near Transformer


A3 P4I45PE 1.01
Date: Wednesday, March 12, 2003 Sheet 27 of 30

5 4 3 2 1

www.vinafix.vn
SBV0123

F3 L25
1 2 USB0123F_+5V 1 2

JUMPER_WIRE 70OHM/100MHZ

2
R257
4.7KOhm

1
OC#01 9

2
R258
5.6KOhm
PS2/USB+5V PS2_USB_PWR1
1

1
+5V
2
+5VSB 3

SBV45
HEADER_1X3P

P+4
1
F4
2 USB45F_+5V 1
L26
2 USB 4,5 SBV45

9 P+4
JUMPER_WIRE 70OHM/100MHZ

1
+

1
R259 CE24 C228
P-4 4.7KOhm
9 P-4 100U C
/

2
USB45

1
P+5 OC#2 9 VCC VCC
9 P+5 1 2

2
P-4 3 LP1- LP2- 4 P-5
R260 P+4 5 LP1+ LP2+ 6 P+5
5.6KOhm 7 GND GND 8
P-5 NC 10
9 P-5
USB COM
1

1
USB_BLUE

1
C229 C230 C231 C232
C C C C
/ / / /
2

USB 2,3
USB23

11

9
SBV0123

P+2 5 SIDE_G11 SIDE_G9


9 P+2
1
P-3 6 VCC1 VCC2
P-2 2
P-2 P+3 7 1P- 2P-
9 P-2 P+2 3

1
C233 8 1P+ 2P+
4
P+3 C GND1 GND2
9 P+3
/ SIDE_G12 SIDE_G10

12

10
P-3
9 P-3
1

USB_2X4P
C234 C235 C236 C237
C C C C
/ / / /
2

NOT

Title : USB PORT


ASRock Computer Inc. Engineer: Mars Tseng
Size Project Name Rev
A3 P4I45PE 1.01
Date: Wednesday, March 12, 2003 Sheet 28 of 30

www.vinafix.vn
5 4 3 2 1

R 1%
+5VSB R282 /VCORE5110 VCORE
R283 R0603 U20 2 1
FAN_VSB L+5V CAP /

+
2 1 1 5VSB ADJ 28 1 2
SEL_F R284 1500U CE26 CE25 ST, Eric Chou, 0933-228-512

+
2 SELECT VFB- 27 1 2

2
R HVID0 3 26 FB_F 1 2 VCORE
R285 R286 HVID1 VID0 VFB+ RT_F 3300uF/6.3V

+
4 VID1 RT 25 1 2

1
/VCORE5110 R R HVID2 SS_F R 1500U CE28 CE27 Use 1500U/6.3V, 10x20 4 pcs

+
5 VID2 ENABLE/SS 24 1 2
C247 / / HVID3 6 23 DROOP_F /VCORE5110 Ir=1820mArms, under 85 degC -> x 1.7
VID3 DROOP/E

2
HVID4 ILIM_F 3300uF/6.3V

+
C 7 VID4 ILIM 22 1 2 Ir=50*sqrt(D(1/2-D)), 2 phase, D=1.5/5

1
BYPASS_F 1500U CE30 CE29

+
8 21 1 2
2

1
/VCORE5110 BYPASS PWRGD =12250mA

2
SGND 9 20 VCCDR C248 R287
LGATE2 AGND VCC LGATE1 R288 C R 3300uF/6.3V Ir/(1820mA*1.7)=3.958 -> 4 pcs

+
10 LDRVB LDRVA 19 1 2
D PGNDF_2 PGNDF_1 /VCORE5110 /VCORE5110 1500U CE32 CE31 if Io=62A -> 5 pcs D

+
11 18 1 2

2
PHASE2 PGNDB PGNDA PHASE1 R
12 17

1
SWB SWA

2
UGATE2 13 16 UGATE1 /VCORE5110 CAP P4 load line spec, .13um/.18um?
HDRVB HRDVA / CE33

+
14 15 1 2

1
BOOTB BOOTA
1

2
C249 R289
C FAN5110 +12V R290 3300uF/6.3V
/VCORE5110 BOOT_F /VCORE5110 R R CE34

+
1 2
/VCORE5110 /VCORE5110 CHEMICON
2

1
1
1500U/6.3V, 1820mA, 23mOhm
CAP 1UF/25V (0805) Y5U (105) C250 C D11

1
C251 3300U/6.3V, 2360mA, 21mOhm
/VCORE5110 1 R291
3 PUN_F 1 2 PF_2 1 2

2
2 GND
R GND
SGND Dual_Diode_Convert_1anodeC /VCORE5110
+12V /VCORE5110 /VCORE5110

+5VSB 1 PHASE2 R296 C252


3 4.7Ohm 1U
2 /X /X www.3lcoil.com.tw

2
PHASE1 1 2 1 2 1.0uH+/-20%,16A, DCRmax=1.6mOhm
R292 R323 6.5T, 1.6φ*1, R-5X20-H5B Core
BAT54C D12 10Ohm 10Ohm Reserved Reserved
/VCORE5110 RES 10 OHM 1/10W (0805) RES 10 OHM 1/10W (0805) L27 1UH/16A
/VCORE5110 R297 C253
+5V 1 2 L+5V
4.7Ohm 1U
1

1
/X /X FERRITE BEAD 1UH/16A 5X20
D9 D10 PHASE2 3L TURN:6.5,立式,1.6φ
1 2 1 2
3,21 HVID[0..4] 2 1 1 2
C Reserved Reserved C238 C

1
C239 C240 R261 2D C

1
0.1U 1N4148W-A2 1N4148W-A2 0.1U 0 C1206
+12V C0603 C0603 Snubber Circuit GND
UGATE1
R0603 /
1 2 NET1 1 Q25 1.6uH+/-20%,30A, DCRmax=2.0mOhm

2
U19 G
Place near Drain to Source 6.5T, 0.9φ*3, Curie's Iron Powder
2

2
S
LGATE1 1 28 SPD30N03S2L_80 3 Core: T50B-35
VCCDR 2
LGATE1 PGND
27 LGATE2 of low-side MOSFET 07-005215010AK
PHASE1 VCCDR LGATE2 PHASE2 TO263_TO252_SHARE L28
3 PHASE1 PHASE2 26
UGATE1 4 25 UGATE2 PHASE1 1 2
BOOT1 UGATE1 UGATE2 BOOT2 GND
5 BOOT1 BOOT2 24
1 2 6916VCC 6 23 1.6UH
VCC N.C. HVID4
7 SGND VID4 22
R263 10 VCORECOMP 8 21 HVID3 2D
R0805 VCOREFB COMP VID3 HVID2
9 FB VID2 20
10 19 HVID1
VSEN VID1
1

C241 C242 VCORE 11 18 HVID0 LGATE1 1 Q26


GND FBR VID0 G
12 FBG OSC / INH / FAULT 17 VCORE_EN 26 S
1U 1U ISEN1 13 16 ISEN2 IPB10N03L 3
PGNDS1 ISEN1 ISEN2 PGNDS2 below 0.8V will enter inhibit mode 07-005058011AK
14 15
2

C0805 C0805 PGNDS1 PGNDS TO263_TO252_SHARE


L6916D
SGND
R294 VCORE
Note: SGND at 1 2
GND 9/23 PGNDF_1 1 2
least 15 mil R264 649K
R293 /VCORE5110 R
1 2 300K- 12.91*10^7/1.3*10^6 +3V
= 300K - 100K = 200K (Hz)
0 GND
B +5V 1 5 B
HVID3 1KOhm L+5V
GND 2 5
10 RP8A
HVID2 1KOhm
3 10
5 RP8B
VCORECOMP HVID1 1KOhm
4 10
5 RP8C C243
1KOhm

1
HVID0 6 5
10 RP8D R265 2D C
1KOhm
1

change VSEN net to VCORE directly, not to use REMOTE SENSE buffer HVID4 7 10
5 RP8E 0 /
1KOhm
R266 8 5
10 RP8F R0603 C1206
1KOhm
2

26.1K 9 10
5 RP8G UGATE2 1 2 NET2 1 Q27

2
1KOhm G
R267 10 RP8H S
2

C244 C245 R268 SPD30N03S2L_80 3


R 07-005215010AK
1 2 2 1
2

15P / TO263_TO252_SHARE L29


2

C246 C R PHASE2 1 2
1

4700P / /
1.6UH
VCOREFB 1 2 VCORE
1

2D
R269 2.87K
2

R271 10K
R270 ISEN1 2 1 PHASE1 CONNECT TO Q26's Drain pin LGATE2 1 Q28
62K G
S
1% Vcore > Vdac : vcore and gnd divider feedback IPB10N03L 3
Vcore < Vdac : vcore and +5v divider feedback R272 10K 07-005058011AK
PGNDS1 2 1 CONNECT TO Q26's Source pin TO263_TO252_SHARE
1

SGND R273 10K R295


ISEN2 2 1 PHASE2 CONNECT TO Q28's Drain pin PGNDF_2 1 2
A /VCORE5110 R A
R274 10K
PGNDS2 2 1 CONNECT TO Q28's Source pin
GND
NOT
R271,R272,R273,R274 Close to PWM Controller
Title : VCORE
ASRock Computer Inc. Engineer: Mars Tseng
Size Project Name Rev
Custom P4I45PE 1.01
11/14 Update Date:
Wednesday, March 12, 2003
Sheet 29 of 30
5 4 3 2 1

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5 4 3 2 1

H1 H2

H3 H4
1 GND1 NC 9 1 GND1 NC 9
2 GND2 GND8 8 2 GND2 GND8 8
1 GND1 NC 9 1 GND1 NC 9 3 GND3 GND7 7 3 GND3 GND7 7
D
2 GND2 GND8 8 2 GND2 GND8 8 4 GND4 GND6 6 4 GND4 GND6 6 D
3 GND3 GND7 7 3 GND3 GND7 7 GND5 5 GND5 5
4 GND4 GND6 6 4 GND4 GND6 6
GND5 5 GND5 5 SCREWHOLE_160_ASUS SCREWHOLE_160_ASUS
/ /
SCREWHOLE_160_ASUS SCREWHOLE_160_ASUS
/ /

GND GND GND GND


AGND_A
AGND_A VCORE

H5 H6 H7 BYPASS ,
FOR EMI
1 GND1 NC 9 1 GND1 NC 9 1 GND1 NC 9
2 GND2 GND8 8 2 GND2 GND8 8 2 GND2 GND8 8
3 GND3 GND7 7 3 GND3 GND7 7 3 GND3 GND7 7
4 GND4 GND6 6 4 GND4 GND6 6 4 GND4 GND6 6

1
C
GND5 5 GND5 5 GND5 5 C
C263 C264 C265
SCREWHOLE_160_ASUS SCREWHOLE_160_ASUS SCREWHOLE_160_ASUS 0.1U 0.1U 0.1U
/ / /

2
/ / /

GND GND GND GND


GND

+5V +3V BYPASS , FOR EMI

B B
1

1
C267 C268 C269 C270 C272 C274 C275 C273 C276 C277 C278 C279 C280 C281 C282 C283 C284 C285
0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
/ / / / / / / / / / / / / / / / / /
2

2
GND GND

NOT

A
Title : MECHANICAL A

Verytek Computer Inc. Engineer: Mars Tseng


Size Project Name Rev
A P4I45PE 1.01
Date: Wednesday, March 12, 2003 Sheet 30 of 30

www.vinafix.vn
5 4 3 2 1

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