Microelectronics and VLSI Design

EC-702

Time: 3 Hours Full Marks: 70

Group-A
(Multiple Choice Type Questions)

1. Choose the correct alternatives for any ten of the following

i) To implement the Boolean function F= (A+B).(C+D) using Static CMOS logic design number of
transistor required is
a) 4 * b) 10 c) 8 d) 6

ii) Data refresh operation is needed in

*a) DRAM b) FLASH c) SRAM d) EEPROM

iii) Pseudo NMOS logic provides which of the following advantages?

a) Static power dissipation is less compared to CMOS logic
b) Much faster compared to other logics
*c) Requires less no. of transistors compared to CMOS logic
d) It is more noise immune

iv) Inverter threshold voltage Vth is defined as the voltage as the voltage at a point where
a)Vin=2Vout *b) Vin = Vout c) 2Vin= Vout d) Vin = Vout/2

V) Which domain is not included in three domains of Y chart?

*a) System specification. b) Structural.
c) Geometrical layout. d) Behavioral.

vi) For a symmetric CMOS inverter (VIL + VIH) is equal to

a)Vout b) 2VDD *c) VDD d) VOH-VOL

vii) The equivalent (W/L) of two nMOS transistors with (W1/L) and (W2/L) connected in
series is
*a) (W1/L). (W2/L) / (W1/l +W2/L) b) (W1/L). (W2/L)
c) (W1/L) + (W2/L) d) 1/(L/W1 + L/W2)

viii) A current mirror circuit can be used as a current amplifier by

a) increasing the (W/L) ratios of the mirrored and source MOSFET.
b) decreasing the (W/L) ratios of the mirrored and source MOSFET.
c) increasing the threshold voltage of the mirrored and source MOSFET.
d) none of these.
ix) . In Fabrication step which process is used to transfer pattern on the surface of
silicon wafer
a) Oxidation. b) Diffusion.
*c) Photo-lithography. d) Etching.
x) . The term “precharge” and “evaluate” is associated with
a) NMOS technology b) Memory circuits
*c) Dynamic CMOS logic d) RAM

xi) The main disadvantage of dynamic logic circuit over static logic circuit is
a) it has larger layout area.
b) it stored the charge permanently.
*c) it requires periodic clock signals in order to control charge refreshing.
d) it has higher power consumption.

xii) Hierarchical decomposition of a large system in VLSI design is called

i) modularity ii) regularity iii) locality iv) all of these

GROUP- B
(Short Answer Type Questions)
Answer any three of the following 3x5=15

2. Discuss VLSI design flow with the help of Y- chart 5

3. i) Draw the VTC curve of a simple CMOS inverter circuit and clearly define the different operating
regions of NMOS and PMOS. 5

4. Explain how a combination of switches and capacitors can be used to emulate a resistor. 5

5. Describe Czocharlski method for single crystal growth technique 5

6. a) What do you mean by CMOS transmission Gate (TG)

b) Design the following circuits using transmission gates
i) Half Adder
ii) D flip-flop 2+3

7. Discuss the concepts of Regularity, Modularity, and Locality in VLSI design with an example. 5

8. i) Why is reference voltage required in IC?

ii) What are the criteria for a good reference voltage source in a VLSI circuit? 2+3
 GROUP- C
(Long Answer Type Questions)
Answer any three of the following 3x15=45

9. a) Briefly describe the fabrication process steps for N-well CMOS with proper diagram
b) What do you mean by design rules? What are the differences in between lambda (λ) and micron (μ)
rule? 10+5

10. (a) Explain with a circuit diagram, operation of basic differential amplifier.
(b) Describe voltage transfer characteristics of a MOS differential amplifier.
(c) What is voltage comparator? How an Opamp is used as voltage comparator?
5+5+5

11. a) Design a 2 input XOR gate using

i) Static CMOS ii) Pseudo NMOS iii) Dynamic CMOS iv) Domino CMOS
and explain the advantages and disadvantages from one design style to other

b) Draw the layout of the following

i) CMOS 2 –input NAND gate
10+5

12. a) Differentiate between Static and Dynamic Logic circuits with suitable example.
b) What are the advantages of dynamic CMOS logic having precharge and evaluate
phase?
c) Design a CMOS clocked J-K flip-flop. Describe its operation. 5+5+5

13. a) Show that to grow an oxide layer of thickness x, a thickness of 0.44x of silicon is consumed.
b) Define photolithography. Explain then role of PPR and NPR with example
c) Write the differences in between Dry etching and WET etching.
5+5+5

14. Write short notes on any three of the following 3x5

i) Clean room
ii) SOI Process
iii) ASIC
iv) Current Mirror
v) Switched capacitor filter
vi) Diffusion and Ion Implantation
vii) Twin Tub Process