Clevo c5100q, c5100q-c, c5105, c5105-c Service Manual

C5100Q/C5100Q-C/C5105/C5105-C
Preface
Notebook Computer
C5100Q/C5100Q-C/C5105/C5105-C
Service Manual
Preface
I
Preface
Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent ven-
dor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.
This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publica-
tion, except for copies kept by the user for backup purposes.
Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Preface
Version 3.0
November 2010
Trademarks
Intel, Intel Core, Intel Pentium and Intel Celeron are trademarks/registered trademarks of Intel Corporation.
Other brand and product names are trademarks and./or registered trademarks of their respective companies.
II
Preface
About this Manual

This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.
It is organized to allow you to look up basic information for servicing and/or upgrading components of the C5100Q/
C5100Q-C/C5105/C5105-C series notebook PC.
The following information is included:
Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.
Appendix A, Part Lists
Preface
Appendix B, Schematic Diagrams
Appendix C, Updating the FLASH ROM BIOS
III
Preface
IMPORTANT SAFETY INSTRUCTIONS
Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to per-
sons when using any electrical equipment:
1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of elec-
trical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit (Full Range AC/DC Adapter - AC Input 100 - 240V,
50 - 60Hz/ DC Output 19V, 3.42A or 18.5V, 3.5A 65W minimum).
Preface
This Computer’s Optical Device is a Laser Class I Product
FCC Statement
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:
This device may not cause harmful interference.
This device must accept any interference received, including interference that may cause undesired operation.
IV
Preface
Instructions for Care and Operation

The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:
1. Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer Do not place it on an unstable Do not place anything heavy
to any shock or vibration. surface. on the computer.
2. Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not expose it to excessive Do not leave it in a place Don’t use or store the com- Do not place the computer on
Preface
heat or direct sunlight. where foreign matter or mois- puter in a humid environment. any surface which will block
ture may affect the system. the vents.
3. Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power Do not turn off any peripheral Do not disassemble the com- Perform routine maintenance
until you properly shut down devices when the computer is puter by yourself. on your computer.
all programs. on.
V
Preface
4. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong mag-
netic fields. These can hinder proper performance and damage your data.
5. Take care when using peripheral devices.
Use only approved brands of Unplug the power cord before

peripherals. attaching peripheral devices.
Power Safety
Preface
The computer has specific power requirements:

• Only use a power adapter approved for use with this computer.
• Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
 unsure of your local power specifications, consult your service representative or local power company.
Power Safety • The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
Warning not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
Before you undertake • When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
any upgrade proce- • Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
dures, make sure that • Before cleaning the computer, make sure it is disconnected from any external power supplies (i.e. AC/DC adapter or car
you have turned off the adapter).
power, and discon-
nected all peripherals
and cables (including Do not plug in the power Do not use the power cord if Do not place heavy objects
telephone lines). It is cord if you are wet. it is broken. on the power cord.
advisable to also re-
move your battery in
order to prevent acci-
dentally turning the
machine on.
VI
Preface
Battery Precautions
• Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
• Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
• Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode.
• Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
• Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
• Keep the battery away from metal appliances.
• Affix tape to the battery contacts before disposing of the battery.
• Do not touch the battery contacts with your hands or metal objects.
Battery Guidelines
The following can also apply to any backup batteries you may have.
Preface
• If you do not use the battery for an extended period, then remove the battery from the computer for storage.
• Before removing the battery for storage charge it to 60% - 70%.
• Check stored batteries at least every 3 months and charge them to 60% - 70%.

Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under var-
ious state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste
officials for details in your area for recycling options or proper disposal.
Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer.
Discard used battery according to the manufacturer’s instructions.
Battery Level
Click the battery icon in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10%
will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week.
VII
Preface
Related Documents
You may also need to consult the following manual for additional information:
User’s Manual on CD/DVD

This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup pro-
gram. It also describes the installation and operation of the utility programs provided with the notebook PC.
System Startup
1. Remove all packing materials.
2. Place the computer on a stable surface.
3. Insert the battery and make sure it is locked in position.
4. Securely attach any peripherals you want to use with the computer
(e.g. keyboard and mouse) to their ports.
Preface
5. Attach the AC/DC adapter to the DC-In jack on the left of the
computer, then plug the AC power cord into an outlet, and connect
the AC power cord to the AC/DC adapter.
6. Use one hand to raise the lid/LCD to a comfortable viewing angle (do
not exceed 135 degrees); use the other hand (as illustrated in
<Hyperlink B n I>Figure ) to support the base of the computer (Note:
Never lift the computer by the lid/LCD).
7. Press the power button to turn the computer “on”. 
Shut Down
Note that you should al-

ways shut your com-
puter down by
choosing Shut Down
135 ﾟ from the Start Menu.
This will help prevent
hard disk or system
problems.
Figure 1 - Opening the Lid/LCD/Computer with AC/DC Adapter

Plugged-In
VIII
Preface
Contents
Introduction ..............................................1-1 Top (C5100Q) ................................................................................ A-4
Bottom ........................................................................................... A-5
Overview .........................................................................................1-1 DVD Dual Drive ............................................................................ A-6
Specifications ..................................................................................1-2 LCD ............................................................................................... A-7
External Locator - Front View with LCD Panel Open ....................1-4
External Locator - Front and Rear View .........................................1-5 Schematic Diagrams................................. B-1
External Locator - Left & Right Side View ...................................1-6 System Block Diagram ...................................................................B-2
External Locator - Bottom View .....................................................1-7 Clock Generator ..............................................................................B-3
Mainboard Overview - Top (Key Parts) .........................................1-8 Penryn (Socket-P)1/2 ......................................................................B-4
Mainboard Overview - Bottom (Key Parts) ....................................1-9 Penryn (Socket-P)2/2 ......................................................................B-5
Mainboard Overview - Top (Connectors) .....................................1-10 CANTIGA 1/7, HOST ....................................................................B-6
Mainboard Overview - Bottom (Connectors) ...............................1-11 CANTIGA 2/7, Graphics ................................................................B-7
Disassembly ...............................................2-1 CANTIGA 3/7 ................................................................................B-8
Preface
CANTIGA 4/7 ................................................................................B-9
Overview .........................................................................................2-1 CANTIGA 5/7 ..............................................................................B-10
Maintenance Tools ..........................................................................2-2 CANTIGA 6/7 ..............................................................................B-11
Connections .....................................................................................2-2
CANTIGA 7/7 ..............................................................................B-12
Maintenance Precautions .................................................................2-3 DDRIII SO-DIMM A ...................................................................B-13
Disassembly Steps ...........................................................................2-4 DDRIII SO-DIMM B ...................................................................B-14
Removing the Battery ......................................................................2-5
Panel, CRT ....................................................................................B-15
Removing the Hard Disk Drive .......................................................2-6 Inverter, Bluetooth, Fan ................................................................B-16
Removing the Optical (CD/DVD) Device ......................................2-8 ICH9M 1/4, SATA .......................................................................B-17
Removing the System Memory (RAM) ..........................................2-9 ICH9M 2/4, PCI, USB ..................................................................B-18
Removing and Installing a Processor ............................................2-11 ICH9M 3/4 ....................................................................................B-19
Removing the 3G Module .............................................................2-14 ICH9M 4/4 ....................................................................................B-20
Removing the Wireless LAN Module ...........................................2-15 HDMI ............................................................................................B-21
Removing the Bluetooth Module ..................................................2-16 KBC-ITE IT8502E .......................................................................B-22
Removing the Keyboard ................................................................2-17 Card Reader/LAN JMB261C .......................................................B-23
Part Lists ..................................................A-1 Audio Codec VT1812 ...................................................................B-24
Part List Illustration Location ........................................................ A-2 Audio AMP ..................................................................................B-25
Top (C5105Q) ................................................................................ A-3 HDD, ODD, MDC, TP, Conn, 3G ................................................B-26
XI
Preface
New Card, USB, Mini PCIE ........................................................ B-27

LED, CCD, Audio Conn .............................................................. B-28
System Power, PWR SW ............................................................. B-29
AC_In, Charger ............................................................................ B-30
VCORE ........................................................................................ B-31
VDD3, VDD5 ............................................................................... B-32
1.8V/1.05VS ................................................................................. B-33
1.5V,0.75VS ................................................................................. B-34
Click Board .................................................................................. B-35
Audio Board/USB ........................................................................ B-36
Power Switch & Lid Board .......................................................... B-37
External Odd Board ...................................................................... B-38
Power Sequence V1.0 .................................................................. B-39
Updating the FLASH ROM BIOS......... C-1
Preface
To update the FLASH ROM BIOS you must: C-1

Download the BIOS ....................................................................... C-1
Unzip the downloaded files to a bootable CD/DVD/ or USB Flash
drive ................................................................................................ C-1
Set the computer to boot from the external drive ........................... C-1
Use the flash tools to update the BIOS .......................................... C-2
Restart the computer (booting from the HDD) .............................. C-2
XII
Introduction
Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the C5100Q/C5100Q-C/C5105/C5105-C series note-
book computer. Information about operating the computer (e.g. getting started, and the Setup utility) is in the User’s
Manual. Information about drivers (e.g. VGA & audio) is also found in User’s Manual. That manual is shipped with the
computer.
Operating systems (e.g. Windows Vista/ Window 7, etc.) have their own manuals as do application software (e.g. word
processing and database programs). If you have questions about those programs, you should consult those manuals.
1.Introduction
The C5100Q/C5100Q-C/C5105/C5105-C series notebook is designed to be upgradeable. See Disassembly on page 2 -
1 for a detailed description of the upgrade procedures for each specific component. Please note the warning and safety
information indicated by the “” symbol.
The balance of this chapter reviews the computer’s technical specifications and features.
Overview 1 - 1
Introduction
Specifications Processor Options Audio
Intel® Core™2 Duo Processor High Definition Audio Compliant Interface

T6670 (2.2GHz) 2 * Built-In Speakers
2MB L2 Cache & 800MHz FSB Built-In Microphone
 Intel® Pentium® Processor
Latest Specification Information T4500 (2.30GHz) Keyboard
The specifications listed in this here are correct 1MB L2 Cache & 800MHz FSB Full-size “WinKey” keyboard (with numeric keypad)
at the time of going to press. Certain items (par- Intel® Celeron® Processor
ticularly processor types/speeds) may be T3300 (2.0GHz), 900 (2.2GHz) Pointing Device
changed, delayed or updated due to the manu- 1MB L2 Cache & 800MHz FSB
facturer's release schedule. Check with your Built-in Touchpad
service center for details. LCD
Security
15.6" (39.62) HD TFT LCD
Security (Kensington® Type) Lock Slot
1.Introduction
Memory BIOS Password
 Two 204 Pin SO-DIMM Sockets Supporting DDR3 1066/ Interface

CPU 1333MHz Memory (Real operation frequency of memory
depends on FSB of processor) Three USB 2.0 Ports
The CPU is not a user serviceable part. Ac- One HDMI Out Port
Memory Expandable up to 8GB
cessing the CPU in any way may violate your One Headphone-Out Jack
warranty. Core Logic One Microphone-In Jack
Intel ® GL40 + ICH9M One RJ-45 LAN Jack
One DC-in Jack
Video Adapter One External Monitor Port
Intel ® GL40 Integrated Video Communication

Shared Memory Architecture of up to 1GB
MS DirectX® 10 compatible 10Mb/100Mb Ethernet LAN
(Factory Option) 300K/1.3M Pixel USB PC Camera Module
BIOS (Factory Option) Bluetooth 2.1 + EDR Module
(Factory Option) 3.75G/HSPA Half Mini-Card Module
One 16Mb SPI Flash ROM
(Factory Option) 802.11b/g/n Wireless LAN Mini-Card Mo-
Phoenix™ BIOS
dule
Storage (Factory Option) 802.11b/g/n Wireless LAN + Bluetooth
v3.0
(Factory Option) One Changeable 12.7mm(h) Super Multi
Optical Device Drive
One Changeable 2.5" 9.5 mm (h) SATA HDD
1 - 2 Specifications
Introduction
Card Reader
Embedded Multi-in-1 Card Reader

MMC (MultiMedia Card) / RS MMC
SD (Secure Digital) / Mini SD / SDHC/ SDXC
Compatible
MS (Memory Stick) / MS Pro / MS Duo
Power
6 Cell Smart Lithium-Ion Battery Pack, 48.84WH

(Factory Option) 6 Cell Smart Lithium-Ion Battery Pack,
62.16WH + 4 Cell Battery 32.5WH
Full Range AC/DC Adapter

AC Input: 100 - 240V, 50 - 60Hz
1.Introduction
DC Output: 19V, 3.42A or 18.5V, 3.5A (65W)
Energy Star 5.0 Compliant
Environmental Spec
Temperature
Operating: 5°C - 35°C
Non-Operating: -20°C - 60°C
Relative Humidity
Operating: 20% - 80%
Non-Operating: 10% - 90%
Dimensions & Weight
374mm (w) * 250mm (d) * 14.3 - 34.1mm (h)

2.3 kg (with 48.84WH Battery and ODD)
Specifications 1 - 3
Introduction
Figure 1 External Locator - Front View with LCD Panel Open

Front View with LCD Pan-
el Open
1
1. Built-In PC Camera
(Optional)
2. LCD
3. Power Button
4. LED Status
Indicators
5. Keyboard 2
6. Built-In Microphone
7. Touchpad &
1.Introduction
Buttons
4 3
1 - 4 External Locator - Front View with LCD Panel Open

Introduction
External Locator - Front and Rear View

Figure 2
Front View
1. LED Power
Indicators
1.Introduction
Figure 3
Rear View
1. Security Lock Slot
2. Battery
1 2
External Locator - Front and Rear View 1 - 5

Introduction
Figure 4 External Locator - Left & Right Side View

Left Side View
1. DC-In Jack
2. External Monitor
Port
3. RJ-45 LAN Jack
4. HDMI Port 4 5 5
1 2 7
5. 2 * USB 2.0 Ports 3 6
6. Vent
7. Multi-in-1 Card
Reader
1.Introduction
Figure 5
Right Side View
1. Microphone-In
Jack 1 2 3
2. Headphone-Out 4 5
Jack
3. USB 2.0 Port
4. Optical Device
Drive Bay
5. Emergency Eject
Hole
1 - 6 External Locator - Left & Right Side View

Introduction
External Locator - Bottom View

Figure 6
Bottom View
1. Vent
5 2. Component Bay
Cover
3. Hard Disk Bay
Cover
1
4. Speakers
5. Battery
6. USIM Card Cover
1.Introduction
1 2
1 6
3 1
4 4 
Overheating
To prevent your com-

puter from overheating
make sure nothing
blocks the vent/fan in-
takes while the com-
puter is in use.
External Locator - Bottom View 1 - 7

Introduction
Figure 7 Mainboard Overview - Top (Key Parts)

Mainboard Top
Key Parts
1. JMB261
2. Clock Generator
3. ITE 8502E
1.Introduction
1 - 8 Mainboard Overview - Top (Key Parts)

Introduction
Mainboard Overview - Bottom (Key Parts) Figure 8

Mainboard Bottom
Key Parts
1. Power IC
2. CPU Socket (no
1 CPU installed)
3. Mini-Card
Connector
(Wireless Lan
3 Module)
2 4. Memory Slots
DDR3 SO-DIMM
1.Introduction
5. Half Mini-Card
Connector (3G
Module)
6. Audio AMP
7. USIM Card
4 8. Card Reader
Socket
5 7 8
Mainboard Overview - Bottom (Key Parts) 1 - 9

Introduction
Figure 9 Mainboard Overview - Top (Connectors)

Mainboard Top
Connectors
1. USB Ports
2. Speaker Cable
Connector
3. Microphone Cable
Connector
4. Click Board LED
8
Connector
5. Touch Pad Cable
Connector
1.Introduction
6. Audio Cable
Connector
7
7. Keyboard Cable
Connector
8. Switch Cable 1
Connector
3
5
4
1 - 10 Mainboard Overview - Top (Connectors)

Introduction
Mainboard Overview - Bottom (Connectors) Figure 10

Mainboard Bottom
8 Connectors
1. Bluetooth Cable
10 9 7 Connector
2. ODD Connector
3. HDD Connector
4. CMOS Battery
6 Connector
5. Fan Cable
Connector
6. RJ-45 LAN Jack
1.Introduction
7. External Monitor
Port
1 8. DC-In Jack
9. CCD Cable
Connector
2 10. LCD Cable
Connector
4 5
Mainboard Overview - Bottom (Connectors) 1 - 11

Introduction
1.Introduction
1 - 12
Disassembly
Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the C5100Q/C5100Q-C/C5105/C5105-C series note-
book’s parts and subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated).
We suggest you completely review any procedure before you take the computer apart.
Procedures such as upgrading/replacing the RAM, CD device and hard disk are included in the User’s Manual but are
repeated here for your convenience.
2.Disassembly
To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a 
lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the dis-

Information
assembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previ-
ous disassembly procedure. The amount of screws you should be left with will be listed here also.
A box with a  will also provide any possible helpful information. A box with a  contains warnings.
An example of these types of boxes are shown in the sidebar. 

Warning
Overview 2 - 1
Disassembly
NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).
Maintenance Tools
The following tools are recommended when working on the notebook PC:
• M3 Philips-head screwdriver
• M2.5 Philips-head screwdriver (magnetized)
• M2 Philips-head screwdriver
• Small flat-head screwdriver
• Pair of needle-nose pliers
• Anti-static wrist-strap
2.Disassembly
Connections
Connections within the computer are one of four types:
Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to
gently pry the locking collar away from its base. When replac-
ing the connection, make sure the connector is oriented in the
same way. The pin1 side is usually not indicated.
Pressure sockets for multi-wire connectors To release this connector type, grasp it at its head and gently
rock it from side to side as you pull it out. Do not pull on the
wires themselves. When replacing the connection, do not try to
force it. The socket only fits one way.
Pressure sockets for ribbon connectors To release these connectors, use a small pair of needle-nose pli-
ers to gently lift the connector away from its socket. When re-
placing the connection, make sure the connector is oriented in
the same way. The pin1 side is usually not indicated.
Board-to-board or multi-pin sockets To separate the boards, gently rock them from side to side as
you pull them apart. If the connection is very tight, use a small
flat-head screwdriver - use just enough force to start.
2 - 2 Overview
Disassembly
Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a re- 
moval and/or replacement job, take the following precautions: Power Safety
Warning
1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other
Before you undertake
components could be damaged. any upgrade proce-
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. dures, make sure that
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong mag- you have turned off the
netic fields. These can hinder proper performance and damage components and/or data. You should also monitor power, and discon-
the position of magnetized tools (i.e. screwdrivers). nected all peripherals
and cables (including
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly telephone lines). It is
damaged. advisable to also re-
5. Be careful with power. Avoid accidental shocks, discharges or explosions. move your battery in
2.Disassembly
•Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. order to prevent acci-
•When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire. dentally turning the
machine on.
6. Peripherals – Turn off and detach any peripherals.
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity.
Before handling any part in the computer, discharge any static electricity inside the computer. When handling a
printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that
you use an anti-static wrist strap instead.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands pro-
duce oils which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted
to charged surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as
screws, loose inside the computer.
Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.
Overview 2 - 3
Disassembly
Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.
To remove the Battery: To remove the Bluetooth Module:

1. Remove the battery page 2 - 5 1. Remove the battery page 2 - 5
2. Remove the Bluetooth Module page 2 - 16
To remove the HDD:
1. Remove the battery page 2 - 5 To remove the Keyboard:
2. Remove the HDD page 2 - 6 1. Remove the battery page 2 - 5
2. Remove the keyboard page 2 - 17
To remove the Optical Device:
2.Disassembly
1. Remove the battery page 2 - 5

2. Remove the Optical device page 2 - 8
To remove the System Memory:
2. Remove the system memory page 2 - 9
To remove and install a Processor:
2. Remove the processor page 2 - 11
3. Install the processor page 2 - 13
To remove the 3G Module:
2. Remove the 3G module page 2 - 14
To remove the Wireless LAN Module:

2. Remove the WLAN module page 2 - 15
2 - 4 Disassembly Steps
Disassembly
Removing the Battery Figure 1

1. Turn the computer off, and turn it over. Battery Removal
2. Slide the latch 1 in the direction of the arrow.
a. Slide latch at point 1 to-
3. Slide the latch 2 in the direction of the arrow, and hold it in place. wards the unlock symbol
4. Slide the battery 63 in the direction of the arrow 4 . and hold it in place.
b. Slide the battery in the di-
rection of the arrow.
a. b.
2
1 3
2.Disassembly
4

2. Battery
Removing the Battery 2 - 5

Disassembly
Removing the Hard Disk Drive

Figure 2 The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm
HDD Assembly (h). Follow your operating system’s installation instructions, and install all necessary drivers and utilities (as outlined in
Removal Chapter 4 of the User’s Manual) when setting up a new hard disk.
a. Locate the HDD bay Hard Disk Upgrade Process

cover and remove th
screws.
1. Turn off the computer, and remove the battery (page 2 - 5).
2. Locate the hard disk bay cover and remove screw 1 & 2 .

2.Disassembly
a.
HDD System Warning
New HDD’s are blank. Before you

begin make sure:
You have backed up any data

you want to keep from your old
HDD.
You have all the CD-ROMs and

FDDs required to install your op-
erating system and programs.
1 2
If you have access to the internet,
download the latest application
and hardware driver updates for
 the operating system you plan to
install. Copy these to a remov-
able medium.
• 2 Screws
2 - 6 Removing the Hard Disk Drive

Disassembly
3. Remove the hard disk bay cover 63 .

4. Grip the tab and slide the hard disk in the direction of arrow 4 . Figure 3
HDD Assembly
5. Lift the hard disk out of the bay 5 .
Removal (cont’d.)
6. Remove screws 6 - 9 and the mylar cover 10 from the hard disk 11 .
7. Reverse the process to install a new hard disk (do not forget to replace all the screws and covers).
b. Remove the HDD bay
cover.
b. d. c. Grip the tab and slide the
HDD in the direction of
the arrow.
d. Lift the HDD assembly
out of the bay.
5 e. Remove the screws and
mylar cover.
2.Disassembly
e.
c. e.
7

6 9 3. HDD Bay Cover
10. Adhesive Cover
10
11. HDD
4 8
• 4 Screws
11
Removing the Hard Disk Drive 2 - 7

Disassembly
Figure 4 Removing the Optical (CD/DVD) Device

Optical Device
1. Turn off the computer, remove the battery (page 2 - 5) and hard disk (page 2 - 6).
Removal
2. Remove the screw at point 1 .
a. Remove the screw at 3. Use a screwdriver to carefully push out the optical device 3 at point 2 .
point 1 . 4. Insert the new device and carefully slide it into the computer (the device only fits one way. DO NOT FORCE IT; The
b. Use a screwdriver to screw holes should line up).
carefully push out the 5. Restart the computer to allow it to automatically detect the new device.
optical device at point
2 .
a. b.
2.Disassembly
2 2

3. Optical Device
• 1 Screw
2 - 8 Removing the Optical (CD/DVD) Device

Disassembly
Removing the System Memory (RAM) Figure 5

RAM Module
The computer has two memory sockets for 200 pin Small Outline Dual In-line Memory Modules (SO-DIMM) supporting Removal
DDRIII (DDR3) Up to 1066/1333 MHz. The main memory can be expanded up to 8GB. The SO-DIMM modules sup-
ported are 1024MB and 2048MB DDRIII Modules. The total memory size is automatically detected by the POST rou- a. Remove the screws
tine once you turn on your computer. from the component
bay cover.
Memory Upgrade Process b. The RAM modules will
1. Turn off the computer, turn it over and remove the battery (page 2 - 5). be visible at point 5
2. Remove screws 1 - 4 from the component bay cover (Figure 5a). on the mainboard.
c. Pull the release lat-
3. The RAM modules will be visible at point 5 on the mainboard (Figure 5b). ches.
4. Gently pull the two release latches ( 6 & 7 ) on the sides of the memory socket in the direction indicated by the d. Remove the module.
arrows (Figure 5c). The RAM module 8 will pop-up (Figure 5d), and you can then remove it.
2.Disassembly
a. c. d.
1 
2
Contact Warning
6 Be careful not to touch

the metal pins on the
3
module’s connecting
8 edge. Even the cleanest
4 hands have oils which
can attract particles, and
degrade the module’s
b. 7 performance.

8. RAM Module
5
• 4 Screws
Removing the System Memory (RAM) 2 - 9

Disassembly
5. Pull the latches to release the second module if necessary.

6. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot.
7. The module will only fit one way as defined by its pin alignment. Make sure the module is seated as far into the slot
as it will go. DO NOT FORCE IT; it should fit without much pressure.
8. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.
9. Replace the component bay cover and the screws (see page 2 - 8).
10. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.
2.Disassembly
2 - 10 Removing the System Memory (RAM)

Disassembly
Removing and Installing a Processor Figure 6

Processor Removal Procedure Processor Removal
1. Turn off the computer, turn it over, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 8). a. Locate the heat sink.
2. Locate the heat sink. b. Remove the screws from
3. Loosen the CPU heat sink screws in the order 4 , 3 , 2 & 1 (the reverse order as indicated on the label Figure the CPU heatsink.
6b). c. Remove the CPU heat
4. Carefully lift up the heat sink 5 (Figure 6c) off the computer. sink.
a. c.
2.Disassembly
A
b.
4 2
1 3

5. Heat Sink
• 4 Screws
Removing and Installing a Processor 2 - 11

Disassembly
5. Turn the release latch 6 towards the unlock symbol to release the CPU (Figure 7d).
Figure 7 6. Carefully (it may be hot) lift the CPU 7 up and out of the socket (Figure 7e).
Processor Removal 7. Reverse the process to install a new CPU.
(cont’d) 8. When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!).
d. Turn the release latch to
unlock the CPU. d.
e. Lift the CPU out of the
socket.
6
2.Disassembly
Unlock Lock
e.

Caution
7 The heat sink, and CPU area in

general, contains parts which are
subject to high temperatures. Allow
the area time to cool before remov-
ing these parts.

7. CPU
2 - 12 Removing and Installing a Processor

Disassembly
Processor Installation Procedure Figure 8

1. Insert the CPU A , pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!), and turn Processor
the release latch B towards the lock symbol (Figure 8b). Installation
2. Remove the sticker C (Figure 8c) from the heat sink.
3. Insert the heat sink D as indicated in Figure 8d. a. Insert the CPU.
4. Tighten the CPU heat sink screws in the order 1 , 2 , 3 & 4 (the order as indicated on the label and Figure b. Turn the release latch to-
wards the lock symbol.
8d).
c. Remove the sticker from
5. Replace the component bay cover (don’t forget to replace the fan cable) and tighten the screws (page 2 - 9). the heat sink and insert
the heat sink.
a. c. d. Tighten the screws.
C
A
2.Disassembly
b. d.
4 2
D
1 3
B 
A. CPU
Note: D. Heat Sink
Tighten the screws
in the order as indi- • 4 Screws
cated on the label.
Removing and Installing a Processor 2 - 13

Disassembly
Figure 9 Removing the 3G Module

3G Module Removal
1. Turn off the computer, turn it over, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 9).
2. The 3G module will be visible at point 1 on the mainboard (Figure 9a).
a. Locate the 3G module.
b. Disconnect the cable
3. Carefully disconnect the cable 2 , and then remove the screw 3 (Figure 9b).
and remove the screw. 4. The 3G module 4 (Figure 9c) will pop-up, and you can remove it from the computer.
c. Remove the 3G module.
a. c.
Note: Make sure you
reconnect the antenna
cable to socket (Fig-
ure 9b).
2.Disassembly
b.
4

4. 3G Module
2
3
• 1 Screw
2 - 14 Removing the 3G Module

Disassembly
Removing the Wireless LAN Module Figure 10

Wireless LAN
1. Turn off the computer, turn it over, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 9).
Module Removal
2. The Wireless LAN module will be visible at point 1 on the mainboard (Figure 10a).
3. Carefully disconnect the cables 2 & 3 , and then remove the screw 4 (Figure 10b).
a. Locate the WLAN.
4. The Wireless LAN module 5 (Figure 10c) will pop-up, and you can remove it from the computer (Figure 10d). b. Disconnect the cable
and remove the screw.
c. The WLAN module will
a. c. d. pop up.
d. Remove the Wireless
LAN module.
1
5
Note: Make sure you
2.Disassembly
5 reconnect the antenna
cable to the “1 + 2”
socket (Figure 10b).
b.

2 5.Wireless LAN Module
• 1 Screw
3
4
Removing the Wireless LAN Module 2 - 15

Disassembly
Figure 11 Removing the Bluetooth Module

Bluetooth Module 1. Turn off the computer, turn it over, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 8).
Removal 2. The Bluetooth module will be visible at point 1 on the mainboard (Figure 11a).
3. Remove the screw 2 (Figure 11b) and turn the module over (Figure 11c).
a. Locate the Bluetooth 4. Carefully disconnect the cable 3 and separate the connector 4 (Figure 11c) from the Bluetooth Module.
module.
5. Lift the Bluetooth Module 5 (Figure 11d) up and off the computer.
b. Remove the screw.
c. Disconnect the cable
and the connector from a. d.
the Bluetooth module.
d. Lift the Bluetooth module
out.
1
2.Disassembly
b. c.
2
3

5. Bluetooth Module
4
• 1 Screw
2 - 16 Removing the Bluetooth Module

Disassembly
Removing the Keyboard Figure 12

Keyboard Removal
1. Turn off the computer, and remove the battery (page 2 - 5).
2. Remove screws 1 - 2 from the bottom of the computer. Press at point 3 to unsnap the LED cover module (you a. Remove screws from the
may need to use a small screwdriver to do this Figure 12a). bottom of the computer.
b. Turn the computer over,
3. Turn the computer over, unsnap up the LED cover module 4 from point 5 to the right (Figure 12b).
unsnap up the LED cov-
4. Remove screws 6 - 10 from the keyboard (Figure 12c). er module from point 5
5. Carefully lift the keyboard up, being careful not to bend the keyboard ribbon cable 11 . Disconnect the keyboard to the right .
ribbon cable 11 from the locking collar socket 12 (Figure 12d) c. Remove screws from
6. Carefully lift up the keyboard 13 (Figure 12e) off the computer. the keyboard.
d. Carefully lift the key-
a. board up and disconnect
d.
the keyboard ribbon ca-
11 ble from the locking col-
2.Disassembly
lar socket.
12 e. Remove the keyboard.
1 3 2
b.

5
Re-Inserting the
4 Keyboard
e.
When re-inserting the
keyboard firstly align the
four keyboard tabs at the
bottom (Figure 12c) at
the bottom of the key-
c. board with the slots in the
case.
6 7 8 9 10
13

4. LED Cover Module
13. Keyboard
• 7 Screws
Keyboard Tabs
Removing the Keyboard 2 - 17

Disassembly
2.Disassembly
2 - 18
Part Lists
Appendix A:Part Lists

This appendix breaks down the C5100Q/C5100Q-C/C5105/C5105-C series notebook’s construction into a series of il-
lustrations. The component part numbers are indicated in the tables opposite the drawings.
Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.
Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.
Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the
A.Part Lists
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.
A - 1
Part Lists
Part List Illustration Location

The following table indicates where to find the appropriate part list illustration.
Table A - 1
Part List Illustration
C5100Q/C5100Q-C/C5105/
Location Part
C5105-C
Top (C5105Q) page A - 3

Top (C5100Q) page A - 4
Bottom page A - 5
DVD Dual Drive page A - 6
A.Part Lists
LCD page A - 7
A - 2 Part List Illustration Location

Part Lists
Top (C5105Q)
Figure A - 1
A.Part Lists
Top (C5105Q)
非耐落
灰色
Top (C5105Q) A - 3
Part Lists
Top (C5100Q)
Figure A - 2
A.Part Lists
Top (C5100Q)
非耐落
灰色
A - 4 Top (C5100Q)
Part Lists
Bottom
Figure A - 3
Bottom
A.Part Lists
Bottom A - 5
Part Lists
DVD Dual Drive
Figure A - 4
A.Part Lists
DVD Dual Drive
非耐落
志精
A - 6 DVD Dual Drive

Part Lists
LCD
Figure A - 5
LCD
A.Part Lists
頭厚
非耐落
LCD A - 7
Part Lists
A.Part Lists
A-8
Schematic Diagrams
Appendix B:Schematic Diagrams

This appendix has circuit diagrams of the C5100Q/C5100Q-C/C5105/C5105-C notebook’s PCB’s. The following table
indicates where to find the appropriate schematic diagram.
Diagram - Page Diagram - Page Diagram - Page Table B - 1

Schematic
System Block Diagram - Page B - 2 Panel, CRT - Page B - 15 LED, CCD, Audio Conn - Page B - 28
Diagrams
Clock Generator - Page B - 3 Inverter, Bluetooth, Fan - Page B - 16 System Power, PWR SW - Page B - 29
B.Schematic Diagrams
Penryn (Socket-P)1/2 - Page B - 4 ICH9M 1/4, SATA - Page B - 17 AC_In, Charger - Page B - 30
Penryn (Socket-P)2/2 - Page B - 5 ICH9M 2/4, PCI, USB - Page B - 18 VCORE - Page B - 31
CANTIGA 1/7, HOST - Page B - 6 ICH9M 3/4 - Page B - 19 VDD3, VDD5 - Page B - 32
CANTIGA 2/7, Graphics - Page B - 7 ICH9M 4/4 - Page B - 20 1.8V/1.05VS - Page B - 33
CANTIGA 3/7 - Page B - 8 HDMI - Page B - 21 1.5V,0.75VS - Page B - 34

CANTIGA 4/7 - Page B - 9 KBC-ITE IT8502E - Page B - 22 Click Board - Page B - 35
CANTIGA 5/7 - Page B - 10 Card Reader/LAN JMB261C - Page B - 23 Audio Board/USB - Page B - 36
Version Note
CANTIGA 6/7 - Page B - 11 Audio Codec VT1812 - Page B - 24 Power Switch & Lid Board - Page B - 37
The schematic dia-
grams in this chapter
CANTIGA 7/7 - Page B - 12 Audio AMP - Page B - 25 External Odd Board - Page B - 38
are based upon ver-
DDRIII SO-DIMM A - Page B - 13 HDD, ODD, MDC, TP, Conn, 3G - Page B - 26 Power Sequence V1.0 - Page B - 39 sion 6-7P-C5105-002.
If your mainboard (or
DDRIII SO-DIMM B - Page B - 14 other boards) are a lat-
New Card, USB, Mini PCIE - Page B - 27 er version, please
check with the Service
Center for updated di-
agrams (if required).
B - 1
Schematic Diagrams
System Block Diagram

SYSTEM POWER CLEVO C5100Q System Block Diagram +VCORE
AC-IN,CHARGER VDD3,VDD5,3.3V,5V
CLOCK GEN. Intel Penryn Memory Termination
SLG8SP513V
PROCESSOR 1.8V,1.05VS
478pins uFCBGA DDRIII
SO-DIMM1
14.318 MHz
1.5V,0.75VS
DDRIII
Audio Board SO-DIMM2
MIC IN,HEADPHONE 0.5"~5.5"

FSB
USB11 667/800 MHz
LCD CONNECTOR,
Sheet 1 of 38 INVERTER NORTH BRIDGE
System Block CLICK BOARD
TOUCH PAD Intel GL40
Diagram Synaptic CRT 667/800MHz
RJ-11
MIC
IN
HP
OUT
810602-1703
1329 Ball FCBGA
HDMI
AZALIA
32.768 KHz Azalia Codec
MDC AUDIO AMP
EC MODULE VT1812
SPI <=8"
ITE 8502E DMI 48pins LQFP 24pins TSSOP
128pins LQFP INT SPK
LPC 33 MHz SYSTEM SMBUS MDC CON 9 *9*1. 6mm 9 .8 *6.4 *1. 2mm
14 *1 4*1 .6m m
0.1"~13
SOUTH BRIDGE AZALIA LINK 24 MHz INT MIC
ICH9M
INT. K/B EC SMBUS
676 mBGA
PCIE 100 MHz
THERMAL SMART SMART
SENSOR FAN BATTERY
32.768KHz
F75383M
New Card Mini PCIE
CARD READER SOCKET SOCKET
SATA I/II 3.0Gb/s RJ-45 LAN
USB2.0 (USB8) (USB4)
PATA-133 480 Mbps JMC261C
SATA HDD, SATA ODD 3G CARD USB & Phone 4IN1

CCD USB2 USB USB Jack B'd
LID SOCKET
USB5 (JUSB0) (JUSB1)
Bluetooth
USB3
B - 2 System Block Diagram

Schematic Diagrams
Clock Generator
CLOCK GENERATOR
3 .3 VS_ G 1. 0 5 V S _ G
1 .0 5 VS
R 1 79 *2 0m i l _ sh o rt _ 04
C 50 4 C 2 47 C2 1 8 C 50 3 C2 0 6 C5 0 7 C 5 05 C2 4 9 C2 1 6 C 22 2 C2 2 1 C2 2 5 C 2 46 C2 5 0
C 2 45 C 24 8
1 u _6 . 3 V _ Y 5 V _ 0 4 0 . 1 u _ 16 V _ Y 5V _ 0 4 0 . 1u _ 1 6V _Y 5 V _ 04 0 . 1 u_ 1 6 V _ Y 5 V _ 004. 1u _ 1 6 V _Y 5 V _ 040. 1 u _ 1 6V _ Y 5V _004. 1 u _ 16 V _ Y 5 V _ 0 4 1 u_ 6 . 3 V _ Y 5 V _ 0 40. 1u _ 1 6V _Y 5 V _0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 004. 1u _ 1 6V _Y 5 V _ 040. 1 u _ 16 V _ Y 5V _0 4 0 . 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1u _ 1 6V _Y 5 V _0 4
1 0 u _ 6. 3 V _ X 5 R _ 016u _ 6. 3 V _ Y 5V _ 0 4
0.1uF near the every power pin.
PLACE CRYSTAL 3 .3 VS 3 .3 VS
WITHIN 500 MILS
3 .3 VS_ G
OF CK410M
C 5 02 C 5 01 R3 5 1 *2 0 m il _ s ho rt _ 0 4
X T A L _I N
1 0 u _6 . 3 V _ X 5 R _ 0 8 1 u _ 6. 3 V _ Y 5V _ 0 4
X1
1 2 X T A L _O U T
10mil
3 . 3V S _G U6
F S X 8 L _1 4 . 3 1 81 8 MH z 1 .0 5 VS _ G
C2 0 9 C 2 10 4
9
16
VD
VD
D_ RE F
D_ P CI
V DD _ I/O
V D D _P L L 3 _ I / O
19
27
33
Sheet 2 of 38
3 3 p_ 5 0 V _ N P O _0 4 3 3 p _5 0 V _ N P O_ 0 4
23
46
62
VD
VD
VD
D_ 4 8
D _ P L L3
D_ S RC
V D D _ S R C _ I / O _1
V D D _ S R C _ I / O _2
V D D _ S R C _ I / O _3
43
52
56
Clock Generator
VD D_ CP U V DD _ CP U _ I/O
44
C P U _ S T OP # 45 P M_ S T P C P U # 1 8
X T A L_ O U T 2 P C I _ S T OP # 63 V T T_ P W R _ GD P M_ S T P P C I # 1 8
X T A L_ I N 3 X T A L_ O U T C K P W R GD / P D #
P C LK TP M 8 X T A L_ I N 61 CL K _ CP U_ B CL K
R1 3 2 *1 0 K _ 04 C L K _C P U _ B C L K 3
10 P C I _0 / C LK R E Q _A # C P U _0 60 CL K _ CP U_ B CL K #
18 P W RS A V E # 11 P C I _1 / C LK R E Q _B # C P U _ 0# 58 C L K _ MC H_ B C L K C L K _C P U _ B C L K # 3
P CL K _ K B C R1 2 7 33 _ 0 4 P C LK K B C 12 P C I _2 C P U _ 1 _ MC H 57 C L K _ MC H_ B C L K # CL K _ M CH_ B C L K 5
21 P C LK _K B C C LK _ S E L 13 P C I _3 C P U _1 _ MC H # 54 CL K _ P C I E _N E W _ C A R D CL K _ M CH_ B C L K # 5
R1 3 0 33 _ 0 4 P C LK I C H 14 ^P C I _4 / L C D C LK _ S E L S R C _ 8/ C P U _ I T P 53 CL K _ P C I E _N E W _ C A R D # CL K _ P C IE _ NE W _ C A RD 2 6
17 P C LK _ I C H P C I F _ 5/ I T P _ E N S R C _ 8 # / C P U _I T P # C L K _ P C I E _ N E W _ C A R D # 26
R1 2 9 10 K _ 0 4
R1 5 1 33 _ 0 4
18 C L K _ I C H 48 17 55
CL K _ B S E L 0 R1 4 4 2. 2 K _ 0 4 FSL A
CL K _ B S E L 1 FSL B 64 U S B _4 8 MH z/ F S _A N C
R1 5 2 *1 0 mi l _ sh o rt
F S _ B / T E S T _ MO D E
D02
CL K _ B S E L 2 R1 2 8 2. 2 K _ 0 4 FSL C 5 24 CL K _ DR E F S S
CL K _ ICH 1 4 RE F /F S _ C/T E S T _ S E L L CD CL K /2 7 M 25 CL K _ DR E F S S # C L K _D R E F S S 7
R1 3 6 33 _ 0 4
18 C L K _ I C H 14 L C D C L K # / 2 7 M_ S S C L K _D R E F S S # 7
CL K _ DR E F 20
7 CL K _ DR E F S R C _ 0 / D O T_ 9 6
CL K _ DR E F # 21
7 CL K _ DR E F # S R C _ 0 #/ D OT _ 9 6# 28 CL K _ S A T A
7 S R C _2 29 CL K _ S A T A # C L K _S A TA 16
1 2 , 1 3, 1 8 I C H _ S MB C L K 0 6 SC L S R C _ 2# 31 C L K _S A TA # 1 6
C L K _ P C I E _I C H
1 2 , 1 3, 1 8 I C H _ S MB D A T 0 SD A S R C _ 3 / C L K R E Q_ C # 32 C L K _ P C I E _I C H # C L K _P CIE _ IC H 1 7
1 S R C _ 3 # / C L K R E Q_ D # 34 C L K _P CIE _ IC H# 1 7
15 VSS_ R EF S R C _4 35
R 12 6 *1 0 K _ 0 4 CL K _ S E L 18 VSS_ PC I S R C _ 4# 48 C L K _ P C I E _C R
3 .3 VS 22 VSS_ 4 8 S R C _6 47 C L K _ P C I E _C R # C L K _ P C I E _ C R 22
R 13 1 1 0K _0 4 26 V S S _ I/O S R C _ 6# 51 R 17 0 4 75 _ 1 %_ 0 4 CL K _ P C IE _ CR # 2 2
30 VSS_ PL L 3 S R C _ 7 / C LK R E Q_ F # 50 N E W C A R D _ C L K R E Q# 2 6
L A N _ C L K R E Q# R1 7 2 4 7 5 _1 % _ 0 4
36 V S S _ S R C_ 1 S R C _7 # / C LK R E Q_ E # 37 C L K _ P C I E _M I N I
49 V S S _ S R C_ 2 S R C _9 38 C L K _ P C I E _ MI N I 2 6
C L K _ P C I E _M I N I #
59 V S S _ S R C_ 3 S R C _ 9# 41 CLK_PC IE_3G PLL C L K _ P C I E _ MI N I # 26
65 VSS_ C PU S R C _ 10 42 C L K _ P C I E _ 3G P L L 7
C L K _ P C I E _3 G P L L#
V T T_ P W R _ GD 66 T H R M_ P A D _1 S R C _ 1 0# 40 C L K _ P C I E _ 3G P L L# 7
3 .3 VS R1 5 9 10 0 K _ 0 4 R 17 8 4 75 _ 1 %_ 0 4 MC H _ C LK R E Q # 7
67 T H R M_ P A D _2 S R C _ 1 1 / C L K R E Q_ H # 39 R 18 0 3 3_ 0 4
68 T H R M_ P A D _3 S R C _1 1 # / C L K R E Q_ G# W L A N _ C LK R E Q # 26
C 21 7 R1 6 1 0_ 0 4 C 21 5 69 T H R M_ P A D _4
1 8 C L K _ P W R GD 70 T H R M_ P A D _5
C 5 82
0 . 1 u _1 6 V _ Y 5 V _ 0 4 * . 1U _ 10 V _ X 7 R _ 0 4 T H R M_ P A D _6
2 2 p _ 50 V _ N P O_ 0 4
EMI S L G 8S P 51 3 V
1 . 05 V S
7 M CH _ B S E L 1 MC H _ B S E L 2 7
F SC F SB FS A C K5 05
1 . 0 5V S
H os t Cl oc k
1
2
3
4
B SE L2 BS EL 1 BS EL 0 Fr eq ue nc y
R N2 6
1 K _ 8P 4R _ 04 0 0 1 13 3 MH z 5 33 M Hz
8
7
6
5
R 13 7 0 1 1 16 6 MH z 6 67 M Hz
* 56 _ 0 4 C L K _B S E L 1 0 1 0 20 0 MH z 8 00 M Hz
3 C P U_ B S E L 1
C L K_ BSEL 0 0 0 0 26 6 MH z 1 06 6 MH z
3 CP U _ B S E L 0
R 1 50 * 0_ 0 4
R 14 3 1 K _ 04 R 13 8
C L K _B S E L 2
3 C P U_ B S E L 2 3 , 6 , 7 , 10 , 1 2 , 1 3, 1 4 , 1 5 , 16 , 1 7 , 1 8, 1 9 , 2 0 , 21 , 2 2 , 2 3, 2 4 , 2 5 , 26 , 2 7 , 2 8, 3 0 3 . 3 V S
1 K_ 0 4
3 , 1 5, 1 6 , 1 7 , 18 , 1 9 , 2 1, 2 2 , 2 5 , 26 , 2 8 , 3 2, 3 3 3 . 3 V
R 1 33 * 0_ 0 4
M C H _ B S E L0 7
Clock Generator B - 3
Schematic Diagrams
Penryn (Socket-P)1/2
J S K T1 A
5 H _A # [ 35 : 3 ] H_A # 3 J4 H 1
H_A # 4 L5 A [ 3] # A DS # E2 H _A D S# 5
A [ 4] # BN R# H _B N R# 5 J S KT 1 B
H_A # 5 L4 G5
K5 A [ 5] # B P RI # H _B P RI # 5 5 H_ D# [ 6 3: 0 ] E 22 Y2 2 H_ D# [ 63 : 0 ] 5
H_A # 6 H _ D #0 H _ D # 32
H_A # 7 M3 A [ 6] # H 5 H _ D #1 F 24 D[ 0] # D [ 32 ] # AB2 4 H _ D # 33
A [ 7] # DEF ER# H _D E FE R # 5 D[ 1] # D [ 33 ] #
ADDR GROUP_0
H_A # 8 N2 F2 1 H _ D #2 E 26 V2 4 H _ D # 34
H_A # 9 J1 A [ 8] # D RD Y # E1 H _D R DY # 5 H _ D #3 G 22 D[ 2] # D [ 34 ] # V2 6 H _ D # 35
N3 A [ 9] # DB S Y # H _D B SY # 5 F 23 D[ 3] # D [ 35 ] # V2 3
H_A # 1 0 H _ D #4 H _ D # 36
CONTROL
H_A # 1 1 P5 A [ 10 ] # F1 H _ D #5 G 25 D[ 4] # D [ 36 ] # T 22 H _ D # 37
A [ 11 ] # B R0 # H _B R 0# 5 D[ 5] # D [ 37 ] #
DATAGRP 0
H_A # 1 2 P2 H _ D #6 E 25 U2 5 H _ D # 38
DATA GRP 2
H_A # 1 3 L2 A [ 12 ] # D 20 H _ I E R R# H _ D #7 E 23 D[ 6] # D [ 38 ] # U2 3 H _ D # 39
H_A # 1 4 P4 A [ 13 ] # IE R R # B3 H _ D #8 K 24 D[ 7] # D [ 39 ] # Y2 5 H _ D # 40
P1 A [ 14 ] # INIT # H _I N I T# 16 G 24 D[ 8] # D [ 40 ] # W22
H_A # 1 5 Zo= 55O? 5% H _ D #9 H _ D # 41
H_A # 1 6 R1 A [ 15 ] # H 4 H _ D #1 0 J 24 D[ 9] # D [ 41 ] # Y2 3 H _ D # 42
M1 A [ 16 ] # LO CK # H _L OCK # 5 H _ D #1 1 J 23 D[ 10 ] # D [ 42 ] # W24 H _ D # 43
5 H_ AD S TB # 0 A D S TB [ 0 ] # C 1 H _ D #1 2 H 22 D[ 11 ] # D [ 43 ] # W25 H _ D # 44
5 H_ RE Q# [ 4: 0 ] K3 R ES E T # F3 H _C P UR S T # 5 H_CPURST# 1"<L<5" F 26 D[ 12 ] # D [ 44 ] # AA2 3
H_R E Q# 0 H _R S #0 5 H _ D #1 3 H _ D # 45
H_R E Q# 1 H2 RE Q[ 0 ] # RS [ 0 ] # F4 H _ D #1 4 K 22 D[ 13 ] # D [ 45 ] # AA2 4 H _ D # 46
H_R E Q# 2 K2 RE Q[ 1 ] # RS [ 1 ] # G3 H _R S #1 5 H _ D #1 5 H 23 D[ 14 ] # D [ 46 ] # AB2 5 H _ D # 47
H_R E Q# 3 J3 RE Q[ 2 ] # RS [ 2 ] # G2 H _R S #2 5 J 26 D[ 15 ] # D [ 47 ] # Y2 6
H_R E Q# 4 L1 RE Q[ 3 ] # TRD Y # H _T R DY # 5 5 H _ D S T B N #0 H 26 DS TB N [ 0] # D ST B N[ 2 ] # AA2 6 H_D S TB N # 2 5
RE Q[ 4 ] # G6 5 H _ D S T B P #0 H 25 DS TB P [ 0 ] # D S TB P [ 2 ] # U2 2 H_D S TB P # 2 5
5 H_ A# [ 3 5: 3 ] H_A # 1 7 Y2 HIT # E4 H _H I T# 5 5 H _ D I NV # 0 DI N V [ 0 ] # DI N V [ 2 ] # H_D I N V #2 5 Zo= 55O? 5%
H_A # 1 8 U5 A [ 17 ] # HI T M# H _H I TM# 5 Zo= 55O? 5%
H_A # 1 9 R3 A [ 18 ] # AD 4 H _ B P M0 # 5 H_D #[ 6 3: 0 ] H _ D #1 6 N 22 AE2 4 H _ D # 48 H_ D# [ 63 : 0 ] 5
H_A # 2 0 W6 A [ 19 ] # B P M[ 0 ] # AD 3 H _ B P M1 # H _ D #1 7 K 25 D[ 16 ] # D [ 48 ] # AD2 4 H _ D # 49
U4 A [ 20 ] # B P M[ 1 ] # AD 1 P 26 D[ 17 ] # D [ 49 ] # AA2 1
XDP/ITP SIGNALS
H_A # 2 1 H _ B P M2 # H _ D #1 8 H _ D # 50
A [ 21 ] # B P M[ 2 ] # D[ 18 ] # D [ 50 ] #
GROUP_1
ADDR
H_A # 2 2 Y5 AC 4 H _ B P M3 # H _ D #1 9 R 23 AB2 2 H _ D # 51
H_A # 2 3 U1 A [ 22 ] # B P M[ 3 ] # AC 2 H _ P RD Y # H _ D #2 0 L 23 D[ 19 ] # D [ 51 ] # AB2 1 H _ D # 52
H_A # 2 4 R4 A [ 23 ] # P RD Y # AC 1 H _ P RE Q# H _ D #2 1 M 24 D[ 20 ] # D [ 52 ] # AC2 6 H _ D # 53
T5 A [ 24 ] # PR E Q# AC 5 L 22 D[ 21 ] # D [ 53 ] # AD2 0
DATA GRP 3
DATA GRP 1
H_NMI H_A # 2 5 H _ T CK H _ D #2 2 H _ D # 54
H_INTR H_A # 2 6 T3 A [ 25 ] # TC K AA6 H _ T DI H _ D #2 3 M 23 D[ 22 ] # D [ 54 ] # AE2 2 H _ D # 55
H_A # 2 7 W2 A [ 26 ] # TD I AB3 H _ T DO H _ D #2 4 P 25 D[ 23 ] # D [ 55 ] # AF 2 3 H _ D # 56
H_A20M# A [ 27 ] # T DO D[ 24 ] # D [ 56 ] #
H_A # 2 8 W5 AB5 H _ T MS H _ D #2 5 P 23 AC2 5 H _ D # 57
H_DPSLP# H_A # 2 9 Y4 A [ 28 ] # TM S AB6 H _ T RS T# H _ D #2 6 P 22 D[ 25 ] # D [ 57 ] # AE2 1 H _ D # 58
Sheet 3 of 38 H_IGNNE#
H_INIT#
H_SMI#
H_A # 3 0
H_A # 3 1
H_A # 3 2
U2
V4
W3
A [ 29 ] #
A [ 30 ] #
A [ 31 ] #
TR S T #
D BR#
C 20 I T P _DB R S T# H _ D #2 7
H _ D #2 8
H _ D #2 9
T 24
R 24
L 25
D[ 26 ] #
D[ 27 ] #
D[ 28 ] #
D [ 58 ] #
D [ 59 ] #
D [ 60 ] #
AD2 1
AC2 2
AD2 3
H _ D # 59
H _ D # 60
H _ D # 61
A [ 32 ] # D[ 29 ] # D [ 61 ] #
Penryn (Socket- H_STPCLK#
0.5" < L< 12"
CPU TO ICH with same
H_A # 3 3
H_A # 3 4
H_A # 3 5
AA4
AB2
AA3
A [ 33 ] #
A [ 34 ] #
THERMAL
D 21 H _ P ROC H OT #
H _ D #3 0
H _ D #3 1
T 25
N 25
L 26
D[ 30 ] #
D[ 31 ] #
D [ 62 ] #
D [ 63 ] #
AF 2 2
AC2 3
AE2 5
H _ D # 62
H _ D # 63
ground plane V1 A [ 35 ] # P R O CH OT # A2 4 H _ T HE RMDA 5 H _ D S T B N #1 M 26 DS TB N [ 1] # D ST B N[ 3 ] # AF 2 4 H_D S TB N # 3 5
P)1/2 <12 inch es

5
16
H _A D S TB # 1
H _A 2 0 M#
A6
A5
A D S TB [ 1 ] #
A 20 M#
T HE RMD A
TH E RMDC
B2 5
C 7
H _ T HE RMDC 5
5
H _ D S T B P #1
H _ D I NV # 1
N 24
A D 26
DS TB P [ 1 ] #
DI N V [ 1 ] #
D S TB P [ 3 ] #
DI N V [ 3 ] #
AC2 0
R2 6
H_D S TB P # 3 5
H_D I N V #3 5
ICH
C OM P 0 COMP[3:0]
16 H _ F E R R# C4 F E RR # TH E RMT R I P # P M _T HR M TRI P # 7 , 16 , 31 R 3 26 * 1K _ 04 C P U _ TE S T 1 C 23 GTL RE F CO MP [ 0] U2 6 C OM P 1
16 H _I G NN E # I GN NE # TE S T 1 MISC CO MP [ 1] traces should be at least 25 mils (> 50 mils
R 3 24 * 1K _ 04 C P U _ TE S T 2 D 25 AA1 C OM P 2
D5 C P U _ TE S T 3 C 24 TE S T 2 CO MP [ 2] Y1 C OM P 3 preferred) away from any other toggling
16 H _S T P C L K # C6 S TP CL K # A F 26 TE S T 3 CO MP [ 3] signal.
HCLK C 4 13 *. 1 U_ 10 V _X 7 R _0 4 C P U _ TE S T 4
16 H _I N TR B4 LI N T0 A2 2 C P U _ TE S T 5 AF1 TE S T 4 E5
16 H _N MI A3 LI N T1 B CL K [ 0 ] A 2 1 C LK _ CP U_ B C L K 2 C P U _ TE S T 6 A 26 TE S T 5 DPRST P# B5 H_D P RS TP # 7, 1 6 , 30
16 H _S M I # S MI # B CL K [ 1 ] C LK _ CP U_ B C L K # 2 C P U _ TE S T 7 C3 TE S T 6 DP S L P # D2 4 H_D P S LP # 16
C P UR S V D0 1 M4 B 22 TE S T 7 D P W R# D6 H_D P WR # 5
N5 RS V D [ 0 1] 2 C P U _ B S E L0 B 23 B SE L [ 0 ] P W RG OOD D7 H_P W RG D 1 6
C P UR S V D0 2
C P UR S V D0 3 T2 RS V D [ 0 2] 2 C P U _ B S E L1 C 21 B SE L [ 1 ] SL P# AE6 H_C P US LP # 5
RESERVED
C P UR S V D0 4 V3 RS V D [ 0 3] 2 C P U _ B S E L2 B SE L [ 2 ] P SI# PS I # 30
C P UR S V D0 5 B2 RS V D [ 0 4]
Layout note: F OX CON N P Z 47 82 A -2 74 M-0 1 TO POWER PAGE
C P UR S V D0 6 D2 RS V D [ 0 5]
C P UR S V D0 7 D 22 RS V D [ 0 6] Zo=55 ohm, 0.5"max for
C P UR S V D0 8 D3 RS V D [ 0 7]
C P UR S V D0 9 F6 RS V D [ 0 8] GTLREF
RS V D [ 0 9] 10mils CP U_ GT L RE F R 31 8 1K _ 1% _ 04 1 . 05 V S Layout note:
no decoupling should be COMP0, COMP2: 0.5" Max, Zo=27.4 Ohms
placed on the R 31 9
F OX CON N P Z 47 8 2A -2 74 M-0 1 GTLREF pin COMP1, COMP3: 0.5" Max, Zo=55 Ohms
2 K _1 % _0 4
DESIGN GUIDE P.65 Best estimate is 18 mils wide trace for outer
layers and 14 mils wide trace if on internal
layers.
If PRO CHOT # is rou ted betw een CPU, IMV P an d MC H,
C OMP 0
pu ll-u p re sist or h as t o be 68 ohm ? 5% . If not C OMP 1
C OMP 2
us e, p ull- up r esis tor has to b e 56 ohm ? 5 %
C OMP 3
1. 0 5V S
R 3 28 5 6 _0 4 H _I E R R #
THERMAL SENSER
R2 5 5 4 . 9_ 1% _ 04 H _P RE Q # R 31 R2 9 R 32 1 R3 22
R 3 25 5 6 _0 4 H _P RO C HOT #
3 . 3V 5 4. 9 _ 1% _0 4 27 . 4 _1 %_ 0 4 5 4 .9 _ 1% _0 4 27 . 4 _1 %_ 0 4
R3 3 0
R2 7 5 4 . 9_ 1% _ 04 H _T MS Layout Note: 1 0K _ 04
R2 6 5 4 . 9_ 1% _ 04 H _T DI C4 42
Within 2.0" R 32 9
R2 8 5 4 . 9_ 1% _ 04 H _T CK *1 U _ 6. 3 V _0 4
R 3 20 5 4 . 9_ 1% _ 04 H _T RS T # of the CPU * 10 m li _s h ort
U1 4
1 4 T H E R M_ A L ER T# 21
H_T H E R M D A 2V DD T HE R M 6 D 35 R B 7 51 V
3. 3 V S D + AL ERT C A
C4 33 R3 3 1 *0 _ 04 P M_ T HR M# 18
R 3 27 * 1K _ 04 I T P _D B R S T# 1 00 0p _ 50 V _X 7 R_0 4
3 7
5 D - SDAT A 8 SM D _ C P U _ THE R M 21
H_T H E R M D C
G ND S CL K SM C _ C P U _ THE R M 21
H_TD I W 83 L7 7 1A W G
Circ ult: 54. 9 oh m ch eck 150 ohm
Layout Note: Layout Note:
Route H_THERMDA and Near to Thermal
H_THERMDC on same layer. IC
2 , 6, 7 , 10 , 1 2, 1 3, 1 4 , 15 , 16 , 17 , 1 8, 1 9, 2 0 , 21 , 22 , 2 3, 2 4, 2 5 , 26 , 27 , 28 , 3 0 3 . 3V S
1 5, 1 6, 1 7 , 18 , 19 , 2 1, 2 2, 2 5 , 26 , 28 , 32 , 3 3 3 . 3V 10 mil trace on 10 mil
spacing.
B - 4 Penryn (Socket-P)1/2
Schematic Diagrams
Penryn (Socket-P)2/2
V C OR E
PLACE NEAR CPU
C4 1 7 C4 1 9 C4 2 3 C4 1 8 C1 7 C2 3 C2 7 C3 1
JS K T1 D
10 u _ 6 . 3V _X 5R _ 08
*1 0 u_ 6 . 3 V _ X 5 R _ 0 6
10 u _ 6 . 3V _X 5R _ 08
10 u _ 6 . 3V _X 5R _ 08
*1 0 u_ 6 . 3 V _ X 5 R _ 0 8
10 u _ 6 . 3V _X 5R _ 08
*1 0 u_ 6 . 3 V _ X 5 R _ 0 8
*1 0 u_ 6 . 3 V _ X 5 R _ 0 8
A4 P6
A8 V S S [ 0 01 ] V S S [0 8 2] P2 1
A 11 V S S [ 0 02 ] V S S [0 8 3] P2 4
A 14 V S S [ 0 03 ] V S S [0 8 4] R2
V C OR E V CO RE A 16 V S S [ 0 04 ] V S S [0 8 5] R5
A 19 V S S [ 0 05 ] V S S [0 8 6] R2 2
JS K T1 C
A7 AB 20 A 23 V S S [ 0 06 ] V S S [0 8 7] R2 5
A9 VC C[ 00 1 ] V C C [06 8 ] AB 7 AF2 V S S [ 0 07 ] V S S [0 8 8] T1
A1 0 VC C[ 00 2 ] V C C [06 9 ] AC 7 B6 V S S [ 0 08 ] V S S [0 8 9] T4
A1 2 VC C[ 00 3 ] V C C [07 0 ] AC 9 B8 V S S [ 0 09 ] V S S [0 9 0] T 23
A1 3 VC C[ 00 4 ] V C C [07 1 ] AC 12 B 11 V S S [ 0 10 ] V S S [0 9 1] T 26 V C OR E
A1 5 VC C[ 00 5 ] V C C [07 2 ] AC 13 B 13 V S S [ 0 11 ] V S S [0 9 2] U3
A1 7 VC C[ 00 6 ] V C C [07 3 ] AC 15 B 16 V S S [ 0 12 ] V S S [0 9 3] U6
A1 8 VC C[ 00 7 ] V C C [07 4 ] AC 17 B 19 V S S [ 0 13 ] V S S [0 9 4] U2 1
A2 0 VC C[ 00 8 ] V C C [07 5 ] AC 18 B 21 V S S [ 0 14 ] V S S [0 9 5] U2 4 C4 1 6 C4 2 4 C 42 5 C 22
B7 VC C[ 00 9 ] V C C [07 6 ] AD 7 B 24 V S S [ 0 15 ] V S S [0 9 6] V2
B9 VC C[ 01 0 ] V C C [07 7 ] AD 9 C5 V S S [ 0 16 ] V S S [0 9 7] V5 2 2u _ 6 .3 V _ X5 R _0 8 2 2 u_ 6 .3 V _ X5 R _ 08 2 2 u_ 6 .3 V _ X 5R _ 08 2 2 u _6 .3 V _ X 5 R _ 0 8
B1 0 VC C[ 01 1 ] V C C [07 8 ] AD 10 C8 V S S [ 0 17 ] V S S [0 9 8] V2 2
B1 2 VC C[ 01 2 ] V C C [07 9 ] AD 12 C 11 V S S [ 0 18 ] V S S [0 9 9] V2 5
B1 4 VC C[ 01 3 ] V C C [08 0 ] AD 14 C 14 V S S [ 0 19 ] V S S [1 0 0] W1
B1 5 VC C[ 01 4 ] V C C [08 1 ] AD 15 C 16 V S S [ 0 20 ] V S S [1 0 1] W4
B1 7 VC C[ 01 5 ] V C C [08 2 ] AD 17 C 19 V S S [ 0 21 ] V S S [1 0 2] W23 C1 6 C3 7 C 34 C 30 C 25
B1 8
B2 0
C9
VC
VC
VC
C[
C[
C[
01 6 ]
01 7 ]
01 8 ]
V C C [08 3 ]
V C C [08 4 ]
V C C [08 5 ]
AD
AE
AE
18
9
10
C2
C 22
C 25
V
V
V
S S [ 0 22 ]
S S [ 0 23 ]
S S [ 0 24 ]
V S S [1 0 3]
V S S [1 0 4]
V S S [1 0 5]
W26
Y3
Y6
2 2u _ 6 .3 V _ X5 R _0 8 2 2 u_ 6 .3 V _ X5 R _ 08 2 2 u_ 6 .3 V _ X 5R _ 08 2 2 u _6 .3 V _ X 5 R _ 0 8 2 2 u _ 6.3 V _ X 5 R _ 0 8 Sheet 4 of 38
C1 0
C1 2
C1 3
VC
VC
VC
C[
C[
C[
01 9 ]
02 0 ]
02 1 ]
V C C [08 6 ]
V C C [08 7 ]
V C C [08 8 ]
AE
AE
AE
12
13
15
D1
D4
D8
V
V
V
S S [ 0 25 ]
S S [ 0 26 ]
S S [ 0 27 ]
V S S [1 0 6]
V S S [1 0 7]
V S S [1 0 8]
Y2 1
Y2 4
AA2
Penryn (Socket-
VC C[ 02 2 ] V C C [08 9 ] V S S [ 0 28 ] V S S [1 0 9]
C1 5
C1 7
C1 8
VC
VC
C[
C[
02 3 ]
02 4 ]
V C C [09 0 ]
V C C [09 1 ]
AE
AE
AE
17
18
20
D 11
D 13
D 16
V
V
S S [ 0 29 ]
S S [ 0 30 ]
V S S [1 1 0]
V S S [1 1 1]
AA5
AA8
AA1 1
V CO RE
P)2/2
D9 VC C[ 02 5 ] V C C [09 2 ] AF 9 D 19 V S S [ 0 31 ] V S S [1 1 2] AA1 4
D1 0 VC C[ 02 6 ] V C C [09 3 ] AF 10 D 23 V S S [ 0 32 ] V S S [1 1 3] AA1 6 C4 3 5 C 4 41 C4 2 8 C4 2 9 C 43 0 C4 2 1
D1 2 VC C[ 02 7 ] V C C [09 4 ] AF 12 D 26 V S S [ 0 33 ] V S S [1 1 4] AA1 9
D1 4 VC C[ 02 8 ] V C C [09 5 ] AF 14 E3 V S S [ 0 34 ] V S S [1 1 5] AA2 2 1 u_ 6 .3 V _ Y 5 V _ 0 4 1 u _ 6 . 3V _Y 5 V _ 04 1 u _6 . 3 V _ Y 5 V _ 0 4 1u _ 6 . 3 V _Y 5 V _ 04 1 u _6 . 3 V _ Y 5V _ 0 4 1u _ 6 .3 V _ Y 5 V _ 0 4
D1 5 VC C[ 02 9 ] V C C [09 6 ] AF 15 E6 V S S [ 0 35 ] V S S [1 1 6] AA2 5
D1 7 VC C[ 03 0 ] V C C [09 7 ] AF 17 E8 V S S [ 0 36 ] V S S [1 1 7] AB1
D1 8 VC C[ 03 1 ] V C C [09 8 ] AF 18 E 11 V S S [ 0 37 ] V S S [1 1 8] AB4
E7 VC C[ 03 2 ] V C C [09 9 ] AF 20 E 14 V S S [ 0 38 ] V S S [1 1 9] AB8 V CO RE
E9 VC C[ 03 3 ] V C C [10 0 ] E 16 V S S [ 0 39 ] V S S [1 2 0] AB1 1
E1 0 VC C[ 03 4 ] G 21 80mils E 19 V S S [ 0 40 ] V S S [1 2 1] AB1 3
E1 2 VC C[ 03 5 ] V C CP [0 1 ] V6 1 .0 5 V S E 21 V S S [ 0 41 ] V S S [1 2 2] AB1 6
E1 3 VC C[ 03 6 ] V C CP [0 2 ] J6 E 24 V S S [ 0 42 ] V S S [1 2 3] AB1 9 C4 3 4 C 4 36 C4 3 8 C4 1 0 C 44 0 C4 0 7
E1 5 VC C[ 03 7 ] V C CP [0 3 ] K6 F5 V S S [ 0 43 ] V S S [1 2 4] AB2 3
E1 7 VC C[ 03 8 ] V C CP [0 4 ] M6 F8 V S S [ 0 44 ] V S S [1 2 5] AB2 6 1 u_ 6 .3 V _ Y 5 V _ 0 4 1 u _ 6 . 3V _Y 5 V _ 04 1 u _6 . 3 V _ Y 5 V _ 0 4 1u _ 6 . 3 V _Y 5 V _ 04 1 u _6 . 3 V _ Y 5V _ 0 4 1u _ 6 .3 V _ Y 5 V _ 0 4
E1 8 VC C[ 03 9 ] V C CP [0 5 ] J21 F 11 V S S [ 0 45 ] V S S [1 2 6] AC3
E2 0 VC C[ 04 0 ] V C CP [0 6 ] K2 1 F 13 V S S [ 0 46 ] V S S [1 2 7] AC6
F7 VC C[ 04 1 ] V C CP [0 7 ] M 21 F 16 V S S [ 0 47 ] V S S [1 2 8] AC8
F9 VC C[ 04 2 ] V C CP [0 8 ] N 21 F 19 V S S [ 0 48 ] V S S [1 2 9] AC1 1 V CO RE
F10 VC C[ 04 3 ] V C CP [0 9 ] N6 F2 V S S [ 0 49 ] V S S [1 3 0] AC1 4
F12 VC C[ 04 4 ] V C CP [1 0 ] R 21 1 .5 V S F 22 V S S [ 0 50 ] V S S [1 3 1] AC1 6
F14 VC C[ 04 5 ] V C CP [1 1 ] R6 Layout note: F 25 V S S [ 0 51 ] V S S [1 3 2] AC1 9
F15 VC C[ 04 6 ] V C CP [1 2 ] T21 20mils PL AC E AS C LO SE G4 V S S [ 0 52 ] V S S [1 3 3] AC2 1 C4 0 6 C4 1 2 C4 0 8 C4 0 5 C4 3 9 C 43 7
F17 VC C[ 04 7 ] V C CP [1 3 ] T6 G1 V S S [ 0 53 ] V S S [1 3 4] AC2 4
F18 VC C[ 04 8 ] V C CP [1 4 ] V2 1 AS P OS SI BL E TO G 23 V S S [ 0 54 ] V S S [1 3 5] AD2
C4 3 1 C 4 32 0 . 01 u _ 1 6V _X 7 R _ 0 4 0.1 u _ 1 0V _ X 5 R _ 0 4 0. 1u _ 1 0V _X 5 R _ 0 4 0 . 1u _ 1 0 V _ X5 R _0 4 0 . 1 u_ 1 0 V _ X5 R _ 04 0 . 0 1 u_ 1 6 V _ X7 R _0 4
F20 VC C[ 04 9 ] V C CP [1 5 ] W21 G 26 V S S [ 0 55 ] V S S [1 3 6] AD5
TH E CP U VC CA P IN
AA7 VC C[ 05 0 ] V C CP [1 6 ] 1 0u _ 1 0 V _ Y 5 V _ 0 8 H3 V S S [ 0 56 ] V S S [1 3 7] AD8
AA9 VC C[ 05 1 ] B2 6 H6 V S S [ 0 57 ] V S S [1 3 8] AD1 1
0 . 0 1 u _1 6 V _ X 7R _ 04
AA1 0 VC C[ 05 2 ] V C CA [0 1 ] C 26 H 21 V S S [ 0 58 ] V S S [1 3 9] AD1 3
AA1 2 VC C[ 05 3 ] V C CA [0 2 ] H 24 V S S [ 0 59 ] V S S [1 4 0] AD1 6
AA1 3 VC C[ 05 4 ] AD 6 J2 V S S [ 0 60 ] V S S [1 4 1] AD1 9
AA1 5 VC C[ 05 5 ] V ID [ 0 ] AF 5 H _ V ID0 30 J5 V S S [ 0 61 ] V S S [1 4 2] AD2 2
AA1 7 VC C[ 05 6 ] V ID [ 1 ] AE 5 H _ V ID1 30 J 22 V S S [ 0 62 ] V S S [1 4 3] AD2 5 1 . 0 5V S
NEAR CPU PIN
AA1 8 VC C[ 05 7 ] V ID [ 2 ] AF 4 H _ V ID2 30 TO POWER PAGE J 25 V S S [ 0 63 ] V S S [1 4 4] AE1
AA2 0 VC C[ 05 8 ] V ID [ 3 ] AE 3 H _ V ID3 30 K1 V S S [ 0 64 ] V S S [1 4 5] AE4
VC C[ 05 9 ] V ID [ 4 ] H _ V ID4 30 V S S [ 0 65 ] V S S [1 4 6]
AB9 AF 3 K4 AE8
A C1 0 VC C[ 06 0 ] V ID [ 5 ] AE 2 H _ V ID5 30 K 23 V S S [ 0 66 ] V S S [1 4 7] AE1 1 +C 4 22 C2 8 C3 3 C 32 C 36
AB1 0 VC C[ 06 1 ] V ID [ 6 ] H _ V ID6 30 K 26 V S S [ 0 67 ] V S S [1 4 8] AE1 4
AB1 2 VC C[ 06 2 ] L3 V S S [ 0 68 ] V S S [1 4 9] AE1 6 1 5 0 u_ 4 V _ B _ A 0 .1u _ 1 0 V _ X5 R _0 4 0 .1 u_ 1 0 V _ X5 R _ 04 0 .1 u _1 0 V _ X 5R _ 04 * 0. 1u _ 1 0V _X 7 R _ 0 4
AB1 4 VC C[ 06 3 ] AF 7 V C CS E N S E L6 V S S [ 0 69 ] V S S [1 5 0] AE1 9
AB1 5 VC C[ 06 4 ] V C C S E N S E V C CS E N S E 3 0 L 21 V S S [ 0 70 ] V S S [1 5 1] AE2 3
AB1 7 VC C[ 06 5 ] L 24 V S S [ 0 71 ] V S S [1 5 2] AE2 6 0.1UF*6 INSIDE CPU CENTER CAVITY IN 2 ROWS
AB1 8 VC C[ 06 6 ] AE 7 VSSSEN SE M2 V S S [ 0 72 ] V S S [1 5 3] A2
VC C[ 06 7 ] V S S S E N S E V S S S E N S E 30 M5 V S S [ 0 73 ] V S S [1 5 4] AF 6
F OX C O N N P Z 4 7 8 2A -27 4 M- 01 M 22 V S S [ 0 74 ] V S S [1 5 5] AF 8 1 . 0 5V S
R 3 16 R3 1 7 M 25 V S S [ 0 75 ] V S S [1 5 6] AF 1 1
. V S S [ 0 76 ] V S S [1 5 7]
N1 AF 1 3
1 0 0 _1 % _ 0 6 1 00 _ 1 % _0 6
Layout note: N4 V S S [ 0 77 ] V S S [1 5 8] AF 1 6
N 23 V S S [ 0 78 ] V S S [1 5 9] AF 1 9
Ro ut e VC CS EN SE a nd C 26 C2 9 C 40 C 42 C 20
N 26 V S S [ 0 79 ] V S S [1 6 0] AF 2 1
VS SS EN SE t ra ce s at 2 7. 4O hm P3 V S S [ 0 80 ] V S S [1 6 1] A2 5 0 . 1 u _1 0 V _ X 5 R _ 0 4 *.1 U _ 10 V _ X 7 R_ 0 4 * . 1U _ 10 V _ X 7 R _ 0 4 0 . 1 u _1 0 V _ X 5 R _ 0 4 * . 1 U _ 1 0 V _X 7 R _0 4
V CO RE V S S [ 0 81 ] V S S [1 6 2] AF 2 5
wi th 5 0 mi l sp ac in g.
V S S [1 6 3]
Pl ac e PU a nd P D wi th in 1
F OX C ON N P Z 4 7 8 2 A -2 74 M -01
in ch o f CP U. .
+VCCP = 1.05V (0.997V~1.102V)
Penryn (Socket-P)2/2 B - 5
Schematic Diagrams
CANTIGA 1/7, HOST

U 1 5A
A1 4 H_ A# 3 H _A# [ 35 :3 ] 3
3 H _ D# [6 3 :0 ] H_ D# 0 F2 H_ A# _3 C 15 H_ A# 4
H_ D# 1 G8 H _D #_ 0 H_ A# _4 F1 6 H_ A# 5
H_ D# 2 F8 H _D #_ 1 H_ A# _5 H 13 H_ A# 6
H_ D# 3 E6 H _D #_ 2 H_ A# _6 C 18 H_ A# 7
H_ D# 4 G2 H _D #_ 3 H_ A# _7 M16 H_ A# 8
H_ D# 5 H6 H _D #_ 4 H_ A# _8 J 13 H_ A# 9
H_ D# 6 H2 H _D #_ 5 H_ A# _9 P1 6 H_ A# 10
H_ D# 7 F6 H _D #_ 6 H _A# _ 10 R 16 H_ A# 11
H_ D# 8 D4 H _D #_ 7 H _A# _ 11 N 17 H_ A# 12
H_ D# 9 H3 H _D #_ 8 H _A# _ 12 M13 H_ A# 13
H_ D# 1 0 M9 H _D #_ 9 H _A# _ 13 E1 7 H_ A# 14
H_ D# 1 1 M11 H _D #_ 1 0 H _A# _ 14 P1 7 H_ A# 15
H_ D# 1 2 J1 H _D #_ 1 1 H _A# _ 15 F1 7 H_ A# 16
H_ D# 1 3 J2 H _D #_ 1 2 H _A# _ 16 G 20 H_ A# 17
H_ D# 1 4 N 12 H _D #_ 1 3 H _A# _ 17 B1 9 H_ A# 18
H_ D# 1 5 J6 H _D #_ 1 4 H _A# _ 18 J 16 H_ A# 19
H_ D# 1 6 P2 H _D #_ 1 5 H _A# _ 19 E2 0 H_ A# 20
H_ D# 1 7 L2 H _D #_ 1 6 H _A# _ 20 H 16 H_ A# 21
H_ D# 1 8 R2 H _D #_ 1 7 H _A# _ 21 J 20 H_ A# 22
H_ D# 1 9 N9 H _D #_ 1 8 H _A# _ 22 L 17 H_ A# 23
H_ D# 2 0 L6 H _D #_ 1 9 H _A# _ 23 A1 7 H_ A# 24
H_ D# 2 1 M5 H _D #_ 2 0 H _A# _ 24 B1 7 H_ A# 25
H_ D# 2 2 J3 H _D #_ 2 1 H _A# _ 25 L 16 H_ A# 26
H_ D# 2 3 N2 H _D #_ 2 2 H _A# _ 26 C 21 H_ A# 27
H_ D# 2 4 R1 H _D #_ 2 3 H _A# _ 27 J 17 H_ A# 28
H_ D# 2 5 N5 H _D #_ 2 4 H _A# _ 28 H 20 H_ A# 29
H _D #_ 2 5 H _A# _ 29
Sheet 5 of 38 H_ D# 2 6
H_ D# 2 7
H_ D# 2 8
N6
P 13
N8
H _D #_ 2 6
H _D #_ 2 7
H _A# _ 30
H _A# _ 31
B1 8
K1 7
B2 0
H_ A# 30
H_ A# 31
H_ A# 32
CANTIGA 1/7, H_ D# 2 9
H_ D# 3 0
L7
N 10
M3
H _D #_ 2 8
H _D #_ 2 9
H _D #_ 3 0
H _A# _ 32
H _A# _ 33
H _A# _ 34
F2 1
K2 1
L 20
H_ A# 33
H_ A# 34
H_ D# 3 1 H_ A# 35
HOST Lay out Not ice:
H_ D# 3 2
H_ D# 3 3
Y3
AD 14
H _D #_ 3 1
H _D #_ 3 2
H _D #_ 3 3
H _A# _ 35
H _A DS#
H 12
H _A DS# 3
H_ D# 3 4 Y6 B1 6
H_ D# 3 5 Y 10 H _D #_ 3 4 H _A DSTB# _0 G 17 H _A DSTB# 0 3
0.1 uF shou ld be placed H _D #_ 3 5 H _A DSTB# _1 H _A DSTB# 1 3
H_ D# 3 6 Y 12 A9
100 mils or less from G MCH H_ D# 3 7 Y 14 H _D #_ 3 6 H_ BN R# F1 1 H _B NR # 3
Y7 H _D #_ 3 7 H_ BPR I# G 12 H _B PRI # 3
pin . H_ D# 3 8
H_ D# 3 9 W2 H _D #_ 3 8 H_ BR EQ# E9 H _B R0 # 3
HOST
H_ D# 4 0 AA8 H _D #_ 3 9 H _ DEF ER# B1 0 H _D EFER # 3
H_ D# 4 1 Y9 H _D #_ 4 0 H_ DB SY# AH 7 H _D BSY # 3
H_ D# 4 2 AA 13 H _D #_ 4 1 H PLL _ CL K AH 6 CL K_ MC H _BC L K 2
H_ D# 4 3 AA9 H _D #_ 4 2 H PL L_ C LK# J 11 C LK _MCH _ BCL K# 2
H_ D# 4 4 AA 11 H _D #_ 4 3 H _D PW R# F9 H _D PW R # 3
H_ D# 4 5 AD 11 H _D #_ 4 4 H _ DR D Y# H9 H _D R DY # 3
H_ D# 4 6 AD 10 H _D #_ 4 5 H _H I T# E1 2 H _H I T# 3
H_ D# 4 7 AD 13 H _D #_ 4 6 H_ HI TM# H 11 H _H I TM# 3
H_ D# 4 8 AE 12 H _D #_ 4 7 H _L O CK# C9 H _L O CK# 3
H_ D# 4 9 AE9 H _D #_ 4 8 H_ TR D Y# H _TR DY # 3
H_ D# 5 0 AA2 H _D #_ 4 9
Layo ut Not ice: H_ D# 5 1 AD 8 H _D #_ 5 0
H_ D# 5 2 AA3 H _D #_ 5 1
MCH_H RCOMP a 10 m ils tr aces AD 3 H _D #_ 5 2 J8
H_ D# 5 3
and 2 0 mils spaci ng H_ D# 5 4 AD 7 H _D #_ 5 3 H _D IN V# _0 L3 H _D I NV# 0 3
H_ D# 5 5 AE 14 H _D #_ 5 4 H _D IN V# _1 Y 13 H _D I NV# 1 3
H_ D# 5 6 AF3 H _D #_ 5 5 H _D IN V# _2 Y1 H _D I NV# 2 3
1. 0 5VS H_ D# 5 7 AC 1 H _D #_ 5 6 H _D IN V# _3 H _D I NV# 3 3
H_ D# 5 8 AE3 H _D #_ 5 7 L 10
H_ D# 5 9 AC 3 H _D #_ 5 8 H_ D STBN # _0 M7 H _D STBN #0 3
H_ D# 6 0 AE 11 H _D #_ 5 9 H_ D STBN # _1 AA5 H _D STBN #1 3
AE8 H _D #_ 6 0 H_ D STBN # _2 AE6 H _D STBN #2 3
R 3 39 H_ D# 6 1
H_ D# 6 2 AG 2 H _D #_ 6 1 H_ D STBN # _3 H _D STBN #3 3
2 2 1_ 1% _0 4 H_ D# 6 3 AD 6 H _D #_ 6 2 L9
H _D #_ 6 3 H _D STBP# _0 M8 H _D STBP# 0 3
H _D STBP# _1 AA6 H _D STBP# 1 3
10mils MCH _H SW I NG C5
H _SW I NG
H _D STBP# _2
H _D STBP# _3
AE5 H _D STBP# 2
H _D STBP# 3
3
3
MCH _H R CO MP E3
H _R C OMP B1 5 H_ RE Q# 0 H _R EQ #[ 4: 0 ] 3
1 .0 5 VS
10mils H _ REQ # _0 K1 3 H_ RE Q# 1
R 3 38 C 45 9 R 65 H _ REQ # _1 F1 3 H_ RE Q# 2
H _ REQ # _2 B1 3 H_ RE Q# 3
1 0 0_ 1% _0 4 0 .1 u_ 1 0V_ X5 R _0 4 2 4. 9_ 1 %_0 4 C 12 H _ REQ # _3 B1 4 H_ RE Q# 4
3 H _C PU RST# E 11 H _C PU RST# H _ REQ # _4
R3 4 1 3 H _ CPU SL P# H _C PU SLP # B6
H _R S# _0 F1 2 H _R S# 0 3
1K _1 %_ 04
H _R S# _1 C8 H _R S# 1 3
10mils CLOSE TO PIN A 11 H _R S# _2 H _R S# 2 3
B 11 H _AVR EF
H _D VR EF
FOR QU AD COR E SHORT BOTH PIN C AN TI G A
R3 4 0 C 4 63 C4 62 BELOW GMCH
16.9_1 %_04 PACKAGE
2K _1 %_ 04 0 .1 u _1 0V _X5R _ 04 0. 1u _ 10 V_X5 R_ 04
B - 6 CANTIGA 1/7, HOST

Schematic Diagrams
CANTIGA 2/7, Graphics

3.3 VS 1.05 VM_ PEG
L1 2
U15C PEG_C OMPI and t he PE G_COM PO pi ns sh ould be

*20mil_ shor t_04 R120 short ed at the packa ge an d the n rou ted t o one
R113 R11 2 R 114 R115 end o f a 4 9.9 O ? % pull- up re sisto r to
49.9 _1%_04
2.2K_04 2. 2K_ 04 1 0K_04 10K_04 L_BKLT_CTRL L 32 VCC_P EG. P lace the r esist or wi thin 500 m ils
G 32 L_ BKLT_C TRL T37 PEG_COMP (1.27 cm) of th e (G) MCH
15 BLON M32 L_ BKLT_EN PEG_COMPI T36
L_ CTRL_CL K PEG_COMPO
M33
K33 L_ CTRL_DATA H44 PEG_ RX#0
14 P_ DDC_CLK J 33 L_ DDC_CLK PEG_RX#_0 J46 PEG_ RX#1
14 P_ DDC_DATA L_ DDC_DATA PEG_RX#_1 L44 PEG_ RX#2
PEG_RX#_2 L40 PEG_ RX#3
M29 PEG_RX#_3 N41
14 NB_ENAVDD PEG_ RX#4
R123 2.3 7K_ 1%_ 04 LVDS_ IBG C 44 L_ VDD_ EN PEG_RX#_4 P48 PEG_ RX#5
LVDS_ VBG B43 LVDS_IBG PEG_RX#_5 N44 PEG_ RX#6
R109 *10mil_ short E37 LVDS_VBG PEG_RX#_6 T43 PEG_ RX#7
R108 *10mil_ short E38 LVDS_VREFH PEG_RX#_7 U43 PEG_ RX#8
C 41 LVDS_VREFL PEG_RX#_8 Y43
LVDS
14 LVDS- LCLKN PEG_ RX#9
C 40 LVDSA_ CLK# PEG_RX#_9 Y48 PEG_ RX#10
14 LVD S-L CLKP LVDS- UCLKN B37 LVDSA_ CLK PEG_RX# _10 Y36 PEG_ RX#11
LVDS- UCLKP A37 LVDSB_ CLK# PEG_RX# _11 AA43 PEG_ RX#12
LVDSB_ CLK PEG_RX# _12 AD37 PEG_ RX#13
H 47 PEG_RX# _13 AC47 PEG_ RX#14
14 LVDS- L0N
E46 LVDSA_ DATA#_ 0 PEG_RX# _14 AD39 PEG_ RX#15
14 LVDS- L1N G 40 LVDSA_ DATA#_ 1 PEG_RX# _15
14 LVDS- L2N LVDSA_DATA#3 A40 LVDSA_ DATA#_ 2 H43 PEG_ RX0
LVDSA_ DATA#_ 3 PEG_ RX_0 J44 PEG_ RX1
H 48 PEG_ RX_1 L43
14 LVDS- L0P PEG_ RX2 F OR IN TEL H DMI C ONN
D 45 LVDSA_ DATA_0 PEG_ RX_2 L41 PEG_ RX3 R121 *10mil_ shor t
GRAPHICS
14 LVDS- L1P F40 LVDSA_ DATA_1 PEG_ RX_3 N40 PORTB_HPD# 20
PEG_ RX4
Zdiff= 14 LVDS- L2P LVDSA_ DATA_2 PEG_ RX_4
100O? 0%
LVDSA_DATA3
LVDS- U0N
B40
A41
LVDSA_ DATA_3
LVDSB_ DATA#_ 0
PEG_ RX_5
PEG_ RX_6
PEG_ RX_7
P47
N43
T42
PEG_ RX5
PEG_ RX6
PEG_ RX7
Sheet 6 of 38
LVDS- U1N H 38 U42 PEG_ RX8
LVDS- U2N G 37
LVDSB_DATA#3 J 37
LVDSB_ DATA#_ 1
LVDSB_ DATA#_ 2
LVDSB_ DATA#_ 3
PEG_ RX_8
PEG_ RX_9
PEG_RX_10
Y42
W47
Y37
PEG_ RX9
PEG_ RX10
PEG_ RX11
CANTIGA 2/7,
LVDS- U0P B42 PEG_RX_11 AA42 PEG_ RX12
LVDS- U1P
LVDS- U2P
LVDSB_DATA3
G 38
F37
K37
LVDSB_ DATA_0
LVDSB_ DATA_1
LVDSB_ DATA_2
PEG_RX_12
PEG_RX_13
PEG_RX_14
AD36
AC48
AD40
PEG_ RX13
PEG_ RX14
PEG_ RX15
Graphics
LVDSB_ DATA_3 PEG_RX_15
J41 PEG_ TX#_0 C200 0.1u_ 10V_X7R_ 04
PCI-EXPRESS
PEG_TX#_0 M46 PEG_ TX#_1 C494 0.1u_ 10V_X7R_ 04 HDMI B_ D2BN 2 0
R8 4 7 5_1%_04 TVA_ DAC F25 PEG_TX#_1 M47 PEG_ TX#_2 C492 0.1u_ 10V_X7R_ 04 HDMI B_ D1BN 2 0
TVA_DAC PEG_TX#_2 HDMI B_ D0BN 2 0
R7 6 7 5_1%_04 TVB_ DAC H 25 M40 PEG_ TX#_3 C183 0.1u_ 10V_X7R_ 04
R8 2 7 5_1%_04 TVC_DAC K25 TVB_DAC PEG_TX#_3 M42 PEG_ TX#_4 HDMI B_ CLKBN 20
TVC_DAC PEG_TX#_4
TV
R48 PEG_ TX#_5
H 24 PEG_TX#_5 N38 PEG_ TX#_6
TV_RTN PEG_TX#_6 T40 PEG_ TX#_7
PEG_TX#_7 U37 PEG_ TX#_8
PEG_TX#_8 U40 PEG_ TX#_9
C 31 PEG_TX#_9 Y40 PEG_ TX#_1 0
E32 TV_DCON SEL_0 PEG_TX# _10 AA46 PEG_ TX#_1 1
TV_DCON SEL_1 PEG_TX# _11 AA37 PEG_ TX#_1 2
PEG_TX# _12 AA40 PEG_ TX#_1 3
PEG_TX# _13 AD43
Z s .e =3 7. 5O PEG_ TX#_1 4
Z s.e =5 0O PEG_TX# _14 AC46 PEG_ TX#_1 5
PEG_TX# _15
DAC_BL UE E28 J42 PEG_ TX_0 C201 0.1u_ 10V_X7R_ 04
14 DAC_BLUE CRT_BL UE PEG_TX_0 L46 PEG_ TX_1 C495 0.1u_ 10V_X7R_ 04 HDMI B_ D2BP 20
DAC_GREEN G 28 PEG_TX_1 M48 PEG_ TX_2 C493 0.1u_ 10V_X7R_ 04 HDMI B_ D1BP 20
14 DAC _GREEN CRT_GREEN PEG_TX_2 M39 PEG_ TX_3 HDMI B_ D0BP 20
C182 0.1u_ 10V_X7R_ 04
Zo= 50O? 5% DAC_RED J 28 PEG_TX_3 M43 PEG_ TX_4 HDMI B_ CLKBP 20
14 DAC_ RED CRT_RED PEG_TX_4
VGA
R47 PEG_ TX_5
PEG_TX_5 N37 PEG_ TX_6
R332 R333 R334 PEG_TX_6 T39 PEG_ TX_7
PEG_TX_7 U36 PEG_ TX_8
150_1%_04
150_1%_04
150_1%_04
PEG_TX_8 U39 PEG_ TX_9

PEG_TX_9 Y39 PEG_ TX_10
PEG_TX_10 Y46 PEG_ TX_11
PEG_TX_11 AA36 PEG_ TX_12
PEG_TX_12 AA39 PEG_ TX_13
PEG_TX_13 AD42 PEG_ TX_14
PEG_TX_14 AD46 PEG_ TX_15
PEG_TX_15
G 29
CRT_IRTN
H 32
14 DAC_DDCACLK CRT_DDC_CLK
J 32
1 4 DAC_ DDCAD ATA R3 37 30 .1_1%_04 CRT_HS J 29 CRT_DDC_DATA
14 DAC_ HSYNC R9 9 1. 02K_1%_04 CRT_TVO E29 CRT_HSY NC
CRT_VS L 29 CRT_TVO_IREF
R3 35 30 .1_1%_04
Zo= 55O? 5% 14 D AC_VSYNC CRT_VSYNC
MAX =0.5"
Minimize REF SET CANTIGA

routing leng th and
shield with VSS
2,3, 7,10, 12, 13,14 ,15, 16,1 7,18 ,19, 20,2 1,22, 23, 24,25 ,26, 27,2 8,30 3. 3VS
3,15 ,16, 17,1 8,19, 21, 22,25 ,26, 28,3 2,33 3. 3V
CANTIGA 2/7, Graphics B - 7

Schematic Diagrams
CANTIGA 3/7
U1 5 B
AP2 4
SA_ C K_ 0 AT2 1 M_ C LK _A _D D R 0 1 2 1 .5 V
DMI X2 select Low= DMI x 2 R 95
SA_ C K_ 1 AV2 4 M_ C LK _A _D D R 1 1 2 1 K_ 1 % _ 0 4
High=DMI x 4 (default) M 36 SB_ C K_ 0 A U 20 M_ C LK _B _D D R 0 1 3 Zdif f=
MC H_ R SVD1 S M _R C O MP _V OH
MC H _ C F G_ 5 MC H_ R SVD2 N 36 RS V D1 SB_ C K_ 1 M_ C LK _B _D D R 1 1 3 75O? 0%
R 78 * 2 . 21 K _ 1 % _ 04
MC H_ R SVD3 R 33 RS V D2 A R 24
MC H_ R SVD4 T33 RS V D3 SA _C K# _ 0 A R 21 M_ C LK _A _D DR 0# 12
C 1 55 C 1 56 R 92
MC H_ R SVD5 AH 9 RS V D4 SA _C K# _ 1 A U 24 M_ C LK _A _D DR 1# 12
AH 1 0 RS V D5 SB _C K# _ 0 AV2 0 M_ C LK _B _D DR 0# 13
iTPM HOST INTERFACE MC H_ R SVD6 0 . 0 1 u _1 6 V _ X 7 R _ 0 4 2 . 2 u _ 6. 3 V _ Y 5 V _0 6 3 . 0 1 K _ 1 %_ 0 4
MC H_ R SVD7 AH 1 2 RS V D6 SB _C K# _ 1 M_ C LK _B _D DR 1# 13
Low= enable MC H_ R SVD8 AH 1 3 RS V D7 B C 28
MC H_ R SVD9 K1 2 RS V D8 SA_ C KE_ 0 A Y 28 M_ A _ C K E 0 1 2
High=disable
MC H _ C F G_ 6 R 83 * 2 . 21 K _ 1 % _ 04 MC H_ R SVD1 0 AL 3 4 RS V D9 SA_ C KE_ 1 A Y 36 M_ A _ C K E 1 1 2 S M _R C O MP _V OL
(default) A K3 4 RS V D1 0 SB_ C KE_ 0 BB3 6 M_ B _ C K E 0 1 3
MC H_ R SVD1 1
MC H_ R SVD1 2 AN 3 5 RS V D1 1 SB_ C KE_ 1 M_ B _ C K E 1 1 3
RSVD
MC H_ R SVD1 3 AM 3 5 RS V D1 2 BA1 7
Zo= C 1 48 C 1 47 R 96
MC H_ R SVD1 4 T24 RS V D1 3 SA _C S# _ 0 A Y 16 M_ A _ C S0 # 12
ME TLS RS V D1 4 SA _C S# _ 1 M_ A _ C S1 # 12
40O? 5%
AV1 6 0 . 0 1 u _1 6 V _ X 7 R _ 0 4 2 . 2 u _ 6. 3 V _ Y 5 V _0 6 1 K _ 1 % _ 04
Confidentiality B3 1 SB _C S# _ 0 A R 13 M_ B _ C S0 # 13
MC H _ R S V D 1 5
MC H _ C F G_ 7 MC H _ R S V D 1 6 B 2 RS V D1 5 SB _C S# _ 1 M_ B _ C S1 # 13
R 77 * 2 . 21 K _ 1 % _ 04
MC H _ R S V D 1 7 M1 RS V D1 6 B D 17
DDR CLK/ CONTROL/COMPENSATION

RS V D1 7 S A _ O DT _ 0 A Y 17 M_ A _ O D T 0 1 2
S A _ O DT _ 1 BF1 5 M_ A _ O D T 1 1 2
M_ B _ O D T 0 1 3
PCI express graphics lane MC H _ R S V D 2 0 A Y 2 1 S B _ O DT _ 0 A Y 13 1 .5 V
RS V D2 0 S B _ O DT _ 1 M_ B _ O D T 1 1 3
R8 7 *2 0 _ 1% _ 0 4
reverse option for layout B G 22 S M _ R C OM P R8 6 8 0. 6 _ 1 % _0 4 1 . 5V
S M_ R C O MP
convenience MC H _ C F G_ 9 R 34 3 * 2 . 21 K _ 1 % _ 04 B H 21 S M _ R C OM P # R7 9 *2 0 _ 1% _ 0 4
MC H_ R SVD2 2 BG 2 3 S M _R C OM P #
R7 2 8 0. 6 _ 1 % _0 4 R 117
MC H_ R SVD2 3 B F23 RS V D2 2 BF2 8 S M _ R C OM P _ V OH
MC H_ R SVD2 4 BH 1 8 RS V D2 3 S M_ R C O MP _V O H B H 28 S M _ R C OM P _ V OL 1 0 K _ 1 % _ 04
MC H_ R SVD2 5 B F18 RS V D2 4 S M_ R C O MP _ V O L
MCH_CFG_10 RS V D2 5 AV4 2 M _V R E F _ M C H
PCIE S M _ V RE F A R 36
S M_ P W R OK BF1 7 S M _ P W R OK 3 3
Loopback MC H _ C F G_ 1 0 R 34 4 * 2 . 21 K _ 1 % _ 04 S M _ RE X T
S M_ R E X T B C 36 D D R 3_ D R A M R S T#
Sheet 7 of 38 enable S M _ D R A MR S T #
B3 8 C LK _D RE F
D D R 3 _D R A MR S T # 12 , 1 3
R 68
C 1 84
0 . 0 1 u _1 6 V _ X 7 R _ 0 4
R 116
1 0 K _ 1 % _ 04
MCH_CFG_12 C L K _ DR EF 2
CANTIGA 3/7 MCH_CFG_13

clock
MC H _ C F G_ 1 2
MC H _ C F G_ 1 3
R 74
R 75
* 2 . 21 K _ 1 % _ 04
* 2 . 21 K _ 1 % _ 04 2
2
MC H _B S E L 0
MC H _B S E L 1
T25
R 25 CF G _0
D P L L _R E F _ C LK
DP L L _ RE F _ C L K #
D P LL _ R E F _ S S C LK
A3 8
E4 1
F41
C
C
C
LK
LK
LK
_D
_D
_D
RE
RE
RE
F#
FSS
FSS#
C
C
C
L K _ DR
L K _ DR
L K _ DR
EF# 2
EFSS 2
EFSS# 2
4 9 9 _ 1% _ 0 4
CLK
P2 5 CF G _1 D P L L_ R E F _ S S C L K #
un-gating 2 MC H _B S E L 2 MC H_ C F G_ 3 P2 0 CF G _2 F43
P2 4 CF G _3 P E G_ C LK E4 3 C L K _ P C I E _ 3 GP L L 2
MC H_ C F G_ 4
MC H_ C F G_ 5 C 25 CF G _4 P E G_ C L K # C L K _ P C I E _ 3 GP L L # 2
FSB Dynamic ODT CF G _5
MC H _ C F G_ 1 6 R 73 * 2 . 21 K _ 1 % _ 04 MC H_ C F G_ 6 N 24
MC H_ C F G_ 7 M 24 CF G _6
MC H_ C F G_ 8 E2 1 CF G _7 AE4 1
CF G _8 D MI _ R XN _0 DM I _ T XN 0 17
MC H_ C F G_ 9 C 23 AE3 7
MC H_ C F G_ 1 0 C 24 CF G _9 D MI _ R XN _1 AE4 7 DM I _ T XN 1 17
3 .3 V S MC H_ C F G_ 1 1 N 21 CF G _10 D MI _ R XN _2 A H 39 DM I _ T XN 2 17
P2 1 CF G _11 D MI _ R XN _3 DM I _ T XN 3 17
DMI lane reversal MC H_ C F G_ 1 2
MC H_ C F G_ 1 3 T21 CF G _12 AE4 0
CF G _13 D M I _R X P _ 0 DM I _ T XP 0 17
R 94 * 4 . 02 K _ 1 % _ 06 MC H _ C F G_ 1 9 MC H_ C F G_ 1 4 R 20 AE3 8
M 20 CF G _14 D M I _R X P _ 1 AE4 8 DM I _ T XP 1 17
MC H_ C F G_ 1 5
MC H_ C F G_ 1 6 L21 CF G _15 D M I _R X P _ 2 A H 40 DM I _ T XP 2 17
DM I _ T XP 3 17
DMI
CFG
MC H_ C F G_ 1 7 H 21 CF G _16 D M I _R X P _ 3
MC H_ C F G_ 1 8 P2 9 CF G _17 AE3 5
Zo= 1 00O? 5%
MC H_ C F G_ 1 9 R 28 CF G _18 DM I _ T XN _0 AE4 3 DM I_ RX N 0 17
SDVO/DP/iHDMI CF G _19 DM I _ T XN _1 DM I_ RX N 1 17
MC H_ C F G_ 2 0 T28 AE4 6
Concurrent CF G _20 DM I _ T XN _2 A H 42 DM I_ RX N 2 17
DM I _ T XN _3 DM I_ RX N 3 17
R 88 * 4 . 02 K _ 1 % _ 06 MC H _ C F G_ 2 0 with PCIe
A D 35
D MI _ T X P _ 0 AE4 4 DM I_ RX P 0 1 7
D MI _ T X P _ 1 AF4 6 DM I_ RX P 1 1 7
D MI _ T X P _ 2 A H 43 DM I_ RX P 2 1 7
D MI _ T X P _ 3 DM I_ RX P 3 1 7
R 29
ME GRAPHICS VID
1 8 P M_ B M B U S Y # B 7 P M_ S Y N C # B3 3 D F GT _ V I D _0
3 , 16 , 3 0 H _D P R S T P # N 33 P M_ D P R S TP # GF X_ V I D _0 B3 2
P M _ E XT T S 0 # D F GT _ V I D _1
PM _EXTTS_D DR # P 3 2 P M_ E X T _ T S # _0 GF X_ V I D _1 G3 3 D F GT _ V I D _2
PM
This "Daisy Chain" CMOS topology
1 2, 13 P M _ E X T TS _ D D R # AT 4 0 P M_ E X T _ T S # _1 GF X_ V I D _2 F33 D F GT _ V I D _3
should be routed from ICH9M to Intel 1 8, 3 0 D E L A Y _ P W RG D
R6 6 1 0 0_ 0 4 MC H _ R S TI N # AT 1 1 P W R OK GF X_ V I D _3 E3 3 D F GT _ V I D _4
MVP, then to (G)MCH and CPU (in this 17 PL T _ RST # RS T IN # GF X_ V I D _4
R7 0 * 1 0m i l _s h o rt T20
order exactly). CPU must be end agent 3, 1 6 , 3 1 P M _T H R M T R I P # T H E R MT R I P #
R1 0 2 * 1 0m i l _s h o rt MC H _ D P R S L P V R R 3 2
on the DPRSTP topology to avoid 1 8 ,3 0 P M _D P R S L P V R DP R S L P V R
signal integrity degradation. C3 4 D F GT _ V R _E N
G F X _V R _ E N
1 . 0 5V S
3 .3 V S MC H_ N C_ 1 BG 4 8
B F48 NC _1
MC H_ N C_ 2
MC H_ N C_ 3 BD 4 8 NC _2 A H 37
BC 4 8 NC _3 C L _ C LK A H 36 CL _ CL K0 1 8
MC H_ N C_ 4 CL _ DAT A 0 1 8 R1 0 1
M C H _ C L K R E Q# MC H_ N C_ 5 BH 4 7 NC _4 C L _ D A TA A N 36
R1 0 7 1 0 K _0 4 M P W R OK 15 , 1 8 , 2 1
MC H_ N C_ 6 BG 4 7 NC _5 C L _ P W R OK AJ 3 5 1K _ 1 % _ 0 4
B E4 7 NC _6 C L_ R S T # A H 34 C L _R S T # 0 1 8
R1 0 0 1 0 K _0 4 P M _ E X TT S 0 # MC H_ N C_ 7 M CH _ CL _ V RE F
MC H_ N C_ 8 BH 4 6 NC _7 C L _ V RE F
R1 0 4 1 0 K _0 4 P M _ E X TT S _ D D R # MC H_ N C_ 9 B F46 NC _8 Add 0.1uF capacitor on this
MC H_ N C_ 1 0 BG 4 5 NC _9
C1 6 8 R1 0 3 rail close to (G)MCH.
MC H_ N C_ 1 1 BH 4 4 NC _ 10 N2 8 D DP C _ CT RL C L K
3 .3 V S BH 4 3 NC _ 11 D D P C _C T R L C LK M2 8
MC H_ N C_ 1 2 D DP C _ CT RL D A T A 0. 1 u _ 1 0V _X 5 R _ 0 4 51 1 _ 1 %_ 0 4
MC H_ N C_ 1 3 BH 6 NC _ 12 D D P C _ C T R L D A TA G3 6 H D M I _C T R L C LK
BH 5 NC _ 13 S D V O _C T R L C LK E3 6 HD MI _ C TR L C L K 2 0
R1 0 6 2 . 2 K _ 04 H D M I _ C T R LC L K MC H_ N C_ 1 4 H D M I _C T R L D A T A
MISC
MC H_ N C_ 1 5 BG 4 NC _ 14 S D V O_ C T R L D A TA K3 6 M C H _C L K R E Q# HD MI _ C TR L D A T A 20
MC H_ N C_ 1 6 BH 3 NC _ 15 C LK R E Q # H3 6 MC H _ C LK R E Q # 2
BF 3 NC _ 16 IC H_ S Y NC # MC H _ I C H _ S Y N C # 18
R1 0 5 2 . 2 K _ 04 H D M I _ C T R LD A T A MC H_ N C_ 1 7 1 .0 5 V S
MC H_ N C_ 1 8 BH 2 NC _ 17
NC
MC H_ N C_ 1 9 BG 2 NC _ 18 B1 2 M C H _T S A TN # R 67 54 . 9 _ 1 %_ 0 4
High: SDVO/iHDMI/DP enable NC _ 19 TSATN # 2 , 3 , 6, 1 0 , 1 2 , 1 3, 14 , 1 5 , 1 6, 17 , 1 8 , 1 9 , 20 , 2 1 , 2 2 , 23 , 2 4 , 2 5 , 26 , 2 7 , 2 8 , 3 0 3 . 3 V S
MC H_ N C_ 2 0 BE 2
MC H_ N C_ 2 1 BG 1 NC _ 20 3 , 1 5 , 1 6 , 17 , 1 8 , 1 9 , 21 , 2 2 , 2 5 , 26 , 2 8 , 3 2 , 3 3 3 . 3 V
MC H_ N C_ 2 2 BF 1 NC _ 21
D D P C _ C T R LC L K MC H_ N C_ 2 3 BD 1 NC _ 22 B2 8
R3 9 0 2 . 2 K _ 04 M CH _ HD A _ B CL K 1 6
MC H_ N C_ 2 4 BC 1 NC _ 23 H D A _ B C LK B3 0
MC H_ N C_ 2 5 F 1 NC _ 24 H DA _ R S T # B2 9 M CH _ HD A _ RS T # 1 6
R3 4 5 3 3 _ 04
NC _ 25 HD A _ S DI M C H _ H D A _ S D I 16
HDA
MC H_ N C_ 2 6 A4 7 C2 9
NC _ 26 H D A _S D O A2 8 M CH _ HD A _ S DO 1 6
D D P C _ C T R LD A T A HD A _ S Y N C M CH _ HD A _ S Y N C 1 6
R9 1 2 . 2 K _ 04
High: iHDMI/DP enable CA NT IG A
B - 8 CANTIGA 3/7
Schematic Diagrams
CANTIGA 4/7
Z o= 5 5O? 5%
Z o= 5 5O? 5 % U 1 5E
1 3 M _B _D Q[ 63 :0 ] M_ B_ DQ 0 A K4 7 B C1 6
U1 5 D
1 2 M _A _D Q[6 3 :0 ] M_ A _ DQ 0 AJ 3 8 BD 2 1 M_ B_ DQ 1 A H4 6 S B _ D Q_ 0 S B _ BS _0 B B 1 7 M_ B _ B S 0 # 1 3
AJ 4 1 S A_ DQ _ 0 S A _ B S _ 0 BG 1 8 M _ A _ B S0 # 12 A P4 7 S B _ D Q_ 1 S B _ BS _1 B B 3 3 M_ B _ B S 1 # 1 3
M_ A _ DQ 1 M_ B_ DQ 2
M_ A _ DQ 2 AN 3 8 S A_ DQ _ 1 S A _ B S _ 1 AT 2 5 M _ A _ B S1 # 12 M_ B_ DQ 3 A P4 6 S B _ D Q_ 2 S B _ BS _2 M_ B _ B S 2 # 1 3
AM 3 8 S A_ DQ _ 2 SA_ BS_ 2 M _ A _ B S2 # 12 AJ 4 6 S B _ D Q_ 3
M_ A _ DQ 3 Zo= 45O? 5% M_ B_ DQ 4 Zo= 45O ? 5%
M_ A _ DQ 4 AJ 3 6 S A_ DQ _ 3 BB 2 0 M_ B_ DQ 5 AJ 4 8 S B _ D Q_ 4 A U1 7
M_ A _ DQ 5 AJ 4 0 S A_ DQ _ 4 SA _ R A S# BD 2 0 M _ A _ RAS # 1 2 M_ B_ DQ 6 A M4 8 S B _ D Q_ 5 S B _ RA S # B G1 6 M_ B _ R A S # 1 3
AM 4 4 S A_ DQ _ 5 SA _ C A S# AY 2 0 M _ A _ CAS # 1 2 A P4 8 S B _ D Q_ 6 S B _ CA S # B F 1 4 M_ B _ C A S # 1 3
M_ A _ DQ 6 M_ B_ DQ 7
M_ A _ DQ 7 AM 4 2 S A_ DQ _ 6 S A _ W E# M _ A_ W E# 1 2 M_ B_ DQ 8 A U4 7 S B _ D Q_ 7 SB _ W E # M_ B _ W E # 1 3
M_ A _ DQ 8 AN 4 3 S A_ DQ _ 7 M_ B_ DQ 9 A U4 6 S B _ D Q_ 8
M_ A _ DQ 9 AN 4 4 S A_ DQ _ 8 M_ B_ DQ 1 0 B A4 8 S B _ D Q_ 9
M_ A _ DQ 1 0 AU 4 0 S A_ DQ _ 9 M_ B_ DQ 1 1 A Y4 8 S B _ D Q_ 1 0
M_ A _ DQ 1 1 AT3 8 S A_ DQ _ 10 AM 3 7 M_ B_ DQ 1 2 AT4 7 S B _ D Q_ 1 1 A M4 7
M_ A _ DQ 1 2 AN 4 1 S A_ DQ _ 11 SA _ D M_ 0 AT 4 1 M _ A _ DM 0 12 M_ B_ DQ 1 3 A R4 7 S B _ D Q_ 1 2 S B _ DM _0 A Y4 7 M_ B _ D M0 13
S A_ DQ _ 12 SA _ D M_ 1 M _ A _ DM 1 12 S B _ D Q_ 1 3 S B _ DM _1 M_ B _ D M1 13
M_ A _ DQ 1 3 AN 3 9 AY 4 1 M_ B_ DQ 1 4 B A4 7 B D4 0
M_ A _ DQ 1 4 AU 4 4 S A_ DQ _ 13 SA _ D M_ 2 AU 3 9 M _ A _ DM 2 12 M_ B_ DQ 1 5 B C4 7 S B _ D Q_ 1 4 S B _ DM _2 B F35 M_ B _ D M2 13
M_ A _ DQ 1 5 AU 4 2 S A_ DQ _ 14 SA _ D M_ 3 BB 1 2 M _ A _ DM 3 12 M_ B_ DQ 1 6 B C4 6 S B _ D Q_ 1 5 S B _ DM _3 B G1 1 M_ B _ D M3 13
A V3 9 S A_ DQ _ 15 SA _ D M_ 4 AY 6 M _ A _ DM 4 12 B C4 4 S B _ D Q_ 1 6 S B _ DM _4 B A3 M_ B _ D M4 13
M_ A _ DQ 1 6 M_ B_ DQ 1 7
M_ A _ DQ 1 7 AY 4 4 S A_ DQ _ 16 SA _ D M_ 5 AT 7 M _ A _ DM 5 12 M_ B_ DQ 1 8 B G4 3 S B _ D Q_ 1 7 S B _ DM _5 A P1 M_ B _ D M5 13
S A_ DQ _ 17 SA _ D M_ 6 M _ A _ DM 6 12 S B _ D Q_ 1 8 S B _ DM _6 M_ B _ D M6 13
M_ A _ DQ 1 8
M_ A _ DQ 1 9
B A4 0
BD 4 3 S A_ DQ _ 18 SA _ D M_ 7
AJ 5
M _ A _ DM 7 12
M_ B_ DQ 1 9
M_ B_ DQ 2 0
BF4 3
B E4 5 S B _ D Q_ 1 9 S B _ DM _7
A K2
M_ B _ D M7 13 Sheet 8 of 38
M_ A _ DQ 2 0 A V4 1 S A_ DQ _ 19 AJ 4 4 M_ B_ DQ 2 1 B C4 1 S B _ D Q_ 2 0 A L4 7
B
M _ A _ DQ S 0 1 2 M_ B _ D QS 0 1 3
CANTIGA 4/7
A
M_ A _ DQ 2 1 AY 4 3 S A_ DQ _ 20 S A_ DQ S _ 0 AT 4 4 M_ B_ DQ 2 2 BF4 0 S B _ D Q_ 2 1 S B _D QS _0 A V4 8
M_ A _ DQ 2 2 B B4 1 S A_ DQ _ 21 S A_ DQ S _ 1 BA 4 3 M _ A _ DQ S 1 1 2 M_ B_ DQ 2 3 BF4 1 S B _ D Q_ 2 2 S B _D QS _1 B G4 1 M_ B _ D QS 1 1 3
S A_ DQ _ 22 S A_ DQ S _ 2 M _ A _ DQ S 2 1 2 S B _ D Q_ 2 3 S B _D QS _2 M_ B _ D QS 2 1 3
M_ A _ DQ 2 3 BC 4 0 BC 3 7 M_ B_ DQ 2 4 B G3 8 B G3 7
AY 3 7 S A_ DQ _ 23 S A_ DQ S _ 3 AW 1 2 M _ A _ DQ S 3 1 2 BF3 8 S B _ D Q_ 2 4 S B _D QS _3 B H9 M_ B _ D QS 3 1 3
M_ A _ DQ 2 4 M_ B_ DQ 2 5
M_ A _ DQ 2 5 BD 3 8 S A_ DQ _ 24 S A_ DQ S _ 4 BC 8 M _ A _ DQ S 4 1 2 M_ B_ DQ 2 6 B H3 5 S B _ D Q_ 2 5 S B _D QS _4 B B2 M_ B _ D QS 4 1 3
Zo= 55O? 5% Zo= 55O ? 5%
MEMORY
M E M OR Y
A V3 7 S A_ DQ _ 25 S A_ DQ S _ 5 AU 8 M _ A _ DQ S 5 1 2 B G3 5 S B _ D Q_ 2 6 S B _D QS _5 A U1 M_ B _ D QS 5 1 3
M_ A _ DQ 2 6 M_ B_ DQ 2 7
M_ A _ DQ 2 7 AT3 6 S A_ DQ _ 26 S A_ DQ S _ 6 AM 7 M _ A _ DQ S 6 1 2 M_ B_ DQ 2 8 B H4 0 S B _ D Q_ 2 7 S B _D QS _6 A N6 M_ B _ D QS 6 1 3
S A_ DQ _ 27 S A_ DQ S _ 7 M _ A _ DQ S 7 1 2 S B _ D Q_ 2 8 S B _D QS _7 M_ B _ D QS 7 1 3
M_ A _ DQ 2 8 AY 3 8 AJ 4 3 M_ B_ DQ 2 9 B G3 9 A L4 6
B B3 8 S A_ DQ _ 28 S A _ D QS # _ 0 AT 4 3 M _ A _ DQ S 0 # 12 B G3 4 S B _ D Q_ 2 9 S B_ DQ S # _0 A V4 7 M_ B _ D QS 0 # 1 3
M_ A _ DQ 2 9 M_ B_ DQ 3 0
M_ A _ DQ 3 0 A V3 6 S A_ DQ _ 29 S A _ D QS # _ 1 BA 4 4 M _ A _ DQ S 1 # 12 M_ B_ DQ 3 1 B H3 4 S B _ D Q_ 3 0 S B_ DQ S # _1 B H4 1 M_ B _ D QS 1 # 1 3
A W36 S A_ DQ _ 30 S A _ D QS # _ 2 BD 3 7 M _ A _ DQ S 2 # 12 B H1 4 S B _ D Q_ 3 1 S B_ DQ S # _2 B H3 7 M_ B _ D QS 2 # 1 3
M_ A _ DQ 3 1 M_ B_ DQ 3 2
M_ A _ DQ 3 2 BD 1 3 S A_ DQ _ 31 S A _ D QS # _ 3 AY 1 2 M _ A _ DQ S 3 # 12 M_ B_ DQ 3 3 B G1 2 S B _ D Q_ 3 2 S B_ DQ S # _3 B G9 M_ B _ D QS 3 # 1 3
S A_ DQ _ 32 S A _ D QS # _ 4 M _ A _ DQ S 4 # 12 S B _ D Q_ 3 3 S B_ DQ S # _4 M_ B _ D QS 4 # 1 3
M_ A _ DQ 3 3 AU 1 1 BD 8 M_ B_ DQ 3 4 B H1 1 B C2
BC 1 1 S A_ DQ _ 33 S A _ D QS # _ 5 AU 9 M _ A _ DQ S 5 # 12 B G8 S B _ D Q_ 3 4 S B_ DQ S # _5 A T2 M_ B _ D QS 5 # 1 3
M_ A _ DQ 3 4 M_ B_ DQ 3 5
M_ A _ DQ 3 5 B A1 2 S A_ DQ _ 34 S A _ D QS # _ 6 AM 8 M _ A _ DQ S 6 # 12 M_ B_ DQ 3 6 B H1 2 S B _ D Q_ 3 5 S B_ DQ S # _6 A N5 M_ B _ D QS 6 # 1 3
AU 1 3 S A_ DQ _ 35 S A _ D QS # _ 7 M _ A _ DQ S 7 # 12 BF1 1 S B _ D Q_ 3 6 S B_ DQ S # _7 M_ B _ D QS 7 # 1 3
M_ A _ DQ 3 6 M_ B_ DQ 3 7
M_ A _ DQ 3 7 A V1 3 S A_ DQ _ 36 BA 2 1 M_ A _ A 0 M_ B_ DQ 3 8 BF8 S B _ D Q_ 3 7 A V1 7 M _B _A 0
S A_ DQ _ 37 S A _M A _ 0 S B _ D Q_ 3 8 S B _ MA _0
SYSTEM
M_ A _ DQ 3 8 BD 1 2 BC 2 4 M_ A _ A 1 M_ B_ DQ 3 9 B G7 B A2 5 M _B _A 1
S Y ST E M
BC 1 2 S A_ DQ _ 38 S A _M A _ 1 BG 2 4 B C5 S B _ D Q_ 3 9 S B _ MA _1 B C2 5
M_ A _ DQ 3 9 M_ A _ A 2 M_ B_ DQ 4 0 M _B _A 2
M_ A _ DQ 4 0 BB 9 S A_ DQ _ 39 S A _M A _ 2 BH 2 4 M_ A _ A 3 M_ B_ DQ 4 1 B C6 S B _ D Q_ 4 0 S B _ MA _2 A U2 5 M _B _A 3
M_ A _ DQ 4 1 BA 9 S A_ DQ _ 40 S A _M A _ 3 BG 2 5 M_ A _ A 4 M_ B_ DQ 4 2 A Y3 S B _ D Q_ 4 1 S B _ MA _3 A W25 M _B _A 4
M_ A _ DQ 4 2 AU 1 0 S A_ DQ _ 41 S A _M A _ 4 BA 2 4 M_ A _ A 5 M_ B_ DQ 4 3 A Y1 S B _ D Q_ 4 2 S B _ MA _4 B B2 8 M _B _A 5
M_ A _ DQ 4 3 AV 9 S A_ DQ _ 42 S A _M A _ 5 BD 2 4 M_ A _ A 6 M_ B_ DQ 4 4 BF6 S B _ D Q_ 4 3 S B _ MA _5 A U2 8 M _B _A 6
B A1 1 S A_ DQ _ 43 S A _M A _ 6 BG 2 7 BF5 S B _ D Q_ 4 4 S B _ MA _6 A W28
M_ A _ DQ 4 4 M_ A _ A 7 M_ B_ DQ 4 5 M _B _A 7
M_ A _ DQ 4 5 BD 9 S A_ DQ _ 44 S A _M A _ 7 BF 2 5 M_ A _ A 8 M_ B_ DQ 4 6 BA1 S B _ D Q_ 4 5 S B _ MA _7 A T3 3 M _B _A 8
M_ A _ DQ 4 6 AY 8 S A_ DQ _ 45 S A _M A _ 8 AW 2 4 M_ A _ A 9 M_ B_ DQ 4 7 B D3 S B _ D Q_ 4 6 S B _ MA _8 B D3 3 M _B _A 9
M_ A _ DQ 4 7 BA 6 S A_ DQ _ 46 S A _M A _ 9 BC 2 1 M_ A _ A 1 0 M_ B_ DQ 4 8 AV2 S B _ D Q_ 4 7 S B _ MA _9 B B1 6 M _B _A 10
M_ A _ DQ 4 8 AV 5 S A_ DQ _ 47 S A _ MA _ 1 0 BG 2 6 M_ A _ A 1 1 M_ B_ DQ 4 9 A U3 S B _ D Q_ 4 8 SB _ M A _ 10 A W33 M _B _A 11
M_ A _ DQ 4 9 AV 7 S A_ DQ _ 48 S A _ MA _ 1 1 BH 2 6 M_ A _ A 1 2 M_ B_ DQ 5 0 A R3 S B _ D Q_ 4 9 SB _ M A _ 11 A Y3 3 M _B _A 12
M_ A _ DQ 5 0 AT9 S A_ DQ _ 49 S A _ MA _ 1 2 BH 1 7 M_ A _ A 1 3 M_ B_ DQ 5 1 A N2 S B _ D Q_ 5 0 SB _ M A _ 12 B H1 5 M _B _A 13
Zo= 45O? 5% Zo = 45 O? 5 %
DDR
AN 8 S A_ DQ _ 50 S A _ MA _ 1 3 AY 2 5 A Y2 S B _ D Q_ 5 1 SB _ M A _ 13 A U3 3
DDR
M_ A _ DQ 5 1 M_ A _ A 1 4 M_ B_ DQ 5 2 M _B _A 14
M_ A _ DQ 5 2 AU 5 S A_ DQ _ 51 S A _ MA _ 1 4 M_ B_ DQ 5 3 AV1 S B _ D Q_ 5 2 SB _ M A _ 14
M_ A _ DQ 5 3 AU 6 S A_ DQ _ 52 M _ A _ A [1 4:0 ] 12 M_ B_ DQ 5 4 AP3 S B _ D Q_ 5 3 M_ B _ A [1 4 :0 ] 1 3
M_ A _ DQ 5 4 AT5 S A_ DQ _ 53 M_ B_ DQ 5 5 A R1 S B _ D Q_ 5 4
M_ A _ DQ 5 5 AN 1 0 S A_ DQ _ 54 M_ B_ DQ 5 6 AL 1 S B _ D Q_ 5 5
M_ A _ DQ 5 6 AM 1 1 S A_ DQ _ 55 M_ B_ DQ 5 7 AL 2 S B _ D Q_ 5 6
M_ A _ DQ 5 7 AM 5 S A_ DQ _ 56 M_ B_ DQ 5 8 AJ 1 S B _ D Q_ 5 7
M_ A _ DQ 5 8 AJ 9 S A_ DQ _ 57 M_ B_ DQ 5 9 A H1 S B _ D Q_ 5 8
M_ A _ DQ 5 9 AJ 8 S A_ DQ _ 58 M_ B_ DQ 6 0 A M2 S B _ D Q_ 5 9
M_ A _ DQ 6 0 AN 1 2 S A_ DQ _ 59 M_ B_ DQ 6 1 A M3 S B _ D Q_ 6 0
M_ A _ DQ 6 1 AM 1 3 S A_ DQ _ 60 M_ B_ DQ 6 2 A H3 S B _ D Q_ 6 1
M_ A _ DQ 6 2 AJ 1 1 S A_ DQ _ 61 M_ B_ DQ 6 3 AJ 3 S B _ D Q_ 6 2
M_ A _ DQ 6 3 AJ 1 2 S A_ DQ _ 62 S B _ D Q_ 6 3
S A_ DQ _ 63 C AN TIG A
CA NT IG A
CANTIGA 4/7 B - 9
Schematic Diagrams
CANTIGA 5/7
U1 5 G
1 .5 V 1. 05 V S U1 5 F
1 . 05 V S
3A AP3 3 W28 8.7A
A N3 3
B H3 2
V CC
V CC
_ SM
_ SM
_1
_2
V C C _ A X G_ N C T F _1
V C C _ A X G_ N C T F _2
V2 8
W26
3A A G3 4
B G3 2 V CC _ SM _3 V C C _ A X G_ N C T F _3 V2 6 A C3 4 VCC _1
2 2 u _ 6 . 3 V _ X 5 R _0 8
0 . 1 u _1 6 V _ Y 5V _ 04
0 . 2 2u _ 1 0 V _ Y 5 V _ 0 4
BF3 2 V CC _ SM _4 V C C _ A X G_ N C T F _4 W25 AB3 4 VCC _2
B D3 2 V CC _ SM _5 V C C _ A X G_ N C T F _5 V2 5 AA3 4 VCC _3
* 1 5 0 U_ 4 V _ B 2
1 0u _ 6 . 3 V _ X 5 R _ 0 8
0 . 2 2 u _ 10 V _Y 5 V _ 0 4
0 .1 u _ 1 6 V_ Y5 V_ 0 4
0 . 2 2 u_ 1 0 V _ Y 5 V _0 4
B C3 2 V CC _ SM _6 V C C _ A X G_ N C T F _6 W24 Y3 4 VCC _4
BB3 2 V CC _ SM _7 V C C _ A X G_ N C T F _7 V2 4 V3 4 VCC _5
*1 0 U _2 . 5 V _B
BA3 2 V CC _ SM _8 V C C _ A X G_ N C T F _8 W23 U3 4 VCC _6
AY3 2 V CC _ SM _9 V C C _ A X G_ N C T F _9 V2 3 A M3 3 VCC _7
AW 3 2 V CC _ SM _10 V C C _ A X G_ N C TF _ 10 AM 2 1 AK3 3 VCC _8
AV3 2 V CC _ SM _11 V C C _ A X G_ N C TF _ 11 AL 2 1 AJ 3 3 VCC _9
+
A U3 2 V CC _ SM _12 V C C _ A X G_ N C TF _ 12 AK2 1 A G3 3 VCC _10
A T3 2 V CC _ SM _13 V C C _ A X G_ N C TF _ 13 W21 AF 3 3 VCC _11
+
A R3 2 V CC _ SM _14 V C C _ A X G_ N C TF _ 14 V2 1 VCC _12
C 169
C 153
C1 6 3
C1 5 1
AP3 2 V CC _ SM _15 V C C _ A X G_ N C TF _ 15 U2 1 AE3 3
V CC _ SM _16 V C C _ A X G_ N C TF _ 16 VCC _13
C 164
A N3 2 AM 2 0 A C3 3
C4 4 6
C1 2 9
C 70
C 1 67
POWER
VCC CORE
B H3 1 AK2 0 AA3 3
B G3 1 V CC _ SM _18 V C C _ A X G_ N C TF _ 18 W20 Y3 3 VCC _15
BF3 1 V CC _ SM _19 V C C _ A X G_ N C TF _ 19 U2 0 W33 VCC _16
B G3 0 V CC _ SM _20 V C C _ A X G_ N C TF _ 20 AM 1 9 V3 3 VCC _17
B H2 9 V CC _ SM _21 V C C _ A X G_ N C TF _ 21 AL 1 9 PLACE CLOSE U3 3 VCC _18
B G2 9 V CC _ SM _22 V C C _ A X G_ N C TF _ 22 AK1 9 TO THE GMCH A H2 8 VCC _19
BF2 9 V CC _ SM _23 V C C _ A X G_ N C TF _ 23 AJ 1 9 AF 2 8 VCC _20
B D2 9 V CC _ SM _24 V C C _ A X G_ N C TF _ 24 AH 1 9 A C2 8 VCC _21
B C2 9 AG 1 9 AA2 8
VCC SM
BB2 9 V CC _ SM _26 V C C _ A X G_ N C TF _ 26 AF1 9 AJ 2 6 VCC _23
1 .0 5 VS
BA2 9 V CC _ SM _27 V C C _ A X G_ N C TF _ 27 AE1 9 A G2 6 VCC _24
AY2 9 V CC _ SM _28 V C C _ A X G_ N C TF _ 28 AB1 9 AE2 6 VCC _25
AW 2 9 V CC _ SM _29 V C C _ A X G_ N C TF _ 29 AA1 9 A C2 6 VCC _26
AV2 9 V CC _ SM _30 V C C _ A X G_ N C TF _ 30 Y1 9 A H2 5 VCC _27
A U2 9 V CC _ SM _31 V C C _ A X G_ N C TF _ 31 W19 A G2 5 VCC _28
0 . 22 u _ 1 0 V _ Y 5 V _ 0 4
0 . 1 u _ 1 6V _ Y 5 V _ 0 4
0 . 1 u _1 6 V _ Y 5V _ 04
A T2 9 V CC _ SM _32 V C C _ A X G_ N C TF _ 32 V1 9 AF 2 5 VCC _29
A R2 9 V CC _ SM _33 V C C _ A X G_ N C TF _ 33 U1 9 A G2 4 VCC _30
Sheet 9 of 38 V C CS M _ 3 6
AP2 9
BA3 6
V CC
V CC
_ SM
_ SM
_34
_35
V C C _ A X G_ N C TF _ 34
V C C _ A X G_ N C TF _ 35
V C C _ A X G_ N C TF _ 36
AM 1 7
AK1 7
AH 1 7
AJ 2 3
A H2 3
AF 2 3
VCC
VCC
VCC
_31
_32
_33
1. 05 V S
V C CS M _ 3 7 BB2 4 V CC _ SM _ 3 6/ NC V C C _ A X G_ N C TF _ 37 AG 1 7 VCC _34 AM 3 2
CANTIGA 5/7 V C CS M _ 3 8 B D1 6 V CC _ SM _ 3 7/ NC V C C _ A X G_ N C TF _ 38 AF1 7 T32 V CC _ NC T F _ 1 AL 3 2
POWER
BB2 1 V CC _ SM _ 3 8/ NC V C C _ A X G_ N C TF _ 39 AE1 7 VCC _ 3 5 V CC _ NC T F _ 2 AK 3 2
V C CS M _ 4 0 AW 1 6 V CC _ SM _ 3 9/ NC V C C _ A X G_ N C TF _ 40 AC 1 7 V CC _ NC T F _ 3 AJ 3 2
AW 1 3 V CC _ SM _ 4 0/ NC V C C _ A X G_ N C TF _ 41 AB1 7 V CC _ NC T F _ 4 AH 3 2
A T1 3 V CC _ SM _ 4 1/ NC V C C _ A X G_ N C TF _ 42 Y1 7 V CC _ NC T F _ 5 AG 3 2
V C CS M _ 4 2
C1 2 1
C1 1 3
C 1 26
V CC _ SM _ 4 2/ NC V C C _ A X G_ N C TF _ 43 W17 V CC _ NC T F _ 6 AE 3 2
C 17 1 C 133 C 106 C 105 C9 3
V C C _ A X G_ N C TF _ 44 V1 7 V CC _ NC T F _ 7 AC 3 2
* . 1U _ 1 6 V _ 0 4 * .1 U_ 1 6 V _ 0 4 * .1 U_ 1 6 V _ 0 4 * . 1 U _1 6 V _ 0 4 *. 1 U _ 16 V _0 4 V C C _ A X G_ N C TF _ 45 AM 1 6 V CC _ NC T F _ 8 AA 3 2
VCC GFX NCTF

Y2 6 V C C _ A X G_ N C TF _ 46 AL 1 6 V CC _ NC T F _ 9 Y 32
AE2 5 V CC _ AXG _1 V C C _ A X G_ N C TF _ 47 AK1 6 V CC _ NC T F _ 1 0 W 32
AB2 5 V CC _ AXG _2 V C C _ A X G_ N C TF _ 48 AJ 1 6 V CC _ NC T F _ 1 1 U 32
AA2 5 V CC _ AXG _3 V C C _ A X G_ N C TF _ 49 AH 1 6 V CC _ NC T F _ 1 2 AM 3 0
AE2 4 V CC _ AXG _4 V C C _ A X G_ N C TF _ 50 AG 1 6 V CC _ NC T F _ 1 3 AL 3 0
A C2 4 V CC _ AXG _5 V C C _ A X G_ N C TF _ 51 AF1 6 V CC _ NC T F _ 1 4 AK 3 0
1 .0 5 VS
AA2 4 V CC _ AXG _6 V C C _ A X G_ N C TF _ 52 AE1 6 V CC _ NC T F _ 1 5 AH 3 0
Y2 4 V CC _ AXG _7 V C C _ A X G_ N C TF _ 53 AC 1 6 V CC _ NC T F _ 1 6 AG 3 0
AE2 3 V CC _ AXG _8 V C C _ A X G_ N C TF _ 54 AB1 6 V CC _ NC T F _ 1 7 AF 3 0
2 2u _ 6 . 3 V _ X 5 R _ 0 8
2 2 u_ 6 . 3 V _ X 5R _ 0 8
1 u _ 6 .3 V_ Y5 V_ 0 4
A C2 3 V CC _ AXG _9 V C C _ A X G_ N C TF _ 55 AA1 6 V CC _ NC T F _ 1 8 AE 3 0
AB2 3 V CC _ AXG _ 10 V C C _ A X G_ N C TF _ 56 Y1 6 V CC _ NC T F _ 1 9 AC 3 0
AA2 3 V CC _ AXG _ 11 V C C _ A X G_ N C TF _ 57 W16 V CC _ NC T F _ 2 0 AB 3 0
A J2 1 V CC _ AXG _ 12 V C C _ A X G_ N C TF _ 58 V1 6 V CC _ NC T F _ 2 1 AA 3 0
A G2 1 V CC _ AXG _ 13 V C C _ A X G_ N C TF _ 59 U1 6 V CC _ NC T F _ 2 2 Y 30
AE2 1 V CC _ AXG _ 14 V C C _ A X G_ N C TF _ 60 V CC _ NC T F _ 2 3 W 30
A C2 1 V CC _ AXG _ 15 V CC _ NC T F _ 2 4 V3 0
AA2 1 V CC _ AXG _ 16 V CC _ NC T F _ 2 5 U 30
1 . 0 5V S
3A
VCC NCTF
Y2 1 V CC _ AXG _ 17 V CC _ NC T F _ 2 6 AL 2 9
A H2 0 V CC _ AXG _ 18 V CC _ NC T F _ 2 7 AK 2 9
C 1 01
C1 1 0
C1 3 4
AF2 0 V CC _ AXG _ 19 V CC _ NC T F _ 2 8 AJ 2 9
AE2 0 V CC _ AXG _ 20 V CC _ NC T F _ 2 9 AH 2 9
VCC GFX
0 .1 u _ 1 6 V_ Y5 V_ 0 4
0 .1 u _ 1 6 V_ Y5 V_ 0 4
0 . 1 u_ 1 6 V _ Y 5 V _ 0 4
0 . 1 u _ 16 V _ Y 5V _ 04
A C2 0 V CC _ AXG _ 21 V CC _ NC T F _ 3 0 AG 2 9
2 2 0 U_ 4 V _ D 2 _D
AB2 0 V CC _ AXG _ 22 V CC _ NC T F _ 3 1 AE 2 9
AA2 0 V CC _ AXG _ 23 V CC _ NC T F _ 3 2 AC 2 9
T1 7 V CC _ AXG _ 24 V CC _ NC T F _ 3 3 AA 2 9
T1 6 V CC _ AXG _ 25 V CC _ NC T F _ 3 4 Y 29
A M1 5 V CC _ AXG _ 26 V CC _ NC T F _ 3 5 W 29
+ A L1 5 V CC _ AXG _ 27 V CC _ NC T F _ 3 6 V2 9
AE1 5 V CC _ AXG _ 28 V CC _ NC T F _ 3 7 AL 2 8
A J1 5 V CC _ AXG _ 29 V CC _ NC T F _ 3 8 AK 2 8
A H1 5 V CC _ AXG _ 30 V CC _ NC T F _ 3 9 AL 2 6
C 112
C 154
C 4 44
C1 5 8
C 13 2
A G1 5 V CC _ AXG _ 31 V CC _ NC T F _ 4 0 AK 2 6
AF1 5 V CC _ AXG _ 32 V CC _ NC T F _ 4 1 AK 2 5
AB1 5 V CC _ AXG _ 33 V CC _ NC T F _ 4 2 AK 2 4
AA1 5 V CC _ AXG _ 34 V CC _ NC T F _ 4 3 AK 2 3
Y1 5 V CC _ AXG _ 35 V CC _ NC T F _ 4 4
V1 5 V CC _ AXG _ 36
U1 5 V CC _ AXG _ 37
A N1 4 V CC _ AXG _ 38
A M1 4 V CC _ AXG _ 39
U1 4 V CC _ AXG _ 40 AV4 4 V CC SM _ LF 1
T1 4 V CC _ AXG _ 41 VC C _ S M_ L F 1 BA3 7 V CC SM _ LF 2 CA NT IG A
V CC _ AXG _ 42 VC C _ S M_ L F 2 AM 4 0 V CC SM _ LF 3
VCC SM LF
VC C _ S M_ L F 3 AV2 1 V CC SM _ LF 4
VC C _ S M_ L F 4 AY 5 V CC SM _ LF 5
VC C _ S M_ L F 5 AM 1 0 V CC SM _ LF 6
VC C _ S M_ L F 6 BB1 3 V CC SM _ LF 7
0 . 1 u _ 16 V _Y 5 V _ 0 4
0 .1 u _ 1 6 V_ Y5 V_ 0 4
0 .2 2 u _ 1 0 V_ Y5 V_ 0 4
0 . 4 7 u_ 1 0 V _ X 5 R _ 0 4
0 . 22 u _ 1 0 V _ Y 5 V _ 0 4
VC C _ S M_ L F 7
1 u _ 6 .3 V_ Y5 V_ 0 4
1 u _ 6 .3 V_ Y5 V_ 0 4
G P U V C CS E NS E A J1 4
G PU VSS SEN SE A H1 4 V CC _ A X G _ S E N S E
VSS_ AXG _ SEN SE
C 86
C 60
C 185
C 94
C1 2 0
C1 7 9
C 1 77
CA NT IG A
B - 10 CANTIGA 5/7
Schematic Diagrams
CANTIGA 6/7
1 0m ils
C4 8 4 C 47 6 C 4 73
1 .0 5 V S
4 . 7 u _6 . 3 V _ X 5 R _ 0 6 0 . 0 1 u _1 6 V _ X 7 R _ 0 4 0 . 1 u _ 10 V _X 5 R _0 4 U 1 5H
U1 3
10 mils
3 . 3V S _ T V _ C R T _B G
V T T_ 1 T1 3
L4 0 10m ils B2 7 V T T_ 2 U1 2 C 1 14 C 16 2 C6 4 C1 4 3
3 .3 V S . A2 6 V C C A _C R T_ D A C _ 1 V T T_ 3 T1 2
V C C A _C R T_ D A C _ 2 V T T_ 4 U1 1
CRT
H C B 1 6 08 K F -1 2 1T 2 5 C 4 77 0 . 4 7 u _6 . 3 V _ X 5 R _0 4 2 . 2 u _6 . 3 V _ Y 5 V _ 0 6 4 . 7 u_ 6 . 3 V _ X 5 R _ 0 6 4. 7u _ 6 . 3 V _ X 5 R _ 0 6
V T T_ 5 T1 1
0 . 1 u _ 10 V _X 5 R _0 4 A2 5 V T T_ 6 U1 0
B2 5 V C C A _D A C _ B G V T T_ 7 T1 0
1 .0 5 VS
V S S A _ DA C_ B G V T T_ 8 U9
L4 2 V T T_ 9 T9
V T T _1 0 U8
H C B 1 0 0 5K F -1 2 1T 2 0 1 0m ils V T T _1 1
. V C C A _D P L L A F47
V C C A _D P L L A V T T _1 2
T8
U7
10 mils
V C C A _D P L L B L48 V T T _1 3 T7
PLL
C4 9 8 + C1 9 4 C 4 97
V C C A _D P L L B V T T _1 4 U6
VTT
C9 7 C 12 5 C 108
4. 7 u _ 6 . 3 V _ X 5 R _ 0 6 *2 2 0 U _ 6 . 3 V _ B 2 0 . 1 u _ 10 V _X 5 R _0 4 V C C A _H P L L AD 1 V T T _1 5 T6
V C C A _H P L L V T T _1 6 U5 *0 . 1 U _ 16 V _ 0 4 *0 . 1 U _ 1 6V _0 4 * 1 0 U_ 1 0 V _ 0 8
V C C A _M P L L A E1 V T T _1 7 T5
L41
.
V C C A _M P L L V T T _1 8 V3
H C B 1 0 05 K F -1 21 T 2 0
V T T _1 9 U3
1 .0 5 VS 10m ils V T T _2 0 V2
V T T _2 1 U2
+ C 50 0 C 499 C4 9 6 V T T _2 2 T2
1. 8V _T X L V D S V T T _2 3 V1
V T T _2 4
* 2 20 U _ 6 . 3V _ B 2 1 0 u _ 6 . 3 V _ X5 R _ 0 8 0. 1u _ 1 0 V _ X 5 R _ 0 4 10 mils U1
V T T _2 5
C 19 8
A LVDS
L38
.
10 mils
V C CA _ H P L L 1 0 00 p _ 5 0 V _ X 7R _ 0 4
J48
J47
V C C A _L V D S
C3 5
10 m ils
3 .3 V S
R 122 1 0 _ 06 C
D1 7
S C S 35 5 V
A
1 .0 5 VS
Sheet 10 of 38
H C B 1 0 0 5 K F -1 2 1 T 2 0 C 45 0 C 452 V S S A _ L V DS V CC _ HV _ 1 B3 5
CANTIGA 6/7
HV
V CC _ HV _ 2 A3 5
10 m ils C 1 72
.
V CC _ HV _ 3
L 37 4 . 7 u _6 . 3 V _ X 5 R _ 0 6
H C B 1 0 0 5K F -1 2 1 T2 0 0 . 1 u _ 1 0 V _ X5 R _ 0 4 1 .5 V S 0 . 1 u _ 16 V _ Y 5 V _ 0 4
1 .0 5 VM _ PEG PL L AD 4 8
A PEG
10m ils 10 mils
V C C A _ MP L L C1 9 5 C 18 0
AA4 8
V C C A _P E G_ B G
V C C A _P E G_ P LL
POWER
C4 4 9 C 45 1 0 . 1u _ 1 6 V _ Y 5 V _0 4 0 . 1 u _1 0 V _ X 5 R _ 0 4
B2 2 MC H _V C C _ A X F
20 mils
R3 4 2 0_06 1 . 0 5V S
AXF
1 0u _ 1 0 V _ Y 5 V _0 8 0 . 1 u _1 0 V _ X 5 R _ 0 4 V C C_ A X F _ 1 B2 1
V C C_ A X F _ 2 A2 1 C4 7 2 C4 6 9
V C C_ A X F _ 3
1 0m ils AR 2 0
1 u _6 . 3 V _ Y 5 V _ 0 4 *1 0 U _ 1 0 V _ 0 8
1 .0 5 V S
AP2 0 VC CA _S M_ 1
VC CA _S M_ 2
+ C5 6 C1 5 9 C1 5 0 C 79 AN 2 0
AR 1 7 VC CA _S M_ 3
A SM
AP1 7 VC CA _S M_ 4 MC H _V C C _ S MC K
25 mils
*1 0 0 U _ 6 . 3 V _ B 2 1 0u _ 1 0 V _ Y 5 V _ 0 8 1 u _6 . 3 V _ Y 5 V _ 04 4 . 7 u _6 . 3 V _ X 5 R _0 6 R6 9 0_06
AN 1 7 VC CA _S M_ 5 BF2 1 1 .5 V
AT1 6 VC CA _S M_ 6 VC C_ S M _ CK _ 1 B H2 0
SM CK
C1 0 3 C9 6
AR 1 6 VC CA _S M_ 7 VC C_ S M _ CK _ 2 B G2 0 L16
AP1 6 VC CA _S M_ 8 VC C_ S M _ CK _ 3 BF2 0
10m ils VC CA _S M_ 9 VC C_ S M _ CK _ 4
0 . 1 u_ 1 6 V _ Y 5V _ 04 10 u _ 6 . 3 V _ X 5 R _ 0 8 H C B 1 0 0 5 K F -1 2 1 T 20
. 1 .8 V
C8 3 C1 0 0 C 17 0 C 205 C 192
1 . 8 V _ TX L V D S
0 . 1u _ 1 6 V _ Y 5 V _0 4 *2 . 2 u _ 6 . 3 V _ 06 1 0 u_ 1 0 V _ Y 5V _ 08
K4 7
10m ils 1 0 0 0 p _ 50 V _ X 7 R _0 4 1 0 u _ 1 0V _Y 5 V _ 0 8
3 .3 V S _ T V _ CR T _ B G
AP2 8 V C C _ T X_ L V D S
AN 2 8 VC CA _S M_ C K_ 1
AP2 5 VC CA _S M_ C K_ 2
3 .3 V S 1 .5 VS 10m ils AN 2 5 VC CA _S M_ C K_ 3 1. 0 5 V M _ P E G
C4 8 0 C 47 8
AN 2 4 VC CA _S M_ C K_ 4
A CK
VC CA _S M_ C K_ 5
0 . 0 1u _ 1 6 V _ X 7 R _ 0 4 0 . 1 u _1 0 V _ X 5 R _ 0 4 AM 2 8
VC CA _S M_ C K _ NC TF_1 VC C _P E G_ 1
V4 8 8 0m ils L14 . 1 . 05 V S
R 346 R 347 AM 2 6 U4 8
AM 2 5 VC CA _S M_ C K _ NC TF_2 VC C _P E G_ 2 V4 7 C2 0 4 C 19 3 C 1 88 H C B 1 6 0 8 K F -1 2 1 T2 5
* 2 0m i l _ s ho rt _ 0 4 AL 2 5 VC CA _S M_ C K _ NC TF_3 VC C _P E G_ 3 U4 7
PEG
* 0 _ 04
AM 2 4 VC CA _S M_ C K _ NC TF_4 VC C _P E G_ 4 U4 6
20m ils M C H_ V C C_ H DA AL 2 4 VC CA _S M_ C K _ NC TF_5 VC C _P E G_ 5
2 2 u_ 6 . 3 V _ X 5 R _ 0 8 0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _ 16 V _ Y 5 V _ 0 4
AM 2 3 VC CA _S M_ C K _ NC TF_6
AL 2 3 VC CA _S M_ C K _ NC TF_7
C4 8 8 R9 0 10 mils V C C D _T V D A C VC CA _S M_ C K _ NC TF_8 1. 0 5 V M _ D M I
0. 1u _ 1 6 V _ Y 5 V _ 0 4
*2 0 m i _l s h o rt _ 0 4 C 1 31 C1 6 0
VC C_ D MI _ 1
A H4 8 20 mils L13 . 1 . 05 V S
B2 4 TV AF4 8
A2 4 V C C A _T V _D A C _ 1 VC C_ D MI _ 2 A H4 7
DMI
0 . 0 1 u _1 6 V _ X 7 R _ 0 4 C1 9 0 C 19 1 C 2 02 H C B 1 6 0 8 K F -1 2 1 T2 5
V C C A _T V _D A C _ 2 VC C_ D MI _ 3 A G4 7
0. 1 u _ 1 0 V _ X 5R _ 0 4
VC C_ D MI _ 4
0 . 1 u_ 1 6 V _ Y 5V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 04 1 0 u _1 0 V _ Y 5 V _ 0 8
A3 2
HDA
10m ils V C C_ H DA
1 .5 VS A8 V TT L F _ C A P 1
C 166 C1 5 7 V TT L F 1 L1 V TT L F _ C A P 2
VTTLF
1. 0 5 V S V TT L F 2 AB2 V TT L F _ C A P 3
D TV/CRT
C1 4 0 0 . 0 1 u _ 1 6V _X 7 R _ 04 M 25 V TT L F 3
0 . 1 u_ 1 0 V _ X 5 R _ 0 4 V C CD _ T V DA C C4 5 3 C5 9 C 460
0 . 1 u _1 0 V _ X 5 R _ 0 4 L28
V C C D _ QD A C
1 0m ils A F1
0 . 4 7u _ 6 . 3 V _ X 5 R _ 0 4 0. 47 u _ 6 . 3 V _ X 5R _ 0 4 0 . 4 7 u _ 6 . 3 V _ X5 R _ 0 4
V C C D _ H P LL
L11 1 . 0 5V M_ P E G P L L
1 . 0 5V S . 10 mils AA4 7
V C CD _ P E G _ P L L
H C B 1 0 0 5 K F -1 2 1 T 2 0 C 18 1 C 1 96 C 187 1 .8 V
M 38
LVDS
R1 1 1
1 u _ 6. 3 V _ Y 5 V _ 0 4 1 0 u _1 0 V _ Y 5 V _ 0 8 0 . 1 u _ 1 0V _X 5 R _ 04 M C H_ V C CD _ L V DS L37 V C CD _ L V DS _ 1
V C CD _ L V DS _ 2
*2 0 m i _l s h o rt _ 0 4 C1 7 5
1 u_ 6 . 3 V _ Y 5 V _ 04 C A N TI GA
2 , 3 , 6 , 7 , 1 2 , 1 3 , 1 4, 1 5 , 1 6 , 1 7 , 1 8, 19 , 2 0 , 2 1 , 2 2 , 2 3, 24 , 2 5 , 2 6 , 2 7 , 2 8, 3 0 3 . 3 V S
3 , 1 5, 16 , 1 7 , 1 8 , 1 9 , 2 1, 22 , 2 5 , 2 6 , 2 8 , 3 2, 3 3 3 . 3 V
CANTIGA 6/7 B - 11
Schematic Diagrams
CANTIGA 7/7
U 15I
U 15J
AU 4 8 A M3 6 B G 21 AH 8
AR 4 8 V SS_ 1 VS S_ 1 0 0 A E3 6 L 12 V SS _ 19 9 V SS_ 2 9 7 Y8
A L4 8 V SS_ 2 VS S_ 1 0 1 P 36 AW 21 V SS _ 20 0 V SS_ 2 9 8 L8
B B4 7 V SS_ 3 VS S_ 1 0 2 L36 A U 21 V SS _ 20 1 V SS_ 2 9 9 E8
AW 4 7 V SS_ 4 VS S_ 1 0 3 J 36 AP 21 V SS _ 20 2 V SS_ 3 0 0 B8
AN 4 7 V SS_ 5 VS S_ 1 0 4 F 36 A N 21 V SS _ 20 3 V SS_ 3 0 1 AY 7
A J4 7 V SS_ 6 VS S_ 1 0 5 B 36 A H 21 V SS _ 20 4 V SS_ 3 0 2 AU 7
A F4 7 V SS_ 7 VS S_ 1 0 6 A H 35 AF 21 V SS _ 20 5 V SS_ 3 0 3 AN 7
AD 4 7 V SS_ 8 VS S_ 1 0 7 A A3 5 AB 21 V SS _ 20 6 V SS_ 3 0 4 AJ 7
A B4 7 V SS_ 9 VS S_ 1 0 8 Y 35 R 21 V SS _ 20 7 V SS_ 3 0 5 AE 7
Y 47 V SS_ 1 0 VS S_ 1 0 9 U 35 M21 V SS _ 20 8 V SS_ 3 0 6 AA 7
T4 7 V SS_ 1 1 VS S_ 1 1 0 T3 5 J 21 V SS _ 20 9 V SS_ 3 0 7 N7
N 47 V SS_ 1 2 VS S_ 1 1 1 B F3 4 G 21 V SS _ 21 0 V SS_ 3 0 8 J7
L4 7 V SS_ 1 3 VS S_ 1 1 2 A M3 4 B C 20 V SS _ 21 1 V SS_ 3 0 9 BG 6
G47 V SS_ 1 4 VS S_ 1 1 3 A J 34 BA 20 V SS _ 21 2 V SS_ 3 1 0 BD 6
BD 4 6 V SS_ 1 5 VS S_ 1 1 4 A F3 4 AW 20 V SS _ 21 3 V SS_ 3 1 1 AV 6
B A4 6 V SS_ 1 6 VS S_ 1 1 5 A E3 4 A T20 V SS _ 21 4 V SS_ 3 1 2 AT6
AY 4 6 V SS_ 1 7 VS S_ 1 1 6 W 34 A J 20 V SS _ 21 5 V SS_ 3 1 3 AM6
A V4 6 V SS_ 1 8 VS S_ 1 1 7 B 34 A G 20 V SS _ 21 6 V SS_ 3 1 4 M6
AR 4 6 V SS_ 1 9 VS S_ 1 1 8 A 34 Y 20 V SS _ 21 7 V SS_ 3 1 5 C6
AM4 6 V SS_ 2 0 VS S_ 1 1 9 B G33 N 20 V SS _ 21 8 V SS_ 3 1 6 BA 5
V4 6 V SS_ 2 1 VS S_ 1 2 0 B C 33 K 20 V SS _ 21 9 V SS_ 3 1 7 AH 5
R 46 V SS_ 2 2 VS S_ 1 2 1 B A3 3 F 20 V SS _ 22 0 V SS_ 3 1 8 AD 5
P4 6 V SS_ 2 3 VS S_ 1 2 2 A V3 3 C 20 V SS _ 22 1 V SS_ 3 1 9 Y5
H 46 V SS_ 2 4 VS S_ 1 2 3 A R 33 A 20 V SS _ 22 2 V SS_ 3 2 0 L5
F4 6 V SS_ 2 5 VS S_ 1 2 4 A L33 B G 19 V SS _ 22 3 V SS_ 3 2 1 J5
B F4 4 V SS_ 2 6 VS S_ 1 2 5 A H 33 A 18 V SS _ 22 4 V SS_ 3 2 2 H5
AH 4 4 V SS_ 2 7 VS S_ 1 2 6 A B3 3 B G 17 V SS _ 22 5 V SS_ 3 2 3 F5
AD 4 4 V SS_ 2 8 VS S_ 1 2 7 P 33 B C 17 V SS _ 22 6 V SS_ 3 2 4 BE 4
A A4 4 V SS_ 2 9 VS S_ 1 2 8 L33 AW 17 V SS _ 22 7 V SS_ 3 2 5
Y 44 V SS_ 3 0 VS S_ 1 2 9 H 33 A T17 V SS _ 22 8 BC 3
U 44
T4 4
V SS_ 3 1
V SS_ 3 2
VS S_ 1 3 0
VS S_ 1 3 1
N 32
K 32
R 17
M17
V SS _ 22 9
V SS _ 23 0 VSS V SS_ 3 2 7
V SS_ 3 2 8
AV 3
AL 3
M4 4
F4 4
V SS_ 3 3
V SS_ 3 4
V SS_ 3 5
VSS VS S_ 1 3 2
VS S_ 1 3 3
VS S_ 1 3 4
F 32
C 32
H 17
C 17
V SS _ 23 1
V SS _ 23 2
V SS _ 23 3
V SS_ 3 2 9
V SS_ 3 3 0
V SS_ 3 3 1
R3
P3
Sheet 11 of 38 BC 4 3
A V4 3
AU 4 3
V SS_ 3 6
V SS_ 3 7
VS S_ 1 3 5
VS S_ 1 3 6
A 31
A N 29
T2 9
BA 16
V SS _ 23 5
V SS_ 3 3 2
V SS_ 3 3 3
F3
BA 2
AW 2
AM4 3 V SS_ 3 8 VS S_ 1 3 7 N 29 A U 16 V SS_ 3 3 4 AU 2
CANTIGA 7/7 J4 3
C 43
BG 4 2
V SS_ 3 9
V SS_ 4 0
V SS_ 4 1
VS S_ 1 3 8
VS S_ 1 3 9
VS S_ 1 4 0
K 29
H 29
F 29
A N 16
N 16
K 16
V SS _ 23 7
V SS _ 23 8
V SS _ 23 9
V SS_ 3 3 5
V SS_ 3 3 6
V SS_ 3 3 7
AR 2
AP 2
AJ 2
AY 4 2 V SS_ 4 2 VS S_ 1 4 1 A 29 G 16 V SS _ 24 0 V SS_ 3 3 8 AH 2
A T4 2 V SS_ 4 3 VS S_ 1 4 2 B G28 E 16 V SS _ 24 1 V SS_ 3 3 9 AF 2
AN 4 2 V SS_ 4 4 VS S_ 1 4 3 B D 28 B G 15 V SS _ 24 2 V SS_ 3 4 0 AE 2
A J4 2 V SS_ 4 5 VS S_ 1 4 4 B A2 8 A C 15 V SS _ 24 3 V SS_ 3 4 1 AD 2
A E4 2 V SS_ 4 6 VS S_ 1 4 5 A V2 8 W 15 V SS _ 24 4 V SS_ 3 4 2 AC 2
N 42 V SS_ 4 7 VS S_ 1 4 6 A T2 8 A 15 V SS _ 24 5 V SS_ 3 4 3 Y2
L4 2 V SS_ 4 8 VS S_ 1 4 7 A R 28 B G 14 V SS _ 24 6 V SS_ 3 4 4 M2
BD 4 1 V SS_ 4 9 VS S_ 1 4 8 A J 28 AA 14 V SS _ 24 7 V SS_ 3 4 5 K2
AU 4 1 V SS_ 5 0 VS S_ 1 4 9 A G28 C 14 V SS _ 24 8 V SS_ 3 4 6 AM1
AM4 1 V SS_ 5 1 VS S_ 1 5 0 A E2 8 B G 13 V SS _ 24 9 V SS_ 3 4 7 AA 1
AH 4 1 V SS_ 5 2 VS S_ 1 5 1 A B2 8 B C 13 V SS _ 25 0 V SS_ 3 4 8 P1
AD 4 1 V SS_ 5 3 VS S_ 1 5 2 Y 28 BA 13 V SS _ 25 1 V SS_ 3 4 9 H1
A A4 1 V SS_ 5 4 VS S_ 1 5 3 P 28 V SS _ 25 2 V SS_ 3 5 0
Y 41 V SS_ 5 5 VS S_ 1 5 4 K 28 U 24 R 80 * 10 m il_ s h o r t
U 41 V SS_ 5 6 VS S_ 1 5 5 H 28 A N 13 V SS_ 3 5 1 U 28 R 85 * 10 m il_ s h o r t
T4 1 V SS_ 5 7 VS S_ 1 5 6 F 28 A J 13 V SS _ 25 5 V SS_ 3 5 2 U 25 R 81 * 10 m il_ s h o r t
M4 1 V SS_ 5 8 VS S_ 1 5 7 C 28 AE 13 V SS _ 25 6 V SS_ 3 5 3 U 29 R 98 * 10 m il_ s h o r t
G41 V SS_ 5 9 VS S_ 1 5 8 B F2 6 N 13 V SS _ 25 7 V SS_ 3 5 4
B4 1 V SS_ 6 0 VS S_ 1 5 9 A H 26 L 13 V SS _ 25 8
BG 4 0 V SS_ 6 1 VS S_ 1 6 0 A F2 6 G 13 V SS _ 25 9 AF 3 2
B B4 0 V SS_ 6 2 VS S_ 1 6 1 A B2 6 E 13 V SS _ 26 0 VSS _ N C TF_ 1 AB 3 2
A V4 0 V SS_ 6 3 VS S_ 1 6 2 A A2 6 BF 12 V SS _ 26 1 VSS _ N C TF_ 2 V3 2
AN 4 0 V SS_ 6 4 VS S_ 1 6 3 C 26 AV 12 V SS _ 26 2 VSS _ N C TF_ 3 AJ 3 0
H 40 V SS_ 6 5 VS S_ 1 6 4 B 26 A T12 V SS _ 26 3 VSS _ N C TF_ 4 AM2 9
E4 0 V SS_ 6 6 VS S_ 1 6 5 B H 25 A M12 V SS _ 26 4 VSS _ N C TF_ 5 AF 2 9
A T3 9 V SS_ 6 7 VS S_ 1 6 6 B D 25 AA 12 V SS _ 26 5 VSS _ N C TF_ 6 AB 2 9
VSS NCTF
AM3 9 V SS_ 6 8 VS S_ 1 6 7 B B2 5 J 12 V SS _ 26 6 VSS _ N C TF_ 7 U 26
A J3 9 V SS_ 6 9 VS S_ 1 6 8 A V2 5 A 12 V SS _ 26 7 VSS _ N C TF_ 8 U 23
A E3 9 V SS_ 7 0 VS S_ 1 6 9 A R 25 B D 11 V SS _ 26 8 VSS _ N C TF_ 9 AL 2 0
N 39 V SS_ 7 1 VS S_ 1 7 0 A J 25 BB 11 V SS _ 26 9 VS S_ N C TF_ 1 0 V2 0
L3 9 V SS_ 7 2 VS S_ 1 7 1 A C 25 A Y 11 V SS _ 27 0 VS S_ N C TF_ 1 1 AC 1 9
B3 9 V SS_ 7 3 VS S_ 1 7 2 Y 25 A N 11 V SS _ 27 1 VS S_ N C TF_ 1 2 AL 1 7
BH 3 8 V SS_ 7 4 VS S_ 1 7 3 N 25 A H 11 V SS _ 27 2 VS S_ N C TF_ 1 3 AJ 1 7
BC 3 8 V SS_ 7 5 VS S_ 1 7 4 L25 V SS _ 27 3 VS S_ N C TF_ 1 4 AA 1 7
B A3 8 V SS_ 7 6 VS S_ 1 7 5 J 25 Y 11 VS S_ N C TF_ 1 5 U 17
AU 3 8 V SS_ 7 7 VS S_ 1 7 6 G 25 N 11 V SS _ 27 5 VS S_ N C TF_ 1 6
AH 3 8 V SS_ 7 8 VS S_ 1 7 7 E 25 G 11 V SS _ 27 6
AD 3 8 V SS_ 7 9 VS S_ 1 7 8 B F2 4 C 11 V SS _ 27 7 BH 4 8
VSS SCB
A A3 8 V SS_ 8 0 VS S_ 1 7 9 A D 12 B G 10 V SS _ 27 8 VS S_ S C B_ 1 BH 1
Y 38 V SS_ 8 1 VS S_ 1 8 0 A Y 24 AV 10 V SS _ 27 9 VS S_ S C B_ 2 A4 8
U 38 V SS_ 8 2 VS S_ 1 8 1 A T2 4 A T10 V SS _ 28 0 VS S_ S C B_ 3 C1
T3 8 V SS_ 8 3 VS S_ 1 8 2 A J 24 A J 10 V SS _ 28 1 VS S_ S C B_ 4 A3
J3 8 V SS_ 8 4 VS S_ 1 8 3 A H 24 AE 10 V SS _ 28 2 VS S_ S C B_ 5
F3 8 V SS_ 8 5 VS S_ 1 8 4 A F2 4 AA 10 V SS _ 28 3 E1
C 38 V SS_ 8 6 VS S_ 1 8 5 A B2 4 M10 V SS _ 28 4 N C _26 D2
B F3 7 V SS_ 8 7 VS S_ 1 8 6 R 24 BF9 V SS _ 28 5 N C _27 C3
B B3 7 V SS_ 8 8 VS S_ 1 8 7 L24 BC 9 V SS _ 28 6 N C _28 B4
AW 3 7 V SS_ 8 9 VS S_ 1 8 8 K 24 AN 9 V SS _ 28 7 N C _29 A5
A T3 7 V SS_ 9 0 VS S_ 1 8 9 J 24 AM9 V SS _ 28 8 N C _30 A6
AN 3 7 V SS_ 9 1 VS S_ 1 9 0 G 24 AD 9 V SS _ 28 9 N C _31 A4 3
A J3 7 V SS_ 9 2 VS S_ 1 9 1 F 24 G9 V SS _ 29 0 N C _32 A4 4
H 37 V SS_ 9 3 VS S_ 1 9 2 E 24 B9 V SS _ 29 1 N C _33 B4 5
NC
C 37 V SS_ 9 4 VS S_ 1 9 3 B H 23 BH 8 V SS _ 29 2 N C _34 C 46
BG 3 6 V SS_ 9 5 VS S_ 1 9 4 A G23 BB8 V SS _ 29 3 N C _35 D 47
BD 3 6 V SS_ 9 6 VS S_ 1 9 5 Y 23 AV8 V SS _ 29 4 N C _36 B4 7
A K1 5 V SS_ 9 7 VS S_ 1 9 6 B 23 A T8 V SS _ 29 5 N C _37 A4 6
AU 3 6 V SS_ 9 8 VS S_ 1 9 7 A 23 V SS _ 29 6 N C _38 F4 8
V SS_ 9 9 VS S_ 1 9 8 A J6 N C _39 E4 8
VS S_ 1 9 9 N C _40 C 48
N C _41 B4 8
N C _42
C A N TIG A
C A N TI G A
B - 12 CANTIGA 7/7
Schematic Diagrams
DDRIII SO-DIMM A
SO-DIMM A
J _ D I M M1 A
8 M_ A _ A [ 1 4 : 0 ] M _A _A 0 98 5 M_ A _ D Q 0 M _ A _D Q[ 6 3 : 0 ] 8
M _A _A 1 97 A0 DQ 0 7 M_ A _ D Q 1
M _A _A 2 96 A1 DQ 1 15 M_ A _ D Q 2 J_ D I MM 1B
M _A _A 3 95 A2 DQ 2 17 M_ A _ D Q 3
M _A _A 4 92 A3 DQ 3 4 M_ A _ D Q 4
M _A _A 5 91 A4 DQ 4 6 M_ A _ D Q 5 1 .5 V
M _A _A 6 90 A5 DQ 5 16 M_ A _ D Q 6
M _A _A 7 86 A6 DQ 6 18 M_ A _ D Q 7 75 44
M _A _A 8 89 A7 DQ 7 21 M_ A _ D Q 8 76 V DD1 VSS1 6 48
M _A _A 9 85 A8 DQ 8 23 M_ A _ D Q 9 81 V DD2 VSS1 7 49
M _A _A 1 0 10 7 A9 DQ 9 33 M_ A _ D Q 10 82 V DD3 VSS1 8 54
M _A _A 1 1 84 A 1 0 /A P D Q1 0 35 M_ A _ D Q 11 87 V DD4 VSS1 9 55
M _A _A 1 2 83 A1 1 D Q1 1 22 M_ A _ D Q 12 88 V DD5 VSS2 0 60
11 9 A 1 2 /B C# D Q1 2 24 93 V DD6 VSS2 1 61
M _A _A 1 3 M_ A _ D Q 13
M _A _A 1 4 80 A1 3 D Q1 3 34 M_ A _ D Q 14 94 V DD7 VSS2 2 65
78 A1 4 D Q1 4 36 M_ A _ D Q 15 99 V DD8 VSS2 3 66
A1 5 D Q1 5 39 M_ A _ D Q 16 1 00 V DD9 VSS2 4 71
M _A _B S 0# 10 9 D Q1 6 41 M_ A _ D Q 17 1 05 V DD1 0 VSS2 5 72
8 M_ A _ B S 0 # BA0 D Q1 7 V DD1 1 VSS2 6
M _A _B S 1# 10 8 51 M_ A _ D Q 18 1 06 127
8 M_ A _ B S 1 # 79 BA1 D Q1 8 53 1 11 V DD1 2 VSS2 7 128
M _A _B S 2# M_ A _ D Q 19
8 M_ A _ B S 2 # M _C S 0 # 11 4 BA2 D Q1 9 40 M_ A _ D Q 20 1 12 V DD1 3 VSS2 8 133
7 M_ A _ C S 0 # M _C S 1 # 12 1 S0 # D Q2 0 42 M_ A _ D Q 21 1 17 V DD1 4 VSS2 9 134
7 M_ A _ C S 1 # M _C L K _ A _D D R 0 10 1 S1 # D Q2 1 50 M_ A _ D Q 22 1 18 V DD1 5 VSS3 0 138
7 M_ C L K _ A _ D D R 0 M _C L K _ A _D D R 0# 10 3 C K0 D Q2 2 52 M_ A _ D Q 23 1 23 V DD1 6 VSS3 1 139
7 M _C L K _ A _D D R 0 # 10 2 C K0 # D Q2 3 57 3. 3 V S 1 24 V DD1 7 VSS3 2 144
M _C L K _ A _D D R 1 M_ A _ D Q 24
7 M_ C L K _ A _ D D R 1 C K1 D Q2 4 V DD1 8 VSS3 3
7 M _C L K _ A _D D R 1 #
7
7
M_ A _ C K E 0
M_ A _ C K E 1
M _C L K _ A _D D R
M _A _C K E 0
M _A _C K E 1
1# 10 4
73
74
11 5
C K1 #
C KE0
C KE1
D Q2 5
D Q2 6
D Q2 7
59
67
69
56
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
25
26
27
1 99
77
V DDS P D
VSS3 4
VSS3 5
VSS3 6
145
150
151
155
Sheet 12 of 38
M _A _C A S # M_ A _ D Q 28 C 6 28 C 6 29
8
8
8
M _A _ C A S #
M _A _ R A S #
M _ A_ W E#
M _A _R A S #
M _A _W E #
S A 0 _ A _ DIM 0
11 0
11 3
19 7
C AS#
R AS#
W E#
D Q2 8
D Q2 9
D Q3 0
58
68
70
M_ A _ D Q
M_ A _ D Q
M_ A _ D Q
29
30
31
1 .5 V
2 . 2u _ 6 . 3V _Y 5 V _ 06 0 . 1 u _1 6 V _ Y 5 V _ 0 4
1 22
1 25
N C1
N C2
N CT E S T
VSS3 7
VSS3 8
VSS3 9
156
161
162
DDRIII SO-DIMM A
S A 1 _ A _ DIM 0 20 1 SA0 D Q3 1 1 29 M_ A _ D Q 32 1 98 VSS4 0 167
20 2 SA1 D Q3 2 1 31 7 , 1 3 P M_ E X T TS _ D D R # 30 E V ENT # VSS4 1 168
M_ A _ D Q 33 R 39 2
2, 13 , 1 8 I C H _ S MB C L K 0 20 0 SC L D Q3 3 1 41 M_ A _ D Q 34 7 , 1 3 D D R 3 _D R A MR S T# R ESET # VSS4 2 172
2, 13 , 1 8 I C H _ S MB D A T 0 SD A D Q3 4 1 43 VSS4 3 173
R 3 93 R 39 4 M_ A _ D Q 35 1 K _ 1% _ 0 4
M _A _O D T 0 11 6 D Q3 5 1 30 M_ A _ D Q 36 1 VSS4 4 178
1 0 K_ 0 4 1 0 K _ 04
7 M_ A _ OD T 0
M _A _O D T 1 12 0 O DT 0 D Q3 6 1 32 M_ A _ D Q 37 M V R E F _ A _D I M0
20 mils 1 26 V RE F _ DQ VSS4 5 179
7 M_ A _ OD T 1 O DT 1 D Q3 7 1 40 M_ A _ D Q 38 V RE F _ CA VSS4 6 184
8 M _A _D M[ 7 : 0 ] D Q3 8 VSS4 7
M _A _D M0 11 1 42 M_ A _ D Q 39 185
M _A _D M1 28 D M0 D Q3 9 1 47 M_ A _ D Q 40 2 VSS4 8 189
R 39 5 C 6 30 C 6 31 C6 3 2 C6 3 3
M _A _D M2 46 D M1 D Q4 0 1 49 M_ A _ D Q 41 3 V SS1 VSS4 9 190
63 D M2 D Q4 1 1 57 8 V SS2 VSS5 0 195
*0 . 1 u _1 0 V _ X 5 R _ 0 4
*0 . 1 u _1 0 V _ X 5 R _ 0 4
M _A _D M3 M_ A _ D Q 42 1 K _ 1% _ 0 4
1 u_ 6 . 3 V _ X 5R _ 04
2. 2 u _ 6 . 3V _ Y 5 V _ 0 6
M _A _D M4 13 6 D M3 D Q4 2 1 59 M_ A _ D Q 43 9 V SS3 VSS5 1 196
M _A _D M5 15 3 D M4 D Q4 3 1 46 M_ A _ D Q 44 13 V SS4 VSS5 2
M _A _D M6 17 0 D M5 D Q4 4 1 48 M_ A _ D Q 45 14 V SS5
M _A _D M7 18 7 D M6 D Q4 5 1 58 M_ A _ D Q 46 19 V SS6
D M7 D Q4 6 1 60 M_ A _ D Q 47 20 V SS7 V T T _ ME M
8 M _A _ D QS [ 7 : 0 ] 12 D Q4 7 1 63 25 V SS8
M _A _D QS 0 M_ A _ D Q 48
M _A _D QS 1 29 D QS 0 D Q4 8 1 65 M_ A _ D Q 49 26 V SS9 203
M _A _D QS 2 47 D QS 1 D Q4 9 1 75 M_ A _ D Q 50 31 V SS1 0 VTT1 204
M _A _D QS 3 64 D QS 2 D Q5 0 1 77 M_ A _ D Q 51 32 V SS1 1 VTT2
M _A _D QS 4 13 7 D QS 3 D Q5 1 1 64 M_ A _ D Q 52 37 V SS1 2 G ND1
M _A _D QS 5 15 4 D QS 4 D Q5 2 1 66 M_ A _ D Q 53 38 V SS1 3 G1 G ND2
M _A _D QS 6 17 1 D QS 5 D Q5 3 1 74 M_ A _ D Q 54 43 V SS1 4 G2
M _A _D QS 7 18 8 D QS 6 D Q5 4 1 76 M_ A _ D Q 55 V SS1 5
D QS 7 D Q5 5 1 81 M_ A _ D Q 56 D D R R K -20 4 0 1 -TR 4 B
M _A _D QS 0 # 10 D Q5 6 1 83 M_ A _ D Q 57
8 M_ A _ D Q S0 # M _A _D QS 1 # 27 D QS 0 # D Q5 7 1 91 M_ A _ D Q 58
8 M_ A _ D Q S1 # D QS 1 # D Q5 8
M _A _D QS 2 # 45 1 93 M_ A _ D Q 59
8 M_ A _ D Q S2 # M _A _D QS 3 # 62 D QS 2 # D Q5 9 1 80 M_ A _ D Q 60
8 M_ A _ D Q S3 # M _A _D QS 4 # 13 5 D QS 3 # D Q6 0 1 82 M_ A _ D Q 61
8 M_ A _ D Q S4 # 15 2 D QS 4 # D Q6 1 1 92
M _A _D QS 5 # M_ A _ D Q 62
8 M_ A _ D Q S5 # M _A _D QS 6 # 16 9 D QS 5 # D Q6 2 1 94 M_ A _ D Q 63 V T T _ ME M
8 M_ A _ D Q S6 # 18 6 D QS 6 # D Q6 3
M _A _D QS 7 #
8 M_ A _ D Q S7 # D QS 7 #
D D R R K -2 0 4 0 1-T R 4B
(REV)4.0mm C6 3 4 C6 3 5 C6 3 6 C 6 37
SN:6-86-24204-012 1 u_ 6 . 3 V _ X5 R _0 4 1u _ 6 . 3 V _ X5 R _0 4 1u _ 6 . 3V _X 5 R _ 0 4 0 . 1 u _ 16 V _ Y 5 V _ 0 4
6-86-24204-011
6-86-24204-007
For C5100 (Cost down)
1. 5 V 2 , 3, 6, 7 , 1 0 , 1 3, 1 4 , 1 5 , 16 , 1 7 , 1 8, 1 9 , 2 0 , 21 , 2 2 , 2 3, 2 4 , 2 5 , 26 , 2 7 , 2 8, 3 0 3 . 3 V S
3 , 1 5, 1 6 , 1 7 , 18 , 1 9 , 2 1, 2 2 , 2 5 , 26 , 2 8 , 3 2, 3 3 3 . 3 V
+ C6 3 8 C6 3 9 C 59 4 C 5 95 C5 9 6 C5 9 7 C 5 99 C6 0 0 C6 0 1 C6 0 2 C 6 03 C 60 4
1 u _ 6. 3V _ X 5 R _ 0 4
*1 0 u _6 . 3 V _ X 5 R _ 0 81 0 u _6 . 3 V _ X 5R _ 08 * 10 u _ 6 . 3V _X 5 R _ 0 8 10 u _ 6. 3V _ X 5 R _ 0 8 * 1 0u _ 6 . 3 V _X 5 R _ 0 8 0 . 1 u_ 1 6 V _ Y 5 V _ 04 0 . 1 u _ 16 V _ Y 5 V _ 0 4 * 0. 1u _ 1 0V _X 5 R _ 0 4 * 0. 1 u _ 10 V _ X 5 R _ 0 4 0 . 01 u _ 1 6V _ X 7 R _ 0 4
5 60 u _ 2 . 5V _6 . 6 *6 . 6 *5 . 9
DDRIII SO-DIMM A B - 13
Schematic Diagrams
DDRIII SO-DIMM B
SO-DIMM B
J _D I MM 2 A
8 M _ B _ A [ 1 4: 0 ] M _ B _A 0 98 5 M _ B _D Q0 M_ B _ D Q [ 6 3 : 0] 8
97 A0 D Q0 7
M _ B _A 1 M _ B _D Q1
M _ B _A 2 96 A1 D Q1 15 M _ B _D Q2
M _ B _A 3 95 A2 D Q2 17 M _ B _D Q3 J_ D I MM 2B
M _ B _A 4 92 A3 D Q3 4 M _ B _D Q4
M _ B _A 5 91 A4 D Q4 6 M _ B _D Q5
M _ B _A 6 90 A5 D Q5 16 M _ B _D Q6 1 .5 V
M _ B _A 7 86 A6 D Q6 18 M _ B _D Q7
M _ B _A 8 89 A7 D Q7 21 M _ B _D Q8 75 44
M _ B _A 9 85 A8 D Q8 23 M _ B _D Q9 76 V DD1 VSS1 6 48
107 A9 D Q9 33 81 V DD2 VSS1 7 49
M _ B _A 10 M _ B _D Q1 0
M _ B _A 11 84 A 1 0/ A P D Q 10 35 M _ B _D Q1 1 82 V DD3 VSS1 8 54
M _ B _A 12 83 A1 1 D Q 11 22 M _ B _D Q1 2 87 V DD4 VSS1 9 55
M _ B _A 13 119 A 1 2/ B C # D Q 12 24 M _ B _D Q1 3 88 V DD5 VSS2 0 60
M _ B _A 14 80 A1 3 D Q 13 34 M _ B _D Q1 4 93 V DD6 VSS2 1 61
78 A1 4 D Q 14 36 M _ B _D Q1 5 94 V DD7 VSS2 2 65
A1 5 D Q 15 39 M _ B _D Q1 6 99 V DD8 VSS2 3 66
M_ B _ B S 0 # 109 D Q 16 41 M _ B _D Q1 7 1 00 V DD9 VSS2 4 71
8 M _ B _B S 0# M_ B _ B S 1 # 108 BA0 D Q 17 51 M _ B _D Q1 8 1 05 V DD1 0 VSS2 5 72
8 M _ B _B S 1# M_ B _ B S 2 # 79 BA1 D Q 18 53 M _ B _D Q1 9 1 06 V DD1 1 VSS2 6 127
8 M _ B _B S 2# M_ B _ C S 0 # 114 BA2 D Q 19 40 M _ B _D Q2 0 1 11 V DD1 2 VSS2 7 128
7 M _ B _C S 0 # 121 S0 # D Q 20 42 1 12 V DD1 3 VSS2 8 133
M_ B _ C S 1 # M _ B _D Q2 1
3 . 3V S 7 M _ B _C S 1 # M_ C L K _ B _ D D R0 101 S1 # D Q 21 50 M _ B _D Q2 2 1 17 V DD1 4 VSS2 9 134
Sheet 13 of 38 7
7
7
M _C L K _B _D D R 0
M_ C L K _ B _ D D R 0 #
M _C L K _B _D D R 1
M_ C L K _ B _ D D
M_ C L K _ B _ D D
M_ C L K _ B _ D D
R0 #
R1
R1 #
103
102
104
CK 0
CK 0 #
CK 1
D Q 22
D Q 23
D Q 24
52
57
59
M
M
M
_ B _D
_ B _D
_ B _D
Q2 3
Q2 4
Q2 5 3. 3 V S
1 18
1 23
1 24
V
V
V
DD1 5
DD1 6
DD1 7
VSS3 0
VSS3 1
VSS3 2
138
139
144
7 M_ C L K _ B _ D D R 1 # M_ B _ C K E 0 73 CK 1 # D Q 25 67 M _ B _D Q2 6 V DD1 8 VSS3 3 145
DDRIII SO-DIMM B R3 9 7
10 K _ 0 4
7
7
8
M _ B _C K E 0
M _ B _C K E 1
M_ B _ C A S #
M_ B _ C K E 1
M_ B _ C A S #
M_ B _ R A S #
74
115
110
CK E 0
CK E 1
CA S #
D Q 26
D Q 27
D Q 28
69
56
58
M
M
M
_ B _D
_ B _D
_ B _D
Q2 7
Q2 8
Q2 9 C 6 05
20 mils
C 6 06
1 99
77
V DDS P D
VSS3 4
VSS3 5
VSS3 6
150
151
155
8 M_ B _ R A S # 113 RA S # D Q 29 68 1 .5 V 1 22 N C1 VSS3 7 156
M_ B _ W E # M _ B _D Q3 0
8 M_ B _ W E # S A 0 _B _D I M0 197 W E# D Q 30 70 M _ B _D Q3 1 1 25 N C2 VSS3 8 161
201 SA0 D Q 31 129 2 . 2u _ 6 . 3V _Y 5 V _ 06 0 . 1 u _1 6 V _ Y 5 V _ 0 4 N CT E S T VSS3 9 162
S A 1 _B _D I M0 M _ B _D Q3 2
202 SA1 D Q 32 131 M _ B _D Q3 3 1 98 VSS4 0 167
2 , 1 2 , 18 I C H _ S M B C L K 0 200 S CL D Q 33 141 7 , 1 2 P M_ E X T TS _ D D R # 30 E V E NT # VSS4 1 168
M _ B _D Q3 4 R 39 9
2 , 1 2 , 18 I C H _ S M B D A T 0 S DA D Q 34 143 M _ B _D Q3 5 7 , 1 2 D D R 3 _D R A MR S T# R ESET# VSS4 2 172
R3 9 8
M_ B _ OD T 0 116 D Q 35 130 M _ B _D Q3 6 1 K _ 1% _ 0 4 VSS4 3 173
7 M _ B _O D T 0 M_ B _ OD T 1 120 OD T0 D Q 36 132 M _ B _D Q3 7 1 VSS4 4 178
10 K _ 0 4
7 M _ B _O D T 1 OD T1 D Q 37 140 M _ B _D Q3 8 M V R E F _ B _D I M0
20 mils 1 26 V RE F _ DQ VSS4 5 179
8 M_ B _ D M [ 7 : 0 ] 11 D Q 38 142 V RE F _ CA VSS4 6 184
M_ B _ D M 0 M _ B _D Q3 9
M_ B _ D M 1 28 DM 0 D Q 39 147 M _ B _D Q4 0 VSS4 7 185
M_ B _ D M 2 46 DM 1 D Q 40 149 M _ B _D Q4 1 R 40 0 C 6 07 C 6 08 C6 0 9 C6 1 0 2 VSS4 8 189
M_ B _ D M 3 63 DM 2 D Q 41 157 M _ B _D Q4 2 3 V SS1 VSS4 9 190
M_ B _ D M 4 136 DM 3 D Q 42 159 M _ B _D Q4 3 1 K _ 1% _ 0 4 8 V SS2 VSS5 0 195
1 u_ 6 . 3 V _ X 5R _ 04
*0 . 1 u _1 0 V _ X 5 R _ 0 4
*0 . 1 u _1 0 V _ X 5 R _ 0 4
2. 2 u _ 6 . 3V _ Y 5 V _ 0 6
M_ B _ D M 5 153 DM 4 D Q 43 146 M _ B _D Q4 4 9 V SS3 VSS5 1 196
M_ B _ D M 6 170 DM 5 D Q 44 148 M _ B _D Q4 5 13 V SS4 VSS5 2
M_ B _ D M 7 187 DM 6 D Q 45 158 M _ B _D Q4 6 14 V SS5
DM 7 D Q 46 160 M _ B _D Q4 7 19 V SS6
8 M_ B _ D Q S [ 7 : 0 ] 12 D Q 47 163 20 V SS7 V T T _ ME M
M_ B _ D Q S0 M _ B _D Q4 8
M_ B _ D Q S1 29 DQ S0 D Q 48 165 M _ B _D Q4 9 25 V SS8
M_ B _ D Q S2 47 DQ S1 D Q 49 175 M _ B _D Q5 0 26 V SS9 203
M_ B _ D Q S3 64 DQ S2 D Q 50 177 M _ B _D Q5 1 31 V SS1 0 VTT1 204
M_ B _ D Q S4 137 DQ S3 D Q 51 164 M _ B _D Q5 2 32 V SS1 1 VTT2
M_ B _ D Q S5 154 DQ S4 D Q 52 166 M _ B _D Q5 3 37 V SS1 2 G ND1
M_ B _ D Q S6 171 DQ S5 D Q 53 174 M _ B _D Q5 4 38 V SS1 3 G1 G ND2
M_ B _ D Q S7 188 DQ S6 D Q 54 176 M _ B _D Q5 5 43 V SS1 4 G2
DQ S7 D Q 55 181 M _ B _D Q5 6 V SS1 5
M_ B _ D Q S0 # 10 D Q 56 183 M _ B _D Q5 7 D D R R K -20 4 0 1 -TP 8D
8 M _ B _ D QS 0# M_ B _ D Q S1 # 27 DQ S0 # D Q 57 191 M _ B _D Q5 8
8 M _ B _ D QS 1# 45 DQ S1 # D Q 58 193
M_ B _ D Q S2 # M _ B _D Q5 9
8 M _ B _ D QS 3# 135 DQ S3 # D Q 60 182
M_ B _ D Q S4 # M _ B _D Q6 1
8 M _ B _ D QS 5# 169 DQ S5 # D Q 62 194
M_ B _ D Q S6 # M _ B _D Q6 3
8 M _ B _ D QS 6# M_ B _ D Q S7 # 186 DQ S6 # D Q 63 V T T _ ME M
8 M _ B _ D QS 7# DQ S7 #
D D R R K -2 0 40 1 -T P 8 D
(REV)8.0mm C6 1 1 C6 1 2 C6 1 3 C 6 14
SN:6-86-24204-XXX
1 u_ 6 . 3 V _ X5 R _0 4 1u _ 6 . 3 V _ X5 R _0 4 1u _ 6 . 3V _X 5 R _ 0 4 0 . 1 u _ 16 V _ Y 5 V _ 0 4
For C5100 (Cost down)
2 , 3 , 6, 7 , 1 0 , 1 2, 1 4 , 1 5 , 16 , 1 7 , 1 8, 19 , 2 0 , 21 , 2 2 , 2 3, 24 , 2 5 , 2 6, 2 7 , 2 8, 30 3 . 3 V S
1. 5 V 3 , 1 5, 16 , 1 7 , 18 , 1 9 , 2 1, 22 , 2 5 , 2 6, 2 8 , 3 2, 33 3 . 3 V
+ C6 1 5 C6 1 6 C 61 7 C 6 18 C6 1 9 C6 2 0 C 6 21 C 6 22 C6 2 3 C6 2 4 C6 2 5 C 6 26 C 62 7
5 60 u _ 2 . 5V _6 . 6 *6 . 6 *5 . 9 * 10 u _ 6 . 3V _X 5 R _ 0 81 0 u _6 . 3 V _ X 5R _ 08 10 u _ 6. 3V _ X 5 R _ 0 8 * 1 0u _ 6 . 3 V _X 5 R _ 0 8 1 0 u _6 . 3 V _ X 5R _ 08 0 . 1 u_ 1 6 V _ Y 5 V _ 04 0 . 1 u _ 16 V _ Y 5 V _ 0 4 * 0. 1u _ 1 0V _X 5 R _ 0 4 * 0. 1 u _ 10 V _ X 5 R _ 0 4 1 u _ 6. 3V _ X 5 R _ 0 4 0 . 01 u _ 1 6V _ X 7 R _ 0 4
1 0u _ 6 . 3V _X 5 R _ 0 8
B - 14 DDRIII SO-DIMM B
Schematic Diagrams
Panel, CRT
CRT 3. 3 V S 5 VS
R N2 7
1
2. 2 K _ 8 P 4 R _ 04
8
2 7
3 6
4 5
U1 3
10 9 C R T_ D D C A C L K
6 D A C _ D D C A C LK DD C_ IN1 D D C _ OU T 1
11 12 C R T_ D D C A D A T
6 DA C _ DDC A DA T A DD C_ IN2 D D C _ OU T 2
13 14 VS R1 3 3 3_ 0 4 C R T_ V S Y N C
6 D A C_ V S Y NC S Y N C_ IN1 S Y N C _ OU T 1
15 16 HS R1 2 3 3_ 0 4 C R T_ H S Y N C
6 D A C_ HS Y NC S Y N C_ IN2 S Y N C _ OU T 2
1 3 RED
5 VS V C C _S Y N C V IDE O _ 1
2 4 GR E E N
3 .3 V S V C C _V I D E O V IDE O _ 2
7 5 B L UE
3. 3V S V C C _D D C V IDE O _ 3
8 6
0 . 22 u _ 10 V _ Y 5 V _0 4
0. 22 u _1 0 V _ Y 5 V _0 4
0. 2 2 u _1 0 V _ Y 5V _ 0 4
BYP GN D
T P D 7 S 0 19
C4 0 0
C4 0 1
C3 9 2
CM2009-02QR PN:6-02-20090-B60
IP4772CZ16 PN:6-02-47721-B60
co -l ay ? TS SOP -1 6 IC( IP 477 2C Z1 6)
C9 80 90 3 Sheet 14 of 38
Panel, CRT
BEAD FCM1005MF-600T01 60OHM 100MA SMD0402
Z s.e=50O Z s.e=55O
J _ CRT 1
L48~L50? ? 47O? BEAD L31,L31,L34? ? 47O? BEAD 10 8 A H 1 5 F S T 04 A 1 C C
DA C _ RE D L48 * 1 0m i l_ s h ort L31 6 0 OH M RE D 1

9
D A C _ GR E E N L49 * 1 0m i l_ s h ort L32 6 0 OH M GR E E N 2
10
D A C _ B LU E L50 * 1 0m i l_ s h ort L34 6 0 OH M B LU E 3
11
4
R3 1 0 R3 1 2 R 3 14 C 39 4 C 3 99 C4 0 3 C 5 90 C 59 1 C 5 92 C 3 93 C 39 6 C3 9 8 12 C RT _ DDC A DA T
5
1 50 _ 1 %_ 0 4 15 0 _ 1% _ 0 4 15 0 _1 % _ 04 13 C RT _ HS Y NC
* 10 p _ 50 V _ N P O _ 04
*1 0 p_ 5 0 V _N P O _ 0 4
2 2 p _5 0 V _ N P O _0 4
2 2 p_ 5 0 V _N P O _ 0 4
1 0 p _5 0 V _ N P O _ 0 4
1 0 p_ 5 0 V _N P O _ 0 4
*1 0p _ 5 0V _ N P O _ 04
22 p _5 0 V _ N P O _0 4
1 0p _ 5 0V _ N P O _ 04
6
14 C RT _ V S Y N C
7
15 C RT _ DD CA CL K
8
C 9 C1 0 C1 3 C4 0 4
G ND 1
GN D 2
1 0 00 p _ 50 V _ X 7 R _ 0 4
3 0 p_ 5 0V _N P O _ 0 4
10 0 0 p_ 5 0 V _X 7 R _0 4
3 0p _ 5 0V _ N P O _ 04
DA C_ RE D
D A C _ GR E E N D A C_ RE D 6
DA C_ B L UE D A C _ GR E E N 6 C5100 cost down
D A C_ B L UE 6
L E D _P W R +
PANEL VIN
L63 *H C B 1 6 0 8K F -1 2 1 T2 5 V IN_ INV
J _ LC D 1
L33 H C B 1 60 8 K F -1 2 1T 2 5
80 mil 1 2
3 .3 VS C 39 7 * . 1 U _ 5 0V _ 0 6 3 1 2 4 P _ DD C_ DA T A 6
5 3 4 6 P _ DD C_ CL K 6
C 40 2 C 3 95 LE D1 -
2A R 4 57 0 _ 04 LE D2 - 7 5 6 8 B R I GH T N E S S
9 7 8 10 B R I GH T N E S S 1 5 , 2 1
P L V DD R 4 58 0 _ 04 LE D3 - L E D 5 - R 45 9 0 _0 4
0 . 1 u_ 5 0 V _Y 5 V _ 0 6
0 . 1 u _5 0 V _ Y 5V _0 6
R 4 60 0 _ 04 LE D4 - 11 9 10 12 I N V _ B L ON
13 11 12 14 I N V _ B L ON 15
R1 6 C 11 U 1
4 1 2A L V D S -LC L K N 15 13 14 16 LV D S -L 2N
5 V IN V O UT 6 L V D S -L C L K N L V D S -LC L K P 17 15 16 18 LV D S -L 2P LV D S -L 2N 6
*1 M _0 4 0 . 1u _ 1 6V _ Y 5V _ 0 4 6 L V D S -L C L K P LV D S -L 2P 6
V IN 19 17 18 20
L V D S -L1 N 21 19 20 22 L E D6 -
3 2 6 L V D S -L1 N 23 21 22 24
R 8 C 6 L V D S -L1 P
6 N B _E N A V D D EN GN D 6 L V D S -L1 P 25 23 24 26
27 25 26 28 3. 3 V S
G5 2 43 A * 10 K _ 0 4 * 1 0U _6 . 3 V _ 08 L V D S -L0 N
6 L V D S -L0 N L V D S -L0 P 29 27 28 30 P LV D D
R 18 * 10 0 K _ 04
6 L V D S -L0 P 29 30 C 3
2A C 3 91 C 3 90
87 2 1 6-3 0 0 6 0. 1 u _1 6 V _ Y 5 V _ 04
C 12 * . 01 U _1 6 V _ X7 R _ 0 4 4 . 7 u_ 6 . 3 V _X 5 R _ 0 6 0 . 1 u _1 6 V _ Y 5 V _ 04
L ED 1-
15 LE D 1-
L ED 2-
15 LE D 2- L ED 3-
15 LE D 3-
L ED 4-
15 LE D 4- L ED 5-
15 LE D 5- L ED 6-
15 LE D 6-
1 5 L E D_ P W R +
2 , 3 , 6, 7 , 1 0 , 12 , 1 3 , 15 , 1 6 , 17 , 1 8 , 19 , 2 0 , 21 , 2 2 , 23 , 2 4 , 25 , 2 6 , 27 , 2 8 , 30 3 . 3 V S
3 , 1 5 , 16 , 1 7 , 18 , 1 9 , 21 , 2 2 , 25 , 2 6 , 28 , 3 2 , 33 3 . 3 V
Panel, CRT B - 15
Schematic Diagrams
Inverter, Bluetooth, Fan
INVERTER CONNECTOR
3 .3 V
3 .3 V
R4 6 *1 0 0K _0 4
U3 A
14
7 4L V C 0 8P W 3. 3 V
1 C 44
21 B K L_ E N 3 U 3B
14
2 7 4 LV C 0 8P W * . 1U _ 16 V _ 0 4
6 B LO N 4
6
5
7
R4 7 *1 0 0K _0 4
U3 C
14
7 4L V C 08 P W
9 R 49
8 4 . 7 K _ 0 4 I N V _ B LO N
R4 8 *1 0 0K _0 4 3. 3 V 10 I N V _B L O N 1 4
U 3D C4 6
14
18 S B _B L O N
7
7 4 LV C 0 8P W R5 0
12 0 . 1 u_ 1 6 V _Y 5 V _0 4
2 1 ,2 8 LI D _ S W # 11 *1 M_ 0 4
13
7 , 18 , 2 1 MP W R O K
Sheet 15 of 38
7
LED PANEL BACKLIGHT DRIVER
Inverter, Bluetooth,
Fan Bluetooth VIN L E D _ P W R+
C5100 cost down. P D 21 F M 26 0
P L 12 1 0U H _ 6 . 8 *7 . 3 *3 . 5 A C
3 .3 V 3 VS_ BT P C 17 8 P C 17 9 P R1 7 4 P C1 8 0 P C1 8 1
5 0m il
L39 . 4. 7 u _ 25 V _ X 5R _ 08 * 4. 7 u _ 25 V _ X 5 R _ 08
*1 0_ 0 6 1 u_ 5 0 V _ 08 1 u _ 50 V _ 0 8
0 _ 06 C 4 45 C4 4 3
P C1 8 2
0 . 1 u _1 6 V _ Y 5 V _ 0 4 1 0u _ 1 0 V _Y 5 V _0 8
P R 18 7
2 0 0 - 4 00 H z *1 00 0 p _5 0 V _ X 7R _ 04
J _ B T1
1 4 ,2 1 B RIG HT NE S S
1 *1 0 K _ 0 4 P C 18 9 P R1 7 5 0_ 0 4 LE D 1 -
2 L E D1 - 14
21
20
19
18
17
16
17 U S B _ P N3 3 1 0 00 p _ 50 V _ X 7 R _ 0 4 P U9
17 U SB_ PP3 4
21 , 2 6 B T _ DE T #
O UT 1
P G ND
NC
NC
5
SW
PW M
B T _ E N#
6 P R 17 6
3. 3V R 3 36 1 0 K_ 0 4 P R 1 88 0_ 0 4
Q1 5 87 2 1 2-0 6 G0 I N V _ B L ON 1 15 LE D 2 - L E D2 - 14
S H DN # O UT 2
D
MT N 70 0 2 Z H S 3 6-2 0- 41 A1 0- 10 6
P R 1 89 0_ 0 4
0 . 0 1u _ 5 0V _X 7 R _0 4
1 0 _0 6
G *1 0 K _ 0 4 2 14 LE D 3 -
21 , 2 6 , 2 7 B T_ E N N C O UT 3 L E D3 - 14
J_BT1
S
P C1 8 4
1 6 P R1 8 0 3 * A 7 06 A 13
BY P G ND
P C 18 3
P R 1 79
0_ 0 4 1 u _ 6. 3 V _ Y 5 V _ 0 4 P R 1 90 0_ 0 4
4 1 2 S G ND LE D 4 -
V IN O UT 4 L E D4 - 14
FAN CONTROL F s w =1 M H z
5
R T O UT 5
11
P R 1 91 0_ 0 4
LE D 5 - L E D5 - 14
C O MP
O UT 6
OV P
IS E T
5 VS_ FAN 5V S P R1 8 1
SS
P C1 8 5
U1 6 3 7. 4 K _ 1 % _0 4 P R 1 92 0_ 0 4
10
C P U _ F ON # 1 8 0 . 1 u_ 5 0 V _ Y 5 V _ 06 LE D 6 -
3 . 2 4K _ 1 % _0 4
2 F ON GN D 7 L E D6 - 14
1 u _ 6. 3V _ Y 5 V _ 0 4
40MIL 3 VIN GN D 6
4 V OU T GN D 5 L E D _P W R +
21 C P U_ F A N VSET GN D
S GN D
5 VS
Fsw = 3.75*10^4/R.RT
A X 9 95 S A P R1 8 4
P R1 8 3
P R 18 2
1 M _1 % _ 04 49 9 _ 1% _ 0 4 P C 18 6
P R1 8 5 * 1 5m i l _s h o rt _0 6
P C1 8 7
R3 4 8 O VP =3 5V 1 0 00 p _ 50 V _ X 7 R _ 0 4
L E D = 2 0 mA
Vout = 1.2(1+R1/R2) P C1 8 8
*1 0 K _0 4
5V S 5 VS_ FAN S GN D 0. 0 1 u _5 0 V _ X 7R _0 4
C P U _ F ON # P R1 8 6
J _ F A N1 3 9 K _ 1% _ 0 4
Iout = 1.2V/ R.ISET * 54 (mA/LED)
40MIL
1 S GN D
2
C 4 91 C4 9 0
3
* 0 . 1u _ 1 6V _Y 5V _0 4 1 0 u_ 1 0 V _Y 5 V _0 8 85 2 0 5-0 3 7 0 1 S GN D
J_FAN1
14 LE D _ P W R +
3
2 1 C P U_ F A N S E N 2 , 3 , 6 , 7, 1 0 , 1 2 , 13 , 1 4 , 1 6, 1 7 , 1 8, 1 9 , 2 0 , 21 , 2 2 , 23 , 2 4 , 2 5, 2 6 , 2 7, 28 , 3 0 3. 3V S
3, 1 6 , 1 7 , 18 , 1 9 , 21 , 2 2 , 2 5, 2 6 , 2 8, 32 , 3 3 3. 3V
R3 5 0 4 .7 K _ 0 4 1
3 .3 V S
B - 16 Inverter, Bluetooth, Fan

Schematic Diagrams
ICH9M 1/4, SATA

R TC V C C
20m ils C2 7 3 1 5 p _5 0 V _ N P O _ 04
2
1
R4 0 6
20m ils C 2 28
1 TJ S 1 2 5 D J 4 A 4 20 P _ 3 2 . 76 8 K H z
X2 R 18 6
*2 0m i l _ sh o rt _ 04 1 u _ 6 . 3V _ Y 5 V _0 4 1 0 M_ 0 4
3
4
VD D3 A C
D1 8 C2 7 4 1 5 p _5 0 V _ N P O _ 04
R B 75 1 V
R 1 74 Zo= 50 O? 5%
2 0 K _ 1 %_ 0 4
R T C _V B A T _1 A C U 17 A
R T C _X 1 C 23 K5 L P C _ AD0 2 1
C 24 R T CX1 F W H0 /L A D0 K4
1
D1 9 RT C C LE AR R T C _X 2
R T CX2 F W H1 /L A D1 L6 L P C _ A D 1 21
R B 75 1 V C 22 3 JO P E N 1 L P C _ A D 2 21
R1 6 0 *OP E N _ 1 0m i l -1 MM RT C RS T # A 25 F W H2 /L A D2 K2
S RT C RS T # F 20 R T C R S T# F W H3 /L A D3 L P C _ AD3 2 1
10m ils 1 u _ 6. 3 V _ X 5 R _ 0 4
RTC
LPC
C 22 S R T CR S T # K3
2
1K _0 4 INT R UD E R#
IN T RU DER # F W H 4/ L F R A ME # L P C _ F R A ME # 2 1
R 1 91 R 1 76
2 0 K _ 1 %_ 0 4 3 3 2 K _ 1% _ 0 6 B 22 J3 L P C _ D R Q0 #
RT C_ V B A T 1 I C H _ I N T V R ME N A 22 IN T V RM EN LD R Q 0# J1 L D R Q1 #
RT C V CC L A N 1 00 _ S L P L D R Q1 # / GP I O 23 R2 4 1 10 K _ 0 4
E 25 N7 3 .3 V S
GL A N _C L K
J _ RT C 1 R1 9 2 C 28 1 G L A N_ CL K A 2 0 GA T E A J2 7 GA 20 21
C 13 A 2 0 M# H _ A 2 0 M# 3
L A N _ R S TS Y N C
1 L A N _ RS T S Y N C A J2 5 ICH _ DP R S T P #
1 M_ 0 4 1 u _ 6. 3 V _ X 5 R _ 0 4 R1 7 3 * 10 m i _l s h o rt H _ D P R S T P # 3, 7 , 3 0
L A N_ RX D 0 F 14 D P R S TP # AE2 3 ICH _ DP S L P # R1 6 3 * 10 m i _l s h o rt
LAN / GLAN
2 L A N_ RX D 1 G 13 L A N _ RX D0 D P S LP # H _ DPS L P# 3
8 52 0 5 -0 27 0 1 L A N_ RX D 2 D 14 L A N _ RX D1 A J2 6 ICH _ F E RR # R 16 7 5 6 _ 04
L A N _ RX D2 F E RR# H _ F ERR # 3
<2 in ch es <0 .2 in ch es
L A N _ T XD 0 D 13 A D2 2 R1 6 9 56 _ 0 4
L A N _ TX D 0 C PU P W RG D H _ P W R GD 3 1. 0 5 V S
1 .5 V S
3. 3 V
L A N _ T XD 1
L A N _ T XD 2
D 12
E 13 L A N _ TX D 1
L A N _ TX D 2 I GN N E #
AF2 5
H_ IG NN E# 3
R1 6 2
R1 7 1
*5 6 _0 4
*5 6 _0 4 Sheet 16 of 38
CPU
R 23 6 1 0 K_ 0 4 I C H _ GP I O 5 6 B 10 AE2 2
R 3 52 24 . 9 _ 1 %_ 0 4 I C H _ GL A N _ C OM P B 28
B 27
G P I O 56
G L A N _ C O MP I
I N I T#
I NT R
RC IN#
A G2 5
L3
H_ IN IT #
H_ IN T R
3
3
K B C _R S T # 21
R2 6 3 1 0 K_ 0 4
ICH9M 1/4, SATA
G L A N _ C O MP O AF2 3 3 . 3V S
C 31 8 R 23 5 3 3 _ 04 C 31 2 *2 2 P _ 50 V _ 0 4
7 M C H _H D A _ B C L K L22 0 _ 04 AF6 N MI AF2 4 H _ N MI 3 R1 7 5 * 10 m i _l s h o rt
2 3 , 25 A Z _ B I T C LK . A H4 H DA _ B IT _ CL K S MI # H _ S MI # 3
0 . 1 u _1 6 V _ Y 5 V _ 0 4
2 3 , 25 A Z _S Y N C R2 5 9 3 3 _0 4 H DA _ S Y NC A H2 7
7 MC H _ H D A _ S Y N C AE7 S T P C LK # H _ S T P C LK # 3
2 3 , 25 A Z _R S T # R2 4 4 3 3 _0 4 H DA _ R S T # A G2 6 S B _ T H R MT R I P # R 16 4 5 4. 9 _ 1 % _0 4
7 MC H _ H D A _ R S T # AF4 T H R MT R I P # P M _ TH R M T R I P # 3 , 7 , 3 1
23 A Z _ S D IN0 A G4 H DA _ S D IN0 A G2 7 I C H _ TP 12
3 .3 VS 25 A Z _ S D IN1 R1 6 6 5 6 _ 04 1 .0 5 V S
A H3 H DA _ S D IN1 T P 12
IHDA
7 MC H _ H D A _ S D I HD A _ S DIN 3 AE5 H DA _ S D IN2
R2 4 8 * 1 K _0 4 Layout note: 5 4. 9_1 % ne ed s to p la ce d
R2 5 0 3 3 _ 04 H DA _ S D IN3 A H1 1 S AT A 4 RX N
7 MC H _ H D A _ S D O A G5 S AT A 4 RX N A J1 1 S AT A 4 RX P w it hin 2 " of I CH 8, 5 6 Oh m
23 , 2 5 A Z _ S D O U T H D A _ S D OU T S AT A 4 RX P A G1 2 S A T A 4 T XN
S A TA 4 T X N m us t b e pl ac ed w it hi n 2" o f
R 23 9 * 1 0K _0 4 H D A _ D O C K _ E N #_ R A G7 AF1 2 S A T A 4 T XP
3 .3 V S H D A _ D O C K _ R S T# AE8 H D A _ D OC K _ E N # / GP I O3 3 S A T A 4 TX P 2 4. 9_1 % w/ o st ub .
C2 2 0 H D A _ D OC K _ R S T # / GP I O 3 4 A H9 S AT A _ RX N 5
S A T A _ LE D # A G8 S AT A 5 RX N A J9 S AT A _ RX P5
*. 1 U _ 1 6 V _0 4
HDD S A TA LE D # S AT A 5 RX P AE1 0 S A T A _ T XN 5
E-SATA
SA T ARX N 0 A J 16 S A TA 5 T X N AF1 0 S A T A _ T XP 5 Zd iff= 1 00O? 0%
25 SA T ARX N 0 S A TA 0R X N S A T A 5 TX P
SA T ARX P0 A H 16
25 S A T A R XP 0 S A T A T XN 0 A F 17 S A TA 0R X P A H1 8
SATA
25 S AT A T X N0 S A T A T XP 0 A G 17 S A TA 0T X N S A T A _C L K N A J1 8 CL K _ S A T A # 2
25 S A TA T X P 0 S A TA 0T X P S A T A _ CL K P CL K _ S A T A 2
Zdiff = 100 O? 0% SA T ARX N 1 A H 13 A J7
25 S A T A R XN 1 A J 13 SA TA 1R X N S A TA R B I A S # A H7
SA T ARX P1 Within 500mil
25 S A T A R XP 1 S A T A T XN 1 A G 14 SA TA 1R X P S A T A R B IA S
25 S A TA T X N 1 A F 14 SA TA 1T X N
S A T A T XP 1
25 S A TA T X P 1 SA TA 1T X P
R 2 51
ODD A F 8 28 0 1 I B M
2 4 . 9 _ 1% _ 0 4
SATA HDD & ODD LED

3 .3 VS
R2 3 4
*1 0 K _ 0 4
S A TA _ L E D #
S A T A _L E D # 27
2 1 , 2 2, 2 6 , 2 7 , 28 , 2 9 , 3 1 V D D 3
2 , 3 , 6 , 7, 10 , 1 2 , 1 3, 1 4 , 1 5 , 17 , 1 8 , 1 9, 2 0 , 2 1 , 22 , 2 3 , 2 4, 2 5 , 2 6 , 27 , 2 8 , 3 0 3 . 3 V S
3 , 1 5, 1 7 , 1 8 , 19 , 2 1 , 2 2, 2 5 , 2 6 , 28 , 3 2 , 3 3 3 . 3 V
ICH9M 1/4, SATA B - 17

Schematic Diagrams
ICH9M 2/4, PCI, USB

U 17 D
N2 9 V 27
26 P C I E _ R X N 1 _W LA N N2 8 P E R N1 D MI 0R X N V 26 DM I _ RX N 0 7
Direct Media Interface

26 P C I E _ R X P 1 _ W L A N P2 7 PER P1 DM I0 RX P U 29 DM I _ RX P 0 7
C 5 16 0 . 1 u _1 0 V _ X 7 R _ 0 4 P C I E _ T X N 1 _ C
2 6 P C I E _ TX N 1 _W LA N PETN 1 D MI 0 T X N D M I _ T XN 0 7
2 6 P C I E _ TX P 1 _ W L A N C 5 15 0 . 1 u _1 0 V _ X 7 R _ 0 4 P C I E _ T X P 1 _C P2 6 U 28
D M I _ T XP 0 7
PETP1 D M I 0T X P
L29 Y 27
3. 3 V 26 P C IE _ RX N2 _ N E W _ CA R D L28 P E R N2 D MI 1R X N Y 26 DM I _ RX N 1 7
26 P C I E _ R X P 2 _ N E W _C A R D M2 7 PER P2 DM I1 RX P W 29 DM I _ RX P 1 7
C 5 14 0 . 1 u _1 0 V _ X 7 R _ 0 4 P C I E _ T X N 2 _ C
26 P C I E _T X N 2 _ N E W _ C A R D PETN 2 D MI 1 T X N DM I _ T XN 1 7
C2 9 8 * 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 26 P C I E _T X P 2 _ N E W _C A R D C 5 13 0 . 1 u _1 0 V _ X 7 R _ 0 4 P C I E _ T X P 2 _C M2 6 W 28
DM I _ T XP 1 7
PETP2 D M I 1T X P
J29 A B 27
Zo= 55O? 5%
5
U8 DM I _ RX N 2 7
P L T _ RS T # 1 MC 7 4V H C 1G 0 8D F T 1 G J28 P E R N3 D MI 2R X N A B 26
4 K2 7 PER P3 DM I2 RX P A A 29 DM I _ RX P 2 7
R 2 27 * 10 m i l _s h o rt
PCI-Express
2 B U F _ P L T_ R S T # 21 , 2 2 K2 6 PETN 3 D MI 2 T X N A A 28 D M I _ T XN 2 7
PETP3 D M I 2T X P D M I _ T XP 2 7
C5 9 3 R 2 19 * 10 m i l _s h o rt
P C I_ RS T # 2 6 G2 9 A D2 7
R2 1 5 DM I _ RX N 3 7
G2 8 P E R N4 D MI 3R X N A D2 6
3
*0 . 0 1 u_ 1 6 V _ X7 R _ 04 R 2 13 * 10 m i l _s h o rt
L P C _R S T # 2 6 H2 7 PER P4 DM I3 RX P A C2 9 DM I _ RX P 3 7
*1 0 0 K _ 04
H2 6 PETN 4 D MI 3 T X N A C2 8 DM I _ T XN 3 7
PETP4 D M I 3T X P DM I _ T XP 3 7
C5100 cost down E2 9 T26

2 2 P C I E _R X N 5 _ C A R D E2 8 P E R N5 D MI _ C LK N T25 CL K _ P C IE _ I CH # 2
2 2 P C I E _R X P 5 _C A R D PER P5 DM I_ CL K P CL K _ P C IE _ I CH 2
2 2 P CIE _ T X N5 _ CAR D C 5 10 0 . 1 u _1 0 V _ X 7 R _ 0 4 P C I E _ T X N 5 _ C F27
C 5 11 0 . 1 u _1 0 V _ X 7 R _ 0 4 P C I E _ T X P 5 _C F26 PETN 5 A F 29 D M I _ C O MP R1 6 8 24 . 9 _ 1 % _0 4
2 2 P C I E _ T X P 5 _C A R D PETP5 D MI _Z C OM P A F 28 1 .5 V S
P C I E _ R XN 6 _ C C2 9 D MI _ I R C OM P
Place within 500
P C I E _ R XP 6_ C C2 8 P E R N 6 / G LA N _ R X N A C5
P CIE _ T X N6 _ C D2 7 P E R P 6 / GL A N _R X P US B P 0 N A C4 US B _ P N0 26 mils of ICH
D2 6 P E T N 6/ G L A N _ T X N U SBP0 P A D3 US B_ PP0 26
Z o= 5 5O? 5 % P C I E _ T X P 6 _C
P E T P 6 / G LA N _ T XP US B P 1 N A D2 US B _ P N1 26
3. 3 V S US B_ PP1 26
S P I _ S C LK R1 8 2 * 1 5_ 1 % _ 04 S P ICL K D2 3 U SBP1 P A C1
R1 4 8 *3 . 3 K _ 0 4 S P I _ C S 0# R1 5 5 * 1 5_ 1 % _ 04 S P I C S 0# D2 4 S P I _ C LK SPI US B P 2 N A C2 US B _ P N2 25
R1 5 7 *3 . 3 K _ 0 4 S P I _ C S 1# F23 S P I_ C S0 # U SBP2 P A A5 US B_ PP2 25 USB0: PORT0
S P I _ C S 1 #/ G P I O 58 / C L GP I O 6 U S B P 3 N A A4 US B _ P N3 15
R1 5 8 * 1 K _ 04
U SBP3 P US B_ PP3 15
USB1: PORT1
Sheet 17 of 38 R1 4 7 *1 0 K _ 0 4 S P I_ S I R1 5 6 * 1 5_ 1 % _ 04 S P I MO S I D2 5 A B2
R1 8 9 *1 0 K _ 0 4 S P I_ S O E2 3 S P I _ M OS I US B P 4 N A B3 US B _ P N4 26 USB2: 3G
S P I_ M IS O U SBP4 P A A1 US B_ PP4 26
US B P 5 N US B _ P N5 27 Zdi ff= USB3: Bluetooth
N 4 A A2
ICH9M 2/4, PCI,

26 U S B _ OC # 01 N 5 OC 0 # / GP I O 5 9 U SBP5 P W 5 US B_ PP5 27 USB4: Mini Card
RN 2 4
OC 1 # / GP I O 4 0 US B P 6 N
U SB_ PN 6 90O ? 5%
1 0K _8 P 4 R _0 4 R 2 52 1 0 K_ 0 4 O C2 # N 6 W 4 U SB_ PP6 USB5: CCD
3. 3V
4 5 O C1 1 #
3 .3 V
O C3 # P6 OC 2 # / GP I O 4 1 USB U SBP6 P Y 3 U SB_ PN 7
3 6 O C9 # O C4 # M1 OC 3 # / GP I O 4 2 US B P 7 N Y 2 U SB_ PP7 USB6: NC
USB 2
1
7
8
O
O
C5 #
C3 #
O
O
O
C5 #
C6 #
C7 #
N 2
M4
M3
OC 4 # / GP I O 4 3
OC 5 # / GP I O 2 9
OC 6 # / GP I O 3 0
U SBP7 P
US B P 8 N
U SBP8 P
W 1
W 2
V 2 U SB_ PN 9
US B _ P N8 2 6
US B _ P P 8 2 6
USB7: NC
N 3 OC 7 # / GP I O 3 1 US B P 9 N V 3
USB8: New card
RN 2 3 U SB_ PP9
1 0K _8 P 4 R _0 4 26 U S B _ OC # 8 O C9 # N 1 OC 8 # / GP I O 4 4 U SBP9 P U 5 U S B _ P N 10 USB9: NC
4 5 O C7 # O C1 0 # P5 OC 9 # / GP I O 4 5 U SBP1 0 N U 4 U SB_ PP1 0
3. 3V
3 6 O C1 0 # O C1 1 # P3 OC 1 0 #/ G P I O 46 U SBP1 0 P U 1
USB10: NC
2 7 O C6 # OC 1 1 #/ G P I O 47 U SBP1 1 N U 2 US B _ P N1 1 2 7
U SBP1 1 P U S B _ P P 1 1 27
USB11: PORT2
3 .3 V S 1 8 O C4 # R2 6 7 2 4_ 1 % _ 06 I C H _U S B R B I A S AG 2
AG 1 US B RB IA S
Z o= 60 O? 5% US B RB IA S #
NC 1 Place within 500 A F 8 2 8 0 1I B M
S HO RT mils of ICH
16Mbit SPI_*_R = 0.1"~0.5"
C 30 5 *0 . 1 u _ 16 V _ Y 5V _0 4
U7
8 5 SPI_ SI
V DD SI
2 S P I _ S O_ R SPI_ SO
SO 6 /3 0
R 18 1 *1 5 _ 1 %_ 0 4 U1 7 B 3. 3 V S
R2 2 3 S P I_ W P # 3 1 S P I _ CS 0 # PCI_ A D 0 D 11 F1 P C I _ R E Q# 0
*3 . 3 K _ 1 % _0 4 W P# CE # PCI_ A D 1 C 8 AD0 R E Q0 # G4 P C I _G N T # 0 R 26 4 *1 K _ 0 4 P CI_ IRD Y # 4 5
6 S P I_ SCL K PCI_ A D 2 D 9 AD1 PCI G NT 0 # B6 P C I _ R E Q# 1 P CI_ INT # D 3 6 R N2 1
S CK PCI_ A D 3 E1 2 AD2 R E Q1 # / G P I O5 0 A7 P CI_ G NT # 1 P C I _ S T OP # 2 7 8 . 2 K _ 8 P 4R _ 0 4
R2 2 4 S P I_ HO L D# 7 4 PCI_ A D 4 E9 AD3 GN T1 # / G P I O5 1 F13 dG P U _S E LE C T # P CI_ INT # H 1 8
HO L D# VSS PCI_ A D 5 C 9 AD4 R E Q2 # / G P I O5 2 F12 P CI_ G NT # 2 P C I _ F R A ME # 1 8
*3 . 3 K _ 1 % _0 4
*2 5 V F 0 1 6 B -7 5 PCI_ A D 6 E1 0 AD5 GN T2 # / G P I O5 3 E6 P C I _R E Q #3 P CI_ DE V SE L # 2 7 R N1 9
6 /3 0 AD6 R E Q3 # / G P I O5 4
PCI_ A D 7 B7 F6 P CI_ G NT # 3 R 24 2 *1 K _ 0 4 P C I _ R E Q# 1 3 6 8 . 2 K _ 8 P 4R _ 0 4
PCI_ A D 8 C 7 AD7 GN T3 # / G P I O5 5 P CI_ INT # E 4 5
PCI_ A D 9 C 5 AD8 D 8 P CI_ C /BE# 0 P CI_ INT # G 1 8
3 .3 VS PCI_ A D 10 G 11 AD9 C /BE0 # B4 P CI_ C /BE# 1 P C I _ R E Q# 0 2 7
J_ S P I 1 R N2 2
PCI_ A D 11 F8 AD1 0 C /BE1 # D 6 P CI_ C /BE# 2 P CI_ INT # B 3 6 8 . 2 K _ 8 P 4R _ 0 4
2 1 S P I_ CS 0 # PCI_ A D 12 F11 AD1 1 C /BE2 # A5 P CI_ C /BE# 3 P C I _ L OC K # 4 5
S P I _H OL D # 4 3 S PI_ SO PCI_ A D 13 E7 AD1 2 C /BE3 # P CI_ INT # C 8 1
S P I _S C L K 6 5 S PI_ W P# PCI_ A D 14 A3 AD1 3 D 3 P CI_ IR DY # P CI _ S E R R# 7 2 R N2 0
S P I _S I 8 7 S P I_ W P # 18 PCI_ A D 15 D 2 AD1 4 I RD Y # E3 P CI_ P A R P CI_ INT # A 6 3 8 . 2 K _ 8 P 4R _ 0 4
10 9 PCI_ A D 16 F10 AD1 5 PAR R 1 P CI_ R S T # P CI_ INT # F 5 4
PCI_ A D 17 D 5 AD1 6 P C I RS T # C 6 P CI_ D E V S E L # P CI _ P E R R# 8 1
* S P U F Z -1 0 S 3- V B -0 -B
PCI_ A D 18 D 10 AD1 7 D EVSEL # E4 P CI_ P E R R# P C I _ R E Q# 3 7 2 R N1 8
PCI_ A D 19 B3 AD1 8 P E R R# C 2 P C I _ L OC K # P CI_ T RD Y# 6 3 8 . 2 K _ 8 P 4R _ 0 4
PCI_ A D 20 F7 AD1 9 P L OC K # J4 P CI_ S E R R# d GP U _ S E L E C T # 5 4
PCI_ A D 21 C 3 AD2 0 S E R R# A4 P CI_ S T O P #
PCI_ A D 22 F3 AD2 1 S TO P # F5 P CI_ T RD Y #
PCI_ A D 23 F4 AD2 2 T RD Y # D 7 P C I _ F R A ME #
PCI_ A D 24 C 1 AD2 3 F RA M E #
PCI_ A D 25 G 7 AD2 4 C 14 P L T_ R S T #
H 7 AD2 5 P L T RS T # D 4 P L T _ RS T # 7
PCI_ A D 26 P CL K _ IC H
PCI_ A D 27 D 1 AD2 6 P CIC L K R 2 P C L K _ ICH 2
G 5 AD2 7 PM E# PM E# 21
PCI_ A D 28
PCI_ A D 29 H 6 AD2 8
Boot BIOS s elect PCIRST#: LAN,Cardbus,KBC PCI_ A D 30 G 1 AD2 9
PCI_ A D 31 H 3 AD3 0
PLT_RST#: N/B,IDE,FWH AD3 1
S trap PC I_GNT# 0 SPI_CS#1
BUF_PLT_RST#: NEW CARD,MINI CARD P C I _ I N T# A J5 Interrupt I/F H 4 P C I _ I N T# E
P C I _ I N T# B E1 PIRQ A# P I R Q E # / GP I O2 K6 P C I _ I N T# F
FW H(def ault) 11 R 264 un-st uff R1 58 un-stuff P C I _ I N T# C J6 PIRQ B# P I R Q F # / GP I O3 F2 P C I _ I N T# G
P C I _ I N T# D C 4 PIRQ C# P I R QG # / GP I O4 G2 P C I _ I N T# H
PIRQ D# P I R QH # / GP I O5
P CI 10 R 264 un-st uff R15 8 st uff A F 8 2 8 01 I B M
S PI 01 R2 64 s tuff R1 58 un-stuff
2 , 3 , 6 , 7 , 10 , 1 2 , 1 3 , 14 , 1 5 , 1 6, 18 , 1 9 , 2 0, 2 1 , 2 2 , 2 3, 2 4 , 2 5 , 2 6, 2 7 , 2 8 , 30 3 . 3 V S
3 , 1 5 , 1 6, 1 8 , 1 9 , 2 1, 2 2 , 2 5 , 2 6, 2 8 , 3 2 , 33 3 . 3 V
B - 18 ICH9M 2/4, PCI, USB

Schematic Diagrams
ICH9M 3/4
3 .3 V
SB_ G P I O2 1 1 8
R2 1 2 10 K _ 0 4 P C I E _W A K E # 2 , 1 2 , 1 3 I C H _S M B C LK 0 SB_ G P I O1 9 2 7
DDR3, CLK GEN 2 , 1 2 , 1 3 I C H _S M B D A T 0 3 6
R2 2 6 10 K _ 0 4 S B _ B L ON U 17 C d GP U _ P RS N T #
R2 0 7 10 K _ 0 4 I C H _ S MB C L K 1 I C H _ S MB C L K 0 G 16 AH2 3 S B _ G P I O2 1 d GP U _ RU NP W RO K 4 5
R2 0 1 10 K _ 0 4 I C H _ S MB D A T 1 I C H _ S MB D A T 0 A 13 S MB C L K S A T A 0 GP / GP I O 21 AF 1 9 S B _ G P I O1 9
P C H _ B T _E N # I C H _ GP I O 6 0 E 17 S MB D A T A S A T A 1 GP / GP I O 19 AE2 1 d GP U _ P R S N T #
R2 4 9 *1 0 K _ 04 RN 1 5 1 0K _ 8 P 4 R _ 0 4
GPIO
L I N K A L E R T# / G P I O6 0 / C LG P I O 4 S A T A 4 GP / GP I O 36
SATA
SMB
R3 6 5 10 K _ 0 4 SB_ SU SSTAT# C 17 AD2 0 d GP U _ R U N P W R O K
1 8 CR _ W A K E # I C H _ S MB C L K 1 B 18 S ML I N K 0 S A T A 5 GP / GP I O 37
R N 16 2 7 I C H _ GP I O 8 2 6 I C H _S M B C LK 1 I C H _ S MB D A T 1 S ML I N K 1 H1 C LK _I C H 1 4
3 6
NEW CARD, MINI CARD 2 6 I C H _S M B D A T 1 F 19 C L K1 4 AF 3 CL K _ ICH 1 4 2
1 0 K _ 8 P 4 R_ 0 4 P M_ S Y S R S T# S W I# C LK _I C H 4 8
21 S W I# R I# C L K4 8 CL K _ ICH 4 8 2
Clocks
4 5 S W I#
1 8 SB_ SU SSTAT# R4 P1 S U S CL K
2 7 I C H _ GP I O 6 0 P M _S Y S R S T # G 19 S US _ S T A T # /L P CP D # S U S CL K
R N 17
1 0 K _ 8 P 4 R_ 0 4 3 6 C L _ R S T# 1 2 1 P M _S Y S R S T # S YS_ R ESET # C1 6 IC H_ S U S B #
4 5 M6 SL P_ S3 # E1 6
Layout note:
I C H _ GP I O 1 1 IC H_ S U S C#
7 P M _B MB U S Y # P MS Y N C # / GP I O 0 SL P_ S4 # G1 7 SL P_ S5 # It"s for internal testing
R2 3 0 10 0 K _ 0 4 A CP RE S E NT I C H _ GP I O 1 1 A 17 SL P_ S5 #
S US P W R_ A C K S MB A L E R T #/ G P I O 11 C1 0 S4 _ STATE# purposes only
R2 0 6 10 0 K _ 0 4
R2 0 8 2. 2 K _ 0 4 I C H _ S MB C L K 0
I C H _ S MB D A T 0 2 P M _ S T P P CI#
P M _S T P P C I #
P M _S T P C P U #
A 14
E 19 S TP _P C I #
S 4 _ S T A T E # / GP I O 2 6
G2 0 S B _ P W RO K Sheet 18 of 38
SYS GPIO
R2 2 9 2. 2 K _ 0 4 3 .3 V S R 2 74 * 1 00 K _ 0 4
2 P M_ S T P C P U # S TP _C P U # P W R OK
R2 1 7 *1 0 K _ 04 ICH _ S US B # P M _C L K R U N #
E 20
L4
C L K RU N# D P R S L P V R / GP I O 1 6
M2
B1 3
D PRSL PV R R 273 * 1 0m i l _s h o rt
P M_ D P R S L P V R 7 , 30 ICH9M 3/4
Power MGT
R1 8 8 P C IE _ W A K E # S B _ B A TL O W # R 2 2 1 8 .2 K _ 0 4
S B _ MU T E # 2 2 , 2 6 P C I E _W A K E # L P C_ S IR Q M5 W AKE# B A T L OW # 3 .3 V
R2 4 3 *1 0 K _ 04 21 L P C_ S IR Q
10 K _ 0 4 P M _T H R M # A J 23 S E RIR Q R3 PW R_ BT N# R 366 * 1 0K _0 4
3 P M _ T H R M# T H RM # PW RBT N # 3 .3 V
D 21 D2 0 L A N _R S T # R 194 1 0 K_ 0 4 P W R _B T N # 21
Q1 1 V RM P W RG D L A N_ R S T #
D
M T N 7 0 0 2Z H S 3 I C H _ T P 11 A 20 D2 2 I C H _ R S MR S T # R 1 8 7 1 0 0 _ 04
TP1 1 R S MR S T # R S M RS T # 2 1
C2 7 2 R1 8 5 R1 8 4 10 K _ 0 4
G S M I# AG 19 R5
30 CL K E N # 0 . 03 3 u _ 16 V _ X 7 R _ 0 4 21 SM I# OD D _ D E T E C T # AH 21 G P IO 1 C K _ P W RG D C LK _P W R G D 2 C2 6 4 1 0 0p _ 5 0 V _N P O _0 4
2 5 OD D _ D E T E C T # AG 21 G P IO 6 R6
S
1M _ 04 S C I# M P W R OK
21 SC I# I C H _ GP I O 8 A 21 G P IO 7 C L P W R OK M P W R OK 7 , 1 5 , 2 1
3 .3 V S S B _ B L ON C 12 G P IO 8 B1 6 SL P_ M #
15 S B _B LO N C 21 G P I O 12 SL P_ M #
C R_ W A K E # G P I O 13
R2 2 5 *1 0 K _ 04 P M_ S T P P C I # I C H _ GP I O 1 7 AE 18 F2 4
P M_ S T P C P U # K1 G P I O 17 C L_ C LK 0 B1 9 C L _C L K 0 7
R1 9 9 *1 0 K _ 04
AF8 G P I O 18 C L_ C LK 1 C L _C L K 1 26
A J 22 G P I O 20 F2 2
Zo= 55O? 5% 3 . 3V S
3 .3 V S R 19 5 *0 _ 0 4 GP O2 2 6/30
17 S P I_ W P # S C L OC K / G P I O2 2 C L _ D A TA 0 C L _D A T A 0 7
Controller Link
S B _ MU T E # A9 C1 9
24 S B _M U T E # C L _D A T A 1 2 6
GPIO
R1 7 7 10 0 K _ 0 4 S CI # I C H _ GP I O 2 8 D 19 G P I O 27 C L _ D A TA 1
R1 9 8 10 0 K _ 0 4 OD D _ D E T E C T # R2 7 6 *0 _ 0 4 PW R SAVE# _ R L1 G P I O 28 C2 5 CL _ V R E F 0 12mils
2 P W RS A V E # I C H _ GP I O 3 8 A E 19 S A T A C L K R E Q# / G P I O3 5 CL _ V RE F 0 A1 9 C L_ V R E F 1 R 1 54
A G 22 S LO A D / GP I O 3 8 CL _ V RE F 1
R1 8 3 *8 . 2 K _ 04 P M_ T H R M # 0919 R1 9 0 1 0K _ 0 4 I C H _ GP I O 3 9
S D A T A O U T 0 / GP I O3 9
R2 6 1 8. 2 K _ 0 4 P M_ C L K R U N # 8.2-k Pull-up I C H _ GP I O 4 8 A F 21 F2 1 Zo= 55O? 5% C L_ R S T #0 7
3 . 2 4 K _ 1% _ 0 6
I C H _ GP I O 4 9 A H 24 S D A T A O U T 1 / GP I O4 8 C L _R S T 0 # D1 8 C L_ R S T #1
L P C_ S IR Q to Vcc3_3 if A8 G P I O 49 C L _R S T 1 # C L _ R S T# 1 2 6
R2 5 3 10 K _ 0 4 2 6 P C H _B T_ E N #
R2 7 5 10 K _ 0 4 PW R SAVE# _ R TEMP SENSOR G P I O 57 / C L GP I O 5 A1 6 I C H _ G P I O2 4 R 21 4 1 0K _0 4 3. 3 V
S MI # not used M7 M E M_ L E D / GP I O 2 4 C1 8 S U S P W R _ A CK 3 .3 V
R1 9 7 10 K _ 0 4 R 20 0 *1 0 m il _ s h ort R 1 53 C 2 19
R2 0 4 10 0 K _ 0 4 I C H _ GP I O 1 7 23 IC H_ S P K R A J 24 S PKR G P I O 10 / S U S _ P W R _ A C K C1 1 A C P RE S E NT R 23 2 *1 0 m il _ s h ort
For C5100 7 MC H _ I C H _ S Y N C # B 21 M CH _ S Y N C# GP I O 1 4/ A C _ P R E S E N T C2 0
R2 0 3 10 K _ 0 4 I C H _ GP I O 3 8 ICH _ T P3 I C H _ G P I O9 R 19 3 1 00 K _ 0 4 4 5 3 _1 % _ 0 6 0 . 1 u _1 0 V _ X 5 R _ 0 4
ICH _ T P8 A H 20 TP3 W OL _ E N / G P I O 9
MISC
R 21 0
ICH _ T P9 A J 20 TP8
ICH _ T P 10 A J 21 TP9
3 . 2 4K _1 % _ 0 6
TP1 0
CL_V RET0 /1=0. 405V 12mils
A F 8 2 80 1 I B M
3 .3 V S U S _ P W R _ A C K 21
A C_ P RE S E NT 2 1 C2 7 9 R 20 2
ICH_GPIO57:
Can be used as TPM Physical 0 . 1u _ 1 0 V _ X5 R _0 4 4 5 3_ 1 % _ 06
Presence for iTPM. Refer to
C5 4 7
the CRB Schematics for a 3 .3 V
0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 sample implementation.
U1 2 B U1 2 A
14
14
7 4L V C 0 8 P W 3 .3 V 7 4L V C 0 8P W
R S M R S T# 4 SYS_ PW R O K 1
6 3 S B _P W R O K
ICH _ S US B # 5 SU SB# 2 1 , 2 4 , 2 6, 2 8 , 3 2 , 33 2
3 3 1 .5 V _ P W RG D
R3 0 2 R 2 92 C 3 66
7
7
3 .3 V
*1 0 0 K _ 04 U1 2 C 1 0 K_ 0 4 * . 1 U _ 1 6V _0 4
14
7 4 LV C 0 8 P W U 12 D
14
9 7 4 L VC0 8 PW
8 S Y S _ P W R OK 12
3 2 1 . 0 5V S _P W R G D
10 11 M P W R OK
7 ,3 0 DE L A Y _ P W RG D 13
3 3 1 .5 V _ P W RG D
7
R 3 04 R2 9 4
7
* 1 00 K _ 0 4 10 K _ 0 4
IC H_ S U S C# R 2 09 * 10 m i l _s h o rt
S4 _ ST ATE# R 2 33 * 0_ 0 4 SU SC # 2 1 , 3 2 , 33
S B _S U S S T A T #
C 589
* 1 u_ 6 . 3 V _ X 5R _ 04
2 , 3 , 6 , 7 , 10 , 1 2 , 1 3 , 14 , 1 5 , 1 6, 17 , 1 9 , 2 0, 2 1 , 2 2 , 2 3, 2 4 , 2 5 , 2 6, 2 7 , 2 8 , 30 3 . 3 V S
3 , 1 5 , 1 6, 1 7 , 1 9 , 2 1, 2 2 , 2 5 , 2 6, 2 8 , 3 2 , 33 3 . 3 V
ICH9M 3/4 B - 19
Schematic Diagrams
ICH9M 4/4
RT C V CC
20mils U 17 F 1.7A U1 7 E
A2 3 A 15 1. 0 5 V S A A 26 H 5
Layout note: V C C R TC V C C 1 _0 5 [ 1 ] B 15 A A 27 V SS [1 ] VSS[1 0 7 ] J23
C2 2 7 C 2 26 C 2 32 V C C5 R E F A6 V C C 1 _0 5 [ 2 ] C 15 C 29 3 C2 8 2 V SS [2 ] VSS[1 0 8 ]
Place within 100 mils + C2 8 8 AA3 J26
V 5 RE F V C C 1 _0 5 [ 3 ] D 15 AA6 V SS [3 ] VSS[1 0 9 ] J27
of pin A16 and T7 of V 5 RE F _ S US A E1 V C C 1 _0 5 [ 4 ] E 15 AB1 V SS [4 ] VSS[1 1 0 ] AC 2 2
0. 1u _ 1 6 V _ Y 5 V _ 0 4 0 . 1 u _ 16 V _ Y 5 V _ 04 * 10 U _ 10 V _ 0 8 0 . 1 u _1 6 V _ Y 5V _0 4 0 . 1u _ 1 6 V _ Y 5 V _ 0 4 1 00 u _ 6 . 3V _B _B
V 5 RE F _ S US V C C 1 _0 5 [ 5 ] F 15 A A 23 V SS [5 ] VSS[1 1 1 ] K2 8
ICH9M on the bottom V C C 1 _0 5 [ 6 ] V SS [6 ] VSS[1 1 2 ]
AA2 4 L11 A B 28 K2 9
side or 140 mils on AA2 5 VC C 1 _ 5 _B [ 1] V C C 1 _0 5 [ 7 ] L12 A B 29 V SS [7 ] VSS[1 1 3 ] L13
CLOSE TO pin AD25 Layout note:
the top side AB2 4 VC C 1 _ 5 _B [ 2] V C C 1 _0 5 [ 8 ] L14 AB4 V SS [8 ] VSS[1 1 4 ] L15
AB2 5 VC C 1 _ 5 _B [ 3] V C C 1 _0 5 [ 9 ] L16 AB5 V SS [9 ] VSS[1 1 5 ] L2
VC C 1 _ 5 _B [ 4] V C C 1 _ 05 [ 1 0 ] Place at MCH edge V SS [1 0 ] VSS[1 1 6 ]
AC 2 4 L17 A C 17 L26
AC 2 5 VC C 1 _ 5 _B [ 5] V C C 1 _ 05 [ 1 1 ] L18 A C 26 V SS [1 1 ] VSS[1 1 7 ] L27
AD 2 4 VC C 1 _ 5 _B [ 6] V C C 1 _ 05 [ 1 2 ] M 11 A C 27 V SS [1 2 ] VSS[1 1 8 ] L5
AD 2 5 VC C 1 _ 5 _B [ 7] V C C 1 _ 05 [ 1 3 ] M 18 A C3 V SS [1 3 ] VSS[1 1 9 ] L7
AE2 5 VC C 1 _ 5 _B [ 8] V C C 1 _ 05 [ 1 4 ] P 11
Layout note: A D1 V SS [1 4 ] VSS[1 2 0 ] M 12
VC C 1 _ 5 _B [ 9] V C C 1 _ 05 [ 1 5 ] Place within 100mils of ICH on the V SS [1 5 ] VSS[1 2 1 ]
5 VS 3 .3 V S 1 . 5V S _ P C I E _I C H AE2 6 P 18 A D 10 M 13
1 .5 VS AE2 7 VC C 1 _ 5 _B [ 10 ] V C C 1 _ 05 [ 1 6 ] T11 bottom side or 140 mils on the top A D 12 V SS [1 6 ] VSS[1 2 2 ] M 14
20m i l s AE2 8 VC C 1 _ 5 _B [ 11 ] V C C 1 _ 05 [ 1 7 ] T18 A D 13 V SS [1 7 ] VSS[1 2 3 ] M 15
L 43 1 . 5V S
VC C 1 _ 5 _B [ 12 ] V C C 1 _ 05 [ 1 8 ] V SS [1 8 ] VSS[1 2 4 ]
10 mi l s
A
AE2 9 U 11 H C B 1 0 0 5K F - 1 21 T 2 0 A D 14 M 16
CORE
D2 2 C 50 9 C2 2 9 C 2 30 F25 VC C 1 _ 5 _B [ 13 ] V C C 1 _ 05 [ 1 9 ] U 18 V C C D MI P LL A D 17 V SS [1 9 ] VSS[1 2 5 ] M 17
G 25 VC C 1 _ 5 _B [ 14 ] V C C 1 _ 05 [ 2 0 ] V 11
. A D 18 V SS [2 0 ] VSS[1 2 6 ] M 23
R2 5 8 L18
.
RB 7 5 1 V 0 . 1 u _1 6 V _ Y 5V _ 0 4 0. 1u _ 1 6 V _ Y 5 V _ 0 4 0 . 1 u _ 16 V _ Y 5 V _ 04 H 24 VC C 1 _ 5 _B [ 15 ] V C C 1 _ 05 [ 2 1 ] V 12 C5 1 2 C5 0 6 A D 21 V SS [2 1 ] VSS[1 2 7 ] M 28
10 _ 0 4 H C B 1 6 0 8K F -1 21 T 2 5 H 25 VC C 1 _ 5 _B [ 16 ] V C C 1 _ 05 [ 2 2 ] V 14 A D 28 V SS [2 2 ] VSS[1 2 8 ] M 29
VC C 1 _ 5 _B [ 17 ] V C C 1 _ 05 [ 2 3 ] V SS [2 3 ] VSS[1 2 9 ]
C
J24 V 16 1 0u _ 1 0 V _ Y 5 V _ 0 8 0 . 01 u _ 1 6 V _X 7 R _0 4 A D 29 N 11
VC C5 R EF 1A J25 VC C 1 _ 5 _B [ 18 ] V C C 1 _ 05 [ 2 4 ] V 17 A D4 V SS [2 4 ] VSS[1 3 0 ] N 12
K2 4 VC C 1 _ 5 _B [ 19 ] V C C 1 _ 05 [ 2 5 ] V 18 A D5 V SS [2 5 ] VSS[1 3 1 ] N 13
K2 5 VC C 1 _ 5 _B [ 20 ] V C C 1 _ 05 [ 2 6 ] A D6 V SS [2 6 ] VSS[1 3 2 ] N 14
C3 3 0 C3 2 6 + C2 6 8 C2 6 7 C 2 66 C2 3 3 L 17
L23 VC C 1 _ 5 _B [ 21 ] R 29 A D7 V SS [2 7 ] VSS[1 3 3 ] N 15
L24 VC C 1 _ 5 _B [ 22 ] V C C D MI P L L V C C _D MI
20 mil s 0 _0 4 1 .0 5 VS
A D9 V SS [2 8 ] VSS[1 3 4 ] N 16
1u _ 1 0 V _ 06 0. 1 u _ 1 0 V _ X5 R _0 4 *2 2 0 U _ 2 . 5 V _ B 22 u _ 6 . 3 V _ X5 R _ 08 2. 2 u _ 6 . 3 V _ Y 5 V _ 0 6
2 2 u _6 . 3 V _ X 5 R _ 0 8 L25 VC C 1 _ 5 _B [ 23 ] W 23
. A E 12 V SS [2 9 ] VSS[1 3 5 ] N 17
M 24 VC C 1 _ 5 _B [ 24 ] V C C_ DM I[1 ] Y 23 C2 7 1 4 . 7 u _6 . 3 V _ X 5 R _ 0 6 1 .0 5 VS A E 13 V SS [3 0 ] VSS[1 3 6 ] N 18
Layout note: M 25 VC C 1 _ 5 _B [ 25 ] V C C_ DM I[2 ] A E 14 V SS [3 1 ] VSS[1 3 7 ] N 26
6 / 30
Place above Caps within 100 mils of ICH on the bottom N 23 VC C 1 _ 5 _B [ 26 ] A B2 3
20m il s A E 16 V SS [3 2 ] VSS[1 3 8 ] N 27
N 24 VC C 1 _ 5 _B [ 27 ] V _C P U _I O[ 1 ] A C2 3 A E 17 V SS [3 3 ] VSS[1 3 9 ] P1 2
C3 0 2 C 30 3 C 2 86
side or 140 mils on the top near D28, T28, AD28 N 25 VC C 1 _ 5 _B [ 28 ] V _C P U _I O[ 2 ] AE2 V SS [3 4 ] VSS[1 4 0 ] P1 3
C 3 13 0 . 1 u _1 6 V _ Y 5V _0 4
P2 4 VC C 1 _ 5 _B [ 29 ] A G2 9 0. 1u _ 1 6 V _ Y 5 V _ 0 4 4 . 7 u _ 6. 3V _X 5 R _0 6 A E 20 V SS [3 5 ] VSS[1 4 1 ] P1 4
Layout note: P2 5 VC C 1 _ 5 _B [ 30 ] V C C 3_ 3 [ 1 ] A E 24 V SS [3 6 ] VSS[1 4 2 ] P1 5
0 . 1 u_ 1 6 V _ Y 5 V _ 0 4
VC C 1 _ 5 _B [ 31 ] V SS [3 7 ] VSS[1 4 3 ]
VCCA3GP
Place within 100 mils R 24 A J6 C 3 24 0 . 1 u _1 6 V _ Y 5V _0 4 AE3 P1 6
Sheet 19 of 38 of pin G4 of ICH9M on

the bottom side of 1 .5 V S
L20
H C B 1 0 0 5 K F -1 2 1T 2 0
. 1.7A V CC S A T A P L L
R 25
R 26
R 27
VC
VC
VC
C 1 _ 5 _B
C 1 _ 5 _B
C 1 _ 5 _B
[ 32 ]
[ 33 ]
[ 34 ]
V C C 3_ 3 [ 2 ]
V C C 3_ 3 [ 7 ]
A C1 0
AE4
AE6
AE9
V SS [3 8 ]
V SS [3 9 ]
V SS [4 0 ]
VSS[1 4 4 ]
VSS[1 4 5 ]
VSS[1 4 6 ]
P1 7
P2
P2 3
T24 VC C 1 _ 5 _B [ 35 ] A D1 9 C3 2 1 C3 0 1 A F 13 V SS [4 1 ] VSS[1 4 7 ] P2 8
ICH9M 4/4 140mils on the top

Layout note: C 2 90 C 2 84 T27 VC
VC
C 1 _ 5 _B
C 1 _ 5 _B
[ 36 ]
[ 37 ]
V
V
CC
CC
3_ 3 [ 3 ]
3_ 3 [ 4 ]
A F20 A F 16 V SS [4 2 ]
V SS [4 3 ]
VSS[1 4 8 ]
VSS[1 4 9 ]
P2 9
VCCP_CORE
T28 A G2 4 0 . 1u _ 1 6 V _ Y 5 V _ 0 4 0 . 1u _ 1 6 V _ Y 5 V _ 0 4 A F 18 P4
T29 VC C 1 _ 5 _B [ 38 ] V CC 3_ 3 [ 5 ] A C2 0 A F 22 V SS [4 4 ] VSS[1 5 0 ] P7
Place within 100mils 1 0 u _1 0 V _ Y 5V _0 8 1 u _ 6. 3V _Y 5 V _ 0 4
U 24 VC C 1 _ 5 _B [ 39 ] V CC 3_ 3 [ 6 ] A H 26 V SS [4 5 ] VSS[1 5 1 ] R 11
of ICH on the bottom U 25 VC C 1 _ 5 _B [ 40 ] B 9 V C C 3 . 3_ 4
40mils A F 26 V SS [4 6 ] VSS[1 5 2 ] R 12
V2 4 VC C 1 _ 5 _B [ 41 ] V C C 3_ 3 [ 8 ] F 9 3 .3 V S A F 27 V SS [4 7 ] VSS[1 5 3 ] R 13
side or 140 mils on
V2 5 VC C 1 _ 5 _B [ 42 ] V C C 3_ 3 [ 9 ] G 3 C3 2 2 C3 0 6 C 3 29 AF5 V SS [4 8 ] VSS[1 5 4 ] R 14
the top U 23 VC C 1 _ 5 _B [ 43 ] V C C 3 _3 [ 1 0 ] G 6 AF7 V SS [4 9 ] VSS[1 5 5 ] R 15
5V 3 .3 V W24 VC C 1 _ 5 _B [ 44 ] V C C 3 _3 [ 1 1 ] J2 AF9 V SS [5 0 ] VSS[1 5 6 ] R 16
0. 1 u _ 1 6V _Y 5 V _ 0 4 0 . 1 u _ 16 V _ Y 5 V _ 04
VC C 1 _ 5 _B [ 45 ] V C C 3 _3 [ 1 2 ] V SS [5 1 ] VSS[1 5 7 ]
10m i l s W25 J7 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 A G 13 R 17
PCI
K2 3 VC C 1 _ 5 _B [ 46 ] V C C 3 _3 [ 1 3 ] K 7 L24 *B K P 1 0 05 H S 1 2 1_ 0 4 A G 16 V SS [5 2 ] VSS[1 5 8 ] R 18
VC C 1 _ 5 _B [ 47 ] V C C 3 _3 [ 1 4 ] . 3 .3 VS V SS [5 3 ] VSS[1 5 9 ]
A
Y 24 C 53 1 0 . 1 u _1 6 V _ Y 5 V _ 0 4 A G 18 R 28
R2 7 1 D2 3 Y 25 VC C 1 _ 5 _B [ 48 ] A J4 V CC HD A L44 0 _ 04 A G 20 V SS [5 4 ] VSS[1 6 0 ] T12
VC C 1 _ 5 _B [ 49 ] V CC HD A . 1 .5 VS A G 23 V SS [5 5 ] VSS[1 6 1 ] T13
C 53 3 0 . 1 u _1 6 V _ Y 5 V _ 0 4
AJ 1 9 A J3 V CC S US HD A A G3 V SS [5 6 ] VSS[1 6 2 ] T14
10 _ 0 4 RB 7 5 1 V L45 0 _ 04. 1 .5 V
V C C S A T A P LL V CC S U S HD A A G6 V SS [5 7 ] VSS[1 6 3 ] T15
1.7A V SS [5 8 ] VSS[1 6 4 ]
C
AC 1 6 A C8 T P _ VC C S US1 0 5 _ ICH 1 L25 . *B K P 1 0 05 H S 1 2 1_ 0 4 A G9 T16

V 5 RE F _ S US 1 .5 VS AD 1 5 VC C 1 _ 5 _A [ 1] V C C S U S 1 _0 5 [ 1 ] F 17 T P _ VC C S US1 0 5 _ ICH 2 3 .3 V A H 12 V SS [5 9 ] VSS[1 6 5 ] T17
C 2 92 AD 1 6 VC C 1 _ 5 _A [ 2] V C C S U S 1 _0 5 [ 2 ] 1.5V/VS: FOR MONTEVINA PLATFORM A H 14 V SS [6 0 ] VSS[1 6 6 ] T23
AE1 5 VC C 1 _ 5 _A [ 3] A D8 T P _ V C C S US 1 5 _ ICH 1 A H 17 V SS [6 1 ] VSS[1 6 7 ] B2 6
ARX
C3 4 0 C3 3 5 GMCH HD_AUDIO USED
1 u _ 6. 3V _Y 5 V _ 0 4 AF1 5 VC C 1 _ 5 _A [ 4] V C C S U S 1_ 5 [ 1 ] A H 19 V SS [6 2 ] VSS[1 6 8 ] U 12
AG 1 5 VC C 1 _ 5 _A [ 5] F 18 A H2 V SS [6 3 ] VSS[1 6 9 ] U 13
1u _ 1 0 V _ 06 0. 1 u _ 1 0 V _ X5 R _0 4 T P _ V C C S US 1 5 _ ICH 2
AH 1 5 VC C 1 _ 5 _A [ 6] V C C S U S 1_ 5 [ 2 ] 3 .3 V A H 22 V SS [6 4 ] VSS[1 7 0 ] U 14
Layout note: C 2 77 0 . 1 u _1 6 V _ Y 5V _0 4 L 19
AJ 1 5 VC C 1 _ 5 _A [ 7] 0 _0 4 A H 25 V SS [6 5 ] VSS[1 7 1 ] U 15
VC C 1 _ 5 _A [ 8] A 18 V C C S U S 3. 3 A H 28 V SS [6 6 ] VSS[1 7 2 ] U 16
6/ 30 Place within 100mils of 10m i ls
VCCPSUS
C 2 87 AC 1 1 V C C S U S 3_ 3 [ 1 ] D 16
. A H5 V SS [6 7 ] VSS[1 7 3 ] U 17
ICH on the bottom side or AD 1 1 VC C 1 _ 5 _A [ 9] V C C S U S 3_ 3 [ 2 ] D 17 A H8 V SS [6 8 ] VSS[1 7 4 ] AD 2 3
AE1 1 VC C 1 _ 5 _A [ 10 ] V C C S U S 3_ 3 [ 3 ] E 22 A J 12 V SS [6 9 ] VSS[1 7 5 ] U 26
140 mils on the top near 1 u _ 6. 3V _Y 5 V _ 0 4
VC C 1 _ 5 _A [ 11 ] V C C S U S 3_ 3 [ 4 ] V SS [7 0 ] VSS[1 7 6 ]
ATX
1 .5 VS AF1 1 A J 14 U 27
pin AE7 AG 1 0 VC C 1 _ 5 _A [ 12 ] A J 17 V SS [7 1 ] VSS[1 7 7 ] U 3
AG 1 1 VC C 1 _ 5 _A [ 13 ] A F1 A J8 V SS [7 2 ] VSS[1 7 8 ] V1
AH 1 0 VC C 1 _ 5 _A [ 14 ] V C C S U S 3_ 3 [ 5 ] 3 .3 V B 11 V SS [7 3 ] VSS[1 7 9 ] V1 3
AJ 1 0 VC C 1 _ 5 _A [ 15 ] T1 B 14 V SS [7 4 ] VSS[1 8 0 ] V1 5
R 353 30mils
VC C 1 _ 5 _A [ 16 ] V C C S U S 3_ 3 [ 6 ] T2 B 17 V SS [7 5 ] VSS[1 8 1 ] V2 3
10_04
10m il s AC 9 V C C S U S 3_ 3 [ 7 ] T3 B2 V SS [7 6 ] VSS[1 8 2 ] V2 8
1.7A V C C 1 _ 5 _A [ 17 ] V C C S U S 3_ 3 [ 8 ] T4 B 20 V SS [7 7 ] VSS[1 8 3 ] V2 9
C3 2 0 C 3 19 C3 3 1
V C C G L A N P LL 1. 5V S AC 1 8 V C C S U S 3_ 3 [ 9 ] T5 B 23 V SS [7 8 ] VSS[1 8 4 ] V4
C2 9 4 C 296 AC 1 9 V C C 1 _ 5 _A [ 18 ] V C C S U S 3 _3 [ 1 0 ] T6 0 . 0 22 u _ 1 6V _X 7 R _0 4 0. 1u _ 1 6 V _ Y 5 V _ 0 4 B5 V SS [7 9 ] VSS[1 8 5 ] V5
V C C 1 _ 5 _A [ 19 ] V C C S U S 3 _3 [ 1 1 ] U 6 B8 V SS [8 0 ] VSS[1 8 6 ] W26
C 517 0 . 0 2 2 u_ 1 6 V _ X 7R _ 0 4
VCCPUSB
0 . 1u _ 1 6 V _ Y 5 V _ 0 4 0 . 1 u _ 16 V _ Y 5 V _ 04 AC 2 1 V C C S U S 3 _3 [ 1 2 ] U 7 C 26 V SS [8 1 ] VSS[1 8 7 ] W27
0 . 1 u _ 1 6V _Y 5 V _ 0 4 V C C 1 _ 5 _A [ 20 ] V C C S U S 3 _3 [ 1 3 ] V 6 C 27 V SS [8 2 ] VSS[1 8 8 ] W3
G 10 V C C S U S 3 _3 [ 1 4 ] V 7 E 11 V SS [8 3 ] VSS[1 8 9 ] Y 1
G 9 V C C 1 _ 5 _A [ 21 ] V C C S U S 3 _3 [ 1 5 ] W 6 E 14 V SS [8 4 ] VSS[1 9 0 ] Y 28
1.7A V C C 1 _ 5 _A [ 22 ] V C C S U S 3 _3 [ 1 6 ] W 7 E 18 V SS [8 5 ] VSS[1 9 1 ] Y 29
3 .3 VS 1. 5V S AC 1 2 V C C S U S 3 _3 [ 1 7 ] Y 6 E2 V SS [8 6 ] VSS[1 9 2 ] Y 4
C 3 11 AC 1 3 V C C 1 _ 5 _A [ 23 ] V C C S U S 3 _3 [ 1 8 ] Y 7 E 21 V SS [8 7 ] VSS[1 9 3 ] Y 5
AC 1 4 V C C 1 _ 5 _A [ 24 ] V C C S U S 3 _3 [ 1 9 ] T7 E 24 V SS [8 8 ] VSS[1 9 4 ] AG 2 8
0 . 1 u _ 16 V _ Y 5 V _ 04 V C C 1 _ 5 _A [ 25 ] V C C S U S 3 _3 [ 2 0 ] 10mils E5 V SS [8 9 ] VSS[1 9 5 ] AH 6
R 237 AJ 5 G 22 T P _ V C C C L _ 1 05 C2 7 6 0. 1u _ 1 6 V _ Y 5 V _ 0 4 E8 V SS [9 0 ] VSS[1 9 6 ] AF2
V C CU SB P L L V C C C L 1 _0 5 F 16 V SS [9 1 ] VSS[1 9 7 ] B2 5
10mils V SS [9 2 ] VSS[1 9 8 ]
10_04 10m il s A A7
A B6 VC C 1 _ 5 _A [ 26 ] V C C C L 1_ 5
G 23 T P _ VC C CL _ 1 5 F 28
F 29 V SS [9 3 ] A1
USB CORE
V C C L A N 3_ 3 A B7 VC C 1 _ 5 _A [ 27 ] A 24 G 12 V SS [9 4 ] V S S _ NC T F [1 ] A2
C 3 04 C 26 5 C2 5 1
AC 6 VC C 1 _ 5 _A [ 28 ] V C C C L 3_ 3 [ 1 ] B 24 G 14 V SS [9 5 ] V S S _ NC T F [2 ] A2 8
AC 7 VC C 1 _ 5 _A [ 29 ] V C C C L 3_ 3 [ 2 ] 3. 3V S G 18 V SS [9 6 ] V S S _ NC T F [3 ] A2 9
C 309 Layout note: 0 . 1 u _ 16 V _ Y 5 V _ 04 * . 1U _ 1 0V _X 7 R _0 4 *1 U _6 . 3 V _ 0 4
VC C 1 _ 5 _A [ 30 ] V SS [9 7 ] V S S _ NC T F [4 ]
A1 0
20m i l s G 21
G 24 V SS [9 8 ] V S S _ NC T F [5 ]
AH 1
AH 2 9
0 . 1 u _ 1 6V _Y 5 V _ 0 4 Place within 100mils of ICH C 32 3
T P _V C C L A N 1 0 5 _ I C H A1 1 V C C L A N 1_ 0 5 [ 1 ] G 26 V SS [9 9 ] V S S _ NC T F [6 ] AJ 1
on the bottom side or 140 mils V C C L A N 1_ 0 5 [ 2 ] 0 . 1 u _1 6 V _ Y 5V _0 4 G 27 V SS [1 0 0 ] V S S _ NC T F [7 ] AJ 2
on the top near pin F1 C 3 16 V CC L A N3 _ 3 A1 2 G8 V SS [1 0 1 ] V S S _ NC T F [8 ] AJ 2 8
B1 2 V C C L A N 3_ 3 [ 1 ] H2 V SS [1 0 2 ] V S S _ NC T F [9 ] AJ 2 9
3 .3 VS 0 . 1 u _ 16 V _ Y 5 V _ 04 V C C L A N 3_ 3 [ 2 ] H 23 V SS [1 0 3 ] V S S_ NC T F [1 0 ] B1
A2 7 H 28 V SS [1 0 4 ] V S S_ NC T F [1 1 ] B2 9
V C C GL A N P L L
1 . 5V S _ P C I E _I C H V C C G LA N P L L H 29 V SS [1 0 5 ] V S S_ NC T F [1 2 ]
D 28 V SS [1 0 6 ]
GLAN POWER
D 29 VC CG LA N1 _ 5 [1 ]
R 165 A F 8 2 8 01 I B M
C5 0 8 C2 3 1 E2 6 VC CG LA N1 _ 5 [2 ]
E2 7 VC CG LA N1 _ 5 [3 ]
10_04 1 0m ils VC CG LA N1 _ 5 [4 ]
0 . 1u _ 1 6 V _ Y 5 V _ 0 4 0 . 1u _ 1 6 V _ Y 5 V _ 0 4
V C CG L A N3 _ 3 V C C GL A N 3 _ 3 A2 6
V C C G LA N 3 _ 3
C 224 A F 8 2 8 0 1I B M
0 . 1 u _ 1 6V _Y 5 V _ 0 4
2 , 3 , 6 , 7 , 10 , 1 2 , 1 3 , 1 4, 1 5 , 1 6 , 1 7, 18 , 2 0 , 2 1 , 2 2, 2 3 , 2 4 , 2 5, 26 , 2 7 , 2 8 , 30 3 .3 VS
3, 15 , 1 6 , 1 7 , 1 8, 2 1 , 2 2 , 2 5, 26 , 2 8 , 3 2 , 33 3 .3 V
B - 20 ICH9M 4/4
Schematic Diagrams
HDMI
HDMI
5VS
R401
Safty Require
1_04 R323 1_04

HDMI CONNECTOR J_HDMI1
C427 C426
*22u_6.3V_Y5V_08 HDMI_D0N R438 0_04 HDMI_DATA0N
22u_6.3V_X5R_08 19 HDMI_HPD
18 HOT PLUG DETECT HDMI_D0P R439 0_04 HDMI_DATA0P
+5V 17
HDMI _DDC_DATA 16 DDC/CEC GND
SDA 15 HDMI_DDC_CLK
14 SCL HDMI_D2N R440 0_04 HDMI_DATA2N
RESERVED 13
HDMI_CLKN 3 4HDMI_CKN 12 CEC HDMI_D2P R441 0_04 HDMI_DATA2P
TMDS CLOCK- 11
HDMI_CLKP 2 1HDMI_CKP 10 CLKSHIELD
TMDS CLOCK+ 9 HDMI_D0N 2 1 HDMI _DATA0N
*WCM2012F2S- 161T03 8 TMDS DATA0- HDMI_CLKN R442 0_04 HDMI_CKN
L5 SHIELD0 7 HDMI_D0P 3 4 HDMI _DATA0P
HDMI_DATA1N 3 4HDMI_D1N 6 TMDSDATA0+ HDMI_CLKP R443 0_04 HDMI_CKP
TMDS DATA1- 5 *WCM2012F2S-161T03
HDMI_DATA1P 2 1HDMI_D1P 4 SHIELD1 L6
TMDS DATA1+ 3 HDMI_D2N 2 1 HDMI _DATA2N
*WCM2012F2S- 161T03 2 TMDS DATA2- HDMI_DATA1N R444 0_04 HDMI_D1N
L7 SHIELD2 1 HDMI_D2P 3 4 HDMI _DATA2P
TMDSDATA2+ HDMI_DATA1P R445 0_04 HDMI_D1P
*WCM2012F2S-161T03
L8 Sheet 20 of 38
C12817-119A5-L
HDMI
PIN GND1~4 =GND
CL OSE TO HDM I CO NN.

U2
6 HDMIB_D2BP 39 22 HDMI _DATA2P

38 IN_D1+ OUT_D1+ 23 HDMI _DATA2N 5VS
6 HDMIB_D2BN IN_D1- OUT_D1- 5VS
For ESD
42 19 HDMI _DATA1P
3.3VS 6 HDMIB_D1BP 41 IN_D2+ OUT_D2+ 20 HDMI _DATA1N
6 HDMIB_D1BN IN_D2- OUT_D2-
C
A
A
6 HDMIB_D0BP 45 16 HDMI _DATA0P
44 IN_D3+ OUT_D3+ 17 HDMI _DATA0N R60 R53
R42 6 HDMIB_D0BN IN_D3- OUT_D3-
48 13 HDMI _CLKP 1.5K_04 1.5K_04 D14 D15 D16
6 HDMIB_CLKBP 47 IN_D4+ OUT_D4+ 14
AC
AC
AC
20K_1%_04 6 HDMIB_CLKBN IN_D4- OUT_D4- HDMI _CLKN BAV99 RECTIFIER BAV99 RECTIFI ER
6 PORTB_HPD# BAV99 RECTIFIER
Q8 7 HDMI_CTRLCLK HDMI_CTRLCLK 9 28 HDMI _DDC_CLK
D
MTN7002ZHS3 7 HDMI_CTRLDATA HDMI_CTRLDATA 8 SCL SCL_SINK 29 HDMI _DDC_DATA

SDA SDA_SINK
R41 G R36 1K_04 7 30 HDMI _HPD
HPD HPD_SINK
S
7.5K_1%_04 3.3VS R59 *4.7K_04 25 2 3.3VS

R40 R52 *0_04 OE# VCC[ 1] 11 R54
DCC_EN# 32 VCC[ 2] 15 C41 C45 C47
20K_1%_04 10 DCC_EN# VCC[ 3] 21 20K_1%_04
RT_EN# VCC[ 4] 26 0. 1u_16V_Y5V_04 0.1u_16V_Y5V_04
PC0 3 VCC[ 5] 33 0.1u_16V_Y5V_04
PC1 4 PC0 VCC[ 6] 40
R37 499_1%_04 6 PC1 VCC[ 7] 46
REXT VCC[ 8]
1
3.3VS R55 *4.7K_04 34 GND[ 1] 5 C48 C43
R62 *4.7K_04 35 OE_1 GND[ 2] 12
3.3VS QE_2 GND[ 3] 18 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04
GND[ 4] 24
GND[ 5] 27
R61 4.7K_04 DCC_EN# GND[ 6] 31
GND[ 7] 36
R39 4.7K_04 PC0 GND[ 8] 37
GND[ 9] 43
GND[10]
R38 *4.7K_04 PC1 PTN3360BBS
PIN 49 =GND
? ? ?
2,3,6,7,10,12,13, 14, 15, 16,17,18,19,21,22,23,24,25,26,27,28,30 3.3VS

3,15,16,17,18,19,21,22,25,26,28,32,33 3.3V
HDMI B - 21
Schematic Diagrams
KBC-ITE IT8502E
K B C_ A V DD L2 1
H C B 10 0 5 K F -1 21 T 2 0 RX RY VOL TA GE MO DEL _I D V D D3
V DD 3
. V D D3
C3 3 9 C 28 9 C3 3 6 C 3 38 C3 3 7 C 3 17 X 3.3 V C4100-DDR2
C 30 0 C2 9 9 C 30 7
*. 1 U _ 1 6 V _0 4 1 0u _ 1 0V _ Y 5V _0 8 *. 1 U _1 6 V _ 04 * . 1 U _ 1 6V _0 4 X 0V C4100-DDR3 R 2 62
0 . 1 u _1 6 V _ Y 5 V _ 0 4 0 . 1 u _1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 04 * . 1U _ 16 V _ 0 4
0. 1 u _ 1 6V _ Y 5V _ 0 4 1 0 0 K _ 04
C 3 27
L23 K B C _ W RE S E T #
0 _ 04 0 . 1 u _1 6 V _ Y 5 V _ 0 4 K B C _ A GN D
M OD E L_ I D
RY
3 .3 V S . R2 2 2 *1 0 K _0 4 V DD 3 C 3 33
1 J_KB1 24
C5 8 3
C5 8 4
C5 8 5
C5 8 6
1 u _ 10 V _ 0 6
114
127
J _K B 1
1 21
C5100 cost down.
11
26
50
92
74
3
U9 * 85 2 0 1- 24 0 5 1 R2 1 8 10 K _ 0 4
RX SPI ROM Co-layout
*0 . 1 u_ 1 6 V _Y 5V _ 0 4
*0 . 1 u_ 1 6 V _Y 5V _ 0 4
*0 . 1 u_ 1 6 V _Y 5V _ 0 4
*0 . 1 u_ 1 6 V _ Y 5V _ 0 4
VC C
VSTB Y
VSTB Y
VSTB Y
VBAT
AVCC
10 58 KB -S I 0 4
VSTBY
VSTBY
VSTBY
16 L P C_ A D0 LA D 0 K S I0 /S T B #
9 59 KB -S I 1 5
16 L P C_ A D1 8 LA D 1 K S I 1/ A F D # 60 KB -S I 2 6
For C5100 U2 6
16 L P C_ A D2 7 LA D 2 K S I2 /INIT # 61 KB -S I 3 8 J _ KB2 K B C_ S P I_ V DD 8 5 K B C _ S P I _ S I _R
16 L P C_ A D3 P C LK _ K B C 13 LA D 3 K S I3 /S L IN# 62 KB -S I 4 11 V DD S I
8 52 0 1 -2 40 5 1
2 P C LK _ K B C 6 LP C C L K K S I4 63 KB -S I 5 12 2 K B C _ S P I _ S O_ R
1 6 L P C _ F RA M E # 5 LF R A M E # K S I5 64 KB -S I 6 14 K B -S I 0 4 SO
18 LP C _ S I R Q 22 S E RIR Q LPC K/B MATRIX K S I6 65 KB -S I 7 15 K B -S I 1 5 K B C_ F L A S H 3 1 K B C _ S P I_ CE # _ R
1 7,2 2 B U F _P LT _ R S T # LP C R S T# / W U I 4 / GP D 2( P U ) K S I7 6 W P# C E#
K B -S I 2
K B C _W R E S E T # 14 36 KB -S O0 1 K B -S I 3 8 6 K B C _ S P I_ S CL K _ R
W RS T # K S O 0 /P D0 37 2 11 SC K
KB -S O1 K B -S I 4
126 K S O 1 /P D1 38 KB -S O2 3 K B -S I 5 12 K B C_ HO L D# 7 4
16 G A2 0 4 GA 2 0 / GP B 5 K S O 2 /P D2 39 7 14 H OL D # V S S
KB -S O3 K B -S I 6
29 A C _ IN# 16 K B R S T # / GP B 6( P U ) K S O 3 /P D3 40 KB -S O4 9 K B -S I 7 15 *E N 2 5P 0 5 -5 0G C P
27 L E D_ A C IN# 20 P W U R E Q# / G P C 7 ( P U ) K S O 4 /P D4 41 10
KB -S O5
3 T H E R M_ A L E R T # L8 0 L LA T/ G P E 7 ( P U ) K S O 5 /P D5 42 KB -S O6 13 K B -S O 0 1 V DD 3
23 K S O 6 /P D6 43 16 2
Sheet 21 of 38 28 W EB_ AP#

2 8 W E B _ E M A I L#
15 E C S C I # / GP D 3( P U )
E C S M I # / GP D 4( P U )
K S O 7 /P D7
K S O 8/ A C K #
K S O9 / B U S Y
44
45
46
KB
KB
KB
KB
-S O7
-S O8
-S O9
-S O1 0
17
18
19
K B -S O
K B -S O
K B -S O
K B -S O
1
2
3
4
3
7
9
T H E R M_ A L E R T # R2 2 8 *1 0 K _ 04
DAC
KBC-ITE IT8502E 2 6 ,2 7 W L A N_ E N
76
77
78
DA C
DA C
0/ G
1/ G
PJ 0
PJ 1
K S O1 0 / P E
K S O 11 / E R R #
K S O1 2 / S L C T
51
52
53
KB
KB
KB
-S O1 1
-S O1 2
-S O1 3
20
21
22
K B -S O
K B -S O
K B -S O
5
6
7
10
13
16
S MC _ C P U _T H E R M R 2 6 9
S MD _ C P U _T H E R M R 2 7 0
4 . 7K _ 0 4
4 . 7K _ 0 4
79 DA C 2/ G PJ 2 K S O1 3 54 KB -S O1 4 23 K B -S O 8 17
15 C P U_ F A N 80 DA C 3/ G PJ 3 K S O1 4 55 24 18
3 G_ P W R KB -S O1 5 K B -S O 9 3 G_ D E T # R2 1 1 1 0K _ 0 4
25
24
3 G_ P W R
K B C_ M UT E #
81 DA C
DA C
4/ G
5/ G
PJ 4
PJ 5
IT8512E K S O1 5 K B -S O 10 19
20
K B -S O 11 C C D _ D E T# R2 1 6 1 0K _ 0 4
K B -S O 12 21
B A T _ DE T 66 ADC FLASH 100 K B -S O 13 22
C5100, pin76 & 79 swap B A T _ V OL T _ R 67 A DC 0/ G P I0 F L F R A ME # / G P G2 101 KB C_ S P I_ CE # K B -S O 14 23
CU R_ S E N S E _ R 68 A DC 1/ G P I1 F L A D 0/ S C E # 102 KB C_ S P I_ S I K B -S O 15 24 PC L K_ KBC R2 3 1 *1 0 _0 4 P CL K _ KB C_ R
69 A DC 2/ G P I2 F LA D 1 / S I 103 KB C_ S P I_ S O C 2 97 *1 0 P _ 50 V _ 0 4
70 A DC 3/ G P I3 F L A D 2/ S O 104 VC H G -S E L V D D3 B A T_ V O LT R2 0 5 1 00 _ 0 4 B A T_ V O L T_ R
2 2 L A N _P C I E _ W A K E # 3 G_ D E T# 71 A DC 4/ G P I4 F L A D 3 / G P G6 105 KB C_ S P I_ S CL K V C H G- S E L 29
25 3G _ D E T # C 2 83 1 u_ 1 0 V _ 06
C C D _ D E T# 72 A DC 5/ G P I5 F L CL K /S C K 106
27 C C D _ D E T# MO D E L _ I D 73 A DC 6/ G P I6 ( P D )F LR S T #/ W U I 7 / T M/ G P G0 CC D_ E N 27
R 1 96 1 0 K _0 4
A DC 7/ G P I7 R 2 68 4 . 7 K _0 4
GPIO 56
SMBUS R 2 65 4 . 7 K _0 4
SM C_ B A T 110 ( P D )K S O 16 / G P C 3 57 SU SB# 1 8, 2 4 , 2 6, 28 , 3 2 , 33
29 S MC _B A T SM D_ B A T 111 S MC LK 0/ G PB3 ( P D )K S O 17 / G P C 5 S U S C# 1 8, 3 2 , 3 3 C
29 S MD _B A T SM C _ C P U _ TH E R M 115 S MD A T 0/ G PB4 93 S M C_ B A T AC V DD 3
3 S MC _ C P U _ T H E R M S MC LK 1/ G P C1 ( PD )I D 0 / G P H0 S U S _P W R _ A C K 18 6/30
SM D _ C P U _ TH E R M 116 94 D2 4 A
3 S MD _ C P U _ T H E R M SM C _ V GA _ T H E R M 117 S MD A T 1/ G P C2 ( PD )I D 1 / G P H1 95 W L A N_ L E D # 2 6 ,2 7 For C5100 B AV 9 9 R E CT IF IE R J _8 0 D E B U G1
118 S MC LK 2/ G PF6 ( PU ) ( PD )I D 2 / G P H2 96 A C _P R E S E N T 1 8 C
SM D _ V GA _ T H E R M
S MD A T 2/ G PF7 ( PU ) ( PD )I D 3 / G P H3 97 S M D_ B A T AC 1 3 IN1
( PD )I D 4 / G P H4 98 W L A N_ D E T # 2 6 A 2
PWM D2 5 8 0 CL K
L C D _B R I G H T N E S S 24 ( PD )I D 5 / G P H5 99 B T _ D E T # 1 5, 2 6 B AV 9 9 R E CT IF IE R 3 8 0 P OR T_ D E T#
25 P W M0 / G PA0 ( PU ) ( PD )I D 6 / G P H6 D D _ ON 2 8, 3 1 C 4
23 KBC _ BEEP 28 P W M1 / G PA1 ( PU ) 107 B A T _ DE T AC 5
2 7 L E D _ S C R OL L # 29 P W M2 / G PA2 ( PU ) ( P D )I D 7 / G P G1 3 G_ E N 25 29 B A T _D E T A
D2 0 *8 5 2 05 -0 5 00 1
27 L E D _ N U M# 30 P W M3 / G PA3 ( PU ) B AV 9 9 R E CT IF IE R
27 L E D_ CA P # 31 P W M4 / G PA4 ( PU )
EXT GPIO 82 C
LOW ACTIVE 2 7 L E D _ B A T _ C H G# 32 P W M5 / G PA5 ( PU ) ( P D )E G A D / G P E 1 83 S M I# 18 B A T _ V OL T AC
27 L E D _B A T_ F U LL # 34 P W M6 / G PA6 ( PU ) ( P D ) E GC S #/ G P E 2 84 S C I# 18 29 B A T _ V OL T A 3 .3 V
D2 1
27 L E D _P W R # P W M7 / G PA7 ( PU ) ( P D ) E GC LK / G P E 3 P W R _B TN # 18 D 29
B AV 9 9 R E CT IF IE R
C
8 0 CL K 85
PS/2 WAKE UP 35 L C D_ B RIG HT N E S S A C
26 8 0 CL K R S MR S T# 1 8 C 3 89
3 IN1 86 P S 2 C L K 0 / GP F 0 ( PU ) ( P D )W U I 5/ G P E 5 17 A
26 3 IN1 8 0 P OR T_ D E T# 87 P S 2 D A T 0 / GP F 1 ( PU ) ( P D )L P C P D # / W U I 6/ G P E 6 K B C _R S T # 16
26 80 P O R T _ D E T # 0 . 1 u _1 6 V _ Y 5 V _ 0 4
88 P S 2 C L K 1 / GP F 2 ( PU ) B A V 99 R E C T I F I E R
17 P ME # 89 P S 2 D A T 1 / GP F 3 ( PU ) PWM/COUNTER 47
25 TP _C LK 90 P S 2 C L K 2 / GP F 4 ( PU ) ( P D ) TA C H 0 / G P D 6 48 CP U_ F A NS E N 1 5
M C H _ TS A T N _E C V DD3
25 TP _ D A TA P S 2 D A T 2 / GP F 5 ( PU ) ( P D ) TA C H 1 / G P D 7
120
A C T H E R M_ R S T# 125
WAKE UP ( P D )T MR I 0 / W U I 2 / G P C 4 124 V C OR E _O N 3 0
18 P M_ S Y S R S T # MP W R O K 7 , 15 , 1 8 NC 2
D2 6 * S CS 3 3 5 P W R S W / GP E 4 ( P U ) ( P D )T MR I 1 / W U I 3 / G P C 6
18
CIR 119 C RX 0
28 P W R_ S W # S HO RT
21 RI1 # /W UI0 /G P D0 ( P U ) ( P D )C R X / G P C 0 123
1 5 ,2 8 LI D _ S W # RI2 # /W UI1 /G P D1 ( P U ) ( P D )C T X/ G P B 2 C E LL _ C O N T R O L 29 16Mbit KBC_SPI_*_R = 0.1"~0.5"
GP INTERRUPT LPC/WAKE UP C 3 25 0 . 1 u_ 1 6 V _Y 5 V _0 4
33 19 U 10
2 8 W EB_ W W W # GI N T/ G P D 5 ( P U ) ( P D )L 8 0H L A T/ G P E 0 S W I# 18 K B C_ S P I_ V D D 8 5 K B C_ S P I_ S I_ R K B C _S P I _S I
112 V DD SI
R 24 7 4 7_ 0 4 C 3 15 *3 3 P _ 50 V _ 0 4
( P D )R I N G #/ P W R F A I L # / L P C R S T #/ G P B 7 C H G_ E N 29 2 K B C _ S P I _ S O_ R K B C _S P I _S O
108
UART SO
CLOCK R 28 3 1 5_ 1 % _0 4 C 3 58 *3 3 P _ 50 V _ 0 4
1 5 , 2 6, 2 7 B T _ E N 109 RX D/G P B 0 ( P U ) 2 C K 3 2K E R2 5 5 1 K_ 0 4 KBC _ FL ASH 3 1 K B C_ S P I_ CE # _ R K B C _S P I _C E #
AVSS
15 BKL _ EN TX D / GP B 1 ( P U ) CK 3 2 K E 128 W P# CE #
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C K 3 2K R 28 2 1 5_ 1 % _0 4 C 3 57 *3 3 P _ 50 V _ 0 4
CK 3 2 K R 24 0 * 10 M _0 4 6 K B C_ S P I_ S CL K _ R K B C _S P I _S C L K
I T 85 0 2 E -J SC K R 24 6 4 7_ 0 4 C 3 14 *3 3 P _ 50 V _ 0 4
1
12
27
49
91
113
75
R2 4 5 4 . 7 K _ 0 4 K B C _ HO LD # 7 4
1 22
X3 1 TJ S 1 2 5D J 4A 4 2 0 P _ 32 . 7 6 8K H z HO L D# V S S
R 2 38 *0 _ 0 4 4 1 2 5 V F 0 16 B -7 5
3 2
0 _04 F OR I T8 51 2CX /E X
C 3 10 0 . 1 u _ 16 V _ Y 5 V _ 0 4 C 30 8 C3 2 8
0 .1U _0 4 FO R IT E85 12 -J (I TE 850 2- J W /0 CI R) R 45 1
E C C os t Do wn 1 5 p_ 5 0 V _ N P O _0 4 1 5p _ 5 0V _ N P O_ 0 4
* 0_ 0 4
B - 22 KBC-ITE IT8502E
Schematic Diagrams
Card Reader/LAN JMB261C

S D_ CL K
JMC261 C C 64 3 near Pin#41

Sw it ch ing R eg ul at or
cl os e to PI N3 3
3. 3 V _ L A N
* 10 p _ 50 V _ N P O_ 0 4 D V DD R4 1 2 *4 . 7 K _ 04
3 .3 VS S D _ C LK R4 1 3 2 2 _ 1% _ 0 4 L 62 U2 4
( >2 0m il)
D V DD R E GL X . DVD D LA N _ S C L R4 1 5 *4 . 7 K _ 04 8 7
R 4 14 * 4. 7 K _ 0 4 S D_ CD # VC C WP
(>2 0m il )
R 4 17 * 1K _ 0 4 MS _ I N S # S D X C _P O W E R *0 _ 0 8 C6 4 4 C6 4 5 6
LA N _ S D A 5 SC L 1
S D X C_ P O W E R
V C C_ C A RD C 64 6 10 u _ 6. 3V _ X 5 R _ 0 8 0 . 1 u_ 1 6 V _Y 5 V _ 04 SD A A0 2
L A N _ LE D 0
F or J MC2 51 /2 61 o nl y
L A N_ L E D1
A1
3. 3 V _ L A N
C6 4 7 Pin#33 Pin#33 3 . 3V 4 3
M DIO 1 1
SD _ BS
RE G L X
V DD 3 G ND A2
SD_ D 3
S D _ D2
SD_ D 1
S D _ D0
R 4 16 1 0 K _ 04 S D_ W P 0 . 1 u _1 6 V _ Y 5 V _ 0 4 2. 2 u _ 6 . 3V _ X 5 R _ 0 6
I S ON
* A T 24 C 02 B N
V DD 3 3 .3 V
Card Reader Pull High/Low R4 1 8
R4 6 1
Resistors *0 _ 0 6
47
45
43
42
41
40
39
38
37
36
35
34
*2 8 m il _ s ho rt _ 0 6
48
46
44
33
U 11 R 4 24 U 25
R4 6 2 DV DD 5 1 3. 3 V S VDD 3
M D I O1 1
L A N _ LE D 1
M DIO 5
M D I O3
M DIO 2
M D I O1
M DIO 0
V D DIO
VDD O
IS O N
GN D
LX
OU T IN
L AN_ L ED0
MD I O4
F B 12
GN D
C R _C D 1 N R 4 5 2 0_04 M S _I N S # *2 8 mi l _ sh o rt _ 0 6 * 0 _0 6
R 4 21 C6 4 8
M D I O 13 R 4 5 3 * 0_ 0 4 3
49 32 (> 20 mi l) SH DN #
6/ 28 MD I O1 0 * 2 K _1 % _ 0 4 MP D R4 2 2 10 0 K _ 04
1 u_ 6 . 3 V _ Y 5 V _0 4
MD I O9 50 MD I O1 0 V DD RE G 31 4 2
51 MD I O9 V CC 3 V 30 3 .3 VS (> 20 mi l) SET G ND
MD I O8 R4 6 3 *4 . 7 K _0 4
52 MD I O8 P W R CR 29 V C C_ C A RD
D VD D R 4 26 A P L 56 0 3 -12 B
LA N _ MD I P 0 53 VD D T EST 28 M PD
VIP_ 1 MP D
LA N _ MD I N 0 54 27 LA N _ P C I E _W A K E # * 1 0K _ 1 % _ 04 C6 4 9 0. 1 u _ 16 V _ Y 5V _ 0 4
55 V I N _1 W AKEN 26 L A N _S C L L A N _P C I E _ W A K E # 2 1
D VD D 56 AV D D1 2 L A N _ LE D 2 25
LA N _ MD I P 1 L A N _S D A 6/ 28 G9141
LA N _ MD I N 1 57
58
VIP_ 2
V I N _2
JMC261 C C R _L E D
RS T N
24
23 B U F _ P LT _ R S T# 1 7 , 2 1
APL5603-12B(no R201,R198)
59 GN D C PPEN 22
3 .3 V_ L AN 60 AV D D3 3 G ND 21 V D D3 3 .3 VS
LA N _ MD I P 2
LA N _ MD I N 2 61 VIP_ 3 ( LQFP 64) V D DIO 20 SD _ W P 3 . 3 V _ LA N
( >2 0m il ) ( >2 0m il )
D VD D
A V D D 1 2_ 6 2
LA N _ MD I P 3
LA N _ MD I N 3
62
63
64
V I N _3
AV D D1 2
VIP_ 4
V I N _4
M DIO 6
MD I O1 2
MD I O1 4
C R _C D 0 N
19
18
17 S D _ CD # C6 5 0 C 65 1 C6 5 2 C 65 3
Sheet 22 of 38
LA N X OU T
Card Reader/LAN
CR _ CD1 N
1 0u _ 6 . 3V _X 5 R _ 0 8 0 . 1 u_ 1 6 V _ Y 5 V _ 04 1 0u _ 6 . 3V _X 5 R _ 0 8 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4
A V D D 33
A VD D1 2
A VD D1 2
M D I O 13
M D I O7
X OU T
Pin#32 Pin#32 Pin#31 Pin#31
REX T
CL K N
CL K P
R XN
GN D
T XN
RXP
T XP
R 42 9 *1 M_ 0 4 L A NXIN 3 . 3 V _ LA N 3. 3 V
X IN
X4 6 -2 2- 25 R0 0- 1B 4 J MC 2 61 _ C PC Ie D if fe re nti al R 4 30 *0 _ 0 6
JMB261C
10
11
12
13
14
15
16
2 1
1
2
3
4
5
6
7
8
9
6 -2 2- 25 R0 0- 1B 5 Pa ir s = 10 0 Ohm V D D3
F S X 5L
C R_ C D1 N
L A NX O UT
C6 5 4 C 6 55 M L MX 0 -_ R R4 4 6 0_ 0 4 ML MX 0 - I S ON R4 3 1 1 0 0 K _ 04
M D I O1 3
L A N X IN
M DIO 7
M L MX 0 +_ R R4 4 7 0_ 0 4 ML MX 0 + R4 3 3 * 1 0K _ 0 4
2 2p _ 5 0V _ N P O_ 0 4 2 2 p _5 0 V _ N P O _ 04
R 43 2
1 2 K _ 1% _ 0 4
M L MX 1 -_ R R4 4 8 0_ 0 4 ML MX 1 -
3 .3 VS 2 , 3 , 6 , 7, 1 0 , 1 2 , 13 , 1 4 , 1 5, 1 6 , 1 7, 18 , 1 9 , 20 , 2 1 , 2 3, 2 4 , 2 5 , 26 , 2 7 , 2 8, 3 0
DV D D DV D D 3 .3 V 3 , 1 5 , 16 , 1 7 , 1 8, 1 9 , 2 1, 2 5 , 2 6 , 28 , 3 2 , 3 3
M L MX 1 +_ R R4 4 9 0_ 0 4 ML MX 1 +
3 . 3 V _ LA N V D D3 1 6 , 2 1, 2 6 , 2 7, 28 , 2 9 , 31
D VDD
C6 5 8 C 6 59 DVD D
4 IN 1 SOCKET SD/MMC/MS/MS Pro
0 . 1 u_ 1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 0 4 C6 6 0 0 . 1 u _ 10 V _ X 7R _ 04
P C I E _R X P 5_ C A R D 17
Pin#7 Pin#13 C6 6 1 0 . 1 u _ 10 V _ X 7R _ 04
P C I E _R X N 5 _ C A R D 17 J _C A R D -R E V 1
P C I E _ TX N 5_ C A R D 17 SD _ CD # P1
P C I E _ TX P 5 _ C A R D 17 SD _ D2 P2 C D _S D
DV D D DV D D D V DD DV D D C L K _ P C I E _C R 2 V CC_ C A RD P3 DA T 2 _ S D
SD _ D3
C L K _ P CIE _ C R# 2 Card Reader SD _ BS P4 CD /DA T 3 _ S D
3 .3 V _ L A N P5 CM D_ S D
Power P6 VSS_ SD
C6 6 2 C 6 63 C6 6 4 C 6 65 R 46 4 1 0K _0 4 V C C_ CA RD S D _ CL K P7 V D D _S D
D4 5 P8 CL K _ S D
C 65 6 C 6 66
0 . 1 u_ 1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 0 4 0. 1 u _ 16 V _ Y 5V _ 0 4 * 10 u _ 6 . 3V _ X 5 R _ 0 6 P C I E _W A K E # A C L A N_ P C IE _ W AK E # S D _ D0 P9 VSS_ SD
1 8, 2 6 P C I E _ W A K E # S D _ D1 P1 0 DA T 0 _ S D
Pin#52 Pin#55 Pin#62 Pin#7 0 . 1 u _1 6 V _ Y 5 V _ 0 4
Reserved * 0. 1 u _ 16 V _ Y 5V _ 0 4 SD _ W P P1 1 DA T 1 _ S D
R B 7 5 1V P1 2 W P_ SD
L P2 R4 3 7
*W C M2 0 12 F 2 S -1 6 1T 0 3 P1 3 V S S _ MS
*7 5 _ 1% _ 0 4 V C C _M S
ML MX 0 -_ R 4 3 ML MX 0 - S D _ CL K P1 4
3 . 3V _L A N C 65 7 C 6 69 S D _ D3 P1 5 S C L K _ MS
1 2 P1 6 D A T 3 _ MS
ML MX 0 + _R ML MX 0 + M S _ INS#
0 . 1 u _1 6 V _ Y 5 V _ 0 4 S D _ D2 P1 7 INS_ M S
L P1 * 0. 1 u _ 16 V _ Y 5V _ 0 4 S D _ D0 P1 8 D A T 2 _ MS
S D _ D1 P1 9 S D I O / D A T 0 _ MS
C6 6 7 C 6 68 *W C M2 0 12 F 2 S -1 6 1T 0 3
ML MX 1 -_ R 4 3 ML MX 1 - SD _ BS P2 0 D A T 1 _ MS P2 2
P2 1 B S _ MS GN D P2 3
0 . 1 u_ 1 6 V _ Y 5 V _ 04 * 0. 1u _ 1 0V _ X 7 R _ 0 4
Pin#43 Pin#43 ML MX 1 + _R 1 2 ML MX 1 + V S S _ MS GN D
MD R 0 1 9 -C 0 -1 04 2
L36
L A N _ MD I P 0 7 10 M L MX 0 +_ R
3 . 3V _L A N L A N _ MD I N 0 8 T D+ TX + 9 M L MX 0 -_ R J _ RJ 1
T D- T X- ML M X0 + 1 GN D 1
4 12 2 D A+ s hi e l d GN D 2 3 . 3 V _ LA N
ML M X0 -
5 N C NC 13 ML M X1 + 3 D A- s hi e l d
C6 7 0 C 6 71 C6 7 2 C 6 73 N C NC ML M X1 - 6 D B+ C6 7 4 C 67 5
D B- F or JM C2 51 C
L A N _ MD I P 1 1 16 M L MX 1 +_ R
*1 0 u _6 . 3 V _ X 5R _ 06 0 . 1 u _1 6 V _ Y 5 V _ 0 4 0. 1 u _ 16 V _ Y 5V _ 0 4 0 . 1 u _1 6 V _ Y 5 V _ 0 4 L A N _ MD I N 1 2 R D+ RX + 15 M L MX 1 -_ R *0 . 1 u _1 6 V _ Y 5 V _ 0 4 *1 0 u _6 . 3 V _ X 5R _ 06
R D- RX- 4
Pin#59 Pin#59 Pin#2 Pin#21
Reserved RD _ CT 3 14 R X _C T DC _ NP 5 D C+ Pin#2 Pin#2
T D_ CT 6 R D_ CT RX _ CT 11 T X_ C T 7 D C-
R 45 0 C4100Q use
0_ 0 4 T D_ C T T X _ CT DD _ NP 8 D D+
D D- LAN connector PJS-08SL3B
C4 4 7 C4 4 8 P 30 1 2 R 56 R 57 R5 1 R5 8 P J S -0 8 S O 1B
Pla ce all cap acit ors close d to ch ip.
The s ubs crip t in each CAP i ncicat es th e p in
*0 . 0 1 u_ 1 6 V _X 7R _ 04
7 5 _ 1% _ 0 4
7 5 _ 1% _ 0 4
0. 1 u _ 16 V _ Y 5 V _ 0 4
75 _ 1 %_ 0 4
75 _ 1 %_ 0 4
nu mb er o f JMC251/ JM C2 61 th at sh ou ld b e 1 6, 2 1 , 2 6, 27 , 2 8 , 29 , 3 1 V D D 3
clo sed t o. 2 , 3 , 6, 7 , 1 0 , 1 2, 1 3 , 1 4 , 15 , 1 6 , 1 7, 1 8 , 1 9 , 20 , 2 1 , 2 3, 2 4 , 2 5, 26 , 2 7 , 28 , 3 0 3 . 3 V S
C 4 54 3, 1 5 , 1 6 , 17 , 1 8 , 1 9, 2 1 , 2 5, 26 , 2 8 , 32 , 3 3 3 . 3 V
10 0 0 p_ 2 K V _ X 7R _ 12 _ H 1 2 5
Card Reader/LAN JMB261C B - 23

Schematic Diagrams
Audio Codec VT1812
CODEC ( VT1812 )
3.3VS 1.5VS
R289 R28
7
PIN25,PIN38 ? 1? 10uF/.1uF D38 *SCS551V-30
*0_0
4 C A 5V
*2
8mil_sho
r t_0
6
5VS_AUD
L30 *28mli_short_06 5VS
C379 C5
79
3.3VS L28 3.3VS_AUD
*20mil_short_04 0.1u_
16V_
Y5V_04 10u_
10V_
Y5V_08 C546 C380
*0.1u
_10V_X7R_04 1u_
6.3V_
Y5V_04
C3
75 C578 C365 C574
AUDG R389 *28mli_short_06
0.1u_1
6V_Y5V_04 10u_10V_Y5
V_0
8 0.1u_16V_Y5V_04 0
.1u_16V_Y5V_04
C580 *0.1u_
50V_
Y5V_06
C556 C5
57 C581 *0.1u_
50V_
Y5V_06
0.1u_
16V_
Y5V_04 10u_
10V_
Y5V_08
AUDG
Sheet 23 of 38 AUDG
25
38
Layout Note:
4
7
1
9
U19
Audio Codec ALC_VREF C564 4.7u

_25V_X5R_08 Very close to Audio Codec
DVDD-IO
DVSS1
AVDD2
DVSS2
AVDD1
DVDD
VT1812 PC BEEP C572 *22p_50
V_NPO_04
ALC_GPIO0
ALC_GPIO1
2
3 G
G
PIO
PIO
0/DMIC- DAT
A1/2
1/DMIC- DAT
A3/4 VREF
27
AUDG
D43 5 D4
4
16,25 AZ_SDOUT 6 SDATA-OUT 28 MIC1-VREFO 1 MIC1-VREFO-R
BAT54CWGH A
1 A 16,25 AZ_BITCLK BIT-CLK MI C1-VREFO
21 KBC_BEEP 16 AZ_SDI N0 R377 22_04 AZ_SDIN0_R 8 3 C
C 3 BEEP 10 SDATA-IN A 2 MIC1-VREFO-L
2 A 16,25 AZ_SYNC 11 SYNC 37
18 ICH_SPKR 16,25 AZ_RST# RESET# MONO-OUT
BAT54AWGH C5 100
47 DI GI TA L R376 R375
24 EAPD_MODE EAPD
C5100 SPDI FO 48 31 C57
3 2.2u_6.3V_X5R_06 4.7K_
04 4.7K_04
45 SPDIFO1 CPVEE 30 C56
9 2.2u_6.3V_X5R_06
SPDIFO2 CBN 29
46 CBP MIC1-L MIC1-R
44 DMIC-CL
K1/2
C552 *0.1u_10V_X7R_04 DMIC-CL
K3/4 AUDG
43 35 FRONT-L C554 C553
12 NC LOUT
1-L 36 FRONT-L 24
BEEP R367 10K_04 C548 1u_6.3V_Y5V_04 FRONT-R
PCBEEP-IN L
OUT1-R FRONT-R 24
R369 5.1K_1%_04 *680p
_50V_X7R_0
4
C555 0
. 1u_16V_Y5V_04 R285 20K_1%_04 13 39 *680p_50
V_X
7R_04
2
7 JD_SENSE_MIC Sense A(JD1
) LOUT
2-L
R385 5.1K_1%_0
4 34 41
27 JD_SENSE Sense B(JD2
) L
OUT2-R
C5100 cost down AUDG AUDG
14 33 HEADPHONE-L
15 LINE2
-L
LINE2
-R
ANA LOG HPOUT-L
HPOUT-R
32 HEADPHONE-R HEADPHO
HEADPHO
NE- L 27
NE- R 27
C350 4.7u_6.3V_X5R_
06 MIC2_
L 16 23
INT
_MICR284 1K_04 C351 4.7u_6.3V_X5R_
06 MIC2_
R 17 MIC2-L LI NE1-L 24
MIC2-R LINE1-R
MIC2-VREFO
MIC2-VREFO
18
19 LINE1- VREFO 40 JDREF
NEAR CODEC
R2
96 5.1K_1
%_04
20 MIC2-VREFO JDREF R71
LINE2- VREFO
R286 75_1
%_04 C354 4.7u_6.3V_X5R_
06 MIC1_
L 21 2.2K_0
4
C5100 cost down
AVSS1
AVSS2
27 MIC1-L MIC1_
R 22 MIC1-L
R281 75_1
%_04 C349 4.7u_6.3V_X5R_
06 AUDG J_INTMI C1
27 MIC1-R MIC1-R INT_MIC
1
VT1812 C118 2
26
42
88266-0200
1
330p_50V_X7R_04 88266-2L
C5100 cost down

C5 100 cost down
AUDG
Layout Note:
Codec pin 1 ~ pin 11 and pin 44 ~ pin 48
are Digital signals.
The others are Analog signals.
2,3,6,7,10,12,13,14,15,16,17,18,19,20,21,22
,24,25,26,27,28,30 3.3VS
3,15,16,17,18,19,21
,22,25,26,28,32,33 3.3V
B - 24 Audio Codec VT1812

Schematic Diagrams
Audio AMP
AMP (TPA6017 or N7010)
5VS_REAR
5VS
L 47 *R0805 _short
C571 C559 C551 C5 63
0. 1u_16V_Y5V_ 04 10 u_10V_Y5V_0 8 *10u _10V_ Y5V_08
*10u_6. 3V_X5R_06
U18
FRONT-L R465 0_04 C577 1u _6.3V_X5R_04 LI N- 5 6
23 FRONT-L R467 0_04 C359 1u _6.3V_X5R_04 LI N+ 9 LIN- PVDD 15 L27 1 2 FCM1005 KF-121T0 3 AUDG
AUDG LIN+ PVDD 16
17 VDD
23 FRONT-R FRONT-R
AUDG
R466
R468
0_04
0_04
C576
C364
1u _6.3V_X5R_04
1u _6.3V_X5R_04
RI N-
RI N+ 7 RIN-
RIN+ LOUT+
4 SPKOUTL+
C372 *1000p _50V_X7R_04
SPKOUTL+_R
J_SPKL1
J _SPK1
2 1 Sheet 24 of 38
Thermal Pad
8 SPKOUTL- L26 1 2 FCM1005 KF-121T0 3 SPKOUTL-_R 1
R383 100K_04
SPK_EN 19
GAIN0 2
SD#
LOUT-
18 SPKOUTR+
C374 C367
2
8 5204-02 001
Audio AMP
AUDG R301 *100K_ 04 GAIN0 ROUT+ SPKOUTR+ 27 PCB Foo tprint = 8520 4-02R
5VS GAIN1 3 180 p_50V_NPO_0 4
R293 100K_04 GAIN1 14 SPKOUTR- R303 *10mil_sho rt 180p_50 V_NPO_04
ROUT- SPKOUTR- 27
R379 *100K_ 04 1
AUDG 11 GND
13 GND 10 AMP_BYPASS
20 GND BYPASS
21 GND 12 C353
EXPOSED PAD NC
TPA601 7A2PWPR 4.7 u_6.3V_X5R_0 6
Gain Set tings
GAIN0 GA IN1 AV(i nv) I NPUT IMP EDANCE AUDG
0 0 6 dB 90 k AUDG
0 1 10 d B 70 k
1 0 15.6 dB 45 k
1 1 21.6 dB 25 k
3.3 VS
Lo w m ut e! C570 *0. 1u_16V_Y5V_04
R3 82
3. 3VS 3 .3VS_AUD
100K_ 04
D42 *SCS355V
C A C565
18,21, 26,28, 32,33 SUSB# R387
D40 *SCS355V *0 .1u_10V_X7R_0 4
C A *100K_04
5
18 SB_ MUTE#
23 EAPD_MODE R386 *0_04 1
4 SPK_ EN
2
21 KBC_MUTE#
U22
3
MC74VHC1G08DFT1G
2, 3,6,7 ,10,12 ,13,14 ,15,1 6,17,1 8,19,2 0,21, 22,23, 25,26, 27,28, 30 3 .3VS
3,15,1 6,17,1 8,19, 21,22, 25,26, 28,32, 33 3 .3V
Audio AMP B - 25
Schematic Diagrams
HDD, ODD, MDC, TP, Conn, 3G
ODD J _ OD D 1
Close to
3G
S 1
connector
S 2 SAT AT XP1 _ R C4 8 9 0 . 0 1 u _1 6 V _ X7 R _0 4 C 28 0
S 3 S A T A T XN1 _ R C4 8 7 0 . 0 1 u _1 6 V _ X7 R _0 4 S A T A TX P 1 1 6 2 2 0U _ 4V _ B 2 _ B
S 4 S A T A TX N 1 16 20 mil
+
S 5 S A T A R X N1 _ R C4 8 5 0 . 0 1 u _1 6 V _ X7 R _0 4 J _3 G 1
S 6 S AT A RX N1 1 6 1 2
S A T A R X P 1_ R C4 8 3 0 . 0 1 u _1 6 V _ X7 R _0 4
S 7 S AT A RX P 1 1 6 3 W AKE# 3 .3 V_ 0 6 3 G _3 . 3 V
5 B T _D A T A 1 .5 V_ 0 8 MU I M_ P W R
B T _C H C L K U I M_ P W R 10 MU I M_ D A T A
5 VS 7 U I M_ D A TA 12 MU I M_ C L K C2 7 8
P 1 11 C L K R E Q# U I M_ C LK 14 MU I M_ R S T
O D D _ D E T E C T# 1 8 RE F C L K- U I M_ R E S E T
P 2 13 16 MU I M_ V P P 0. 1u _ 1 6V _ Y 5V _0 4
P 3 9 RE F C L K+ U I M_ V P P
P 4 15 GN D 0 4
P 5 GN D 1 G ND 5
C4 7 0 C 4 68 C 46 6 C4 6 5 C6 4 1 C 6 42
P 6
0. 1 u _ 1 6V _ Y 5V _0 4 * . 1 U _ 1 0V _X 7 R _ 0 4 1 u _1 0 V _ 0 6 *1 0 u _1 0 V _ Y 5 V _ 0 8 1 0 u _1 0 V _ Y 5 V _ 0 8
S L S -1 3P C 1 B 10 u _ 10 V _ Y 5V _ 0 8
KEY
21 18
27 GN D 2 G ND 6 26
P I N G ND 1 ~ 4 = G ND 29 GN D 3 G ND 7 34
GN D 4 G ND 8 40
C5100 cost down
35 G ND 9 50
Close to 21 3 G_ D E T# 23 GN D 1 1 GN D 1 0
J _ HD D1 25 P E T n0 20
S 1 connector 31 P E T p0 W _ D IS A B L E # 22 3 G _E N 21
S 2 S A T A T XP 0_ R C 5 43 0 . 0 1u _ 1 6V _ X 7 R _ 0 4 33 P E Rn 0 PER SET # 30
S
S
S
3
4
5
S A T A T XN 0 _R
S A T A R X N 0_ R
C 5 39
C 5 34
0 . 0 1u _ 1 6V _ X 7 R _ 0 4
0 . 0 1u _ 1 6V _ X 7 R _ 0 4
S A T A T X P 0 16
S A T A T X N0 1 6 SATA HDD 17
19
P E Rp 0
NC 3
N C (S MB _ C LK )
N C (S MB _ D A TA )
NC( USB _ D- )
32
36
38
US B _ P N 2
US B _ P P 2
U S B _ PN2 1 7
S 6 S A T ARX P 0 _ R S A T A R XN 0 1 6 37 NC 4 N C (U S B _D + ) U SB_ PP2 1 7
Sheet 25 of 38 S 7
C 5 32 0 . 0 1u _ 1 6V _ X 7 R _ 0 4
3 .3 VS
S A T A R XP 0 1 6
3 G_ 3 . 3V
C5 3 0 C5 2 9
39
41
43
NC
NC
NC
6
7
8
3. 3 V A U X
1 .5 V_ 1
24
28
48
3 G_ 3 . 3 V
NC 9 1 .5 V_ 2
HDD, ODD, MDC, P

P
P
1
2
3 C5 2 5 C 52 4
C 41 00 : 6 -2 0- 43 73 0- 12 2 (AL LT OP -C 16 6N 5- 122 05 -L )
C 51 00 : 6 -2 0- 43 74 0- 02 2 (1- 16 2- 10 05 61 )
0 . 1u _ 1 6 V _Y 5 V _ 04 10 u _ 10 V _ Y 5V _ 0 8
45
47
49
NC
NC
NC
10
11
12
3 .3 V_ 1
N C (LE D _ W W A N # )
L E D _W L A N #
52
42
44
+
C3 3 2
3 G _3 . 3 V
P 4 51 46
TP, Conn, 3G P
P
P
5
6
7
*. 0 1 U _ 1 6 V _X 7 R _ 0 4 *1 0 U _ 1 0 V _ 08
5 VS
NC 13 N C (L E D _ W P A N # )
8 89 1 0 -5 20 4 M-0 1
22 0 U _ 4 V _ B 2 _B
P 8
P 9
P 10
P
P
P
11
12
13
C5 2 2 C2 6 9 C 5 21 C 51 9 C2 7 0
+
C 2 85 3G POWER R2 7 7 *0 _ 0 8
P 14 *. 1 U _ 1 0 V _ X7 R _0 4 10 u _ 10 V _ Y 5 V _ 0 8 0 . 1 u _1 6 V _ Y 5 V _ 0 4 *1 U _1 0 V _ 0 6 1 0u _ 1 0V _ Y 5V _0 8* 1 00 U _6 . 3 V _ B 2
P 15 3 G_ 3 . 3 V
120mil Q1 3 A O 3 41 5 120mil
1 -16 2 -1 0 05 6 1 S D
3 . 3V
P IN G N D1 ~ 2 = GN D
C 33 4
C3 4 1 1 u _6 . 3 V _ Y 5 V _ 0 4 R 26 0 C 34 2
G
1 0 u _1 0 V _ Y 5 V _ 0 8 1 0 0K _ 0 4 0 . 1 u _1 6 V _ Y 5 V _ 0 4
MDC CONN 3 . 3V 1 .5 V
R 25 6
R 2 57
1 0 K _ 1 %_ 0 4
1 0 0K _ 0 4
W740S
R3 5 5 R3 5 6
D
Q1 2
*0 _ 0 6 *2 8m i l _s h o rt _ 06 G MT N 70 0 2 Z H S 3
21 3G _ P W R
J _ MD C 1
20mil
S
1 2 L4 6 3. 3 V
A Z _ S D OU T R3 7 0 * 0 _0 4 MA Z _ S D OU T 3 GN D R ESER VED 4 *H C B 1 0 05 K F -1 2 1 T2 0
1 6 , 2 3 A Z _S D O U T 5 A z al i a_ S D O
GN D
R ESER VED
3. 3 V M a ni / a u x
6 10mil
AZ _ S Y NC R3 7 1 * 0 _0 4 MA Z _ S Y N C 7 8
1 6 , 2 3 A Z _S Y N C A Z _ S D IN1 A z al i a_ S Y N C GN D
R3 7 2 * 2 2_ 0 4 MA Z _ S D I N 1 9 10
16 A Z _S D I N 1 AZ _ R ST # R3 7 3 * 0 _0 4 MA Z _ R S T# 11 A z al i a_ S D I GN D 12 MA Z _ B I T C L K R3 6 0 * 0_ 0 4
1 6 , 2 3 A Z _R S T #
J_MDC
A z al i a_ R S T #
* 88 0 1 8- 12 0 G
A za l ai _ B C L K
C 5 35 C 54 0
A Z _ B I T C L K 1 6 , 23
SIM card J _ SIM 1
R 3 59 *4 . 7 K _ 0 4
* 0 . 1u _ 1 6V _Y 5 V _0 4 * 22 P _ 5 0V _0 4
12 11 LO CK
( TO P V IE W)
2 1 M UIM _ CL K R3 5 4 *1 0 m i _l s h ort -N MN P C3 C 7 R3 5 8 *1 0 mi l _ sh o rt -N M N P M U I M _D A T A
M UIM _ RS T C2 U I M_ C L K UIM _ DA T A C 6 M U I M _V P P
M UIM _ PW R C1 U I M_ R S T UIM _ V P P C 5
U I M_ P W R U I M _ GN D
C5 3 7 C5 3 8 C5 3 6
C5 1 8
O PE N *2 2P _5 0 V _ 04 *2 2 P _ 50 V _ 0 4 *2 2 P _ 5 0V _ 0 4
*2 2 P _ 50 V _ 0 4 C 1 77 0 6 61 -1
TP CONN R1 1 9
5 VS_ T P
5 VS
* 2 0m i l _s h o rt _ 04
R1 1 8 R1 1 0
J _T P 1 1 0K _0 4 10 K _ 0 4
1
2 T P_ DA T A 21
3 T P_ CL K 21
4
8 52 0 1 -04 0 5 1 C 18 6 C1 7 8 C1 7 4
1 u _ 10 V _ 0 6 4 7p _ 5 0 V _N P O_ 0 4
47 p _ 50 V _ N P O_ 0 4
2, 3 , 6 , 7 , 1 0, 1 2 , 1 3, 14 , 1 5 , 16 , 1 7 , 1 8, 1 9 , 2 0 , 21 , 2 2 , 2 3, 2 4 , 2 6 , 27 , 2 8 , 3 0 3 . 3 V S
3 , 1 5, 1 6 , 1 7 , 18 , 1 9 , 2 1, 2 2 , 2 6 , 28 , 3 2 , 3 3 3 . 3 V
B - 26 HDD, ODD, MDC, TP, Conn, 3G

Schematic Diagrams
New Card, USB, Mini PCIE

3 . 3V S
New Card For C4100Q
NEW CARD C3 7 8 *. 1U _1 0 V _ X7 R _0 4
5
L P C _R S T # 1
4
2
3 . 3V
U 21 U 23 J _ NE W 1
3
C 5 68 *0 . 1 u_ 1 6V _Y 5V _0 4 17 8 N C_ RS T # * 74 A H C 1 G0 8 GW NC_ P E R ST # 13
A UX IN P E R S T# P E R S T#
C5 2 6 * 0. 1 u _ 16 V _ Y 5 V _ 0 4
3 . 3V S 15 N C _3 . 3 V 20 mil 12
A U XO U T + 3 . 3V A U X
6- 01 -7 410 8- Q6 1
C 3 76 *. 1 U _ 1 0V _X 7 R _ 0 4 2 C5 2 7 * . 1U _ 10 V _ X 7R _0 4
C 3 77 *0 . 1 u_ 1 6V _Y 5V _0 4
3 . 3V I N 3 N C _3 . 3 V S 40 mil 14
3 . 3V O U T C5 2 8 * 0. 1 u _ 16 V _ Y 5 V _ 0 4 15 + 3 . 3V
1 . 5V S + 3 . 3V
C5 2 3 * . 1U _ 10 V _ X 7R _0 4
C 5 61 *. 1 U _ 1 0V _X 7 R _ 0 4 12 11 N C _1 . 5 V S 40 mil 9
C 5 62 *0 . 1 u_ 1 6V _Y 5V _0 4 1 . 5V I N 1 . 5V O U T C5 2 0 * 0. 1 u _ 16 V _ Y 5 V _ 0 4 10 + 1 . 5V
+ 1 . 5V
10 NC_ C P P E# 17
LP C _ R S T # 6 CP P E # 9 NC_ C P USB # 4 C PPE#
17 LP C _R S T # 19 SYSR ST# C P US B # 11 C P US B #
P CIE _ W A K E #
17 U S B _ OC #8 OC # 1 8 , 22 P C I E _ W A K E # 16 W AKE#
1 2 N E W C A R D _C L K R E Q # C LK R E Q#
R 3 78 *1 00 K _ 0 4 R3 5 7 1 0K _ 0 4
1 8, 21 , 2 4, 28 , 3 2, 33 S U S B # STBY# R 3 81 *1 00 K _ 0 4 3 .3 V S 19
3. 3 V 2 C L K _ P C I E _ N E W _C A R D 18 R E F CL K +
R3 8 4 1 0 K _0 4 4 18 R 3 80 *1 0K _0 4 2 C L K _ P C I E _ N E W _C A R D # R E F CL K - 27
3 .3 V 5 NC R C LK E N 20 22 N C 28
R 3 88 *1 0K _0 4 1 7 P C I E _R XP 2_ N E W _C A R D
13 NC SHD N# 21 P E R p0 N C
14 NC 7 1 7 P C I E _R XN 2 _N E W _ C A R D P C I E _ T XP 0_ N E W _C A RD _R2 5 P E R n0
1 7 P C I E _ T X P 2_ N E W _ C A R D R 2 72 *1 0 mi l _ sh o rt
16 NC GN D 21 R 2 66 *1 0 mi l _ sh o rt 24
P C I E _ T XN 0 _N E W _ C A R D _ R PETp 0 5
NC GN D 1 7 P C I E _ T X N 2 _ NE W _ C A R D PETn 0 RE S E R V ED 6
* P 22 3 1 N F E 2 RE S E R V ED
US B _ P P 8 3
17 U SB_ PP8 2 U S B _D + 1
E NE P2 23 1N F E 2 p in1 ,8 ,9 ,10 ,2 0 h as US B _ P N8
17 U S B _ P N8 U S B _D - GN D 20
i nt ern al ly pu ll ed hi gh ( 110 ~3 30K
o hm )
1 8 I C H _S M B D A T 1
1 8 I C H _S M B C L K 1
8
7 S M B _D A T A
S M B _C L K
GN
GN
GN
D
D
D
23
26 Sheet 26 of 38
* 13 0 8 01 -0 2
G N D1 ~ 4 = G ND New Card, USB,
Mini PCIE
USB PORT MINI CARD
R9 3 U S B V CC 3 5 U S B _V C C 3 5 _ 2
*1 0 K _0 4
L1 0 H C B 1 60 8 K F -1 21 T 2 5
60 mil
17 U S B _ OC # 0 1 D12
R8 9 C 17 6 C1 9 9
*5 6 0K _ 0 4 + J _M I N I 1 20 mil
1 0 0u _ 6 . 3V _B _ B 0 . 1u _ 1 6V _ Y 5V _ 0 4 1 2
18 , 2 2 P C I E _ W A K E # 3 W AKE# 3. 3 V _ 0 6 3 .3 V
5 B T_ D A TA 1. 5 V _ 0 8
B T_ C H C L K U I M_ P W R 10 V D D3
R 4 07 * 0_ 0 4 P C H _B T _ E N #
M I N I _ C A R D _ C L K R E Q# 7 U I M _D A T A 12
R 1 24 * 0_ 0 4 J _ US B 2 2 W L A N _ C L K R E Q# 8 0 CL K 21
1 11 CL K RE Q # U I M _C L K 14
L 15 V+ 2 C LK _ P C I E _ MI N I # 13 R E F C LK - U I M _R E S E T 16 8 0 P OR T _D E T # 2 1
4 3 2 2 C LK _P C I E _ MI N I 9 R E F C LK + U I M _V P P 3I N 1 21
U S B _ P N 1_ R
17 U S B _P N 1 DA T A _ L R1 9 1 0K _ 0 4 15 GN D 0 4
1 2 3 3 .3 V S GN D 1 GN D 5
US B _ P P 1 _ R 6/ 28
17 U S B _P P 1 DA T A _ H
G ND 2
G ND 4
4
GN D1
GN D3
*W C M2 0 1 2F 2 S -1 6 1T 0 3 _S H OR T
R 1 25 * 0_ 0 4 GN D KEY
21 18
1 -2 84 -8 0 02 8 1 -1 27 GN D 2 GN D 6 26
7/5 GN D 3 GN D 7
29 34
G ND1
GN D 2
G ND3
GN D 4
GN D 4 GN D 8 40
U S B _V C C 3 5 _ 2 35 GN D 9 50
21 W L A N _D E T# 23 GN D 1 1 GN D 1 0
R3 3 *1 0 mi l _ sh o rt
60 mil 17 P C I E _ R X N1 _ W L A N
R3 2 *1 0 mi l _ sh o rt 25 P E T n0 20 W L A N _E N
17 P C I E _ R X P 1 _ W LA N 31 P E T p0 W _D I S A B L E # 22 W L A N _ E N 2 1, 2 7
C 89 C5 5
C4100Q USB connector 17 P C I E _ T XN 1_ W L A N 33 P E Rn 0 P ERS E T # 30 P C I _R S T # 1 7
+ 17 P C I E _ T XP 1 _ W L A N P E Rp 0 N C (S M B _C L K ) 32
1 0 0u _ 6 . 3V _B _ B *. 1 U _1 0 V _ X7 R _ 0 4
use 317DE04PSA3A2C 17 N C (S MB _D A T A ) 36 U S B _ P N4 B T_ D E T# 15 , 2 1
19 NC 3 N C (U S B _ D -) 38 U SB_ PP4 U S B _P N 4 17
1 5 , 2 1, 2 7 B T _E N R4 0 9 *0 _ 0 4 37 NC 4 N C (U S B _D + ) U S B _P P 4 17
39 NC 6 24
20 mil
NC 7 3 . 3V A U X 3 .3 V
R6 3 * 0_ 0 4 J _ US B 1 6/28 41 28
1 3. 3 V 43 NC 8 1. 5 V _ 1 48 40 mil
L9 V+ R4 3 *1 0 mi l _ sh o rt 45 NC 9 1. 5 V _ 2 52
4 3 U S B _ P N 0_ R 2 18 C L _C LK 1 47 N C 10 3. 3 V _ 1 42 3 .3 V
R4 4 *1 0 mi l _ sh o rt
17 U S B _P N 0 DA T A _ L 18 C L _D A T A 1
R4 5 *1 0 mi l _ sh o rt 49 N C 11 N C (L E D _ W W A N # ) 44 20 mil
1 2 US B _ P P 0 _ R 3 18 C L _R S T #1 51 N C 12 LE D _ W LA N # 46 W L A N _L E D # 2 1 , 2 7
17 U S B _P P 0 1 8 P C H _B T _ E N # R 4 10 * 0_ 0 4
DA T A _ H N C 13 N C (L E D _ W P A N # )
G ND 2
G ND 4
*W C M2 0 1 2F 2 S -1 6 1T 0 3 _S H OR T 4 B T _E N R 4 54 0 _0 4 8 89 1 4 -52 0 4
GN D 1
GN D 3
R6 4 * 0_ 0 4 GN D
3 . 3V
7/5 1 -2 84 -8 0 02 8 1 -1 R 4 55 *1 0 K _ 04
3 .3 V
G ND1
GN D 2
G ND3
GN D 4
C1 8 C 58 7 C 58 8
R 97 1 0 K _ 04 0 . 1u _ 1 6V _ Y 5V _ 0 4 0 . 1 u_ 1 6 V _Y 5 V _0 4 0 . 1 u _1 6 V _ Y 5 V _0 4
3. 3 V U S B V C C 35 16 , 2 1 , 22 , 2 7 , 28 , 2 9 , 31 V D D 3
2 , 3 , 6 , 7, 1 0 , 1 2, 1 3 , 1 4, 1 5 , 1 6, 1 7 , 1 8, 1 9 , 2 0, 2 1 , 2 2, 2 3 , 2 4, 2 5 , 2 7, 2 8 , 3 0 3 . 3 V S
U 4
5V U S B _ OC # 01 5 6 100 mil 3 , 1 5, 1 6 , 1 7, 1 8 , 1 9, 2 1 , 2 2, 2 5 , 2 8, 3 2 , 3 3 3 . 3 V
F L G# V O U T 1
2 7 C 1 44 C 16 5
60 mil VIN1 V O UT 2 3 .3 V
C 92 3 8 *. 1 U _ 1 0V _ X 7 R _ 04 C4 2 0 C4 1 1
VIN2 V O UT 3 1 0 u_ 1 0 V _Y 5 V _0 8
1 u _6 . 3 V _ Y 5 V _ 04 4 1 0. 1 u _ 16 V _ Y 5 V _ 0 4 *1 0 U _ 1 0V _ 0 8
EN# G ND
R T9 7 15 B G S
28 , 3 1 , 33 D D _ ON #
6- 02-09715 -920
New Card, USB, Mini PCIE B - 27

Schematic Diagrams
LED, CCD, Audio Conn

LED V D D3 V DD 3 5 VS 3 .3 V S
3 .3 V S
C6 4 0
* 0. 1u _ 10 V _ X 7R _ 04
R 29 7 R2 9 8 R 6 R5 V DD 3
R 4
*2 2 0_ 0 4 *2 2 0_ 0 4 47 0 _ 04 2 20 _ 04
2 2 0_ 0 4 GN D
J _ TP 2
1 LE D _ P W R #
A
1
3
D 27 D 1 D5
SCROLL 2 LE D _ A C I N #
AC IN/POWER ON LED WLAN/BT LED LOCK 3 LE D _ B A T _F U LL #
SG
SG
Y
Y
* K P B -3 02 5 Y S G C K P B - 30 2 5Y S GC K P -2 01 2 S GC 4 LE D _ B A T _C H G #
LED 5
6
C
W L A N _L E D # 2 1 , 2 6 85 2 0 1-0 6 0 51
C
G ND
B B L E D _ S C R OL L #
21 L E D _A C I N # L E D _P W R # 21 15 , 2 1 , 26 BT_ EN W L A N _E N 2 1, 2 6 LE D _S C R O L L# 2 1 For C5100
Q1 Q2
D TC 1 14 E U A * D T C 1 1 4E U A
E
For C4100
3. 3V S 3 .3 V S 3 . 3V S
V D D3 V DD 3
R 2 R3 R1
R 30 0 R2 9 9
2 2 0 _0 4 22 0 _ 04 22 0 _0 4
*2 2 0_ 0 4 *2 2 0_ 0 4
Sheet 27 of 38
A
D3 NUM LOCK D 4 CAPS LOCK D2 HDD/CD-ROM
3
LED, CCD, AUDIO D 28
BAT CHARGE/FULL LED
K P -2 0 12 S GC LED K P -2 0 1 2S G C LED K P -2 0 12 S G C LED
SG
Y
* K P B -3 02 5 Y S G C
Conn
C
2
4
L E D _N U M # L E D _C A P # S A T A _ LE D #
2 1 L E D _B A T_ C H G# L E D _B A T _ F U L L # 21 L E D _ N U M# 2 1 L E D_ CA P # 2 1 S A T A _ LE D # 16
Audio/USB CONN CCD C5100, cost down.

5V _ C C D
C5
5V 1 u _6 . 3 V _ Y 5 V _ 04
J_ A U D I O1
5V Q3 5 V _ CCD
MI C 1 -R 1
A O 34 0 9
2 3 MI C 1 -R
2 3 MI C 1 -L MIC1-L 2 L1 H C B 1 0 05 K F -1 2 1 T2 0 S D 40 mil
3
H E A D P H O N E -R 4
23 H E A D P H ON E - R 5 J_CCD1
H E A D P H O N E -L R 14 C8 C7
23 H E A D P H ON E - L
G
JD _S E N S E _ MI C 6 1
23 J D _ S E N S E _M I C 7
S P K _ HP # C 1 0 . 1 u_ 1 6V _Y 5V _ 0 4 * 1 00 K _ 0 4 0. 1 u _ 16 V _ Y 5 V _ 0 4 1 u_ 6 . 3 V _Y 5V _0 4
JD _S E N S E 8
23 J D _ S E N S E 9
US B _ P N1 1 MR 1 5
1 7 U S B _ P N 11 US B _ P P 1 1 10
1 7 US B _ P P 1 1 11 10 0 K _ 04
S P K OU TR + 12
2 4 S P K OU TR + J_ C C D 1
S P K OU TR - 13
2 4 S P K OU TR - 14 U S B _P N 5 1
R 7 3 30 K _ 0 4 17 U S B _ P N5
D
87 2 13 -1 4 00 G U S B _P P 5 2
17 U SB_ PP5 CC D_ DE T # 3
Q4 21 C C D _D E T #
C CD_ E N G MT N 7 0 02 Z H S 3 4
21 CC D_ E N 5
S
A U DG 85 2 05 -0 5 00 1
From EC default HI
1 6 , 21 , 2 2 , 26 , 2 8 , 29 , 3 1 V D D 3
2, 3 , 6 , 7 , 10 , 1 2 , 13 , 1 4 , 15 , 1 6 , 17 , 1 8 , 19 , 2 0 , 21 , 2 2 , 23 , 2 4 , 25 , 2 6 , 28 , 3 0 3. 3V S
3 , 15 , 1 6 , 17 , 1 8 , 19 , 2 1 , 22 , 2 5 , 26 , 2 8 , 32 , 3 3 3. 3V
B - 28 LED, CCD, Audio Conn

Schematic Diagrams
System Power, PWR SW
5V,3.3V,5VS,3.3VS,1.5VS
P Q 41
PQ 5 3 P Q 44 S Y S 15 V 1. 5 V ME 44 1 0 A D -G 1 .5 VS
M E 4 41 0 A D -G M E 44 1 0 A D -G 8
S YS 1 5 V V D D5 8
7 3
5V S Y S 1 5 V V D D3 8
7 3
3. 3 V
3A 7
6
3
2
3A
4A 6 2 4A 3A 6 2 3A P R1 1 6 5 1
5 1 5 1 P C1 2 8 P C 13 1 P R 1 17
PR 7 2
Power Plane P R 12 6
Power Plane 1M _0 4
4
P R7 0 P R1 2 2 0 . 1 u _ 16 V _ Y 5 V _ 0 4 * 1 00 K _ 0 4
4
1 M_ 0 4 1 M_ 0 4 1 0u _ 1 0V _Y 5V _0 8
*1 0 0K _ 0 4 *1 00 K _ 0 4
D
P Q2 1 P Q4 3 P Q3 9 P C 12 7
D
D
PC 5 7 MT N 7 0 0 2Z H S 3 P C 14 3 MT N 7 0 02 Z H S 3 SU SB G MT N 7 0 02 Z H S 3
2 20 0 p _5 0 V _ X 7R _ 04
S
* 22 0 0 p_ 5 0 V _X 7 R _ 0 4 G D D _ ON # 2 2 00 p _ 50 V _ X 7R _ 04 G D D _ ON #
D D _ ON # 2 6 , 31 , 3 3 D D _ ON # 2 6 , 31 , 3 3
S
V D D3
SYS1 5 V V D D5
8
P Q5 2
ME 4 4 1 0A D -G 5V S SYS1 5 V V D D3
8
P Q1 7
ME 4 4 10 A D -G 3 .3 V S
P R 68
Sheet 28 of 38
4A 7 3
4A 3A 7 3
3A
PR 6 9
6
5
2
1
P C 16 1 PC1 6 3 P R 14 6
P R 66
6
5
2
1
P C 54 P C5 3 P R 67 P R 14 4
1 0K _0 4
SU SB
SU SB 3 2, 3 3
SYSTEM POWER,
PWR SW
1 M_ 0 4 1 M_ 0 4
4
D
0 . 1 u_ 1 6 V _ Y 5 V _ 04 * 10 0 K _ 04 0 . 1 u_ 1 6 V _Y 5 V _ 04 *1 0 0 K _ 04 *1 0 0 _1 % _ 04
10 u _ 10 V _ Y 5 V _ 0 8 10 u _ 10 V _ Y 5 V _ 0 8 P Q 20
G MT N 70 0 2 Z H S 3 P C 5 8
1 8 , 2 1 , 24 , 2 6 , 32 , 3 3 S U S B #
D
S
0 . 1 u _ 16 V _ Y 5 V _ 0 4
PQ 1 9 P C5 6 P Q 18 P C5 2 P Q 50 P R 71
SU SB G M TN 7 00 2 Z H S 3 S US B G M TN 7 00 2 Z H S 3 S US B G *2 N 70 0 2 W
47 0 p _5 0 V _ X 7R _0 4 10 0 0 p_ 5 0 V _X 7 R _ 0 4 *1 0 0 K _0 4
S
S
7 /6
VIN VA V IN1
(2) (1) (8)

V DD 3
P D7 * S C S 1 4 0P
A C
P R6 5 P Q 13
*A O 34 0 9 P D8 * S C S 1 4 0P
10 K _ 0 4 S D A C
(6)
21 P W R_ S W # (4)
G
P Q1 4
POWER SWITCH CONNECTER

D
*2 N 7 0 0 2W _ A P R 6 4 *1 0 0K _ 0 4 PR6 3 *2 0 K _1 % _ 04 I N S T A N T_ O N R 40 3 *1 0m i l _s h o rt
W E B _A P # 2 1
G
P Q 15 P Q1 6
D
D
S
V IN * 2N 7 00 2 W _ A *2 N 7 0 02 W _ A
Q 10 Q 9 3 .3 V S 3 .3 V
E C P R 62 *1 0 0K _ 0 4 G G *2 N 7 0 02 G G *2 N 70 0 2
S
PC 5 0 P Q1 2 P R 61 P C 51 S C2 1 0 . 0 1 u_ 1 6 V _X 7 R _ 0 4
*0 . 1 u_ 5 0 V _ Y 5 V _ 06 *D TA 1 1 4 E U A
B
* 10 0 K _ 04 * 0. 1 u _ 50 V _ Y 5 V _ 0 6 (7) C1 4 0 . 0 1 u_ 1 6 V _X 7 R _ 0 4
J _S W 1
D D _O N 21 , 3 1 20 mi l
M _ B TN #
(3) PR6 0 *1 0 K _0 4 3. 3 V S 3 .3 V 1
(5) 2 MB T N
AP_ KEY 3 W EB_ W W W #
4 W E B _ E MA I L # W EB_ W W W # 2 1
5 W E B _ E MA I L # 2 1
LI D _ S W #
6 L I D _S W # 15 , 2 1
J_ S W 2
1
20 mi l 7
8
AP_ KEY
2 MB T N R1 4 9 10 0 K _ 04 M _B TN # 9
3 W EB_ W W W # 10 VIN
R3 0
4 *5 0 5 00 -0 1 04 1 -0 01 L *4 7 K _ 04
5
6
7
8
88 4 8 6-0 8 0 1
System Power, PWR SW B - 29

Schematic Diagrams
AC_In, Charger
VA
P Q 27 charge Current 3.2A
4
V IN P 2 0 03 E V G
1 5
2 6
Charge Voltage 12.6V
J _ A C -J A C K 1 3 7
5 0 93 2 -0 03 0 1 -00 1 PL 4 VA P Q2 2 8 Total Power 60W
H C B 4 53 2 K F -8 00 T 6 0 P 2 0 03 E V G P Q2 8 A
8 S P 8K 1 0 S F D 5 T B PL 5 BAT
1 7 3 2 TM P C 0 6 03 H -4R 7M -Z 0 1
2
GN D 1
6 2 P R7 3 0 . 0 2_ 1 %_ 3 2 1 7 3. 2AP R 1 01 0 . 0 2_ 1 % _3 2 BAT
P R 77 5 1 P R 16 8 5. 1_ 0 6
P C 10 1
P C1 0 0
GN D 2
PC9 5
PC9 6
5
6
1 3 0K _1 % _0 4 P R7 5 P C1 6 8
8
P C5 9 PC 1 PR 1 PC 2 2 00 K _ 1 %_ 0 4 P C8 8
2 2 00 p _ 50 V _ X 7 R _ 0 4
P C1 6 P C1 5
3
4 . 7 u_ 2 5V _X 5 R _0 8
4 . 7u _ 2 5V _ X 5 R _ 0 8
0 . 1u _ 5 0V _ Y 5V _ 0 6 1 0 K _ 08 0 . 1 u_ 5 0V _Y 5V _ 0 6 0 . 1u _ 5 0V _ Y 5V _ 0 6
0 . 1 u_ 5 0V _Y 5V _0 6 4 . 7u _ 25 V _ X 5R _ 08 4 . 7 u _2 5 V _ X5 R _0 8
4 . 7u _ 2 5V _ X 5 R _ 0 8
4. 7 u _ 25 V _ X 5 R _ 0 8
P R 76 PR9 6 * 10 m i _l s h ort P Q 28 B
4
P R1 0 7 S P 8 K 1 0S F D 5 TB
1 0 K _ 1% _ 04 * 1 0m i _l s h ort
PC2 1 0 . 1 u _1 6 V _ Y 5 V _ 04
1 u_ 1 0 V _0 6
PR7 4 C A PC8 6
10 0 K _ 04 PD3 R B 0 5 4 0S 2
PQ 2 5 CE L L S
P R8 9 P R 20 *0 _ 04 P C1 4 1 u_ 1 0V _0 6 P C9 0 PC8 9
A O 3 40 9 30 0 K _ 1% _ 0 4 V A
BAT S D P R 21 *0 _ 04 4. 7 u _2 5 V _ X5 R _0 8
B A T _V O LT 2 1
4. 7u _ 25 V _ X 5R _ 08
P R2 3 VA
32
30
28
27
26
25
31
29
G
Sheet 29 of 38 20 0 K _ 04
PU4
P C 77 0 . 1 u _5 0 V _ Y 5 V _ 06
C B
P GN D
LX
VB
C E LL S
CT L 2
OU T -1
O U T -2
P R 1 00 P C 79 1 24
2 VC C VIN 23 C TL PC7 3 0 . 1 u _1 6 V _ Y 5 V _ 04
-I N C 1 CT L 1
AC_In, Charger P R2 2
6 0 . 4 K _1 % _ 04 0 . 1 u_ 1 0 V _X 7 R _ 0 4 3
4
5
6
+ INC 1
A C IN
A C OK TRERMAL PAD
G ND
V RE F
R T
22
21
20
19
P R 90 3 9. 2 K _ 1 %_ 0 4
P C 74 0 . 1u _ 1 6V _ Y 5 V _ 0 4
0 _0 4 7 -I N E 3 C S 18 V O LT -S E L PC8 7
O UT C 1
OU T C 2
C O MP 2
C OM P 3
AD J 1 A DJ 3
+ INC 2
8 17
-I N C 2
AD J 2
P R2 8
-I N E 1
P R2 7 C OMP 1 BATT 33 S G ND 5 0. 1u _ 50 V _ Y 5 V _ 0 6
S G ND
D
20 0 K _ 1% _ 04 1 K _1 % _ 04
P R 31 MB 3 9A 13 2 P R 91 P R1 0 2
11
13
14
15
16
G
10
12
VD D3 PQ 3
MT N 7 0 0 2Z H S 3 V DD3 1 0 0K _ 1 % _0 4 S GN D 5 1 K _ 1% _ 0 4 4 9. 9 K _ 1 % _0 4
S
P C 20
0 . 01 u _5 0 V _ X7 R _0 4
PR 5 8
S GN D 5 SG ND 5 P R 29 * 10 m i _l s h ort
1 0 K _ 04 P R 30 * 10 m i _l s h ort P C 72
P R1 0 5 P R1 0 4 P R 14 9
PR35 = 16.2K for 1 00 p _ 50 V _ N P O _ 04 2 M_ 1 % _0 4
A C_ IN # 21 P C 78 * 22 P _ 5 0V _0 4 1 0K _ 1 % _0 4 2 3K _1 % _0 4 P R 15 2
M760SU (Total Power
D
Limit: 83W) 1 0 2K _ 1 % _0 4
P Q8 P Q5 5
P R5 9 1 M_ 04 G MT N 7 0 0 2Z H S 3 P C7 5 PR9 8 2 2K _ 1 % _0 4 V OL T -S E L MT N 7 0 0 2Z H S 3
VA
D
S
7 6. 8K _ 1 % _0 4
P R1 4 8
* 0 _0 4
1 00 0 p _5 0 V _ X7 R _ 0 4 S GN D 5
P R5 7 P C8 2 G PR1 5 0 0 _0 4
VCHG-SEL 21
1 00 0 p _5 0 V _ X7 R _ 0 4
S
20 0 K _ 04
P R1 5 3
VH= 4. 2V
S GN D 5 VL= 4. 3V
Bt te ry V ol ta ge :
1 6 , 21 , 2 2 , 26 , 2 7 , 28 , 3 1 V D D 3 9V ~1 2. 6V
PR 9 5 PM BAT1
1 0 K _ 04
CT L PL 3 H C B 10 0 5K F -12 1 T 20 1
V D D3 21 B A T _ DE T 2
21 S M D_ B A T PL 2 H C B 10 0 5K F -12 1 T 20
PL 1 H C B 10 0 5K F -12 1 T 20 3
D
21 S M C_ B A T 4
CE L L S C E P Q2 4 P C 19 P C1 8 P C1 7
P R 10 3 1 0 0K _0 4 G PR8 7 *1 5 m li _ sh o rt 5
VD D3
3 0 p_ 5 0 V _N P O_ 0 4
M TN 70 0 2 Z H S 3 * B A 0 5Q 1 6B C C 0 I 8
30 p _5 0 V _ N P O _0 4
3 0p _ 50 V _ N P O_ 04
D
S
1
P Q5 6
D TA 1 1 4 E U A PQ 2 6 PJ 6
B
P R1 7 0 P R1 7 1 G 1 mm S GN D 5 PM BAT2
21 C H G _E N
10 0 K _ 04 MT N 7 0 02 Z H S 3
D
S
V IN 1
2
17 . 4 K _ 1% _ 0 4
2
P Q5 7
G 3
4
MT N 70 0 2 Z H S 3
S
D
P C1 6 9 P C1 7 0 P C 17 1 P C 1 72 PC1 7 3 P C1 7 4 P C 17 5 5
P Q5 8 B T D -05 T C 1 B
C E CL M G *0 . 1 u_ 5 0V _Y 5V _ 0 6 *0 . 1 u _5 0 V _ Y 5 V _ 06 *0 . 1 u_ 5 0 V _Y 5 V _0 6 For C5100
MT N 7 0 02 Z H S 3 *0 . 1 u_ 5 0 V _Y 5 V _0 6 * 0. 1 u _ 50 V _ Y 5 V _ 06 *0 . 1u _ 5 0V _ Y 5V _ 0 6 *0 . 1 u _5 0 V _ Y 5 V _ 06
S
D
P C 1 77 P R1 7 2
P Q5 9 VIN
G
0 . 0 1u _ 1 6V _ X 7 R _ 0 4
2 1 C E L L_ C ON T R OL 1 . 5M _ 04 B AT
M TN 70 0 2 Z H S 3
S
V H=3 S2 P/3 A
V L=4 S1 P/1 .5 A P R1 7 3
1 M_ 0 4 PC 9 2 PC9 1 P C9 3 P C1 0 4 P C 10 5 P C1 0 3 P C1 0 6
S GN D 5 * 0 . 1u _ 50 V _ Y 5 V _ 0 6 *0 . 1u _ 5 0V _ Y 5V _ 0 6 *0 . 1u _ 5 0V _ Y 5V _ 0 6 *0 . 1 u_ 5 0 V _Y 5 V _0 6
*0 . 1 u_ 5 0V _ Y 5V _ 0 6 *0 . 1 u _5 0 V _ Y 5 V _ 06 *0 . 1 u _5 0 V _ Y 5 V _ 06
B - 30 AC_In, Charger
Schematic Diagrams
VCORE
V IN 5V
VCORE FOR PENRYN CPU
V IN
V -R C 1
1 0 0_ 1 % _ 0 4
* 15 u _ 2 5 V _ 6. 3* 4 . 4 _C
A
PC 1 0 PC 8 0 P C 81
* 15 u _ 2 5 V _ 6. 3* 4 . 4 _C
PC 1 2 P D1
1 u _ 1 0V _0 6 + +
1 0 00 p _ 5 0 V _ X7 R _ 0 4 RB0 5 4 0 S2 P R7 9
VIN
C
10 _ 0 6
PR 8 5 *1 0 m li _ s h or t
PR 1 5
PC 1 0 2 P C 97 P C9 8 PC 1 2 2
PR 1 0 *0 _ 0 4 P C7 0 PR 9 7 +
5
6
7
8
* 1 5m i l _ sh o rt 0 . 1 u _ 50 V _Y 5 V _ 0 6 4. 7 u _ 2 5 V _ X5 R _ 0 8
BST 1
1u _ 1 0 V _ 0 6 4 *4 . 7 U _2 5 V _ 0 8 * 33 0 u
S G ND 3 PR 1 6
2
3
1
7 .5 K _ 1 % _ 0 4 PC 6 3 PQ 2 9
M E 4 8 94 -G
P R7 0 _ 04 DPR SL _ STP
3 ,7 ,1 6 H_ D P R S T P #
E N_ V C O RE 1 5 0 0 0p _ 5 0 V _ X 7R _ 0 6
P R1 9 *4 9 9 _ 1 % _0 4 DP R S L TG 1 PL 7 V CO RE
7 , 1 8 P M_ D P R S L P V R
close to IMVP6 0 . 5 U H _ 1 0 *1 0 *4 . 1
20A 4 0A
VPN 1
D RN 1
? C4 ? PR19 Del 3 .3 VS BG 1
I SH
DR N1
PD 1 1
C
5
6
7
8
5
6
7
8
S K 34 S A
CL K E N# P R1 1 3 P C1 2 3 P C 11 9
43
42
40
39
37
36
34
18 C L KEN #
44
41
38
35
P R9 4 PU 2 4 4 10 _ 0 6 + +
PC6 4
D PR SL
V P N1
VIN 1
B ST1
TG 1
DR N 1
B G1
V5 _ 1
D PR STP#
EN
ISH
2
3
1
2
3
1
P C8 4 1 00 p _ 5 0 V _ N P O _ 0 4 68 0 _ 0 4
A
P R2 6 3 3K _1 % _ 0 4 P R2 5
1 3 0 K _ 1% _ 0 4 V CO R E _ V RE F 2
V CO R E _ HY S 3
1
C L K E N#
VR EF
CS 1 +
C S1 -
33
32
31
C S1 N
C S2 N
0. 1u _ 1 6 V _ Y 5 V _ 0 4
PQ 3 2 PQ 3 4
P C1 1 5
10 0 0 p _ 50 V _ X 7 R _ 0 4
*3 3 0 u _2 . 5 V _ V _ A 3 3 0 u_ 2 . 5 V _ V _ A
Sheet 30 of 38
CS 1 N
M E 4 6 26 -G ME 4 6 2 6 -G
P R9 9 2 20 K _ 1 % _ 0 4
P R2 4
4 H _ VID 6
V CO R E _ CL S E T 4
H _V I D 6
H _V I D 5
5
6
H YS
C L SET
V ID 6
TRERMAL PAD
C S2 -
CS 2 +
E R RO UT
30
29
28 V CC A
PR4 4 * 15 m i l _ sh o rt
VCORE
1 3 0 K _ 1% _ 0 4 4 H _ VID 5 H _V I D 4 7 V ID 5 V CC A 27 D02
1K _1 % _ 0 4
4 H _ VID 4 8 V ID 4 AG N D 26
P C8 5 1 00 p _ 5 0 V _ N P O _ 0 4 H _V I D 3 DAC
PR 3
4 H _ VID 3 H _V I D 2 9 V ID 3 DA C 25 VC _ SS
0 . 0 1 u_ 1 6 V _ X 7 R _ 0 4
1 0 0 0 p_ 5 0 V _ X 7 R _0 4
PR3 8 * 15 m i l _ sh o rt
4 H _ VID 2 H _V I D 1 1 0 V ID 2 SS 24
1 0 0 p _5 0 V _ N P O_ 0 4
4 H _ VID 1
P C8 3 1 00 0 p _ 5 0V _X 7 R _0 4 H _V I D 0 1 1 V ID 1 D RP + 23
4 H _ VID 0 V ID 0 DR P -
1 5 0 0 p_ 5 0 V _ 0 4
CS 2 N
P W R GD
E -R C
3. 3 V S
DR N 2
1 u _ 1 0V _0 6
V P N2
B ST2
VIN 2
V5 _ 2
G ND
F B+
TG 2
B G2
PSI#
FB -
S G ND 3
V IN + P C 12 4 PC 1 2 5
S C 4 52 + +
45
VPN 2 1 3
14
16
17
19
20
22
PR 9 3 P C9 4 3 30 u _ 2 . 5 V _ V _ A 3 3 0 u_ 2 . 5 V _ V _ A
12
15
18
21
1 K_ 0 4
*5 6 0u _ 2 . 5 V _ 6 . 6 *6 . 6 *5 . 9
PR 9 2 * 1 0m i l _ s ho rt P C1 0 9 PC 1 1 0 P C1 1 1 + P C9 9
PC 6 2
PC 7
PC 6 1
7 , 1 8 D E LA Y _ P W R G D FB+
PC 3
PC 4
5
6
7
8
P R8 4 10_04
4 VC C SEN SE FB-
4 VSS SEN SE P R8 1 10_04 0. 1 u _ 5 0 V _ Y 5 V _ 0 6 4 . 7 u_ 2 5 V _ X 5 R _ 0 8
PR 1 3 * 1 0m i l _ s ho rt 4 * 4 . 7U _ 2 5V _ 08 *1 5 u_ 2 5 V _ 6 . 3 *4 . 4 _ C
3 P S I# D RP - V C OR E _ V R E F
C5100 cost down
2
3
1
D RP + S G ND 3 PQ 3 0
PR 1 1 M E 4 8 94 -G
PR 1 8 7. 5K _1 % _ 0 4 CS 2 P P C 6 0 1 5 00 0 p _ 5 0V _X 7 R _ 06
*1 0 0 P _ 50 V _0 4
*1 0 0 P _ 50 V _0 4
*1 0 0 P _ 50 V _ 0 4
*1 0 0 P _ 50 V _ 0 4
DR N2
*6 8 0 _ 0 4
T G2 P R1 0 6 *1 0 m i _l s h o rt PL 8
B G2 0 . 5 U H _ 1 0 *1 0 *4 . 1
3. 3 V S
20A
5V
C
5
6
7
8
5
6
7
8
P R 11 4
P C7 6
P C6 7
P C6 5
P C8
PD 1 2
1 0 0 _ 1% _ 0 4
PC 1 3 PC 7 1 PD 2 PC 1 1 4 4 1 0 _0 6
P R1 7
S K 34 S A
2
3
1
2
3
1
S GN D 3S GN D 3S GN D 3S GN D 3 1 0 00 p _ 5 0 V _ X7 R _ 0 4 1 u _1 0 V _ 0 6 R B 0 5 4 0S 2 1 u _1 0 V _ 0 6
A
C
PR 7 8 *1 5 m li _ s h ort P C 11 6 VC _ SS PR 8 3 * 0 _0 4
V -R C 2 1 0 00 p _ 5 0 V _ X7 R _ 04
P Q3 1 P Q3 5 5V
ME 46 2 6 -G M E 4 6 26 -G S GN D 3 P C 69 P C 68
B S T 2P R 8 6 *1 0 m li _ s h or t * . 1 U _ 1 6 V _ 04
V IN
*. 0 2 2 U _ 1 6 V _ X 7 R _ 0 4
PU 3
D
5
S G ND 3 * 74 A H C T1 G 0 2 GW
CL K E N # 1 PQ 2 3
P R 88 *0 _ 04 4 G
PRT 2 2 *2 N 7 0 0 2 W
DP R S L
S
5V PR 4 6 D RP _ L 1 2 1 C S1 N
PR 8 2 10 K _0 4 P R 14 *0 _ 04
2 8K _1 % _ 0 4
3
E N_ V C O RE 10 0 K _ N T C _ 0 6 _A DP R S L _ S T P
D RN 1 P R4 2 P C5 0 . 0 3 3u _ 1 6 V _ X 7R _ 0 4 PR 5
P R9 P R8 0 S GN D 3
4 7K _0 4 D RP +
1 7 . 4 K _ 1 % _0 4
D
1 0 0 K_ 0 4 *1 0 K _ 0 4 D CR _ DR 1 PR4 47 K _ 0 4
G D CR _ DR 2 PR2 47 K _ 0 4 P C 66 P R6
PQ 2
D
S
1
P Q1 M TN 7 0 02 Z H S 3 9. 1 K _1 % _ 0 6
PJ 1 D RN 2 P R3 7 P C6 0 . 0 3 3u _ 1 6 V _ X 7R _ 0 4 PR 8 6 8 0p _ 5 0 V _ X 7R _ 0 4
P R1 2 *1 0 m li _ s h o rt G 1m m D RP -
21 V C OR E _ ON 4 7K _0 4
M T N7 0 0 2 Z HS 3 1 7 . 4 K _ 1 % _0 4
PRT 1
S
PR 3 6 D RP _ L 2 2 1 C S2 N
PC 9
2 8K _1 % _ 0 4
*0 . 1 U _ 16 V _ 0 4 1 0 0 K _ N T C _ 06 _ A
2 , 3 , 6 , 7 , 1 0 , 1 2, 13 , 1 4 , 1 5 , 1 6 , 17 , 1 8 , 1 9 , 2 0 , 2 1, 2 2 , 2 3 , 2 4 , 2 5, 26 , 2 7 , 2 8 3 . 3 V S
3 , 15 , 1 6 , 1 7 , 1 8 , 1 9, 2 1 , 2 2 , 2 5 , 2 6, 28 , 3 2 , 3 3 3 . 3 V
VCORE B - 31
Schematic Diagrams
VDD3, VDD5
VREF
PR 1 2 5 *0 _ 04 PR1 2 8 0 _ 04
P C1 4 4
1 u _ 10 V _ 0 6
P R1 2 3 P R 12 9
E N_ 3 V E N_ 5 V
P C 14 8 12 0 K _ 0 4 1 2 0K _ 0 4 P C1 4 7
10 0 0 p _5 0 V _ X 7R _ 04
1
1 0 0 0p _ 5 0V _X 7 R _ 0 4 PU 7
EN 2
T ON S E L
EN 1
VR EF
VFB2
VFB1
VIN
7 24 4 . 7 u _2 5 V _ X 5R _ 08
V R E G3 VO 2 V O1
V IN
1 0 u_ 6 . 3 V _ X 5 R _ 0 6
P R 1 33 * 1 0K _ 0 4 0 . 1 u _ 50 V _ Y 5V _ 0 6
PC 4 6 P C 47 8 23
L DO 3 P OK SYS5 V
PC 4 8 + P C 45 P C4 9 P C 43
4 . 7 u _2 5 V _ X 5R _ 08 PQ 9 P C1 5 2 P C 15 4 PC 1 5 3
MD S 2 6 58 9 22
B O OT 2 B OO T1
8
7
6
5
5
6
7
8
4 . 7u _ 2 5 V _X 5 R _ 0 8
4
0 . 1u _ 1 6 V _Y 5 V _ 04
10
uP6182 21
1 u _ 10 V _ 0 6
4
PQ 1 0 * 15 u _ 2 5V _ 6 . 3 *4 . 4 _ C 4 . 7 u _2 5 V _ X 5R _ 0 8
S Y S 5V
M DS 2 6 5 8
V DD 3 SYS3 V PL 1 1 U GA T E 2 U GA TE 1 PL 1 0 VDD 5
5A
3
2
1
1
2
3
P J 10 T MP C 0 6 03 H -4R 7 M-Z 0 1 T M P C 0 6 03 H -4 R 7 M-Z 01 PJ 1 3
2 1 2 1 11
PH ASE2 P HA S E 1
20 1 2
4A 1 2
Sheet 31 of 38 5 mm P Q 45 Ra 5m m
C
12 19
8
7
6
5
5
6
7
8
MD S 2 6 58 P R 13 1
GN D P A D
P C4 4 P C1 4 5 P D 19 L GA TE 2 L GA TE 1 P C1 4 6
S K IP S E L
VDD3, VDD5 P C1 4 1 + P R1 2 7 * S K 3 4S A 4 4 P Q 11 P D1 8 3 1 . 6K _ 1 % _ 06
VC L K
1 00 p _ 50 V _ N P O _ 0 4
LD O 5
G ND
EN 0
0 . 1 u _ 16 V _ Y 5V _ 0 4 MD S 2 6 58 *S K 3 4 S A 1 00 p _ 5 0V _ N P O_ 0 4
V IN
3
2
1
1
2
3
13 K _ 0 4
PD 6
A
15 0 u _6 . 3 V _ V _ A PD 5 Rb P C 14 2
A C +
13
14
25
16
17
P C1 4 9
15
18
V R E G5 C A
P R 1 38 VR EG 5 P R 13 0 1 50 u _ 6 . 3V _V _ A
*R B 0 54 0 S 2 EN_ AL L 0 . 1u _ 1 6 V _Y 5 V _ 04
P R1 2 4 * RB0 5 4 0 S2 2 0 K _1 % _ 0 6
20 K _ 1 % _ 04 * 68 0 K _ 1 %_ 0 4
D02
P R1 6 4 0_04
P R1 3 9 * 0 _0 4 P C 15 6 C A
V RE F SYS5 V
0 . 01 u _ 5 0V _ X 7 R _ 0 4
P R1 4 0 0_04 P R1 6 5 * 0 _0 4 P D 1 7 R B 05 4 0 S 2
V RE G 5
A C
SYS1 0 V
V IN 1 P R1 3 7 2 . 2_ 0 6 V R E G5
P D 1 6 R B 05 4 0 S 2 P C1 5 1
V R E G5 P D1 3
P C 1 58 P C1 5 9
P R 13 2 *0 _ 04 E N _3 V C A 2 2 0 0 p_ 5 0 V _ X7 R _0 4
V IN C A
P R1 4 1 4 . 7 u _2 5 V _ X 5R _ 08 10 u _ 6 . 3V _X 5 R _ 0 6 P C 15 7
0 . 01 u _ 5 0V _ X 7 R _ 0 4
P R 13 4 0 _0 4 E N _5 V R B 0 54 0 S 2 P D 1 5 R B 05 4 0 S 2
10 K _ 0 4
A C
SYS1 5 V
D
P Q4 7 P D 1 4 R B 05 4 0 S 2 P C1 5 0
G
MT N 70 0 2 Z H S 3 2 2 0 0 p_ 5 0 V _ X7 R _0 4
D
S
P C 1 6 0 0 . 1u _ 1 6 V _Y 5V _ 0 4
P R 14 2
1
G P J 12
2 1 ,2 8 D D _ ON
1 mm
S
P Q4 8
1 0 0K _ 0 4
2
M T N 70 0 2 Z H S 3
SYS5 V
E N_ 3 V E N _5 V
P R1 4 7
D
P Q4 6 P Q 49 5V V R E G5
1 0 K_ 0 4 *2 N 7 0 0 2W *2 N 70 0 2 W
G G
D D _ ON #
D D _ ON # 2 6 , 28 , 3 3
S
P R1 4 3 P R 13 6
*1 0 K _ 04 *1 0 K _ 0 4
D
P Q5 4
P C1 6 2 PJ 1 4
G 1m m
2 1 , 28 D D _O N
M T N 7 0 0 2Z H S 3*. 1 U _1 6 V _ 0 4
16 , 2 1 , 2 2, 2 6 , 2 7 , 28 , 2 9 V D D 3
2
D
P J 11 PQ 5 1
S
1
P R 1 45 P R 1 35 P C 15 5 * 2N 7 0 02 W
G
PM_TH RMTR IP# 3,7,16
1 0 0 K _0 4 * 10 0 K _ 0 4 40 m i l * . 1 U _ 1 0V _0 4
S
B - 32 VDD3, VDD5
Schematic Diagrams
1.8V/1.05VS
5V
P R1 0 9
* 1 5 m il _ s h o rt
Vout=0.75V(1+Ra/Rb) VIN
A
PD 9 PC 2 3 PC2 7 P C2 4
R B 0 5 4 0S 2 0 . 1 u _5 0 V _ Y 5 V _ 0 6 4 . 7 u _ 2 5 V _ X 5R _ 0 8
5V 4. 7u _ 2 5 V _ X 5 R _ 0 8
Ra
5
6
7
8
C
P R 11 2 8 .2 K _ 1 % _ 0 4
P C1 0 7 P R1 0 8 PR 3 2 P Q 36
4
*1 0 m i l _ sh o rt ME 48 9 4 -G
4 .0 2 K_ 1 % _ 0 4
1
2
3
P R1 1 5 P R1 1 1 10 0 p _ 5 0 V _ N P O_ 0 4 PC 1 1 8
P U5
13
14
15
16
* 1 0 0 K_ 0 4 1 0 0 K_ 0 4 U P6 1 2 7 0 . 1 u _ 1 6V _Y 5 V _ 0 4 PL 6 V1 .0 5 1. 05 V S
0 . 5 U H _ 1 0 *1 0 * 4. 1 PJ 2
16A
N .C
D H
IL IM
N.C
12 1 1 2
EN LX
D
11 2 8m m
PG D BST
C
P Q3 8 P C 1 17
G 10 3
5
6
7
8
R 34 * 10 m i l _ s ho rt PD 2 0
2 8 ,3 3 S USB M T N 70 0 2 Z H S 30 . 1 u _1 6 V _ Y 5 V _ 0 4 V O UT V CC *S K 3 4 S A +P C 1 0 8 PC 2 2
D
S 9 4 4
1
FB D L
P Q4 PJ 7 P Q3 3 1 2/1 7 3 3 0 u _ 2. 5V _ V _ A
RT N
G ND
1
2
3
N .C
A
G 17
N.C
1m m M E 4 6 2 6 -G 0 .1 u _ 1 6 V_ Y5 V_ 0 4
18 , 2 1 , 2 4 , 2 6 , 2 8 , 3 3 S U S B # * 2 N7 0 0 2 W Rb PAD P C1 1 2
Sheet 32 of 38
S
P R1 1 0 PC 1 1 4
5
1 u _ 1 0 V_ 0 6
3 .3 V 1 0 K_ 1 % _ 0 4 0 .0 1 u _ 5 0 V _ X 7 R_ 0 4
1.8V/1.05VS
P R3 4
2 2 0 K_ 1 % _ 0 4
1 8 1 . 0 5V S _ P W R G D
P C5 5
* . 1 U _ 1 0 V _ X 7 R _0 4
3 .3 V
Vout=1.25V(1+Ra/Rb) V 1 .8 PJ 9 1 .8 V
PU 6 1m m
1A 1 5 600mA 1 2
V IN V O UT
P C1 4 0 2 P C1 3 4
GN D P C1 3 6 P C1 3 8
4 .7 u _ 6 .3 V _ X 5 R_ 0 6 3 4 *8 2 p _ 50 V _N P O _ 0 4
S HD N # BY P
1 0 u _ 6 .3 V _ X 5 R_ 0 8 0. 1u _ 1 6 V _ Y 5 V _ 0 4
A X 66 0 7 -1 8 B A PR 1 2 1
PR 1 1 8 10 0 K _ 0 4 * 4 . 3 K _ 1 % _0 4
3 .3 V P R 11 9
P C 1 67
D
PC 1 3 5 0 . 0 1 u_ 5 0 V _ X 7 R _0 4 *1 0 K _ 0 4
P Q4 2
SU SB# R 40 4 *0 _ 0 4 G 0 . 0 1 u _5 0 V _ X 7 R _ 04
* 2 N7 0 0 2 W _ A
S
R 40 5 *0 _ 0 4
1 8 , 2 1, 33 S US C#
1 2 /1 8
2 , 3 , 6 , 7 , 1 0 , 1 2 , 1 3 , 1 4 , 1 5, 16 , 1 7 , 1 8 , 1 9 , 2 0 , 2 1 , 2 2 , 2 3, 24 , 2 5 , 2 6 , 2 7 , 2 8 , 3 0 3 . 3 V S
3 , 1 5 , 1 6 , 1 7 , 1 8 , 1 9, 21 , 2 2 , 2 5 , 2 6 , 2 8 , 3 3 3 . 3 V
1.8V/1.05VS B - 33
Schematic Diagrams
1.5V,0.75VS
VIN 5V 3.3 V
A
P R5 3 P R5 5 P R52
P D4 10 0K _ 04
1 M_0 4 1 0_ 06
V 1. 5 RB 0 54 0S 2
P U1
3 7
C
P R5 6 10 _0 6 V DDQ S P GD 1 .5V _ P WRG D 18
Ra
P C4 2 P R54 PC 26 P C3 8 P R4 9
2 * 15 mi l _s ho rt
10 0 p_ 50 V _NP O_ 0 4 1u _1 0V _ 06 1 u _1 0V _ 06 T ON 24
0_ 04 BST
6 V IN
8 FB P C3 6 P C1 21 P C12 0 PC 13 0
RE F
P R45 9 0 .1u _1 6V _ Y 5 V_ 04 4 . 7u _2 5V _ X5 R_ 08 0.1 u_ 50 V _Y 5 V _0 6
CO MP
5
6
7
8
Rb P R4 7 4. 7 u_ 2 5V _X 5 R_0 8
10 _0 6 PC 34 * 15 mi l _s ho rt
P R4 8 P R51 23 4
*.1U _1 0V _ 04 DH * 5. 1 _0 6
2
3
1
10 _ 06 *1 0K _ 1% _0 4 10 PR 43 P Q 40 P R1 69 P C17 6 *2 2 00 p_ 50 V _X 7R _0 6
V T TS 6.8 K_ 1 %_ 04
5 21 M E4 8 94 -G V 1 .5
V CCA I LIM
PJ 8
11A1
P C3 7 P C35 P R4 1 PC 40 P C4 1 22 P L9 2.5 UH_6 .8* 7.3 *3 .5 2

LX 1. 5 V
*15 mi l _s ho rt
1u _ 10 V _0 6 0.0 68 u_ 10 V _X 7 R_0 4 1 00 0p _5 0 V_ X 7R_ 04 1 u_ 10 V _0 6 19 8m m
DL
C
5
6
7
8
VSSA 4 P D1 0 + P C12 6 P C12 9 P C 13 3 P C1 32
VSSA
PJ 4 0.7 5V S 14 20 4 *S K 3 4S A 4.7 u_ 25 V _X 5R _0 8 0 .01 u_ 5 0V _X 7 R_0 4
2 1 1.5A 1 5 VTT V DDP 1 5V
56 0u _ 2.5 V_ 6 .6*6 . 6* 5. 9 0 .1 u_ 16 V _Y 5 V _0 4
Sheet 33 of 38 V T T_ ME M VTT
2
3
1
A
PC 32 PQ 37
3 mm 12 M E4 62 6 -G
V1 . 5 1 3 V DDP 2
P R3 3 P C28 P C25 1u _1 0V _ 06
1.5V,0.75VS 20 K _1 %_ 0 4 4. 7 u_ 25 V _X 5 R_0 8 10 u_ 10 V _Y 5V _ 08 P C29 PC 30 1
V DDP 2
E N/ P S V
P GN
P GN
18
D1 1 6
D1 1 7 P R39
VSSA
* 15 mi l_ s ho rt
10 u_ 10 V _Y 5V _ 08 1u _1 0V _ 06 11 P GN D2 2 5
V T TE N P GN D2
S C4 86
5V PR 50 4 7K _ 04 1 .5V E N
3 . 3V
D
PC 39
G P Q7 0. 1 u_ 16 V _Y 5 V _0 4 5
2 6,2 8,3 1 DD_ ON#
MTN 70 02 Z HS 3 PU 8 P R16 7
1
S
1 8, 2 1, 3 2 S US C# 12 K _1 %_ 0 4
4
2 S M_ P W ROK 7
1 . 5V _ PW RG D
MC 74 VH C1G 08 DF T1 G
PR 40 1 00 K _0 4 V T TE N P R 16 6
5V 3
1 0K _ 1% _0 4
PR 35
D
*10 0 K_ 04 PC 33
P Q5
R 35 *1 0m li _ sh ort G 0. 1 u_ 16 V _Y 5 V _0 4
2 8,3 2 S US B
MTN 70 02 Z HS 3 H1 H2 4 H10 H 14 H1 3 H9
S
C 15 8D1 5 8 C1 58 D15 8 C27 6 D18 6 C 27 6D1 86 C2 76 D18 6 C27 6D 18 6
G P Q6
1 8,2 1,2 4,2 6,2 8, 3 2 S US B # *2N 70 02 W M8 M1 M7 M4 M3
1
M-M AR K1 M-MA RK 1 M-M AR K1 M-MA RK 1 M-M AR K1
PJ 3
1 mm
2
M5 M2 M6 H6 H2 7 H23 H 12 H8 H17
M-M AR K1 M-MA RK 1 M-M AR K1 C 67 D67 C6 7D 67 H 3_ 5B 5 _0 D2_ 2 H3_ 5B 5 _0 D2 _2
H4_ 7 B6 _ 0D3 _7 H4 _0 B 6_ 0D2 _ 8
H4 H16 H3 H1 1 H5 H1 9
9 9 9 9 9 9
3 8 3 3 8 3 8 3 8 3 8
4 1 7 1 4 1 7 4 1 7 4 1 7 4 1 7 H2 H2 5 H15 H 22 H1 8 H21
5 6 5 6 5 6 5 6 5 6 C 15 8D1 5 8 C1 58 D1 58 H 4_ 7B 6 _0 D3_ 7 H4_ 7B 6 _0 D3 _7
H4_ 7 B6 _ 0D3 _7 H4 _7 B 6_ 0D3 _ 7
MT H3 15 D11 1 MT H3 15 D11 1 MT H31 5 D11 1 M TH3 15 D1 11 M TH3 15 D1 11 MT H3 15 D1 11
H20 H7 H2 9 H2 8 H2 6
9 9 9 9 9
3 8 3 8 3 8 3 8 3 8
4 1 7 4 1 7 4 1 7 4 1 7 4 1 7
5 6 5 6 5 6 5 6 5 6
2 ,3,6 ,7 , 1 0, 1 2, 1 3,1 4,1 5,1 6,1 7,1 8, 1 9, 2 0, 2 1, 2 2, 2 3,2 4,2 5 ,2 6 ,2 7 , 28 ,30 3. 3 VS MT H3 15 D11 1 MT H31 5 D11 1 M TH3 15 D1 11 M TH3 15 D1 11 MT H3 15 D1 11
3,1 5, 1 6, 1 7, 1 8, 1 9, 2 1,2 2 ,2 5 ,2 6 , 28 , 32 3. 3 V
B - 34 1.5V,0.75VS
Schematic Diagrams
Click Board
CLICK BOARD
CVDD3 CVDD3 CVDD3 CVDD3
CR360 CR359 CR361 CR358

CC2 CC1 CC3
0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 220_04 220_04 POW ER O N 220_04 220_04
C5VS C5VS CVDD3 BAT LED
3
1 LED
CD27 CD26
2
SG
CGND CGND CGND
Y
SG
Y
CJ_TP2 CJ_TP3
CJ_TP1 RY-SP155HYYG4 RY-SP155HYYG4
1 1 1
4
CTP_DATA CTP_CLK CLED_PWR#
2 CTP_CLK 2 CTP_DATA 2 CLED_ACI N#
3 3 3
4 4 CTPBUTTON_L 4 CLED_BAT_FULL#
CTPBUTTON_R CLED_BAT_CHG#
5 5
85201- 04051 CLED_PWR# CLED_BAT_FULL#
CGND
6
85201- 06051
6
85201-06051 CLED_ACIN# CLED_BAT_CHG#
Sheet 34 of 38
6-20-94A50-104
6-20-94AA0-104
CGND CGND 6-52-55002-04B
6-52-55001-040
6-52-55002-04B
6-52-55001-040
Click Board
6-20-94A70-104 6-21-91A00-106 6-21-91A00-106 6-52-55002-042 6-52-55002-042
6-21-91A10-106 6-21-91A10-106
6-20-94A70-104 6-20-94A70-104
CSW1~ 4
2 4
1 3
LI FT RI GHT LI FT RI GHT
KE Y K EY KE Y K EY
CSW1 CSW2 CSW3 CSW4
TJG-533-S-T/R TJG-533-S-T/R *TJG-533-S-T/R *TJG-533-S-T/R
1 2 1 2 1 2 1 2
3 4 CTPBUTTON_L 3 4 CTPBUTTON_R 3 4 CTPBUTTON_L 3 4 CTPBUTTON_R
5
6
5
6
5
6
5
6
CGND CGND CGND CGND
6-53-3150B-245 6-53-3150B-245 6-53-3150B-245 6-53-3150B-245

6-53-3050B-240 6-53-3050B-240 6-53-3050B-240 6-53-3050B-240
6-53-3050B-241 6-53-3050B-241 6-53-3050B-241 6-53-3050B-241
CH3 CH1 CH4 CH2

2 9 2 9 2 9 2 9
3 8 3 8 3 8 3 8
4 1 7 4 1 7 4 1 7 4 1 7
5 6 5 6 5 6 5 6
MTH237D91 MTH237D91 MTH237D91 MTH237D91

CGND CGND CGND CGND CGND CGND CGND CGND
Click Board B - 35
Schematic Diagrams
Audio Board/USB
USB PORT
A _U S B V C C AL 5 A _ U S B V C C2
H C B 1 6 0 8K F -12 1 T 25 60 mil
A_ U S B V CC A _U S B V C C
AU 1 AC 1 A C7
A _5 V 5 6 50 mil s +
F L G# V OU T 1 1 0 0u _ 6 . 3V _ B _ A 0 . 1u _ 1 6V _ Y 5V _ 0 4
5 0mi ls 2 7
V I N 1 V OU T 2 AC5 A C6 A J_ U S B 1
A C9 3 8 A R1 0 *1 0 mi l _ sh o rt _ 04 1
V I N 2 V OU T 3 0. 1u _ 16 V _ Y 5 V _ 0 4 0 . 1u _ 16 V _ Y 5 V _ 0 4 L61 A G ND V+
1 0u _ 1 0V _ Y 5V _ 0 8 4 1 A US B _ P N2 4 3 A USB _ P N2 _ R 2
EN # GN D D A TA _ L
R T 97 1 5B GS A US B _ P P 2 1 2 A USB _ P P 2 _ R 3
A GN D A G ND A G N D A GN D A GN D *A W C M2 0 1 2F 2 S -1 6 1T 0 3 D A TA _ H
G ND 1
G ND 3
4
6-02-09715-920
GN D2
GN D4
A R1 1 *1 0 mi l _ sh o rt _ 04 G ND
U S 0 4 03 6 B C A 0 8 1
PIN SWAP
GND 1
GN D2
GND 3
GN D4
6-21-B49C0-104
6-21-B49B0-104
A G ND
TO M/B AUDIO JACK

Sheet 35 of 38
5 A J _ MI C 1
Audio Board/USB A MI C 1-R
A MI C _ S E N S E
AL 4 F C M1 0 0 5K F -12 1 T 03
4
3 R
A MI C 1-L AL 6 F C M1 0 0 5K F -12 1 T 03 2
6 L
1
A C1 0 AC 4 2S J -T 3 51 -S 2 3
A_ 5 V A J_ A U DI O1
10 0 p _5 0 V _ N P O_ 0 4 1 0 0p _ 5 0V _ N P O_ 0 4
MIC IN 6-20-B2800-106
A MI C 1 -R 1
A MI C 1 -L 2
3
BLACK
A H E A D P HON E -R 4 A HP_ S E N S E A _ A UD G
A H E A D P HON E -L 5
A MI C _ S E N S E 6 A S PK _ HP# 5 A J _ HP 1
A S P K _H P # 7 4
A HP _ SE NS E 8 A H E A D P H O N E -R AR3 6 8_ 0 4 AL 2 F C M 10 0 5K F -12 1 T 03 3 R
A US B _ P N2 9
A US B _ P P 2 10 A H E A D P H O N E -L AR5 6 8_ 0 4 AL 3 F C M 10 0 5K F -12 1 T 03 2
11 6 L
A S P K OU TR + 12 1
A S P K OU TR - 13
AR 9 AR 8 A C3 AC2 2S J -T 3 51 -S 2 3
14
8 7 21 3 -14 0 0 G *1 K _ 1 %_ 0 4 * 1K _ 1 % _0 4 1 00 p _ 50 V _ N P O _ 04 1 00 p _ 50 V _ N P O _0 4
A _A U D G A G N D HEADPHONE
6-20-53A00-114 BLACK 6-20-B2800-106
A _ AUD G
AL 7
A C1 4 0 . 1 u_ 1 6 V _Y 5 V _0 4 F C M1 0 05 K F -1 2 1T 0 3
AS P K O UT R+ 1 2
A C1 5 0 . 1 u_ 1 6 V _Y 5 V _0 4
A C1 3 0 . 1 u_ 1 6 V _Y 5 V _0 4 A L8 A C 11 A J _ S P K R 1 J_SPK1
F C M1 0 05 K F -1 2 1T 0 3 1 0 0 0p _ 50 V _ X 7R _ 04 A S P K O U T R+ _ R
A C1 6 0 . 1 u_ 1 6 V _Y 5 V _0 4 AS P K O UT R- 1 2 A S P K O U T R-_ R 1 2 1
2
85 2 0 4-0 2 00 1
A C8 C4 5 5 P C B F o ot p ri n t = 8 5 2 04 -0 2 R
A GN D A _ A UD G 1 80 p _ 50 V _ N P O _0 4 1 80 p _ 50 V _ N P O _ 04
A R1 *1 0 mi l _s h o rt _0 4
A_ A UD G 6-20-43150-102
6-20-43110-102
A H1 A H3
C 5 9D 59 C5 9 D5 9 AH 2 A H4
2 9 2 9
3 8 3 8
4 1 7 4 1 7
5 6 5 6
M T H 2 76 D 11 1 MT H 2 7 6 D 1 1 1
A GN D A GN D A G N D A G ND
B - 36 Audio Board/USB
Schematic Diagrams
Power Switch & Lid Board

POWER SW & LED & HOT KEY
S _ 3 .3V S S _3 .3 V
POWER
SWITCH LID SWITCH IC S D2
S _ 3 . 3V S S _ 3 .3 V LED
C
S R2 *B A V 99 R E CT IF I E R
S _ 3. 3 V S S _ 3 . 3V S_ 3 .3 V
SJ _ SW 1 22 0 _ 04
2 0mi l S R1 1 0 0 K _1 % _ 04 AC
1 SJ _ SW 2
2 S M _B TN # 20 mi l 20 mi l 2 0m il Z4301 S U1
3 S W E B _W W W # 1 1 2 S LI D_ S W #
4 S W E B _E M A I L # 2 S M _B T N # S C6 VC C OU T
5 3
GND
A
S L I D_ S W # SW EB_ W W W #
6 4
A
S W E B _ E M A IL # 0 .1u _ 1 6V _ Y 5V _ 0 4 SC 2 S C1
7 SAP_ O N S M GN D 5 S L ID_ S W # M H2 4 8- A LF A - E S O
8 6
3
S D3 SD 1 0 .1 u _1 0 V _ X7 R_ 0 4 *1 00 p _ 50 V _ NP O _ 04
9 S M GN D 7 SAP_ O N S MG ND
S _ V IN * HT -1 5 0N B -DT S MG ND S M GND
10 8 H T-1 5 0N B -DT
S M GN D S MG ND
* 5 05 0 0-0 1 0 41 -0 0 1L 8 8 48 6 -0 80 1
C
6-52-56001-023
6-20-94K10-108
6-52-56001-028
6-52-56000-020
6-52-56001-023
6-52-56001-028
S MGN D Sheet 36 of 38
1 0 pin & 8 pi n co- la y 6-52-56001-022 6-52-56000-020 6-02-00248-LC2 SU1, SU2
S MG ND S M GN D
6-52-56001-022 6-02-00268-LC1 3 Power Switch & Lid
1 2
Board
FOR E5128Q FOR E4120Q/E5120Q
6-53-3150B-245 6-53-3150B-245 6-53-3150B-245 S_ VIN 6-53-3150B-245

HOT KEY 6-53-3050B-241
6-53-3050B-240
6-53-3050B-241
6-53-3050B-240
6-53-3050B-241
6-53-3050B-240
6-53-3050B-241
6-53-3050B-240
POWER BUTTON WEB_WWW# WEB_EMAIL# SR 3
AP_KEY#
SPW R _ SW 1 S W W W _S W 1 S MA I L _ S W 1 * 10 0 K _ 1% _ 0 4 S A P _S W 1
T J G-5 3 3-S -T /R T J G-5 3 3-S -T /R TJ G-5 3 3 -S -T /R T J G-5 3 3 -S -T/R
1 2 S M_ B T N# 1 2 S W EB_ W W W # 1 2 S W E B _E MA IL # 1 2 S A P _O N
3 4 3 4 3 4 3 4
SC 4 S C3 S C5 SR 5
5
6
5
6
5
6
5
6
PSW1~8 S R4 *4 7K _ 0 4
0 .1 u_ 1 6 V _Y 5 V _0 4 0. 1 u _ 16 V _ Y 5 V _ 0 4 0 _ 04 0.1 u _1 6 V _ Y 5 V _ 04
3 1
4 2
S MGN D S M GN D S M GN D S MG ND S MG ND S MG ND S MG ND
S M GND
S MG ND
FOR E4120Q/E5120Q
POWER BUTTON
SPW R _ SW 2 S M H1 S MH3 S MH 4
* TJ G- 53 3 -S -T /R S M H2 S MH5 2 9 2 9 2 9
1 2 S M_ B T N# H 7_ 0 D2 _ 3 H 7 _0 D 2_ 3 3 8 3 8 3 8
3 4 4 1 7 4 1 7 4 1 7
5 6 5 6 5 6
5
6
PSW1~8 M T H2 37 D 87 MT H2 3 7D 87 MT H2 3 7D 1 18
3 1 S MG ND S M GND S M GND S M GN D
4 2
S MGN D
6-53-3150B-245 S M GN D S MGN D
6-53-3050B-240
6-53-3050B-241
FOR E5128Q
Power Switch & Lid Board B - 37

Schematic Diagrams
External Odd Board

ODD BOARD FOR E5120Q
QJ _ OD D 2 Q J_ O DD 1
S1 S1
S2 QJ _S ATA_ TXP1 S2
S3 QJ _S ATA_ TXN 1 S3
S4 S4
S5 QJ _S ATA_ R XN 1 S5
S6 QJ _S ATA_ R XP1 S6
S7 S7
Q GN D Q GND
Sheet 37 of 38 P1
P2
P3
Q _ 5VS
QJ _O D D_ D ETE CT#
Q_ 5VS
P1
P2
P3
External Odd Board P4
P5
P6
QJ _S ATA_ ODD _ DA# P4
P5
P6
1- 1 62 -1 0 05 62 2 42 00 1 -1
PI N P IN
G N D1 ~2 =WG ND Q GN D Q GND G N D 1 ~3 =Q G N D
6-21-1 4010-0 13
6-21-1 3A00-0 13 6-21-1 4020-0 13
6-21-1 4030-0 13
Q_ 5V S
Q C2 QC1
0. 1 u_ 16 V_ Y5 V_ 04 0 .1 u_ 1 6V_ Y 5V_ 0 4
Q GND
Q H1 QH 4 Q H3 Q H2
C 23 7 D9 1 C 2 37 D 91 C 67 D 67 C 67 D 67
QG N D Q GN D
B - 38 External Odd Board

Schematic Diagrams
Power Sequence V1.0

C5100 V1.0 POWER ON SEQUENCE
1 PWR_SW#
2 DD_ON
2.06ms
3 3.3V
2.23ms
3 5V
2.8ms
3 1.5V
5ms
3 1.8V
76.2ms
4a RSMRST#
129.66ms
4b PWR_BTN# 82.9ms Sheet 38 of 38

97.46ms Power Sequence
5a SUSC#
V1.0
4.94ms
5b SUSB#
1.33ms
6 1.05VS
0.963ms
6 1.5VS
0.788ms
6 3.3VS
0.743ms
6 5VS
1.382ms
6 1.05VS_PWRGD
1.345ms
6 MPWORK
281.13ms
7 VCORE_ON
CLKEN# 2.32ms
8
(VRM_PWRGD)
1.38ms
8-1 CLK_PWRGD
7.6ms
9 DELAY_PWRGD
7.62ms
10 SB_PWROK
0.42V 7.62ms
11 H_PWRGD 281.32ms
1.09ms
12 PLT_RST#
2.09ms
0.28V
13 H_CPURST#
125.34ms
14 DDR3_DRAMRST#
Power Sequence V1.0 B - 39

Schematic Diagrams
B - 40
BIOS Update
Appendix C:Updating the FLASH ROM BIOS 

BIOS Version
To update the FLASH ROM BIOS you must: Make sure you down-
• Download the BIOS update from the web site. load the latest correct
• Unzip the files onto a bootable CD/DVD/USB Flash Drive. version of the BIOS ap-
propriate for the com-
• Reboot your computer from an external CD/DVD/USB Flash Drive. puter model you are
• Use the flash tools to update the flash BIOS using the commands indicated below. working on.
• Restart the computer booting from the HDD and press F2 at startup enter the BIOS.
You should only
• Load setup defaults from the BIOS and save the default settings and exit the BIOS to restart the computer.
download BIOS ver-
• After rebooting the computer you may restart the computer again and make any required changes to the default BIOS sions that are
settings.
C:BIOS Update
V1.01.XX or higher as
appropriate for your
Download the BIOS computer model.
1. Go to www.clevo.com.tw and point to E-Services and click E-Channel. Note that BIOS versions
2. Use your user ID and password to access the appropriate download area (BIOS), and download the latest BIOS files are not backward com-
(the BIOS file will be contained in a batch file that may be run directly once unzipped) for your computer model patible and therefore
(see sidebar for important information on BIOS versions). you may not down-
grade your BIOS to an
older version after up-
Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive grading to a later ver-
1. Insert a bootable CD/DVD/USB flash drive into the CD/DVD drive/USB port of the computer containing the sion (e.g if you upgrade
a BIOS to ver 1.01.05,
downloaded files.
you MAY NOT then go
2. Use a tool such as Winzip or Winrar to unzip all the BIOS files and refresh tools to your bootable CD/DVD/USB back and flash the BIOS
flash drive (you may need to create a bootable CD/DVD with the files using a 3rd party software). to ver 1.01.04).
Set the computer to boot from the external drive

1. With the bootable CD/DVD/USB flash drive containing the BIOS files in your CD/DVD drive/USB port, restart the
computer and press F2 (in most cases) to enter the BIOS.
2. Use the arrow keys to highlight the Boot menu.
3. Use the “+” and “-” keys to move boot devices up and down the priority order.
4. Make sure that the CD/DVD drive/USB flash drive is set first in the boot priority of the BIOS.
5. Press F10 to save any changes you have made and exit the BIOS to restart the computer.
C - 1
BIOS Update
Use the flash tools to update the BIOS

1. Make sure you are not loading any memory management programs such as HIMEM by holding the F8 key as you
see the message “Starting MS-DOS”. You will then be prompted to give “Y” or “N” responses to the programs
being loaded by DOS. Choose “N” for any memory management programs.
2. You should now be at the DOS prompt e.g: DISK C:\> (C is the designated drive letter for the CD/DVD drive/USB
flash drive).
3. Type the following command at the DOS prompt:
C:\> Flash.bat
4. The utility will then proceed to flash the BIOS.
5. You should then be prompted to press any key to restart the system or turn the power off, and then on again but
make sure you remove the CD/DVD/USB flash drive from the CD/DVD drive/USB port before the computer
C:BIOS Update
restarts.
Restart the computer (booting from the HDD)

1. With the CD/DVD/USB flash drive removed from the CD/DVD drive/USB port the computer should restart from
the HDD.
2. Press F2 as the computer restarts to enter the BIOS.
3. Use the arrow keys to highlight the Exit menu.
4. Select Load Setup Defaults (or press F9) and select “Yes” to confirm the selection.
5. Press F10 to save any changes you have made and exit the BIOS to restart the computer.
Your computer is now running normally with the updated BIOS

You may now enter the BIOS and make any changes you require to the default settings.
C-2
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C5100Q/C5100Q-C/C5105/C5105-C

About this Manual

The following information is included:

Appendix A, Part Lists

IMPORTANT SAFETY INSTRUCTIONS

This Computer’s Optical Device is a Laser Class I Product

Instructions for Care and Operation

Use only approved brands of Unplug the power cord before

The computer has specific power requirements:

User’s Manual on CD/DVD

Note that you should al-

Figure 1 - Opening the Lid/LCD/Computer with AC/DC Adapter

New Card, USB, Mini PCIE ........................................................ B-27

To update the FLASH ROM BIOS you must: C-1

Specifications Processor Options Audio

Intel® Core™2 Duo Processor High Definition Audio Compliant Interface

Memory BIOS Password

 Two 204 Pin SO-DIMM Sockets Supporting DDR3 1066/ Interface

Intel ® GL40 Integrated Video Communication

Embedded Multi-in-1 Card Reader

6 Cell Smart Lithium-Ion Battery Pack, 48.84WH

Full Range AC/DC Adapter

Energy Star 5.0 Compliant

Dimensions & Weight

374mm (w) * 250mm (d) * 14.3 - 34.1mm (h)

Figure 1 External Locator - Front View with LCD Panel Open

1 - 4 External Locator - Front View with LCD Panel Open

External Locator - Front and Rear View

External Locator - Front and Rear View 1 - 5

Figure 4 External Locator - Left & Right Side View

1 - 6 External Locator - Left & Right Side View

External Locator - Bottom View

To prevent your com-

External Locator - Bottom View 1 - 7

Figure 7 Mainboard Overview - Top (Key Parts)

1 - 8 Mainboard Overview - Top (Key Parts)

Mainboard Overview - Bottom (Key Parts) Figure 8

Mainboard Overview - Bottom (Key Parts) 1 - 9

Figure 9 Mainboard Overview - Top (Connectors)

1 - 10 Mainboard Overview - Top (Connectors)

Mainboard Overview - Bottom (Connectors) Figure 10

Mainboard Overview - Bottom (Connectors) 1 - 11

An example of these types of boxes are shown in the sidebar. 

To remove the Battery: To remove the Bluetooth Module:

1. Remove the battery page 2 - 5

To remove the Wireless LAN Module:

Removing the Battery Figure 1

Removing the Battery 2 - 5

Removing the Hard Disk Drive

a. Locate the HDD bay Hard Disk Upgrade Process

New HDD’s are blank. Before you

You have backed up any data

You have all the CD-ROMs and

2 - 6 Removing the Hard Disk Drive

3. Remove the hard disk bay cover 63 .

Removing the Hard Disk Drive 2 - 7

Figure 4 Removing the Optical (CD/DVD) Device

2 - 8 Removing the Optical (CD/DVD) Device

Removing the System Memory (RAM) Figure 5

6 Be careful not to touch

Removing the System Memory (RAM) 2 - 9

5. Pull the latches to release the second module if necessary.

2 - 10 Removing the System Memory (RAM)