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The IEC faculty is actually involved in research and development activities in Digital
Signal Processing, VLSI Design, Analog Circuit Design, Artificial Neural Networks,
Circuit Testing, Fault-Tolerance, Fail-Safe Design, Microelectronics and Power
Devices
IITB
Germanium has emerged as a strong candidate for future CMOS logic applications
due to high electron and hole mobilities.
The project will involve cleanroom fabrication and electrical and materials
characterization of Ge-based devices such as MOS capacitors, contact diodes, etc.
These devices will eventually be used as building blocks for Ge-based transistors.
Successful completion of the project should result in fabricated devices, their
characterization, data analysis and benchmarking vs existing data for similar
devices.
To improve the capacity of existing fibre optic communications links, the next
generation transmission systems target 100-Gbps and higher capacity per
wavelength channel, using coherent techniques with advanced modulation formats
and extensive electronic signal processing.
This project is design and simulationof a high-speed CMOS ADC for System-on-Chip
applications. Such application demands a digital process which is worse than a
Mixed-Mode process for ADC implementation. Achieving high-sampling rates ADCs
with proper resolution is a challenge. This project aims architectural design as well
as detailed design of the target ADC with competitive target specifications
compared to reported state of the art high-speed ADCs .
At IIT Bombay, significant amount of work is done to build hand held systems (for
homeland security & healthcare applications) based on Nano-mechanical
cantilevers and other organic platform technologies. The work involves micro/nano-
fabrication, materials studies, instrumentation and system level integration.
The clock speeds/frequencies of integrated circuits (ICs) are growing rapidly. Our
research focuses development of ICs operating at mm-Wave (>30GHz) frequencies
for wireless applications and high-speed (100-Gb/s) optical communications.
The goal of this project will be to explore and develop packaging technologies that
can support such ICs. The project involves study of different packaging technologies
and design/fabrication of PCBs with transmission lines, matching networks etc. to
facilitate test of such ICs.