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Seat No.: ________ Enrolment No.

______________
GUJARAT TECHNOLOGICAL UNIVERSITY
ME – SEMESTER – I - • EXAMINATION – SUMMER - 2018

Subject code: 2712602 Date: 08/05/2018


Subject Name: CMOS Circuit Design - I
Time:02:30 PM to 05:00 PM Total Marks: 70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
4. Consider MOSFET as a device in all circuits.

Q.1 (a) What do you understand by process variations in CMOS circuits? List out 07
minimum seven performance parameters of CMOS op-amp, and discuss
effect of process variations on at least two of them.
(b) Compare following implementations of full adder: 1. Complementary static 07
CMOS and 2. Mirror Adder. Draw Mirror adder CMOS circuit and describe
its operation.

Q.2 (a) Discuss implementation of array multiplier with necessary diagram. What do 07
you understand by critical path in a circuit? Develop approximate expression
for propagation delay in terms of delay parameters of 1-bit full adder and
AND gate.
(b) Define body bias effect in MOSFET. Derive expressions of following small- 07
signal parameters: 1. gm, 2. gmb, and 3. rO.
OR
(b) Discuss various MOS device capacitance, and sketch and explain variations 07
in CGS and CGD as a function of VGS. Draw complete small-signal model of
MOSFET.

Q.3 (a) Derive voltage gain (Av) and output resistance (Rout) expressions for 07
MOSFET based CS amplifier with source degeneration. Neglect device
capacitances.
(b) Sketch MOSFET based differential amplifier circuit having resistive 07
load, and obtain expression for its small-signal differential voltage
gain.
OR
Q.3 (a) Draw MOSFET based basic Cascode amplifier. Discuss its operation, merits 07
and demerits. Derive expression for output impedance of Cascode amplifier.
(b) What is/are the different application(s) of Gilbert cell? Sketch Gilbert cell 07
circuitry and explain its operation.

Q.4 (a) List out desirable properties which current mirror should possess. 07
Sketch schematic of cascode current mirror and analyze its operation.
(b) Draw MOSFET based source follower circuit with current source as a 07
load as well as its small-signal high-frequency equivalent circuit.
Obtain expression for the gain of this circuit taking into account
various device capacitances.
OR
Q.4 (a) How does the concept of active current mirror used in differential 07
amplifier circuit to increase its (differential amplifier) trans-
conductance? Explain with necessary circuit diagram and analysis.
(b) Draw MOSFET based common-source amplifier circuit as well as its 07

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small-signal high-frequency equivalent circuit. Obtain expression for
the gain of the circuit taking into account various device capacitances.

Q.5 (a) How can we measure ICMR (Input Common Mode Range) of op-amp? Draw 07
two-stage CMOS op-amp circuit and explain its operation. Write expression
for the voltage gain of this circuit.
(b) Define slew rate and PSRR parameters of op-amp. Explain slewing 07
operation in simple op-amp with necessary circuit diagrams.
OR
Q.5 (a) How can we measure CMRR (Common Mode Rejection Ratio) of op-amp? 07
What do you understand by CMFB (Common Mode Feedback)? Draw
conceptual topology for common-mode feedback and explain its operation.
(b) Define Gain Margin and Phase Margin parameters. How can we measure 07
them from Bode plot? What do you understand by frequency compensation?
Discuss with necessary diagrams (Bode Plot) that how frequency
compensation can improve stability of a circuit.

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