EC33

RAMAIAH USN 1 M S
INSTITUTE OF
TECHNOLOGY

(Autonomous Institute, Affiliated to VTU)

Bangalore – 560 054

SEMESTER END EXAMINATIONS – JANUARY 2017

B.E : Electronics and Communication
Course & Branch : Semester : III
Engineering
Subject : Digital Electronics Circuits Max. Marks : 100
Subject Code : EC33 Duration : 3 Hrs

Instructions to the Candidates:

 Answer one full question from each unit.

UNIT - I
1. a) Explain the working of TTL NAND circuit. CO1 (07)
b) Simply the Boolean function F(a,b,c,d) = ∑m (6,7,9,10,13) CO1 (07)
+ dc (1,4,5,11,15) using K-map in Sop form and realize using NAND
gates.
c) Realize Full subtractor using DE-MUX. CO1 (06)

2. a) Define i) propagation delay ii) code converter iii) Noise margin. CO1 (06)
b) Implement the function F(a,b,c,d) = ∑(0,2,4,5,7,9,10,14) using mux CO1 (07)
with two 4 to 1 line mux with variables a & b connected to their select
lines in the first level & one 2 to 1 line mux with variable c connected
to its select line in the 2nd level.
c) Define Demux. Design 1:8 Demux using two 1:4 Demux. CO1 (07)

UNIT -II
3. a) Design an Excess-3 to BCD code converter. CO2 (06)
b) Write the condensed truth table for 4:2 priority encoder with a valid CO2 (06)
output where the highest priority is given to the lowest index and
obtain the minimum sum expressions for the outputs.
c) Draw the logic diagrams of the following and explain its operation: CO2 (08)
i) 3 bit by 2 bit binary multiplier
ii) 1 bit comparator.

4. a) Design Gray to Binary code converter. CO2 (06)

b) i) Implement the following function pairs using a decoder with un CO2 (06)
complemented outputs: f1= ∑m(0,2,4) & f2= ∑m(1,2,4,5,7)
ii) Design combinational circuit for 3 bit odd parity generator and
implement it using suitable examples.
c) Draw and explain the block diagram of 4 bit Binary Adder-Subtractor CO2 (08)
with examples.

UNIT - III
5. a) With neat diagram, function table & timing diagram explain the CO3 (10)
working of Master-Slave JK flip-flop.
b) Obtain the characteristic equation for D, SR & T flip flop. CO3 (06)
c) Differentiate between ring and Johnson counter. CO3 (04)

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EC33
6. a) With neat logic diagram, explain the operation of 4 bit SISO CO3 (10)
unidirectional shift register.
b) Convert i) SR to JK Flip -Flop ii) SR to T Flip –Flop. CO3 (06)
c) Differentiate between Moore and Mealy models. CO3 (04)

UNIT -IV
7. a) Explain the working of up/down counter. CO4 (06)
b) Design a Synchronous mod-6 counter with following sequence CO4 (06)
(0,2,3,6,5,1) using T- flip flop.
c) Analyze and obtain the logic diagram, next state table and state CO4 (08)
diagram of the sequential circuit that is specified by the flip flop input
equation TA=A+B,TB=A’+B.

8. a) Differentiate between Mealy and Moore machine model. CO4 (06)

b) Design a counter using JK FLIP FLOP, whose counting sequence is CO4 (10)
0-1-4-6-7-5-0-1----- etc, write the state transition table and draw its
logic diagram.
c) Explain sequential circuit. CO4 (04)

UNIT - V
9. a) Give the comparison between PROM, PLA and PAL. CO5 (06)
b) Explain with timing waveform, the read and write operations performed CO5 (06)
by RAM.
c) Construct a Mealy state diagram and state table that will detect a serial CO5 (08)
input sequence of 10110. The detection of the required bit pattern can
occur in a longer data string and the correct pattern can overlap with
another pattern. When the input pattern has been detected, cause an
output z to be asserted high.

10. a) Implement the following functions using PAL & PLA CO5 (10)
F1(A,B,C)= ∑m(1,2,4,6,7)
F2(A,B,C)= ∑m(2,4,5,6)
F3(A,B,C)= ∑m(1,4,6)
b) Reduce the state table shown in table below. It has nine states, a single input, CO5 (10)
and two output variables.
Present Next States
State X= 0 Z2 Z1 X= 1 Z2 Z1
0 0 0 0 1 0 0
1 4 0 0 2 0 0
2 7 0 0 1 0 0
3 2 0 1 6 1 0
4 6 1 0 5 0 0
5 5 0 1 4 1 1
6 1 0 1 6 1 0
7 3 1 0 8 0 0
8 8 0 1 7 1 1
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