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International Journal of Electronics

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Effect of etch holes on the capacitance

and pull-in voltage in MEMS tunable
capacitors
a a a a
Dong-Ming Fang , Xiu-Han Li , Quan Yuan & Hai-Xia Zhang
a
National Key Laboratory of Nano/Micro Fabrication Technology,
Institute of Microelectronics, Peking University, Beijing, 100871,
China
Published online: 25 Nov 2010.

To cite this article: Dong-Ming Fang , Xiu-Han Li , Quan Yuan & Hai-Xia Zhang (2010) Effect of etch
holes on the capacitance and pull-in voltage in MEMS tunable capacitors, International Journal of
Electronics, 97:12, 1439-1448, DOI: 10.1080/00207217.2010.488911

To link to this article: http://dx.doi.org/10.1080/00207217.2010.488911

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 International Journal of Electronics
Vol. 97, No. 12, December 2010, 1439–1448

Effect of etch holes on the capacitance and pull-in voltage in MEMS

tunable capacitors
Dong-Ming Fang, Xiu-Han Li, Quan Yuan and Hai-Xia Zhang*

National Key Laboratory of Nano/Micro Fabrication Technology, Institute of Microelectronics,

Peking University, Beijing 100871, China
(Received 14 October 2009; final version received 31 March 2010)
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Microelectromechanical systems (MEMS) tunable capacitors, switches or

actuators are widely applied in wireless communication systems. In the
fabrication process etch holes are used to release the sacrificial layer with
relatively large structures, which obviously affects the performance of devices.
However, most researchers neglect this effect during their designing of the
capacitors, switches or actuators. This article presents the theoretical calculation
of the capacitance of tunable capacitors with etch holes, and analyses the
deviation of the capacitance and pull-in voltage with different parameters such as
the length of the plates w, the length of the etch holes wh, the air gap between the
two plates d, and the number of the etch holes. To validate the theory in this
article, a tunable capacitor was fabricated by surface micromachined technology.
The theoretical results compare well with the experimental results.
Keywords: etch hole; tunable capacitor; MEMS; pull-in voltage

1. Introduction
Radio frequency (RF) components fabricated by microelectromechanical systems
(MEMS) technology such as switches, inductors, capacitors, phase shifters,
oscillators and resonators are utilised in today’s wireless communication systems.
Among these devices, the tunable capacitor plays an important role in RF circuits
used in or as on-chip matching networks, passive filters, voltage-controlled
oscillators, power amplifiers, radio transmitters and other tuning circuits for
electrostatic actuation and sensing. The parallel plate capacitor driven by
electrostatic force is one of the most common devices (Dec and Suyama 1998a,b,
2000a,b; Bakri-Kassem and Mansour 2004; Girbau, Lázaro and Pradell 2004;
Bakri-Kassem and Mansour 2006; Fang, Jing, Wang, Zhou and Zhao 2008), which
has been applied in microrelays (Sattler, Voigt, Pradel and Wachutka 2001),
micromirrors (Huanga et al. 2004), microactuators (Mou, Lu, Yang, Li and Guo
2004), microswitches (Rottenberg, Brebels, De Raedt, Nauwelaers and Tilmans
2004), micro position sensors (Lee, McConaghy, Sommargren, Krulevitch and
Campbell 2003), voltage controlled oscillators (Dec and Suyama 2000a), resonators
(Ahn, Guckel and Zook 2001), tunable filters (Pipilos, Tsividis, Fenk and Papananos
1996) and so on. For MEMS tunable parallel plate capacitors, etch holes play an

*Corresponding author. Email: zhanghx@pku.edu.cn

ISSN 0020-7217 print/ISSN 1362-3060 online

Ó 2010 Taylor & Francis
DOI: 10.1080/00207217.2010.488911
http://www.informaworld.com
 1440 D.-M. Fang et al.

important role in the fabrication process, ensuring rapid release of the sacrificial
layer and decreasing the damping effect. The etch holes have an effect not only on the
capacitance but also on the pull-in voltage of MEMS tunable capacitors. Proper
estimation of the pull-in voltage is very important in design because the pull-in
voltage is the threshold voltage when the external voltage is applied to the MEMS
tunable capacitors driven by electrostatic force. Otherwise, the tunable capacitors or
actuators will be destroyed or collapsed by the overloaded voltage. However, limited
work has been reported on the effect of etch holes on capacitance and pull-in voltage
in MEMS tunable capacitors. Elshurafa and El-Masry (2006) simulated the etch hole
properties of MEMS variable capacitors by using the finite element modelling
software COMSOL. Different sizes and densities of etch holes were created and
capacitances were extracted. The simulated capacitance was larger than the ideal
capacitance. But they did not fabricate tunable capacitors to validate their
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simulation. Shao and Palaniapan (2008) investigated the effect of etch holes on the
quality factors of bulk-mode micromechanical resonators. It was reported that the
resonator with etch holes had quality factors an order of magnitude lower than that
of the resonator without etch holes. Moreover, the location of the etch holes affected
the quality factor of the resonator. Fang, Myung, Nobe and Judy (2001) presented a
theoretical model for the coercivity as a function of etch hole geometry and density
and compared it with experimental results. This article presents the important design
consideration which is usually ignored but needs to be taken into account when
researchers design MEMS tunable parallel plate capacitors.

2. Modelling and formulations

Figure 1 is the schematic illustration of the electro-mechanical model of the tunable
parallel capacitor. When a dc voltage V is applied across the capacitor, the movable
plate is pulled down by the electrostatic force Fe to the fixed plate. As the applied dc
voltage reaches a critical value, the electrostatic force Fe may become higher than the
spring restoring force Fm and the movable plate, suspended via springs with an
effective constant km, snaps into contact with the fixed plate. This threshold voltage
is called ‘pull-in voltage’. For parallel plate tunable capacitors with air gap,
in traditional theory, the fringe effects or fringe fields are neglected. The ideal
capacitance and pull-in voltage for tunable parallel plate capacitors are given as

e0 A
Ct ¼ Cp ¼ ð1Þ
d

Figure 1. Electro-mechanical model of the tunable parallel capacitor.

 International Journal of Electronics 1441
sffiffiffiffiffiffiffiffiffiffi
8km
Vpi ¼ d ð2Þ
27Ct
where Ct is the total capacitance of the capacitor, Cp is the parallel plate
capacitance, A is the effective area of the plates, E0 is the dielectric constant of
the air, d is the gap between the plates, Vpi is the pull-in voltage, and km is the
effective constant of the springs or beams of the tunable capacitors. However,
given the lateral dimensions of the plates the etch holes are not negligible
compared to the small air gap between the capacitor plates (electrodes). So the
fringing fields are significant and must be accounted for when modelling the
capacitance and pull-in voltage of the tunable capacitors or the parallel plate
tunable capacitors discussed in this article.
Considering the fringing capacitance, Cf, the whole capacitance of the parallel
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plate capacitor is given by Equation (3) (Palmer 1927).

e0 w2 e0 w2 d d 2pw
Ct ¼ Cp þ Cf ¼ þ ½ þ lnð Þ ð3Þ
d d pw pw d
where w is the width of the square plates of the capacitor.
Equation (3) can be written as

e0 w2
Ct ¼ ð1 þ dÞ ð4Þ
d
where
d d 2pw
d¼ þ lnð Þ: ð5Þ
pw pw d
In the design of tunable capacitors or switches, their plates and the etch holes are
often square (see Figure 2) (Fang, Myung, Nobe and Judy 2001; Seok, Lee, Kim,
Kim and Chun 2005; Luo et al. 2006; Ozevin, WGreve, Oppenheim and Pessiki 2006;
Wang et al. 2006; Sumali, Massad, Czaplewski and Dyck 2007; Fang, Jing, Wang,
Zhou and Zhao 2008). Given that w is the length (width) of the square plate of the
tunable capacitor, wh is the width of the square etch holes and n 6 n is the total
number of the etch holes, the parallel plate capacitance of the capacitor with etch
holes can be calculated by the mirror method, as shown in Figure 2: plate 10 (P10 ) and

Figure 2. The model of calculating the capacitance of the plates with etch holes.
 1442 D.-M. Fang et al.

plate 1 (P1) are symmetrical as plate 2 (P2) is a ‘mirror’. The capacitance between P1
(with etch holes) and P10 (with etch holes), Chp-hp, is

Chphp ¼ Cmpmp  n2 Chh ð6Þ

e0 w2
Cmpmp ¼ ð1 þ dmpmp Þ ð7Þ
2d

2d 2d pw
dmpmp ¼ þ lnð Þ ð8Þ
pw pw d

e0 w2h
Chh ¼ ð1 þ dhh Þ ð9Þ
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2d

2d 2d pwh
dhh ¼ þ lnð Þ ð10Þ
pwh pwh d

where Cmp-mp is the capacitance between metal P1 (without etch holes) and metal P10
(without etch holes), Ch-h is the capacitance between the two positive aligned
etch holes. Because the capacitance between metal P1 (with etch holes) and metal P2,
Chp-mp, is
1 1 1
¼ þ ð11Þ
Chpmp Chphp Chphp

then the final total capacitance of the capacitor with etch holes is

CTeh ¼ Chpmp ¼ 2Chphp ¼ CT þ CF ð12Þ

w2 e0 n2 w2h
CT ¼ e0  ð13Þ
d d

e0 w 2 e0 n2 w2h
CF ¼ dmpmp  dhh ð14Þ
d d
and the pull-in voltage in Equation (2) should be written as
sffiffiffiffiffiffiffiffiffiffiffiffiffiffi
8km
Vpieh ¼ d ð15Þ
27CTeh

Defining a and b are the deviation of the capacitance and pull-in voltage,
respectively, written as

CTeh  CT
a¼ ð16Þ
CT

Vpi  Vpieh
b¼ ð17Þ
Vpi
 International Journal of Electronics 1443

then the designers of MEMS tunable capacitors, according to Equations (6)–(17),

can optimise the geometrical size of the parallel plates with etch holes and can
estimate the effect of the etch holes on the capacitance and pull-in voltage of the
tunable capacitors compared to traditional theory.

3. Numerical analysis and validation

To analyse the effects of the etch holes on the capacitance and pull-in voltage of a
parallel plate tunable capacitor, numerical analysis of some examples about the etch
holes are given.
Figure 3 is the values of dmp-mp(dh-h) as d/w (d/wh) increases. As expected, when d/
w increases, if the fringing effect is considered, the total capacitance of two metal
plates without etch holes is larger then the ideal capacitance. For example, if
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d ¼ 3 mm and w ¼ 600 mm, the capacitance caused by the fringing effect will be
about 2.4% of the total capacitance. However, as d/w increases, the value of w2/d in
Equation (7) decreases, resulting in the capacitance caused by the fringing effect
decreasing. The same for the plates with etch holes: if d/wh increases, the capacitance
caused by the etch holes will be decreased and its quotient in the total capacitance
will be decreased.
Figure 4 shows the values of a and b as d increases when the length (width) w of
the tunable capacitor is 600 mm and n is 5. If the gap between the plates, d, is given,
the deviation of the capacitance and the pull-in voltage will be increased as the length
(width) wh of the etch hole increases. For example, if d ¼ 3mm, when wh varies from
5 to 15 mm, the deviation of the capacitance, a, changes from 2.7 to 5.7%, while the
deviation of the pull-in voltage, b, changes from 1.55 to 2.7%. It is obvious that
when n increases, a and b increase, which can be seen from Figure 5. In Figure 5, it
seems that when n is smaller then 12, the deviation of the capacitance, a, is no more
then 10% and the deviation of the pull-in voltage, b, is no more then 4%. However,
the values of a and b increase rapidly with the increasing of n over 12. If n is big

Figure 3. The values of dmp-mp(dh-h) as d/w (d/wh) increases.

 1444 D.-M. Fang et al.
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Figure 4. The values of a and b as d increases (w ¼ 600 mm, n ¼ 5).

Figure 5. The values of a and b as n increases (w ¼ 600 mm, d ¼ 3 mm).

enough and wh is proper for the given w, the values of a and b can arrive at about
30% and 12.5%, respectively. This must be considered when researchers design
tunable capacitors, otherwise the pull-in voltage in fact will exceed the designed pull-
in voltage, which will result in the failure or breakage of the fabricated tunable
capacitor.
Figure 6 shows the deviation of the capacitance, a, versus d/w and wh/w and
Figure 7 shows the deviation of the pull-in voltage, b, versus d/w and wh/w. From
Figures 6 and 7, it can be seen that when d/w increases, a and b obviously increase
while a and b increase slowly when wh/w increases. As the number of etch holes
increases, the deviation of the capacitance a and the deviation of the pull-in voltage b
will increase.
To validate the theory of the effect of the etch holes on the capacitance and
pull-in voltage of tunable capacitors, a validation test upon a fabricated tunable
capacitor was devised. Figure 8 is the SEM photo of the fabricated tunable
capacitor. The tunable capacitor was made by using MEMS surface micro-
machined technology. First, a Cr/Cu seed layer for electroplating was sputtered
 International Journal of Electronics 1445
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Figure 6. The deviation of the capacitance, a, versus d/w and wh /w.

Figure 7. The deviation of the pull-in voltage, b, versus d/w and wh /w.

Figure 8. SEM photo of the fabricated tunable capacitor.

 1446 D.-M. Fang et al.

Table 1. Comparison of a and b measured and in this work.

Ct ¼ 0.7304 pF, Vpi ¼ 16.0 V

CTeh Vpieh a b
Measured 0.7616pF 15.5 0.043 0.030
In this work 0.7557pF 15.72V 0.035 0.016

onto the wafer and it was spin-coated with a positive photoresist with a thickness
of 5 mm, then the patterns were transferred and the bottom plate, probe contact
pads and ground plane were electroplated with 2 mm of nickel. Second, the 5 mm
photoresist was removed by using acetone and a second layer 5 mm positive
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photoresist layer was spin-coated on, then the pillar (anchor) patterns were formed
and the moulds were electroplated with 5 mm. Third, the 5 mm of nickel photoresist
was removed, the seed layer was dry etched and 5 mm of Al2O3 as sacrificial layer
was sputtered on. After that, the Al2O3 was fine polished until the pillars (anchors)
were exposed. Fourth, a new seed layer was sputtered onto the fine polished Al2O3
and a third layer of 5 mm positive photoresist was spin-coated onto the seed layer,
then the patterns were transferred and the top plate and four T-shape beams were
electroplated with 3 mm of nickel. Finally, the third layer photoresist was removed
by maskless exposure, the new seed layer was dry etched and the 5 mm Al2O3 was
removed by using KOH solution, then the capacitor was completely fabricated.
The comparison of a and b measured and in this work are given in Table 1.The
ideal capacitance and pull-in voltage in traditional theory are 0.7304 pF and
16.0 V. The measured capacitance and pull-in voltage are 0.7616 pF and 15.5 V.
The deviation of the capacitance a and the pull-in voltage b are 3.5% and 1.6%.
The deviation of the pull-in voltage b, 1.6% in this work is a little smaller than the
measured result of 3%. The reason is that the pull-in voltage increases a little then
that of ideal pull-in voltage because of the nonlinear deformation of the movable
plate of the tunable capacitor when the voltage was applied across the two plates.

4. Conclusions
A detailed model for calculating the capacitance of tunable capacitors with etch
holes and the effect of etch holes on the capacitance and pull-in voltage are
performed. It shows that using the proposed model in the design of a MEMS
capacitor will reduce the design error and improve the accuracy of results for new
designs. Validation of the proposed model for computing the deviation of the
capacitance and pull-in voltage shows that the ideal values of the capacitor and pull-
in voltage differ from the modelling results. Other effects of the tunable capacitor,
such as parasitic and nonlinear information of the moveable plate, need to be
investigated further.

Acknowledgements
This work was supported by China Postdoctoral Science Foundation (No.200902004), Fund
of National Key Laboratory of Nano/Micro Fabrication Technology (9140C7901080902) and
National High Technology Research and Development Program of China (2006AA04Z359).
 International Journal of Electronics 1447

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