INDUS UNIVERSITY, KARACHI

MICROPROCESSOR 8086
Adeena Firdous, Hasham Hanif, Hashaam
Faculty of Engineering Science and Technology, Computer Science Department Indus
university Karachi, Pakistan

Introduction to 8086:
8086 Microprocessor is an enhanced version of 8085Microprocessor that was
designed by Intel in 1976. It is a 16-bit Microprocessor having 20 address lines
and16 data lines that provides up to 1MB storage. It consists of powerful
instruction set, which provides operations like multiplication and division easily.
It supports two modes of operation, i.e. Maximum mode and Minimum mode.
Maximum mode is suitable for system having multiple processors and Minimum
mode is suitable for system having a single processor.
Features
The most prominent features of a 8086 microprocessor are as follows:
 It has an instruction queue, which is capable of storing six instruction bytes
from the memory resulting in faster processing.
 It was the first 16-bit processor having 16-bit ALU, 16-bit registers, internal
data bus, and 16-bit external data bus resulting in faster processing.
 It is available in 3 versions based on the frequency of operation −
o 8086 → 5MHz
o 8086-2 → 8MHz
o (c)8086-1 → 10 MHz
 It uses two stages of pipelining, i.e. Fetch Stage and Execute Stage, which
improves performance.
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 Fetch stage can prefetch up to 6 bytes of instructions and stores them in

the queue.
 Execute stage executes these instructions.
 It has 256 vectored interrupts.
 It consists of 29,000 transistors.
Architecture:
I. Bus Interface Unit (BIU):
This unit handles all transfer of data and addresses on the buses for the EU
(execution unit). This unit sends out addresses, fetches instructions from
memory, reads data from ports and memory and writes data to ports and
memory.
Different parts of BIU:

 Segment Register
 Segment Register:- BIU contains four 16-bit segment registers as
follows:

Code segment (CS) register

Stack segment (SS) register
Extra segment (ES) register
Data segment (DS) register

Function of Segment Register:

 In 8086 complete 1MB memory is divided into 16 logical segments.

 Each segment thus contains 64 KB of memory.

 While addressing any location in the memory bank, the Physical address
is calculated from two parts, the first part is Segment address, and the
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second is offset.

 The segment registers contain 16-bit segment base addresses related to

different segments. Thus the CS, DS, ES, SS segment registers,
respectively contain the segment addresses for the Code, Data, Extra
and Stack segments.

 They may or may not be physical separated.

 Each segment register contains a 16-bit base address that points to the
lowest-addressed byte of that particular segment in memory.
 Instruction Pointer Register:
It is 16-bit register, which identifies the location of the next word of instruction
code that is to be fetched in the current code segment. IP contains an offset
instead of the actual address of the next instruction. The 20-bit address produced
after addition of the offset stored in IP to segment base address in the CS is called
the Physical address of the code byte.

 The Queue:
The last section of BIU is the FIFO group of registers called a queue. It is basically
a group of registers. This arrangement makes possible for the BIU to fetch the
instruction byte while EU is decoding an instruction or executing an instruction
which does not require use of buses. This arrangement is called pipelining. This
is done to speed up the program execution.

II. Execution Unit(EU)

Execution unit gives instructions to BIU stating from where to fetch the data
and then decode and execute those instructions. Its function is to control
operations on data using the instruction decoder & ALU. EU has no direct
connection with system buses, it performs operations over data through BIU.
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III. Register
General purpose registers are used to store temporary data within the
microprocessor. There are 8 general purpose registers in 8086 microprocessor.

Memory Organization
As far as we know 8086 is 16-bit processor that can supports 1Mbyte (i.e. 20-bit
address bus: 220) of external memory over the address range 0000016 to
FFFFF16. The 8086 organizes memory as individual bytes of data. The 8086 can
access any two consecutive bytes as a word of data. The lower-addressed byte is
the least significant byte of the word, and the higher- addressed byte is its most
significant byte.

Figure: Part of 1 Mbyte Memory

INDUS UNIVERSITY, KARACHI

The above figure represents: storage location of address 0000916 contains the
value 716, while the location of address 0001016 contains the value 7D16. The
16-bit word 225A16is stored in the locations 0000C16 to 0000D16

The word of data is at an even-address boundary (i.e. address of least significant

byte is even) is called aligned word. The word of data is at an odd-address
boundary is called misaligned word, as shown in Figure below.

Figure: Aligned and misaligned word

To store double word four locations are needed. The double word that it’s least
significant byte address is a multiple of 4 (e.g. 0 16, 416, 816 ...) is called aligned
double word. The double word at address of non-multiples of 4 is called
misaligned double word shown in Figure below.

Figure: Aligned and misaligned double word

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Working of 8086:
1. Once inside the BIU, the instruction is passed to the queue.
2. Assuming that the queue is initially empty, the EU immediately draws this
instruction from the queue and begins execution.
3. While the EU is executing this instruction, the BIU proceeds to fetch a new
instruction. Depending on the execution time of the first instruction, the
BIU may fill the queue with several new instructions before the EU is ready
to draw its next instruction.
4. Assuming that the queue is initially empty, the EU immediately draws this
instruction from the queue and begins execution.
5. While the EU is executing this instruction, the BIU proceeds to fetch a new
instruction. Depending on the execution time of the first instruction, the
BIU may fill the queue with several new instructions before the EU is ready
to draw its next instruction.
The BIU is programmed to fetch a new instruction whenever the queue has room
for two additional bytes. There are three conditions that will cause the EU to
enter a "wait" mode or BIU to suspend fetching.

1. The first one occurs when the instruction requires access to a memory
location. Here the BIU must suspend fetching instructions and output the
address of this memory location. Then the EU will resume execution.
2. The second will occur when the instruction to be executed is a "jump"
instruction. In this case control is to be transferred to a new non-sequential
address.
3. The third one will occur during the execution of an instruction that is slow
to execute. For example; the instruction AAM (ASCII Adjust for
Multiplication) requires 83 clock cycles to complete. At four cycles per
instruction fetch, the queue will be completely filled during the execution
of this single instruction.
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Emulator 8086:
8086 Microprocessor Emulator, also known as EMU8086, is an emulator of the
program 8086 microprocessor. It is developed with a built-in 8086 assembler. This
application is able to run programs on both PC desktops and laptops. This tool is
primarily designed to copy or emulate hardware. These include the memory of a
program, CPU, RAM, input and output devices, and even the display screen.

There are instructions to follow when using this emulator. It can be executed into
one of the two ways: backward or forward. There are also examples of assembly
source code included. With this, it allows the programming of assembly language,
reverse engineering, hardware architecture, and creating miniature operating
system (OS).

The user interface of 8086 Microprocessor Emulator is simple and easy to

manage. There are five major buttons with icons and titles included. These are
“Load”, “Reload”, “Step Back”, “Single Step”, and “Run”. Above those buttons is
the menu that includes “File”, “View”, “Virtual Devices”, “Virtual Drive”, and
“Help”. Below the buttons is a series of choices that are usually in numbers and
codes. At the leftmost part is an area called “Registers” with an indication of
either “H” or “L”. The other side is divided into two, which enables users to
manually reset, debug, flag, etc.

Future of Microprocessor:
Microprocessors—single-chip computers—are the building blocks of the
information world. Their performance has grown 1,000-fold over the past 20
years, driven by transistor speed and energy scaling, as well as by
microarchitecture advances that exploited the transistor density gains from
Moore's Law. In the next two decades, diminishing transistor-speed scaling and
practical energy limits create new challenges for continued performance scaling.
As a result, the frequency of operations will increase slowly, with energy the key
limiter of performance, forcing designs to use large-scale parallelism,
heterogeneous cores, and accelerators to achieve performance and energy
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efficiency. Software-hardware partnership to achieve efficient data orchestration

is increasingly critical in the drive toward energy-proportional computing.
Our aim here is to reflect and project the macro trends shaping the future of
microprocessors and sketch in broad strokes where processor design is going. We
enumerate key research challenges and suggest promising research directions.
Since dramatic changes are coming, we also seek to inspire the research
community to invent new ideas and solutions address how to sustain computing's
exponential improvement.
Cost Of Microprocessor 8086
If the 8086 had one drawback, it was the price. The first version of the 8086 sold
for $360. In 2008 dollars, that translates to over $1,200 — four times the cost of
an Intel Core 2 Quad Q6700. But the present cost of microprocessor 8086 is
$86.65.

Conclusion
Growth is tremendous. the speed of microprocessor in increasing day by day
architecture has been reduced to very small,22nm. Microprocessor are also used
in various devices like mobile ,watches, ATM, cameras. Much more in upcoming
years.
References
1. https://www.slideshare.net/adeel02/intel-microprocessors-8086-documentation
2. https://www.tutorialspoint.com/microprocessor/microprocessor_8086_functional_units.htm
3. http://8086microprocessor4u.blogspot.com/2012/12/bus-interface-unit-biu.html