Led TV LG 32ls3500

Internal Use Only
North/Latin America http://aic.lgservice.com

Europe/Africa http://eic.lgservice.com
Asia/Oceania http://biz.lgservice.com
LED LCD TV
SERVICE MANUAL
CHASSIS : LC21C
MODEL : 32LS3500
MODEL : 32LS3500-CA
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
P/NO : MFL67360705(1204-REV00) Printed in China
Downloaded from www.Manualslib.com manuals search engine

CONTENTS
CONTENTS .............................................................................................. 2
SAFETY PRECAUTIONS ........................................................................ 3
SERVICING PRECAUTIONS ................................................................... 4
SPECIFICATION ...................................................................................... 5
ADJUSTMENT INSTRUCTION ............................................................... 9
BLOCK DIAGRAM ................................................................................. 17
EXPLODED VIEW .................................................................................. 19
SCHEMATIC CIRCUIT DIAGRAM ..............................................................
Copyright © LG Electronics. Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes

SAFETY PRECAUTIONS
IMPORTANT SAFETY NOTICE

Many electrical and mechanical parts in this chassis have special safety-related characteristics. These parts are identified by in the
Schematic Diagram and Exploded View.
It is essential that these special safety parts should be replaced with the same components as recommended in this manual to prevent
Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
General Guidance Leakage Current Hot Check (See below Figure)

Plug the AC cord directly into the AC outlet.
An isolation Transformer should always be used during the
servicing of a receiver whose chassis is not isolated from the AC Do not use a line Isolation Transformer during this check.
power line. Use a transformer of adequate power rating as this Connect 1.5 K / 10 watt resistor in parallel with a 0.15 uF capacitor
protects the technician from accidents resulting in personal injury between a known good earth ground (Water Pipe, Conduit, etc.)
from electrical shocks. and the exposed metallic parts.
Measure the AC voltage across the resistor using AC voltmeter
It will also protect the receiver and it's components from being with 1000 ohms/volt or more sensitivity.
damaged by accidental shorts of the circuitry that may be Reverse plug the AC cord into the AC outlet and repeat AC voltage
inadvertently introduced during the service operation. measurements for each exposed metallic part. Any voltage
measured must not exceed 0.75 volt RMS which is corresponds to
If any fuse (or Fusible Resistor) in this TV receiver is blown, 0.5 mA.
replace it with the specified. In case any measurement is out of the limits specified, there is
possibility of shock hazard and the set must be checked and
When replacing a high wattage resistor (Oxide Metal Film Resistor, repaired before it is returned to the customer.
over 1 W), keep the resistor 10 mm away from PCB.
Leakage Current Hot Check circuit
Keep wires away from high voltage or high temperature parts.
Before returning the receiver to the customer,
always perform an AC leakage current check on the exposed

metallic parts of the cabinet, such as antennas, terminals, etc., to
be sure the set is safe to operate without damage of electrical
shock.
Leakage Current Cold Check(Antenna Cold Check)

With the instrument AC plug removed from AC source, connect an
electrical jumper across the two AC plug prongs. Place the AC
switch in the on position, connect one lead of ohm-meter to the AC
plug prongs tied together and touch other ohm-meter lead in turn to
each exposed metallic parts such as antenna terminals, phone
jacks, etc.
If the exposed metallic part has a return path to the chassis, the
measured resistance should be between 1 MΩ and 5.2 MΩ.
When the exposed metal has no return path to the chassis the
reading must be infinite.
An other abnormality exists that must be corrected before the
receiver is returned to the customer.

SERVICING PRECAUTIONS
CAUTION: Before servicing receivers covered by this service 2. After removing an electrical assembly equipped with ES
manual and its supplements and addenda, read and follow the devices, place the assembly on a conductive surface such as
SAFETY PRECAUTIONS on page 3 of this publication. aluminum foil, to prevent electrostatic charge buildup or expo-
NOTE: If unforeseen circumstances create conflict between the sure of the assembly.
following servicing precautions and any of the safety precautions 3. Use only a grounded-tip soldering iron to solder or unsolder ES
on page 3 of this publication, always follow the safety precautions. devices.
Remember: Safety First. 4. Use only an anti-static type solder removal device. Some solder
removal devices not classified as “anti-static” can generate
General Servicing Precautions electrical charges sufficient to damage ES devices.
1. Always unplug the receiver AC power cord from the AC power 5. Do not use freon-propelled chemicals. These can generate
source before; electrical charges sufficient to damage ES devices.
a. Removing or reinstalling any component, circuit board mod- 6. Do not remove a replacement ES device from its protective
ule or any other receiver assembly. package until immediately before you are ready to install it.
b. Disconnecting or reconnecting any receiver electrical plug or (Most replacement ES devices are packaged with leads electri-
other electrical connection. cally shorted together by conductive foam, aluminum foil or
c. Connecting a test substitute in parallel with an electrolytic comparable conductive material).
capacitor in the receiver. 7. Immediately before removing the protective material from the
CAUTION: A wrong part substitution or incorrect polarity leads of a replacement ES device, touch the protective material
installation of electrolytic capacitors may result in an explo- to the chassis or circuit assembly into which the device will be
sion hazard. installed.
2. Test high voltage only by measuring it with an appropriate CAUTION: Be sure no power is applied to the chassis or circuit,
high voltage meter or other voltage measuring device (DVM, and observe all other safety precautions.
FETVOM, etc) equipped with a suitable high voltage probe. 8. Minimize bodily motions when handling unpackaged replace-
Do not test high voltage by "drawing an arc". ment ES devices. (Otherwise harmless motion such as the
3. Do not spray chemicals on or near this receiver or any of its brushing together of your clothes fabric or the lifting of your
assemblies. foot from a carpeted floor can generate static electricity suf-
4. Unless specified otherwise in this service manual, clean ficient to damage an ES device.)
electrical contacts only by applying the following mixture to the
contacts with a pipe cleaner, cotton-tipped stick or comparable General Soldering Guidelines
non-abrasive applicator; 10 % (by volume) Acetone and 90 % 1. Use a grounded-tip, low-wattage soldering iron and appropriate
(by volume) isopropyl alcohol (90 % - 99 % strength) tip size and shape that will maintain tip temperature within the
CAUTION: This is a flammable mixture. range or 500 °F to 600 °F.
Unless specified otherwise in this service manual, lubrication of 2. Use an appropriate gauge of RMA resin-core solder composed
contacts in not required. of 60 parts tin/40 parts lead.
5. Do not defeat any plug/socket B+ voltage interlocks with which 3. Keep the soldering iron tip clean and well tinned.
receivers covered by this service manual might be equipped. 4. Thoroughly clean the surfaces to be soldered. Use a mall wire-
6. Do not apply AC power to this instrument and/or any of its bristle (0.5 inch, or 1.25 cm) brush with a metal handle.
electrical assemblies unless all solid-state device heat sinks are Do not use freon-propelled spray-on cleaners.
correctly installed. 5. Use the following unsoldering technique
7. Always connect the test receiver ground lead to the receiver a. Allow the soldering iron tip to reach normal temperature.
chassis ground before connecting the test receiver positive (500 °F to 600 °F)
lead. b. Heat the component lead until the solder melts.
Always remove the test receiver ground lead last. c. Quickly draw the melted solder with an anti-static, suction-
8. Use with this receiver only the test fixtures specified in this type solder removal device or with solder braid.
service manual. CAUTION: Work quickly to avoid overheating the circuit
CAUTION: Do not connect the test fixture ground strap to any board printed foil.
heat sink in this receiver. 6. Use the following soldering technique.
a. Allow the soldering iron tip to reach a normal temperature
Electrostatically Sensitive (ES) Devices (500 °F to 600 °F)
Some semiconductor (solid-state) devices can be damaged eas- b. First, hold the soldering iron tip and solder the strand against
ily by static electricity. Such components commonly are called the component lead until the solder melts.
Electrostatically Sensitive (ES) Devices. Examples of typical ES c. Quickly move the soldering iron tip to the junction of the
devices are integrated circuits and some field-effect transistors component lead and the printed circuit foil, and hold it there
and semiconductor “chip” components. The following techniques only until the solder flows onto and around both the compo-
should be used to help reduce the incidence of component dam- nent lead and the foil.
age caused by static by static electricity. CAUTION: Work quickly to avoid overheating the circuit
1. Immediately before handling any semiconductor component or board printed foil.
semiconductor-equipped assembly, drain off any electrostatic d. Closely inspect the solder area and remove any excess or
charge on your body by touching a known earth ground. Alter- splashed solder with a small wire-bristle brush.
natively, obtain and wear a commercially available discharging
wrist strap device, which should be removed to prevent poten-
tial shock reasons prior to applying power to the unit under test.

IC Remove/Replacement 3. Solder the connections.
Some chassis circuit boards have slotted holes (oblong) through CAUTION: Maintain original spacing between the replaced
which the IC leads are inserted and then bent flat against the cir- component and adjacent components and the circuit board to
cuit foil. When holes are the slotted type, the following technique prevent excessive component temperatures.
should be used to remove and replace the IC. When working with
boards using the familiar round hole, use the standard technique Circuit Board Foil Repair
as outlined in paragraphs 5 and 6 above. Excessive heat applied to the copper foil of any printed circuit
board will weaken the adhesive that bonds the foil to the circuit
Removal board causing the foil to separate from or "lift-off" the board. The
1. Desolder and straighten each IC lead in one operation by following guidelines and procedures should be followed whenever
gently prying up on the lead with the soldering iron tip as the this condition is encountered.
solder melts.
2. Draw away the melted solder with an anti-static suction-type At IC Connections
solder removal device (or with solder braid) before removing To repair a defective copper pattern at IC connections use the
the IC. following procedure to install a jumper wire on the copper pattern
Replacement side of the circuit board. (Use this technique only on IC connec-
1. Carefully insert the replacement IC in the circuit board. tions).
2. Carefully bend each IC lead against the circuit foil pad and
solder it. 1. Carefully remove the damaged copper pattern with a sharp
3. Clean the soldered areas with a small wire-bristle brush. knife. (Remove only as much copper as absolutely necessary).
(It is not necessary to reapply acrylic coating to the areas). 2. carefully scratch away the solder resist and acrylic coating (if
used) from the end of the remaining copper pattern.
"Small-Signal" Discrete Transistor 3. Bend a small "U" in one end of a small gauge jumper wire and
Removal/Replacement carefully crimp it around the IC pin. Solder the IC connection.
1. Remove the defective transistor by clipping its leads as close 4. Route the jumper wire along the path of the out-away copper
as possible to the component body. pattern and let it overlap the previously scraped end of the
2. Bend into a "U" shape the end of each of three leads remaining good copper pattern. Solder the overlapped area and clip off
on the circuit board. any excess jumper wire.
3. Bend into a "U" shape the replacement transistor leads.
4. Connect the replacement transistor leads to the corresponding At Other Connections
leads extending from the circuit board and crimp the "U" with Use the following technique to repair the defective copper pattern
long nose pliers to insure metal to metal contact then solder at connections other than IC Pins. This technique involves the
each connection. installation of a jumper wire on the component side of the circuit
board.
Power Output, Transistor Device
Removal/Replacement 1. Remove the defective copper pattern with a sharp knife.
1. Heat and remove all solder from around the transistor leads. Remove at least 1/4 inch of copper, to ensure that a hazardous
2. Remove the heat sink mounting screw (if so equipped). condition will not exist if the jumper wire opens.
3. Carefully remove the transistor from the heat sink of the circuit 2. Trace along the copper pattern from both sides of the pattern
board. break and locate the nearest component that is directly con-
4. Insert new transistor in the circuit board. nected to the affected copper pattern.
5. Solder each transistor lead, and clip off excess lead. 3. Connect insulated 20-gauge jumper wire from the lead of the
6. Replace heat sink. nearest component on one side of the pattern break to the lead
of the nearest component on the other side.
Diode Removal/Replacement Carefully crimp and solder the connections.
1. Remove defective diode by clipping its leads as close as pos- CAUTION: Be sure the insulated jumper wire is dressed so the
sible to diode body. it does not touch components or sharp edges.
2. Bend the two remaining leads perpendicular y to the circuit
board.
3. Observing diode polarity, wrap each lead of the new diode
around the corresponding lead on the circuit board.
4. Securely crimp each connection and solder it.
5. Inspect (on the circuit board copper side) the solder joints of
the two "original" leads. If they are not shiny, reheat them and if
necessary, apply additional solder.
Fuse and Conventional Resistor

Removal/Replacement
1. Clip each fuse or resistor lead at top of the circuit board hollow
stake.
2. Securely crimp the leads of replacement component around
notch at stake top.

SPECIFICATION
NOTE : Specifications and others are subject to change without notice for improvement.
1. Application range 3. Test method

This specification is applied to the LCD TV used LC21C 1) Performance: LGE TV test method followed
chassis. 2) Demanded other specification
- Safety : CE, IEC specification
- EMC : CE, IEC
2. Requirement for Test - Wireless : Wireless HD Specification (Option)
Each part is tested as below without special appointment.
1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C

2) Relative Humidity: 65 % ± 10 %
3) Power Voltage
: Standard input voltage (AC 100-240 V~, 50/60 Hz)
* Standard Voltage of each products is marked by models.
4) Specification and performance of each parts are followed
each drawing and specification by part number in
accordance with BOM.
5) The receiver must be operated for about 20 minutes prior to
the adjustment.
4. Model General Specification
No. Item Remarks
HONG KONG
1. Market
(PAL/DTMB Market)
1) PAL-DK
2) PAL-I
2. Broadcasting system
3) NTSC-M
4) DVB-C 5)DTMB
► DTMB
3. ( Carrier , Code Rate , Constellation , Frame Header ,
Interleaving )*. China
- MODE1 : 3780 , 0.4 , 16QAM , PN945 , 720 , 9.626Mbps
Receiving system Analog : Upper Heterodyne - MODE2 : 1 , 0.8 , 4QAM , PN595 , 720 , 10.396Mbps
Digital : COFDM,QAM - MODE3 : 3780 , 0.6 , 16QAM , PN945 , 720 , 14.438Mbps
- MODE4 : 1 , 0.8 , 16QAM , PN595 , 720 , 20.791Mbps
- MODE5 : 3780 , 0.8 , 16QAM , PN420 , 720 , 21.658Mbps
- MODE6 : 3780 , 0.6 , 64QAM , PN420 , 720 , 24.365Mbps
- MODE7 : 1 , 0.8 , 32QAM , PN595 , 720 , 25.989Mbps
*. HONG KONG
- MODE : 3780 , 0.4/0.6 , 4/16/64QAM , PN945 , 720
QPSK : 1/2, 2/3, 3/4, 5/6, 7/8
16-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
64-QAM : 1/2, 2/3, 3/4, 5/6, 7/8
► DVB-C
- Symbolrate :
4.0Msymbols/s to 7.2Msymbols/s
- Modulation :
16QAM, 64-QAM, 128-QAM and 256-QAM
4 Video Input RCA(1EA) PAL,NTSC

REAR 1EA
5. Component Input Y/Cb/Cr, Y/Pb/Pr
6. RGB Input RGB-PC Analog(D-SUB 15PIN)
HDMI1-DTV/DVI, PC(HDMI version 1.3)
7. HDMI Input
HDMI3-DTV/DVI, Support HDCP
8. Audio Input RGB/DVI Audio, AV, Component L/R Input
9. SPDIF out SPDIF out
FEMF, DivX HD, For SVC (download)
10 USB Input JPEG, MP3, DivX HD
11 Lan Jack

5. Component Video Input (Y, Cb/Pb, Cr/Pr)
No. Resolution H-freq(kHz) V-freq(Hz) Porposed
1 720×480 15.73 60.00 SDTV, DVD 480i
2 720×480 15.63 59.94 SDTV, DVD 480i
3 720×480 31.47 59.94 480p
4 720×480 31.50 60.00 480p
5 720×576 15.625 50.00 SDTV, DVD 625 Line
6 720×576 31.25 50.00 HDTV 576p
7 1280×720 45.00 50.00 HDTV 720p
8 1280×720 44.96 59.94 HDTV 720p
9 1280×720 45.00 60.00 HDTV 720p
10 1920×1080 31.25 50.00 HDTV 1080i
11 1920×1080 33.75 60.00 HDTV 1080i
12 1920×1080 33.72 59.94 HDTV 1080i
13 1920×1080 56.250 50 HDTV 1080p
14 1920×1080 67.5 60 HDTV 1080p
6. RGB input (PC)

No. Resolution H-freq(kHz) V-freq.(Hz) Proposed Remark
1 640*350 31.47 70.09 EGA
2 720*400 31.468 70.08 VESA(VGA)
3 640*480 31.469 59.94 VESA(SVGA)
4 800*600 37.879 60.31 VESA(XGA)

5 1024*768 48.363 60.00 VESA
1152*864 54.348 60.053 VESA
7 1360*768 47.72 59.8 VESA(WXGA)
8 1920*1080 66.587 59.93 WUXGA(CEA 861D) FHD only

7. HDMI Input
7.1. DTV mode
No. Resolution H-freq(kHz) V-freq.(kHz) Proposed Proposed
1. 720*480 31.469 / 31.5 59.94 / 60 27.00/27.03 SDTV 480P
2. 720*576 31.25 50 54 SDTV 576P
3. 1280*720 37.500 50 74.25 HDTV 720P
4. 1280*720 44.96 / 45 59.94 / 60 74.17/74.25 HDTV 720P
5. 1920*1080 33.72 / 33.75 59.94 / 60 74.17/74.25 HDTV 1080I
6. 1920*1080 28.125 50.00 74.25 HDTV 1080I
7. 1920*1080 26.97 / 27 23.97 / 24 74.17/74.25 HDTV 1080P
8. 1920*1080 33.716/ 33.75 29.976/30.00 74.25 HDTV 1080P
9. 1920*1080 56.250 50 148.5 HDTV 1080P
10. 1920*1080 67.43 / 67.5 59.94 / 60 148.35/148.50 HDTV 1080P
7.2. PC mode
No. Resolution H-freq(kHz) V-freq.(Hz) Proposed Remark
1 640*350 31.47 70.09 EGA
2 720 x 400 31.468 70.08 DOS
3 640 x 480 31.469 59.94 VESA
4 800 x 600 37.879 60.31 VESA
5 1024 x 768 48.363 60.00 VESA(XGA)
6 1360 x 768 47.712 59.8 WXGA
7 1280 x 1024 63.595 60.0 SXGA
8 1920 x 1080 67.5 60.0 WUXGA FHD only(support to RGB-PC)

ADJUSTMENT INSTRUCTION
1. Application *
1.1 This spec sheet is applied all of the LCD TV with LB21A/B/C chassis.
1.2 Main manufacturing type

l SET (O)
l SKD (O)
l CKD (O)
2. Designation
2.1 The adjustment is according to the order which is designated and which must be followed, according to the plan
which can be changed only on agreeing.
2.2. Power adjustment : Free Voltage.
2.3. Magnetic Field Condition: Nil.
2.4. Input signal Unit: Product Specification Standard.
2.5. Reserve after operation : Above 5 Minutes (Heat Run)
Temperature : at 25℃±5°C
Relative humidity : 65 ±10%
Input voltage : 220V, 60Hz
2.6. Adjustment equipments : Color Analyzer(CA-210 or CA-110), DDC Adjustment Jig, SVC remote controller.
2.7 Push The “IN STOP KEY” – For memory initialization.
Case1 : Software version up
1. After downloading S/W by USB , TV set will reboot automatically
2. Push “In-stop” key
3. Push “Power on” key
4. Function inspection
5. After function inspection, Push “In-stop” key.
Case2 : Function check at the assembly line
1. When TV set is entering on the assembly line, Push “In-stop” key at first.
2. Push “Power on” key for turning it on.
è If you push “Power on” key, TV set will recover channel information by itself.
3. After function inspection, Push “In-stop” key.

3. Main PCB check process
* APC - After Manual-Insert, executing APC
* Boot file Download

1. Execute ISP program “Mstar ISP Utility” and then click “Config” tab.
2. Set as below, and then click “Auto Detect” and check “OK” message
If “Error” is displayed, Check connection between computer, jig, and set.
3. Click “Read” tab, and then load download file (XXXX.bin) by clicking “Read”
(1)
filexxx.bin
4. Click “Connect” tab. If “Can’t ” is displayed, Check connection between computer, jig, and set.
(2) (3)
Please Check the Speed :

To use speed between
from 200KHz to 400KHz
5. Click “Auto” tab and set as below.

6. Click “Run”.
7. After downloading, check “OK” message.
(4)
filexxx.bin
(5)
(7) ……….OK
(6)
Copyright © LG Electronics. Inc. All rights reserved. - 10 - LGE Internal Use Only

* USB download (*.epk file download)
1. Put the USB Stick to the USB socket
2. Automatically detecting update file in USB Stick.
- If version of update file in USB Stick is lower, it will not work.
But version of update file is higher, USB data will be detected
automatically.
3. Show the message “Copying files from memory”
4. Updating is staring.
5. Updating Completed, The TV will restart automatically.

6. If your TV is turned on, check your updated version and Tool option. (explain the Tool option, next stage)
* If downloading version is more high than your TV have, TV can lost all channel data. In this case, you have to
channel recover. if all channel data is cleared, you didn’t have a DTV/ATV test on production line.
* After downloading, have to check and adjust TOOL OPTION again.

1. Push "IN-START" key in service remote controller.
2. Select "Tool Option 1" and Push “OK” button.
3. Punch in the number. (Each of models has their number)
Copyright © LG Electronics. Inc. All rights reserved. - 11- LGE Internal Use Only

Model Module Tool opt 1 Tool opt 2 Tool opt 3 Tool opt 4 Tool opt 5
47LS4100-CA LGD 33079 2498 9539 13240 2048
42LS4100-CA LGD 33078 2498 9539 13240 2048
42CS460-CB LGD 32790 450 9291 13232 2561
32CS460-CB LGD 32788 450 9291 13232 2592
32LS3500-CA LGD 33060 33218 9547 13232 2080
42LM3400-CC LGD 33206 450 25803 46000 2080
42LM3100-CC LGD 33286 450 25795 46008 2080
32LM3100-CC LGD 33284 450 25795 46008 2080
55LM4600-CC LGD
47LM4600-CC LGD
4. Completed selecting Tool option.
Copyright © LG Electronics. Inc. All rights reserved. -12 - LGE Internal Use Only

3.1 ADC Process
3.1.1. ADC
■ Enter Service Mode by pushing “ADJ” key,
■ Enter Internal ADC mode by pushing “►” key at “6. ADC Calibration”
EZ ADJUST ADC Calibration

0. Tool Option1 ADC Comp 480i NG
1. Tool Option2 ADC Comp 1080p NG
2. Tool Option3
3. Tool Option4
4. Tool Option5 Start Reset
5. Country Group
6. ADC Calibration ▶
7. White Balance
8. 10 Point WB
9. Test Pattern
10. EDID D/L
11. Sub B/C
12. Touch Sensitivity Setting
13.Ext. Input Adjust
☞ Caution: Using ‘P-ONLY’ button of the Adjustment R/C , power on TV.
※ ADC Calibration Protocol (RS-232)

NO Item CMD 1 CMD 2 Data 0
Enter When transfer the ‘Mode In’,
Adjust ‘Mode In’ A A 0 0
Adjust MODE Carry the command.
Automatically adjustment
ADC adjust ADC Adjust A D 1 0
(The use of a internal pattern)
Adjust Sequence
▪aa 00 00 [Enter Adjust Mode]
▪xb 00 40 [Component1 Input (480i)]
▪ad 00 10 [Adjust 480i Comp1]
▪xb 00 60 [RGB Input (1024*768)]
▪ad 00 10 [Adjust 1024*768 RGB]
▪aa 00 90 End Adjust mode
※ Required equipment : Adjustment R/C.

3.2 Function Check
3.5.1 Check display and sound
■ Check Input and Signal items. (cf. work instructions)
1. TV
2. AV
3. COMPONENT (480i)
4. HDMI
* Display and Sound check is executed by Remote controller.
☞ Caution : Not to push the INSTOP KEY after completion if the function inspection.
4. Total Assembly line process

4.1 Adjustment Preparation
■ W/B Equipment condition
CA210 : CCFL/EEFL è CH 9, Test signal : Inner pattern (80IRE)
LED è CH 14, Test signal : Inner pattern (80IRE)
■ Above 5 minutes H/run in the inner pattern. (“power on” key of adjust remote control)
X=0.276 (±0.002)
Cool 11,000k K Y=0.283 (±0.002)
O/S TN Edge LED/ Lamp
X=0.285 (±0.002)
Medium 9,300k K under 26” <Test Signal>
Y=0.293 (±0.002)
X=0.313 (±0.002) Inner pattern
Color Warm 6,500k K Y=0.329 (±0.002)
X=0.276 (±0.002)
Temperature (204gray,
Cool 11,000k K Y=0.283 (±0.002)
X=0.285 (±0.002) All LCD and O/S LED(except 80IRE)
Medium 9,300k K Y=0.293 (±0.002) LGD),lamp over 26”
X=0.313 (±0.002)
Warm 6,500k K Y=0.329 (±0.002)
◈ Edge LED W/B Table in process of aging time (Only LGD Edge LED Module)
CA210 : CH 14, Test signal : Inner pattern (80IRE)
Cool(13000K) Medium(9300K) Warm(6500K)
Aging time
S7LR2 x y x y x y
(Min)
269 273 285 293 313 329
1 0-2 280 287 296 307 320 337
2 3-5 279 285 295 305 319 335
3 6-9 277 284 293 304 317 334
4 10-19 276 283 292 303 316 333
5 20-35 274 280 290 300 314 330
6 36-49 272 277 288 297 312 327
7 50-79 271 275 287 295 311 325
8 80-149 270 274 286 294 310 324
9 Over 150 269 273 285 293 309 323
Copyright © LG Electronics. Inc. All rights reserved. - 14- LGE Internal Use Only

◈Direct LED W/B adjust target value (Only LGD direct LED, LM3100/LM3400 series)
Cool Medium Warm
Target x y x y x y
(Direct LED)
271 276 287 296 315 332
◈ Summary about W/B information
Model Information W/B Information

Cool Medium Warm W/B table for
Model Maker Type
(C50) (0) (W50) LGD edge LED
47LS4100-CA LGD Edge LED 13000K 9300K 6500K O
42CS460-CB LGD EEFL 11000K 9300K 6500K X
32CS460-CB LGD EEFL 11000K 9300K 6500K X
42LM3400-CC LGD Direct LED 13000K 9300K 6500K X
55LM4600-CC LGD Edge LED 13000K 9300K 6500K O
47LM4600-CC LGD Edge LED 13000K 9300K 6500K O
※ Connecting picture of the measuring instrument (On Automatic control)

Inside PATTERN is used when W/B is controlled. Connect to auto controller or push Adjustment R/C P-ONLY à
Enter the mode of White-Balance, the pattern will come out.
Auto-control interface and directions

1. Adjust in the place where the influx of light like floodlight around is blocked. (Illumination is less than 10ux).
2. Adhere closely the Color Analyzer ( CA210 ) to the module less than 10cm distance, keep it with the surface of
the Module and Color Analyzer’s Prove vertically.(80~100°).
3. Aging time
-. After aging start, keep the power on (no suspension of power supply) and heat-run over 5 minutes.
-. Using ‘no signal’ or ‘POWER ONLY’ or the others, check the back light on.

◈ Auto adjustment Map(RS-232C)
RS-232C COMMAND
[ CMD ID DATA ]
Wb 00 00 White Balance Start
Wb 00 ff White Balance End
RS-232C COMMAND CENTER

[CMD ID DATA] MIN (DEFAULT) MAX
Cool Mid Warm Cool Mid Warm
R Gain jg Ja jd 00 172 192 192 192
G Gain jh Jb je 00 172 192 192 192
B Gain ji Jc jf 00 192 192 172 192
R Cut 64 64 64 128
G Cut 64 64 64 128
B Cut 64 64 64 128
** Caution **
Color Temperature : COOL, Medium, Warm.
One of R Gain/G Gain/ B Gain should be kept on 0xC0, and adjust other two lower than C0.
(when R/G/B Gain are all C0, it is the FULL Dynamic Range of Module)

* Manual W/B process using adjusts Remote control.
■ After enter Service Mode by pushing “ADJ” key,
■ Enter White Balance by pushing “►” key at “7. White Balance”.
EZ ADJUST White Balance

0. Tool Option1 Color Temp. ◀ Cool ▶
1. Tool Option2 R-Gain 172
2. Tool Option3 G-Gain 172
3. Tool Option4 B-Gain 192
4. Tool Option5 R-Cut 64
5. Country Group G-Cut 64
6. ADC Calibration B-Cut 64
7. White Balance ▶ Test-Pattern ON
8. 10 Point WB Backlight 100
9. Test Pattern Reset To Set
10. EDID D/L
11. Sub B/C
12. Touch Sensitivity Setting
13. Ext. Input Adjust
※ After You finish all adjustments, Press “In-start” button and compare Tool option and Area option
value with its BOM, if it is correctly same then unplug the AC cable.
If it is not same, then correct it same with BOM and unplug AC cable.
For correct it to the model’s module from factory JIG model.
※ Push the “IN-STOP KEY” after completing the function inspection.
4.2 DDC EDID Write (RGB 128Byte )

■ Connect D-sub Signal Cable to D-Sub Jack.
■ Write EDID DATA to EEPROM (24C02) by using DDC2B protocol.
■ Check whether written EDID data is correct or not.
* For SVC main Ass’y, EDID have to be downloaded to Insert Process in advance.
4.3 DDC EDID Write (HDMI 256Byte)
■ Connect HDMI Signal Cable to HDMI Jack.
■ Write EDID DATA to EEPROM(24C02) by using DDC2B protocol.
■ Check whether written EDID data is correct or not.
* For SVC main Ass’y, EDID have to be downloaded to Insert Process in advance.

4.5 EDID DATA
EZ ADJUST
1) All Data : HEXA Value
0. Tool Option1
2) Changeable Data :
1. Tool Option2
*: Serial No : Controlled / Data:01
2. Tool Option3
**: Month : Controlled / Data:00
3. Tool Option4
***:Year : Controlled
4. Tool Option5
****:Check sum
5. Country Group
6. ADC Calibration
- Auto Download
7. White Balance
■After enter Service Mode by pushing “ADJ” key,
■Enter EDID D/L mode.
8. 10 Point WB
■Enter “START” by pushing “OK” key.

9. Test Pattern
☞ Caution : Never connect HDMI & D-sub Cable 10. EDID D/L ▶
when EDID downloaded. 11. Sub B/C
12. Touch Sensitivity setting
13. Ext. Input Adjust
※ LS4100, LS3500 and CS460 series have only two HDMI.
EDID D/L EDID D/L

HDMI1 NG HDMI1 OK
HDMI2 NG HDMI2 OK
HDMI3 NG HDMI3 OK
RGB NG RGB OK
Start Reset Start Reset
※ EDID data and Model option download (RS232)

NO Item CMD 1 CMD 2 Data 0
Enter Download When transfer the ‘Mode In’,
download MODE ‘Mode In’ A A 0 0 Carry the command.
EDID data and
Automatically download
Model option Download A E 00 10
download (The use of a internal Data)
- Manual Download
※ Caution
* Use the proper signal cable for EDID Download
- Analog EDID : Pin3 exists
- Digital EDID : Pin3 exists
- Never connect HDMI & D-sub Cable at the same time.
- Use the proper cables below for EDID Writing.

- Download HDMI1/2/3 separately because each EDID data is different.
For Analog EDID For HDMI EDID

D-sub to D-sub DVI-D to HDMI or HDMI to HDMI
No. Item Condition Hex Data

1 Manufacturer ID GSM 1E6D
2 Version Digital : 1 01
3 Revision Digital : 3 03

※ Model information
Model BLU Freq. Resolution
47LS4100-CA Edge LED 60Hz FHD (8bit)
42LS4100-CA Edge LED 60Hz FHD (8bit)
32LS3500-CA Edge LED 60Hz HD (8bit)
42CS460-CB EEFL 60Hz FHD (10bit)
32CS460-CB EEFL 60Hz HD (8bit)
42LM3400-CC Direct LED 60Hz FHD(10bit)
42LM3100-CC Direct LED 60Hz FHD(8bit)
32LM3100-CC Direct LED 60Hz HD(8bit)
55LM4600-CC Edge LED 60Hz FHD (8bit)
47LM4600-CC Edge LED 60Hz FHD (8bit)
4.5 Model name & Serial number Download

4.5.1 Model name & Serial number D/L
■ Press “Power on” key of service remocon.(Baud rate : 115200 bps)
■ Connect USB to RS232 cable at USB Jack.
■ Write model name and serial number.
■ Must check the model name and serial number at the Product/Service Info.
(menu keyà red key à select Product/Service info)
4.5.2 Signal TABLE
CMD LENGTH ADH ADL DATA_1 ... Data_n CS DELAY

CMD : A0h
LENGTH : 85~94h (1~16 bytes)
ADH : EEPROM Sub Address high (00~1F)
ADL : EEPROM Sub Address low (00~FF)
Data : Write data
CS : CMD + LENGTH + ADH + ADL + Data_1 + … + Data_n
Copyright © LG Electronics. Inc. All rights reserved. -20 - LGE Internal Use Only

Delay : 20ms
4.5.3 Command Set

No. Adjust mode CMD(hex) LENGTH(hex) Description
1 EEPROM WRITE A0h 84h+n n-bytes Write (n = 1~16)
* Description
FOS Default write : <7mode data> write
Vtotal, V_Frequency, Sync_Polarity, Htotal, Hstart, Vstart, 0, Phase
Data write : Model Name and Serial Number write in EEPROM,.
4.5.4 Method & notice

A. Serial number D/L is using of scan equipment.
B. Setting of scan equipment operated by Manufacturing Technology Group.
C. Serial number D/L must be conformed when it is produced in production line, because serial number
D/L is mandatory by D-book 4.0

※ Manual Download (Model Name and Serial Number)
If the TV set is downloaded By OTA or Service man, Sometimes model name or serial number is initialized.(Not
always)
It is impossible to download by bar code scan, so It need Manual download.
a. Press the ‘instart’ key of ADJ remote controller.

b. Go to the menu ‘6.Model Number D/L’ like below photo.
c. Input the Factory model name or Serial number like photo.
d. Check the model name Instart menu à Factory name displayed.

e. Check the Product/Service Info. (Menu Keyà Red Key à Select Product/Service Info.)
à Buyer model displayed.
4.5.5 Outgoing condition Configuration

■ When pressing IN-STOP key by SVC remocon, Red LED are blinked alternatively. And then automatically turn
off.
(Must not AC power OFF during blinking)
4.6 Hi-Pot Test

Confirm whether is normal or not when between power board's ac block and GND is impacted on 1.5kV(dc) or
2.2kV(dc) for one second.

5. Preset CH Information
If you turn on TV by pushing the ‘POWER ON’ or ‘P-ONLY’ key, TV catch the channel 10 DTV, 1 CADTV, 12 ATV
and
2 CATV channels on line condition. Pr.2~4 of CADTV will be updated after changing channel to CADTV channel 1.
DTV Ch name is displayed below initially, but if you do channel tuning just one time, you can see DTV Ch name.
Total = 25(+3) Channels
◈ DTV : MUX No. in ‘( )’ is used for Hong Kong DTV.
MUX Pr. Name CH information Factory
1(82) J2 SD 16 : 9 576i GUMI
15 (23) 2(83) Interactive Information SD 16 : 9 576i GUMI
3(85) High Definition Jade HD 16 : 9 1080i GUMI
4(900) CCTV-1 SD 4:3 576i LGEND
5(901) CCTV-2 SD 4:3 576i LGEND
6(902) CCTV-少儿 SD 4:3 576i LGEND
16 (24)
7(903) CCTV-音乐 SD 4:3 576i LGEND
8(904) BTV-1 SD 4:3 576i LGEND
9(905) CETV-3 SD 4:3 576i LGEND
10(906
20 (28) CCTV–高淸 HD 16 : 9 1080i LGEND
)
◈ CADTV : MUX No. in ‘( )’ is used for Hong Kong DTV.
MUX Pr. Name CH information Factory
1 CCTV-4 SD 4:3 576i LGEND
2 CCTV-9 SD 4:3 576i LGEND
55 (63)
3 CCTV F SD 4:3 576i LGEND
4 CCTV E SD 4:3 576i LGEND
(Pr.2~4 of CADTV will be updated automatically after changing channel to Pr.1)
◈ ATV
Pr System Band Name CH Freq. Factory
1 PAL DK V/UHF D-10 C 10 200.25 LGEND/GUMI
2 PAL DK V/UHF K-36 C 36 695.25 LGEND/GUMI
3 PAL I V/UHF I-05 C 05 183.25 GUMI
7
8
9
10
11
12

◈ CATV
Pr System Band Name CH Freq. Factory
1 PAL DK V/UHF - C 02 57.75 LGEND
2 NTSC M V/UHF - C 04 67.25 GUMI

6. Shipping condition
No. Item Condition Remark
1. Power Off
2. Mechanical Power switch On
3. Volume Level 10
4. Main Picture Input DTV DTV & ATV
5. Main Last Channel N.A.
6. Mute Off
7. ARC 16:9 (DTV)
Auto Tuning
Manual DTV / TV / CADTV /

Tuning CATV
DTV / RADIO / TV / * Only Hong Kong :
Programme
Cable DTV / Cable Radio DTV / RADIO /TV / Cable
SETUP Edit / Cable TV TV
8
Booster Off
CI
*Except Hong Kong
Information
Cable DTV Service Operator others

setting Audio Auto Mode On
9. PICTURE Aspect Ratio 16:9
Picture
Wizard
Energy
Off
Saving
Picture Intelligent Sensor
Mode
Vivid
Backlight 100
Contrast 95
Brightness 50
Sharpness 70
Colour 70
Tint 0
Colour Temp C50

Advan Dynamic Contrast High
c
Dynamic Colour High
e
Clear White High
d
Skin color 0

C Noise Reduction Medium
o
Digital Noise Reduction Medium
n
Gamma Medium
tr
Black level Auto
ol
Eye Care Low
Real Cinema On
Color Gamut Wide
xvYCC Off
Pictur
e
R
e
s
e
t
TruMotion Low Only LM5700
Resolution
Auto Config.
Screen Position
Size
Phase
Reset
Auto Volume Off
Clear Voice II Off On Level 3
Balance 0
Standard
Infinite Sound Off
Sound Mode Treble 50

10. AUDIO Bass 50
Reset
Digital Audio
PCM PCM/Auto
out
TV Speaker ON ON/Off
DTV Audio Auto/AAC/Dolby Digital+/Dolby

Auto
Setting Digital/MPEG;
11. Time Clock -- : -- Auto
Off time Off
On time Off

Sleep Timer Off
Set Password
12. LOCK Lock System Off
Key Lock Off-
* Mainland
Menu 汉语
Language China
中文 * Hong Kong
* Mainland
Audio Mandarin(普通话)
Language language China
Cantonese(廣東语) * Hong Kong
* Mainland
Subtitle Mandarin(普通话)
Language China
Cantonese(廣東语) * Hong Kong

13. OPTION
* Mainland China/Hong
City/Area --
Kong
Hard of
Off *Off/ON
hearing
Power Standby Light : On

Indicator Power Light : On
MHEG Guide Off * Only Hong Kong
Factory Reset
Mode Setting Home Use
7. Additional Rules
This specification goes into effect from 2011/12/12.

LGE Internal Use Only
Block Diagram
X-tal LVDS
FPC(51P)
24M (FHD/50Hz)
FE_TS_DATA[0:7]
Tuner TU_CVBS
SERIAL FLASH
SPI IC1401 (8M bit)
SIF
MX25L8005M2I
Rear DDR3 Add.
DDR3 1Gb
DDR3 1Gb
IC1202
IC1201
DDR3 Data H5TQ1G63BFR
H5TQ1G63BFR
TMDS
HDMI1/2(DVI) I2C
M24M01-HRMN6TP
CVBS, Y/Pb/Pr, L/R
Component/AV IC104 256Kbit
Y/Pb/Pr, L/R NAND FLASH CI Slot:
Component IC102 (2Gbit) Only LM5700 for China
- 28 -
LG2111A
CI Slot
PCM_A[0:7]
74LCX244
RGB PC
RGB/H/V
IC101 Buffer
PCM_A[8:14]
PC/DVI Audi In L/R
PCM_DATA[0:7]
FE_TS_DATA[0:7]
SPDIF SPDIF TS_DATA[0:7]
SENSOR
EPHY
LG Electronics. Inc. All rights reserved.

Ethernet _SCL/SDA
KEY1
KEY2

LED_R CONTROL
IR & LED /
DP/DM
SOFT TOUCH
USB (TACT SWITCH)
IR

Except of
LM4600/LM3100/ TMDS
HDMI3
Side
I2S
LM3400/LS4100/ Audio AMP
STA380BWE SPK L/R
LS3500/CS460
Copyright ©
1 / 153
LGE Internal Use Only
I2C MAP (LGE2112)
D
riv
ingC
urr
ent:2
/4/
6/8
mA
+3.3V_TU
W
eca
nbec
han
gedbys
oft
ware
+3.3V_Normal
c
onf
igu
rati
on.
IC104
1KΩ
NVRAM
2.2KΩ
T
U_S
CL
IC103 I
2C_
SCL 33Ω TUNER(A,D)
22Ω 22Ω
HDCP EEPROM T
U_S
DA
I
2C_
SDA
IC101
LGE2111A
- 29 -
+3.3V_Normal
+3.3V_Normal
1KΩ
1KΩ A
MP_
SCL
(
DEM
OD_
SCL) A
MP_
SCL
S
ENS
OR_
SCL IC3400
IR BOARD 100Ω A
MP_
SDA A
MP_
SDA STA380BW
LG Electronics. Inc. All rights reserved.

I
nte
l ligents
e n
sor S
ENS
OL_
SDA
(
DEM
OD_
SDA_

22Ω TUNER(D.D)
D
EMO
D_S
CL
D
EMO
D_S
DA

2 / 153
Copyright ©
EXPLODED VIEW
IMPORTANT SAFETY NOTICE
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
400
910
900
521
810
120
540
LV1
530
310
* Set + Stand
A10
* Stand Base
Stand Body
320
A9
+
200
A21
A2
510
300

ST_3.5V--> 3.375V --> 3.46V
+12V/+15V 20V-->3.51V --> 3.76V (3.59V) +3.5V_ST -> 3.375V
+12V/+15V +3.5V_ST
PANEL_POWER 24V-->3.78V --> 3.92V (3.79V) +3.5V_ST
FROM LIPS & POWER B/D L412

12V -->3.58V --> 3.82V (3.68V)
18.5V-->3.5V --> 3.75V (3.59V)
R488
100K
PD_+3.5V
120 OPT
PD_+12V
R450
CIS21J121 R463
R448
2.7K
10K
5%
0
1%
OPT R405-*2 R407-*2 PWR_DET_ON_SEMI
0.015uF C442 4.7K 4.7K IC408
0.01uF C438 10uF NCP803SN293
C409 C436 New item
0.1uF 25V R402 POWER_DET
0.015uF 0.01uF PANEL_DISCHARGE_RES_4.7K 100
25V PANEL_DISCHARGE_RES_4.7K VCC 3 2 RESET
+3.5V_ST 50V 50V Q409
R450-*1
PD_KR_42_LIPS
MMBT3906(NXP) AO3407A IC408-*1
PD_+12V
1
1/16W
+3.5V_ST
R447
1.2K
Q402 R405-*1 R407-*1 C474 APX803D29
1%
100
3K 3K C411 GND
1%
0.1uF 0.1uF
C443 PANEL_DISCHARGE_RES_3K
R439 10uF PANEL_DISCHARGE_RES_3K 16V RESET VCC
R461 R406 1 3 33K 2 3
OPT 4.7K NORMAL_EXPEPT_32 NORMAL_32 25V G PANEL_VCC
10K R401 C +24V
P403 P404 1
R447-*1
RL_ON 10K 2 FW20020-24S FM20020-24 L407-*1 PD_+12V
PD_KR_42_LIPS
B Q401 OPT GND
1/16W
MLB-201209-0120P-N2 OPT +24V R404
5.1K
MMBT3904(NXP) R431 100K
22K R440 C451 PWR_DET_ON_DIODES
1%
L407 5.6K 0.1uF
E
PWR ON 1 24V 25V
R482
8.2K
R462 L404-*1 2 CIS21J121 IC409-*1
PD_+12V_PWR_DET_ON_SEMI
1%
10K MLB-201209-0120P-N2 24V 24V POWER_+24V IC409 APX803D29
3 4 C
+3.5V_ST OPT R430 NCP803SN293 PD_+12V
R610 GND 5 6 GND NON_CI_CAP R480
L404 C418 10K B Q407 C455 R405 R407
33K GND GND VCC RESET 100 RESET VCC
CIS21J121 7 8 0.1uF MMBT3904(NXP) 0.1uF 2.2K 2.2K 3 2 2 3
3.5V 3.5V 50V 25V
R403
1.5K
9 10 OPT C 1 1
1%
R429 OPT OPT E POWER_+24V
OPT 3.5V 11 12 3.5V R435 PD_+12V
47K B Q406 GND GND
C406 C408 GND GND PANEL_CTL 22K C412
13 14 MMBT3904(NXP)
0.1uF 0.1uF 0.1uF PD_+12V_PWR_DET_DIODES
GND 15 16 GND/V-sync 1:AK10 R489 PANEL_DISCHARGE_RES_2.2K
16V 16V 10K E 16V
+12V/+15V
L402
12V
12V
12V
17
19
21
18
20
22
INV ON
A.DIM
P.DIM1
+3.3V_Normal
PANEL_DISCHARGE_RES_2.2K
Power_DET
CIS21J121 GND/P.DIM2 Err OUT
23 24
+3.5V_ST
FOR 200HZ PWM_DIM2
R419
OPT 1K 780 mA
C404
0.1uF
C407 25 OPT R415
+3.3V_Normal
R408
16V
0.1uF
16V SLIM_32~52
P401
SMAW200-H24S2
R412
0
100 R426
10K +1.5V_DDR Max 1000mA
100
L402-*1 +3.5V_ST
MLB-201209-0120P-N2 OPT C
R476 R421 +3.3V_Normal
0 OPT
R418 B 10K INV_CTL Q403 L403
OPT 6.8K +3.5V_ST AO3407A BLM18SG700TN1D
R475
D
0 E OPT IC407
Q405 +1.5V_DDR
MMBT3904(NXP) R427 AP7173-SPG-13 HF(DIODES)
PWM1 10K L420
NON_CI_CAP C425 OPT C437
BLM18PG121SN1D [EP] G OPT
C435 R434 0.1uF C445 22uF
R438 16V R446
0.1uF C423 0.1uF 16V
16V 10K 22K 10K
4.7uF 16V
NON_PSU_T120_LGD A_DIM IN OUT
1 8 16V
R611
THERMAL
0 R1 R457
PWM_DIM PG FB 4.3K
9
2 7
OPT 1/16W
C416 R606
0.1uF 3.9K VCC SS 1% R445
PWM_PULL-DOWN_3.9K 3 C472
16V
+3.3V_Normal 1.5A6 R2 22uF
C476
0.1uF
100
R606-*1 R433 10V 16V
1K 10K EN GND C467 R456
PWM_PULL-DOWN_1K 4 5 560pF 4.7K C
NON_CI_CAP 1/16W R443
50V POWER_ON/OFF_1 10K
1% B Q400
’ERROR_OUT’ is used for +3.3V_Normal
C461
C475
0.1uF
OPT
MMBT3904(NXP)
10uF 16V
lamp(CCFL/EEFL) models. OPT 10V R490
10K
E
In other words, ERROR_OUT

R420
R486
4.7K
100
LED models need not use. ERROR_OUT
Vout=0.8*(1+R1/R2)=1.5319
FOR LPB Download

[To LED DRIVER]
+2.5V/+1.8V +3.3V_Normal
+3.3V_Normal OPT
FOR LPB MODEL R615
IC402 +2.5V_Normal P407 10K
TJ3940S-2.5V-3L 12507WR-08L
OPT
VIN 3 2 VOUT 300 mA R616
Vd=550mV 1
1 10K
R473
NON_CI_CAP GND
C432 1
2
0.1uF FOR LPB MODEL_L/DIM
LOCAL DIMMING
16V R612
33
C403 C440 3
L/DIM_SCLK
10uF 0.1uF
10V 16V
4
FOR LPB MODEL_L/DIM
R613
33
5
L/DIM_MOSI FOR LPB MODEL
R183
33
6
I2C_SCL
7
I2C_SDA
FOR LPB MODEL_L/DIM
R614 FOR LPB MODEL
33 R184
8 33
L/DIM_VS
FOR LPB MODEL_L/DIM
9 R617
4.7K
S7LR core 1.2V volt

+3.3V_Normal C447
R428 0.33uF
+12V/+15V 10K 16V
L401
+5V_USB 2000 mA +3.5V_ST C441
0.1uF
+1.10V_VDDC
R410
16V
10K
EP[GND]
VIN_3
PWRGD
BOOT
C405 C4075 +5V_USB +5V_Normal L413

EN
10uF 10uF
25V 25V L415
OPT
16
15
14
13
IC401 L406 L425 3.6uH

VIN_1 1 12 PH_3 +3.3V_Normal
3.6uH BLM18PG121SN1D
AOZ1051PI [EP]LX THERMAL
NON_CI_CAP VIN_2 PH_2 NR8040T3R6N
C430 C431 2 17 11 C444
OPT OPT C453 C456
C420 C4074 10uF 0.1uF GND_1 PH_1 0.1uF OPT
PGND NC C492 10V 16V 3 IC403 10 22uF 22uF 16V
1 8 22uF 0.1uF R180 OPT
22uF TPS54319TRE 10V 10V 10K R181
16V 16V GND_2 SS/TR
THERMAL
16V 4 9 1K
OLP
VIN SS C488
9
OPT 2 7
5
C4073 3300pF R1 C439

0.1uF C493 50V
R1
AGND
VSENSE
COMP
RT/CLK
1%
1/16W
27K
R442
16V AGND EN 0.01uF R432 100pF Not used :

3 6 50V 1/16W 330K 5% only for small(ready)
R416 R609 R436 C448
56K 11K FB COMP 15K 3300pF
4 5
1% 1% 3A 50V
R2
R608
12K
OPT R423
C494
1%
1/16W
56K
R441
12K
C4072 R2 2200pF
1%
100pF 50V 3A $ 0.165
Vout=0.8*(1+R1/R2) Vout=0.827*(1+R1/R2)=1.225V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES

SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP4L_S7LR2 2011/11.22
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. POWER_LARGE 4

LVDS for large inch
[51Pin LVDS Connector]

(For FHD 60Hz) FOR FHD REVERSE(10bit) [30Pin LVDS Connector]
FHD Change in S7LR (For HD 60Hz_Normal)
P703
FI-RE51S-HF-J-R1500
MIRROR Pol-change
LVDS_SEL HD
RXA4+ RXA0+ RXA0-
1 P705
+3.3V_Normal RXA4- RXA0- RXA0+ FF10001-30
2
RXA3+ RXA1+ RXA1-
3 OPT
R705 RXA3- RXA1- RXA1+ 1
4 3.3K
RXACK+ RXA2+ RXA2- 2
5
OPT
OPT SCANNING_EN RXACK- RXA2- RXA2+ 3 R713
6 R710 0
10K RXA2+ RXACK+ RXACK- 4
7 +3.3V_Normal
RXA2- RXACK- RXACK+ 5
8 PWM_DIM
PSU_T120_LGD OPT RXA1+ RXA3+ RXA3- 6
9 R703 RXA3+
R706
0 3.3K RXA1- RXA3- RXA3+ 7 RXA3-
10 OPC&SCANNING_CTRL
RXA0+ RXA4+ RXA4- 8
11 OPT
R704
RXA0- RXA4- RXA4+ 9
12 10K RXACK+
RXA4+
10 RXACK-
13 RXA4-
RXB4+ RXB0+ RXB0- 11
14 RXA3+
RXB4- RXB0- RXB0+ 12 RXA2+
15 RXA3-
RXB3+ RXB1+ RXB1- 13 RXA2-
16 RXACK+
RXB3- RXB1- RXB1+ 14
17 RXACK-
RXBCK+ RXB2+ RXB2- 15 RXA1+
18
RXBCK- RXB2- RXB2+ 16 RXA1-

19 RXA2+
RXB2+ RXBCK+ RXBCK- 17
20 RXA2- LVDS_SEL
RXB2- RXBCK- RXBCK+ 18 RXA0+
21
19 +3.3V_Normal
22 RXB1+ RXB3+ RXB3- RXA0-
RXA1+
23 RXA1- OPT
21 R712
24 RXB0+ RXB4+ RXB4- 3.3K
RXA0+
25 RXA0-
23 OPT
26 AUO_GND/LGD_NC R711
10K
24 PANEL_VCC
27
25
28 RXB4+ AUO_GND HD
R709 26 L701
29 RXB4- 10K 70-ohm
27 BLM18SG700TN1D
30 RXB3+
28
31 RXB3- FOR FHD REVERSE(8bit) OPT
C701
OPT
C702
HD
C703
29
32 RXBCK+ 10uF 1000pF 0.1uF
33 RXBCK-
Change in S7LR 30 16V 50V 16V
34 31
MIRROR Pol-change Shift
35 RXB2+
RXA4+ RXA4+ RXA4- RXA0-
36 RXB2-
RXA4- RXA4- RXA4+ RXA0+
37
38 RXB1+
RXA3- RXA0- RXA0+ RXA1+
39 RXB1-
RXACK+ RXA1+ RXA1- RXA2-
40 RXB0+
RXACK- RXA1- RXA1+ RXA2+
41 RXB0-
RXA2+ RXA2+ RXA2- RXACK-
42
RXA2- RXA2- RXA2+ RXACK+
43
RXA1+ RXACK+ RXACK- RXA3-
44 PANEL_VCC
RXA1- RXACK- RXACK+ RXA3+
45
46 FHD
L702 RXA0- RXA3- RXA3+ RXA4+
47 70-ohm
48
OPT OPT FHD
49 RXB4+ RXB4+ RXB4- RXB0-
C700 C709 C710
10uF 1000pF 0.1uF
50 RXB4- RXB4- RXB4+ RXB0+
16V 50V 16V
51 RXB3+ RXB0+ RXB0- RXB1-
RXB3- RXB0- RXB0+ RXB1+

52
RXBCK+ RXB1+ RXB1- RXB2-
RXBCK- RXB1- RXB1+ RXB2+
RXB2+ RXB2+ RXB2- RXBCK-
RXB2- RXB2- RXB2+ RXBCK+
RXB1+ RXBCK+ RXBCK- RXB3-
RXB1- RXBCK- RXBCK+ RXB3+
RXB0+ RXB3+ RXB3- RXB4-
RXB0- RXB3- RXB3+ RXB4+

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP4L_S7LR2 2011/11/14
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. LVDS_LARGE 11

AVDD_DDR0 AVDD_DDR0 AVDD_DDR0 AVDD_DDR0
+1.5V_DDR AVDD_DDR0
R1227
R1201
R1224
R1204
1K 1%
1K 1%
OS
OS
1K 1%
1K 1%
L1202
CIC21J501NE
A-MVREFDQ B-MVREFCA B-MVREFDQ

0.1uF
A-MVREFCA
OS 1000pF
0.1uF
1000pF
0.1uF
OS 1000pF
OPT
0.1uF
1000pF
1%
1%
1%
1%
C1250
R1228
C1217
C1218
C1219
C1238
C1241
R1202
R1225
0.1uF
0.1uF
0.1uF
R1205
C1206
C1239
C1220
10uF
C1247
C1248
C1249
C1251
1uF
1uF
1uF
1uF
1uF
OS
OS
C1202
C1201
C1204
1K
C1203
1K
1K
OS
OS
1K
CLose to DDR3 CLose to Saturn7M IC CLose to Saturn7M IC CLose to DDR3
IC1201-*1 IC1202-*1
K4B1G1646G-BCH9 K4B1G1646G-BCH9
DDR_1333_SS_NEW DDR_1333_SS_NEW
N3 M8 N3 M8
A0 VREFCA A0 VREFCA
P7 P7
A1 A1
P3 P3
A2 A2
N2 H1 N2 H1
A3 VREFDQ A3 VREFDQ
P8 P8
A4 A4
P2 P2
A5 A5
R8 L8 R8 L8
A6 ZQ A6 ZQ
R2 R2
A7 A7
T8 T8
A8 A8
R3 B2 R3 B2
A9 VDD_1 A9 VDD_1
L7 D9 L7 D9
A10/AP VDD_2 A10/AP VDD_2
R7 G7 R7 G7
A11 VDD_3 A11 VDD_3
N7 K2 N7 K2
A12/BC VDD_4 A12/BC VDD_4
T3 K8 T3 K8
A13 VDD_5 A13 VDD_5
N1 N1
VDD_6 VDD_6
M7 N9 M7 N9
NC_5 VDD_7 NC_5 VDD_7
EAN61828901 R1 R1
VDD_8 VDD_8
M2 R9 M2 R9
EAN61828901 IC1202 N8
BA0 VDD_9
N8
BA0 VDD_9
IC1201 H5TQ1G63DFR-H9C M3
BA1
M3
BA1
H5TQ1G63DFR-H9C IC101 BA2

A1
BA2
A1
LGE2111A-T8 DDR_1333_HYNIX J7
VDDQ_1
A8 J7
VDDQ_1
A8
CK VDDQ_2 CK VDDQ_2
DDR_1333_HYNIX K7 C1 K7 C1
N3 M8 CK VDDQ_3 CK VDDQ_3
B-MA0 A0 VREFCA B-MVREFCA K9 C9 K9 C9
A-MVREFCA
M8
VREFCA A0
N3
P7
A-MA0
A11
S7LR2_DIVX_MS10 B23
B-MA1
P7
P3
A1
L2
CKE VDDQ_4
VDDQ_5
D2
E9 L2
CKE VDDQ_4
VDDQ_5
D2
E9
A1 A-MA1 A-MA0 A_DDR3_A[0] B_DDR3_A[0] B-MA0 B-MA2 A2 CS VDDQ_6 CS VDDQ_6
P3 C14 D25 N2 H1 K1 F1 K1 F1
A-MA2 A-MA1 B-MA1 B-MA3 B-MVREFDQ ODT VDDQ_7 ODT VDDQ_7
A2 A_DDR3_A[1] B_DDR3_A[1] A3 VREFDQ J3 H2 J3 H2
H1 N2 B11 F22 P8 RAS VDDQ_8 RAS VDDQ_8
A-MVREFDQ VREFDQ A3 A-MA3 A-MA2 A_DDR3_A[2] B_DDR3_A[2] B-MA2 B-MA4 A4 K3 H9 K3 H9
P8 F12 G22 P2 OS CAS VDDQ_9 CAS VDDQ_9
A-MA4 A-MA3 B-MA3 B-MA5 L3 L3
A4 A_DDR3_A[3] B_DDR3_A[3] A5 R1226 WE WE
P2 C15 E24 R8 L8 J1 J1
R1203 A5 A-MA5 A-MA4 A_DDR3_A[4] B_DDR3_A[4] B-MA4 B-MA6 A6 ZQ NC_1 NC_1
L8 R8 E12 F21 R2 T2 J9 T2 J9
ZQ A6 A-MA6 A-MA5 A_DDR3_A[5] B-MA5 B-MA7 240 RESET NC_2 RESET NC_2
B_DDR3_A[5] A7 L1 L1
240 R2 A14 E23 T8 1% AVDD_DDR0 NC_3 NC_3
A7 A-MA7 A-MA6 A_DDR3_A[6] B_DDR3_A[6] B-MA6 B-MA8 A8 L9 L9
AVDD_DDR0 1% T8 D11 D22 R3 B2 NC_4 NC_4
A-MA8 A-MA7 B-MA7 B-MA9 F3 T7 F3 T7
A8 A_DDR3_A[7] B_DDR3_A[7] A9 VDD_1 C1227 10uF DQSL NC_6 DQSL NC_6
B2 R3 B14 D24 L7 D9 G3 G3
VDD_1 A9 A-MA9 A-MA8 A_DDR3_A[8] B_DDR3_A[8] B-MA8 B-MA10 A10/AP VDD_2 DQSL DQSL
C1205 10uF D9 L7 D12 D21 R7 G7 OS C1228 0.1uF
VDD_2 A10/AP A-MA10 A-MA9 A_DDR3_A[9] B_DDR3_A[9] B-MA9 B-MA11 A11 VDD_3 C7 A9 C7 A9
C1207 0.1uF G7 R7 C16 C24 N7 K2 OS C1229 0.1uF DQSU VSS_1 DQSU VSS_1
VDD_3 A11 A-MA11 A-MA10 A_DDR3_A[10] B_DDR3_A[10] B-MA10 B-MA12 A12/BC VDD_4 B7 B3 B7 B3
C1208 0.1uF K2 N7 C13 C25 T3 K8 OS C1230 0.1uF DQSU VSS_2
E1
DQSU VSS_2
E1
VDD_4 A12/BC A-MA12 A-MA11 A_DDR3_A[11] B_DDR3_A[11] B-MA11 B-MA13 A13 VDD_5 VSS_3 VSS_3
C1210 0.1uF K8 T3 A15 F23 N1 OS C1231 0.1uF E7 G8 E7 G8
VDD_5 A13 A-MA13 A-MA12 A_DDR3_A[12] B_DDR3_A[12] B-MA12 VDD_6 DML VSS_4 DML VSS_4
C1211 0.1uF N1 E11 E21 M7 N9 OS C1232 0.1uF D3
DMU VSS_5
J2 D3
DMU VSS_5
J2
VDD_6 A-MA13 A_DDR3_A[13] B_DDR3_A[13] B-MA13 NC_5 VDD_7 J8 J8
C1212 0.1uF N9 M7 B13 D23 R1 OS C1233 0.1uF VSS_6 VSS_6
VDD_7 NC_5 A-MA14 A_DDR3_A[14] B_DDR3_A[14] B-MA14 VDD_8 E3 M1 E3 M1
C1213 0.1uF R1 M2 R9 OS C1234 0.1uF
F7
DQL0 VSS_7
M9 F7
DQL0 VSS_7
M9
VDD_8 B-MBA0 BA0 VDD_9 DQL1 VSS_8 DQL1 VSS_8
C1214 0.1uF R9 M2 B-MCK N8 OS C1235 0.1uF F2 P1 F2 P1
VDD_9 BA0 A-MBA0 A-MCK B-MBA1 BA1 DQL2 VSS_9 DQL2 VSS_9
OS
R1235
N8 F13 G20 M3 OS C1236 0.1uF F8 P9 F8 P9

56
R1237
C1215 0.1uF A-MBA1 A-MBA0 B-MBA0 B-MBA2 DQL3 VSS_10 DQL3 VSS_10
1%
BA1 A_DDR3_BA[0] B_DDR3_BA[0] BA2

1%
H3 T1 H3 T1
M3 B15 F24 OS C1240 A1
56
C1216 0.1uF DQL4 VSS_11 DQL4 VSS_11

BA2 A-MBA2 A-MBA1 A_DDR3_BA[1] B_DDR3_BA[1] B-MBA1 VDDQ_1 H8 T9 H8 T9
OS A1 C1209 E13 F20 J7 A8 DQL5 VSS_12 DQL5 VSS_12
A-MBA2 B-MBA2 G2 G2
VDDQ_1 A_DDR3_BA[2] B_DDR3_BA[2] 0.01uF CK VDDQ_2 DQL6 DQL6
R1236
A8 J7 K7 C1
56
R1238
50V H7 H7
0.01uF
1%
VDDQ_2 CK CK VDDQ_3 DQL7 DQL7

1%
OS
C1 K7 50V C17 G25 K9 C9 B1 B1

56
A-MCK B-MCK B-MCKE VSSQ_1 VSSQ_1

VDDQ_3 CK A_DDR3_MCLK B_DDR3_MCLK CKE VDDQ_4 D7 B9 D7 B9
C9 K9 A17 G23 B-MCKB D2 DQU0 VSSQ_2 DQU0 VSSQ_2
VDDQ_4 CKE A-MCKE A-MCKB A_DDR3_MCLKZ B_DDR3_MCLKZ B-MCKB VDDQ_5 C3 D1 C3 D1
D2 B16 F25 L2 E9 DQU1 VSSQ_3 DQU1 VSSQ_3
A-MCKB A-MCKE B-MCKE C8 D8 C8 D8
VDDQ_5 A_DDR3_MCLKE B_DDR3_MCLKE CS VDDQ_6 DQU2 VSSQ_4 DQU2 VSSQ_4
E9 L2 K1 F1 C2 E2 C2 E2
VDDQ_6 CS B-MODT ODT VDDQ_7 DQU3 VSSQ_5 DQU3 VSSQ_5
F1 K1 J3 H2 A7 E8 A7 E8
A-MODT AVDD_DDR0 B-MRASB DQU4 VSSQ_6 DQU4 VSSQ_6
VDDQ_7 ODT RAS VDDQ_8 A2 F9 A2 F9
H2 J3 E14 D20 K3 H9 DQU5 VSSQ_7 DQU5 VSSQ_7
VDDQ_8 RAS A-MRASB AVDD_DDR0 A-MODT A_DDR3_ODT B_DDR3_ODT B-MODT B-MCASB CAS VDDQ_9 B8 G1 B8 G1
H9 K3 B12 B25 L3 DQU6 VSSQ_8 DQU6 VSSQ_8
A-MCASB R1231 A-MRASB B-MRASB R1232 B-MWEB A3 G9 A3 G9
VDDQ_9 CAS A_DDR3_RASZ B_DDR3_RASZ WE DQU7 VSSQ_9 DQU7 VSSQ_9
L3 A12 B24 10K J1
WE A-MWEB 10K A-MCASB A_DDR3_CASZ B_DDR3_CASZ B-MCASB NC_1
J1 C12 A24 T2 J9
NC_1 A-MWEB A_DDR3_WEZ B_DDR3_WEZ B-MWEB OS B-MRESETB RESET NC_2
J9 T2 L1
NC_2 RESET A-MRESETB NC_3
L1 F11 E20 L9 IC1201-*2 IC1202-*2
NC_3 A-MRESETB A_DDR3_RESET B_DDR3_RESET B-MRESETB NC_4 NT5CB64M16DP-CF NT5CB64M16DP-CF
L9 F3 T7
NC_4 B-MDQSL DQSL NC_6 B-MA14
T7 F3 G3
A-MA14 NC_6 DQSL A-MDQSL B-MDQSLB DQSL DDR_1333_NANYA_NEW DDR_1333_NANYA_NEW
G3 B19 K24 N3 M8 N3 M8
DQSL A-MDQSLB A-MDQSL A_DDR3_DQSL B_DDR3_DQSL B-MDQSL A0 EAN61857201 VREFCA A0 EAN61857201 VREFCA
C18 K25 C7 A9 P7 P7
A-MDQSLB B-MDQSLB B-MDQSU A1 A1
A_DDR3_DQSLB B_DDR3_DQSLB DQSU VSS_1 P3 P3
A9 C7 B7 B3 A2 A2
VSS_1 DQSU A-MDQSU B-MDQSUB DQSU VSS_2 N2 H1 N2 H1
B3 B7 B18 J21 E1 A3 VREFDQ A3 VREFDQ
A-MDQSUB A-MDQSU B-MDQSU P8 P8
VSS_2 DQSU A_DDR3_DQSU B_DDR3_DQSU VSS_3 A4 A4
E1 A18 J20 E7 G8 P2 P2
VSS_3 A-MDQSUB A_DDR3_DQSUB B_DDR3_DQSUB B-MDQSUB B-MDML DML VSS_4 A5 A5
G8 E7 D3 J2 R8 L8 R8 L8
A-MDML B-MDMU A6 ZQ A6 ZQ
VSS_4 DML DMU VSS_5 R2 R2
J2 D3 E15 H24 J8 A7 A7
VSS_5 DMU A-MDMU A-MDML A_DDR3_DQML B_DDR3_DQML B-MDML VSS_6 T8 T8
J8 A21 L20 E3 M1 A8 A8
A-MDMU B-MDMU B-MDQL0 R3 B2 R3 B2
VSS_6 A_DDR3_DQMU B_DDR3_DQMU DQL0 VSS_7 A9 VDD_1 A9 VDD_1
M1 E3 F7 M9 L7 D9 L7 D9
VSS_7 DQL0 A-MDQL0 B-MDQL1 DQL1 VSS_8 A10/AP VDD_2 A10/AP VDD_2
M9 F7 D17 L23 F2 P1 R7 G7 R7 G7
A-MDQL1 A-MDQL0 B-MDQL0 B-MDQL2 A11 VDD_3 A11 VDD_3
VSS_8 DQL1 A_DDR3_DQL[0] B_DDR3_DQL[0] DQL2 VSS_9 N7 K2 N7 K2
P1 F2 G15 J24 F8 P9 A12 VDD_4 A12 VDD_4
VSS_9 DQL2 A-MDQL2 A-MDQL1 A_DDR3_DQL[1] B_DDR3_DQL[1] B-MDQL1 B-MDQL3 DQL3 VSS_10 T3 K8 T3 K8
P9 F8 B21 L24 H3 T1 NC_6 VDD_5 NC_6 VDD_5
A-MDQL3 A-MDQL2 B-MDQL2 B-MDQL4 N1 N1
VSS_10 DQL3 A_DDR3_DQL[2] B_DDR3_DQL[2] DQL4 VSS_11 VDD_6 VDD_6
T1 H3 F15 J23 H8 T9 M7 N9 M7 N9
VSS_11 DQL4 A-MDQL4 A-MDQL3 A_DDR3_DQL[3] B_DDR3_DQL[3] B-MDQL3 B-MDQL5 DQL5 VSS_12 NC_5 VDD_7 NC_5 VDD_7
T9 H8 B22 M24 G2 R1 R1
A-MDQL5 A-MDQL4 B-MDQL4 B-MDQL6 VDD_8 VDD_8
VSS_12 DQL5 A_DDR3_DQL[4] B_DDR3_DQL[4] DQL6 M2 R9 M2 R9
G2 F14 H23 H7 BA0 VDD_9 BA0 VDD_9
DQL6 A-MDQL6 A-MDQL5 A_DDR3_DQL[5] B_DDR3_DQL[5] B-MDQL5 B-MDQL7 DQL7 N8 N8
H7 A22 M23 B1 BA1 BA1
A-MDQL7 A-MDQL6 B-MDQL6 M3 M3
DQL7 A_DDR3_DQL[6] B_DDR3_DQL[6] VSSQ_1 BA2 BA2
B1 D15 K23 D7 B9 A1 A1
VSSQ_1 A-MDQL7 A_DDR3_DQL[7] B_DDR3_DQL[7] B-MDQL7 B-MDQU0 DQU0 VSSQ_2 VDDQ_1 VDDQ_1
B9 D7 C3 D1 J7 A8 J7 A8
A-MDQU0 B-MDQU1 CK VDDQ_2 CK VDDQ_2
VSSQ_2 DQU0 DQU1 VSSQ_3 K7 C1 K7 C1
D1 C3 G16 G21 C8 D8 CK VDDQ_3 CK VDDQ_3
VSSQ_3 DQU1 A-MDQU1 A-MDQU0 A_DDR3_DQU[0] B_DDR3_DQU[0] B-MDQU0 B-MDQU2 DQU2 VSSQ_4 K9 C9 K9 C9
D8 C8 B20 L22 C2 E2 CKE VDDQ_4 CKE VDDQ_4
A-MDQU2 A-MDQU1 B-MDQU1 B-MDQU3 D2 D2
VSSQ_4 DQU2 A_DDR3_DQU[1] B_DDR3_DQU[1] DQU3 VSSQ_5 VDDQ_5 VDDQ_5
E2 C2 F16 H22 A7 E8 L2 E9 L2 E9
VSSQ_5 DQU3 A-MDQU3 A-MDQU2 A_DDR3_DQU[2] B_DDR3_DQU[2] B-MDQU2 B-MDQU4 DQU4 VSSQ_6 CS VDDQ_6 CS VDDQ_6
E8 A7 C21 K20 A2 F9 K1 F1 K1 F1
A-MDQU4 A-MDQU3 B-MDQU3 B-MDQU5 ODT VDDQ_7 ODT VDDQ_7
VSSQ_6 DQU4 A_DDR3_DQU[3] B_DDR3_DQU[3] DQU5 VSSQ_7 J3 H2 J3 H2
F9 A2 E16 H20 B8 G1 RAS VDDQ_8 RAS VDDQ_8
VSSQ_7 DQU5 A-MDQU5 A-MDQU4 A_DDR3_DQU[4] B_DDR3_DQU[4] B-MDQU4 B-MDQU6 DQU6 VSSQ_8 K3 H9 K3 H9
G1 B8 A20 L21 A3 G9 CAS VDDQ_9 CAS VDDQ_9
A-MDQU6 A-MDQU5 B-MDQU5 B-MDQU7 L3 L3
VSSQ_8 DQU6 A_DDR3_DQU[5] B_DDR3_DQU[5] DQU7 VSSQ_9 WE WE
G9 A3 D16 H21 J1 J1
VSSQ_9 DQU7 A-MDQU7 A-MDQU6 A_DDR3_DQU[6] B_DDR3_DQU[6] B-MDQU6 NC_1 NC_1
C20 K21 T2 J9 T2 J9
A-MDQU7 B-MDQU7 RESET NC_2 RESET NC_2
A_DDR3_DQU[7] B_DDR3_DQU[7] L1 L1
NC_3 NC_3
L9 L9
NC_4 NC_4
F3 T7 F3 T7
DQSL NC_7 DQSL NC_7
G3 G3
DQSL DQSL
C7 A9 C7 A9
DQSU VSS_1 DQSU VSS_1
B7 B3 B7 B3
DQSU VSS_2 DQSU VSS_2
E1 E1
VSS_3 VSS_3
E7 G8 E7 G8
DML VSS_4 DML VSS_4
D3 J2 D3 J2
DDR_1600_SS DDR_1600_SS DDR_1600_HYNIX DDR_1600_HYNIX DDR_DVB_T2_2G DDR_DVB_T2_2G DDR_1600_MICRON DDR_1600_MICRON DMU VSS_5 DMU VSS_5
J8 J8
IC1201-*5 IC1202-*5 IC1201-*4 IC1202-*4 IC1201-*3 IC1202-*3 IC1201-*6 IC1202-*6 VSS_6 VSS_6
K4B1G1646G-BCK0 K4B1G1646G-BCK0 H5TQ1G63DFR-PBC H5TQ1G63DFR-PBC K4B2G1646C K4B2G1646C MT41J64M16JT-125:G MT41J64M16JT-125:G E3 M1 E3 M1
DQL0 VSS_7 DQL0 VSS_7
F7 M9 F7 M9
N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 N3
A0 VREFCA
M8 DQL1 VSS_8 DQL1 VSS_8
P7
A1
P7
A1
P7
A1
P7
A1
P7
A1
P7
A1
P7
A1
P7
A1
F2 P1 F2 P1
P3
A2
P3
A2
P3
A2
P3
A2
P3
A2
P3
A2
P3
A2
P3
A2
N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 N2
A3 VREFDQ
H1 F8 P9 F8 P9
P8
A4
P8
A4
P8
A4
P8
A4
P8
A4
P8
A4
P8
A4
P8
A4
P2
A5
P2
A5
P2
A5
P2
A5
P2
A5
P2
A5
P2
A5
P2
A5
H3 T1 H3 T1
R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 R8
A6 ZQ
L8 DQL4 VSS_11 DQL4 VSS_11
R2
A7
R2
A7
R2
A7
R2
A7
R2
A7
R2
A7
R2
A7
R2
A7
H8 T9 H8 T9
T8
A8
T8
A8
T8
A8
T8
A8
T8
A8
T8
A8
T8
A8
T8
A8
R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 R3
A9 VDD_1
B2 G2 G2
L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 L7
A10/AP VDD_2
D9 DQL6 DQL6
R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 R7
A11 VDD_3
G7 H7 H7
N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 N7
A12/BC VDD_4
K2 DQL7 DQL7
T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
A13 VDD_5
K8 T3
NC_6 VDD_5
K8 T3
NC_6 VDD_5
K8 B1 B1
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1
VDD_6
N1 VSSQ_1 VSSQ_1
M7
NC_5 VDD_7
N9 M7
NC_5 VDD_7
N9 M7
A15 VDD_7
N9 M7
A15 VDD_7
N9 M7
NC_5 VDD_7
N9 M7
NC_5 VDD_7
N9 M7
A15 VDD_7
N9 M7
A15 VDD_7
N9 D7 B9 D7 B9
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_8
R1
VDD_8
R1 DQU0 VSSQ_2 DQU0 VSSQ_2
M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 M2
BA0 VDD_9
R9 C3 D1 C3 D1
N8
BA1
N8
BA1
N8
BA1
N8
BA1
N8
BA1
N8
BA1
N8
BA1
N8
BA1
DQU1 VSSQ_3 DQU1 VSSQ_3
M3
BA2
M3
BA2
M3
BA2
M3
BA2
M3
BA2
M3
BA2
M3
BA2
M3
BA2
C8 D8 C8 D8
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1
VDDQ_1
A1 DQU2 VSSQ_4 DQU2 VSSQ_4
J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 J7
CK VDDQ_2
A8 C2 E2 C2 E2
K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 K7
CK VDDQ_3
C1 DQU3 VSSQ_5 DQU3 VSSQ_5
K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 K9
CKE VDDQ_4
C9 A7 E8 A7 E8
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2
VDDQ_5
D2 DQU4 VSSQ_6 DQU4 VSSQ_6
L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 L2
CS VDDQ_6
E9 A2 F9 A2 F9
K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 K1
ODT VDDQ_7
F1 DQU5 VSSQ_7 DQU5 VSSQ_7
J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 J3
RAS VDDQ_8
H2 B8 G1 B8 G1
K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 K3
CAS VDDQ_9
H9 DQU6 VSSQ_8 DQU6 VSSQ_8
L3
WE
L3
WE
L3
WE
L3
WE
L3
WE
L3
WE
L3
WE
L3
WE
A3 G9 A3 G9
NC_1
J1
NC_1
J1
NC_1
J1
NC_1
J1
NC_1
J1
NC_1
J1
NC_1
J1
NC_1
J1 DQU7 VSSQ_9 DQU7 VSSQ_9
T2 J9 T2 J9 T2 J9 T2 J9 T2 J9 T2 J9 T2 J9 T2 J9
RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2 RESET NC_2
L1 L1 L1 L1 L1 L1 L1 L1
NC_3 NC_3 NC_3 NC_3 NC_3 NC_3 NC_3 NC_3
L9 L9 L9 L9 L9 L9 L9 L9
NC_4 NC_4 NC_4 NC_4 NC_4 NC_4 NC_4 NC_4
F3 T7 F3 T7 F3 T7 F3 T7 F3 T7 F3 T7 F3 T7 F3 T7
DQSL NC_6 DQSL NC_6 DQSL NC_6 DQSL NC_6 DQSL NC_6 DQSL NC_6 DQSL NC_5 DQSL NC_5
G3 G3 G3 G3 G3 G3 G3 G3
DQSL DQSL DQSL DQSL DQSL DQSL DQSL DQSL
C7 A9 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9 C7 A9
DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1 DQSU VSS_1
B7 B3 B7 B3 B7 B3 B7 B3 B7 B3 B7 B3 B7 B3 B7 B3
DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2 DQSU VSS_2
E1 E1 E1 E1 E1 E1 E1 E1
VSS_3 VSS_3 VSS_3 VSS_3 VSS_3 VSS_3 VSS_3 VSS_3
E7 G8 E7 G8 E7 G8 E7 G8 E7 G8 E7 G8 E7 G8 E7 G8
DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4 DML VSS_4
D3 J2 D3 J2 D3 J2 D3 J2 D3 J2 D3 J2 D3 J2 D3 J2
DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5 DMU VSS_5
J8 J8 J8 J8 J8 J8 J8 J8
VSS_6 VSS_6 VSS_6 VSS_6 VSS_6 VSS_6 VSS_6 VSS_6
E3 M1 E3 M1 E3 M1 E3 M1 E3 M1 E3 M1 E3 M1 E3 M1
DQL0 VSS_7 DQL0 VSS_7 DQL0 VSS_7 DQL0 VSS_7 DQL0 VSS_7 DQL0 VSS_7 DQ0 VSS_7 DQ0 VSS_7
F7 M9 F7 M9 F7 M9 F7 M9 F7 M9 F7 M9 F7 M9 F7 M9
F2 P1 F2 P1 F2 P1 F2 P1 F2 P1 F2 P1 F2 P1 F2 P1
F8 P9 F8 P9 F8 P9 F8 P9 F8 P9 F8 P9 F8 P9 F8 P9
H3 T1 H3 T1 H3 T1 H3 T1 H3 T1 H3 T1 H3 T1 H3 T1
H8 T9 H8 T9 H8 T9 H8 T9 H8 T9 H8 T9 H8 T9 H8 T9
G2 G2 G2 G2 G2 G2 G2 G2
DQL6 DQL6 DQL6 DQL6 DQL6 DQL6 DQ6 DQ6
H7 H7 H7 H7 H7 H7 H7 H7
DQL7 DQL7 DQL7 DQL7 DQL7 DQL7 DQ7 DQ7
B1 B1 B1 B1 B1 B1 B1 B1
VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1 VSSQ_1
D7 B9 D7 B9 D7 B9 D7 B9 D7 B9 D7 B9 D7 B9 D7 B9
DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 DQU0 VSSQ_2 DQ8 VSSQ_2 DQ8 VSSQ_2
C3 D1 C3 D1 C3 D1 C3 D1 C3 D1 C3 D1 C3 D1 C3 D1
C8 D8 C8 D8 C8 D8 C8 D8 C8 D8 C8 D8 C8 D8 C8 D8
C2 E2 C2 E2 C2 E2 C2 E2 C2 E2 C2 E2 C2 E2 C2 E2
A7 E8 A7 E8 A7 E8 A7 E8 A7 E8 A7 E8 A7 E8 A7 E8
A2 F9 A2 F9 A2 F9 A2 F9 A2 F9 A2 F9 A2 F9 A2 F9
B8 G1 B8 G1 B8 G1 B8 G1 B8 G1 B8 G1 B8 G1 B8 G1
A3 G9 A3 G9 A3 G9 A3 G9 A3 G9 A3 G9 A3 G9 A3 G9

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. DDR_256 12

Serial Flash for SPI boot
+3.5V_ST +3.5V_ST
S_FLASH_MAIN_MACRONIX
OPT IC1401
R1404
+3.5V_ST 4.7K MX25L8006EM2I-12G
OS
C1401
CS# VCC 0.1uF
/SPI_CS 1 8
OPT
R1403
10K SO/SIO1 HOLD#
SPI_SDO 2 7
WP# SCLK
/FLASH_WP 3 6 SPI_SCK
R1405
OPT C GND SI/SIO0 33
R1401 4 5 SPI_SDI
0 OPT OS
B
Q1401
MMBT3904(NXP)
E
S_FLASH_MAIN_WINBOND
IC1401-*1
W25Q80BVSSIG
CS VCC
1 8
DO[IO1] HOLD[IO3]
2 7
%WP[IO2] CLK
3 6
GND DI[IO0]
4 5

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. SFLASH_1MB 13

* Option name of this page : CI_SLOT
(because of Hong Kong)
CI Region
CI SLOT
+5V_CI_ON
CI_DATA[0-7]
CI TS INPUT
AR1905 33
CI_DATA[0-7]
FE_TS_DATA[7]
+5V_Normal CI_MDI[7]
C1906 FE_TS_DATA[6]
FE_TS_DATA[0-7]
CI_MDI[6]
10uF FE_TS_DATA[5]
10V CI_MDI[5]
FE_TS_DATA[4]
R1903 EAG41860102 CI_MDI[4]
10K
P1901
/CI_CD1 P1902 AR1906 33
10067972-050LF
10067972-000LF FE_TS_DATA[3]
C1903 CI_MDI[3]
0.1uF FE_TS_DATA[2]
R1908 CI_SLOT_JACK CI_MDI[2]
16V 35 1 FE_TS_DATA[1]
100 CI_MDI[1]
36 2 CI_DATA[3] FE_TS_DATA[0]
AR1901 CI_MDI[0]
CI_DATA[0-7]
37 3 CI_DATA[4]
33 R1921
38 4 CI_DATA[5] 10K FE_TS_DATA[0-7]
CI_TS_DATA[4]
39 5 CI_DATA[6] AR1904 33
CI_TS_DATA[5]
40 6 CI_DATA[7] CI_MISTRT FE_TS_SYNC
CI_TS_DATA[6]
CI_TS_DATA[7] 41 7 R1919 47 FE_TS_VAL_ERR
/PCM_CE CI_MIVAL_ERR
42 8 CI_ADDR[10]
R1929
R1905 10K 43 9 0
CI_OE CI_MCLKI
CI_ADDR[11] FE_TS_CLK
CI_IORD 44 10
CI_ADDR[9] OPT
CI_IOWR 45 11 R1928
46 12 CI_ADDR[8] 0
CI_ADDR[13] T2_DMOD_CAM
CI_MDI[0] 47 13
48 14 CI_ADDR[14]
CI_MDI[1]
CI_MDI[2] 49 15 CI_WE
50 16 R1920 100
CI_MDI[3] /PCM_IRQA
51 17
C1905 OPT 52 18 OPT C1909
GND 0.1uF R1910 0 R1916 0 0.1uF
CI_MDI[4] 53 19
GND
CI_MDI[5] 54 20
55 21 CI_ADDR[12]
CI HOST I/F
CI_MDI[6]
56 22 CI_ADDR[7]
CI_MDI[7]
R1906 10K CI_ADDR[6]
57 23
R1902 47 58 24 CI_ADDR[5]
PCM_RST
R1901 47 59 25 CI_ADDR[4]
/PCM_WAIT
60 26 CI_ADDR[3]
REG
R1925 100 61 27 CI_ADDR[2]
CI_TS_CLK
R1926 33 CI_ADDR[1]
CI_TS_VAL 62 28
R1927 33 63 29 CI_ADDR[0]
CI_TS_SYNC
64 30 CI_DATA[0]
AR1903 33 CI_DATA[1]
65 31 CI_ADDR[0-14]
CI_TS_DATA[0] 66 32 CI_DATA[2]
+3.3V_CI
CI_TS_DATA[1] 67 33
CI_TS_DATA[2] 68 34
CI_TS_DATA[3]
OPT G2
2 69 G1
1
R1909
R1907 0
100 CI_DET IC1902
/CI_CD2
+5V_Normal GND C1913
0.1uF
1OE VCC 16V
GND 1 20
C1914 TOSHIBA
2pF
R1904 1A1 2OE
50V 2 19
10K GND PCM_A[0]
CLOSE TO MSTAR 0ITO742440D
C1904
0.1uF 2Y4 1Y1
CI_ADDR[7] 3 18 CI_ADDR[0]
16V
1A2 2A4
PCM_A[1] 4 17 PCM_A[7]
CI_MISTRT
CI_MIVAL_ERR
2Y3 1Y2
TC74LCX244FT
CI_MCLKI
1A3 2A3
PCM_A[2] 6 15 PCM_A[6]
2Y2 1Y3
1A4 2A2
PCM_A[3] 8 13 PCM_A[5]
CI DETECT
2Y1 1Y4
+3.3V_CI +3.3V_CI
+3.3V_Normal +3.3V_CI GND 2A1
IC1901 10 11 PCM_A[4]
74LVC1G32GW
B 1 5 VCC
/CI_CD2
L1901 A 2
BLM18PG121SN1D /CI_CD1 C1908 R1917
GND 3 4 Y
0.1uF 10K
16V
GND R1915
OPT 47
C1901 C1902 CI_DET AR1907 33
CI_DATA[0] PCM_D[0]
0.1uF 0.1uF R1918
47 CI_DATA[1] PCM_D[1]
CI_DATA[0-7]
/PCM_CD CI_DATA[2] PCM_D[2]

CI_DATA[3] PCM_D[3]
PCM_D[0-7]
AR1908 33
CI_DATA[4] PCM_D[4]
CI_DATA[5] PCM_D[5]
CI_DATA[6] PCM_D[6]
CI_DATA[7] PCM_D[7]
CI POWER ENABLE CONTROL
PCM_D[0-7]
CI_DATA[0-7]
+5V_CI_ON
+5V_Normal Q1902 L1902
AO3407A BLM18PG121SN1D
AR1912 33
S
CI_ADDR[8] PCM_A[8]
C1907 OPT C1911 OPT CI_ADDR[9] PCM_A[9]
R1914 C1910 OPT
0.1uF R1912 22K 4.7uF G R1923 C1912
0.1uF CI_ADDR[10] PCM_A[10]
16V 10K 16V 10K 0.1uF
16V CI_ADDR[11] PCM_A[11]
16V
AR1913 33
CI_ADDR[12] PCM_A[12]
CI_ADDR[13] PCM_A[13]
R1922 CI_ADDR[14] PCM_A[14]
2.2K
REG /PCM_REG
C
R1913
10K B Q1901
PCM_5V_CTL MMBT3904(NXP) AR1909 33
R1924 E CI_OE /PCM_OE
10K
CI_WE /PCM_WE
CI_IORD /PCM_IORD
CI_IOWR /PCM_IOWR

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. PCMCI 19

ETHERNET
* H/W option : ETHERNET
+2.5V_Normal
ETHERNET
L3707
JK2100-*1 JK2100 BLM18PG121SN1D
BS-R430051 XRJV-01V-0-D12-080
ETHERNET_XMULTIPLE
1
1 1 EPHY_TP
ETHERNET_UDE
2 OPT
2 2 D2105
5.5V
ADLC 5S 02 015
3
3 3 EPHY_TN
4
4 4 EPHY_RP
5 OPT OPT
5 5 D2103 D2104
5.5V 5.5V
ADLC 5S 02 015 ADLC 5S 02 015
6
6 6 EPHY_RN
7 OPT
7 7 D2101
5.5V
ADLC 5S 02 015
8
8 8
9 9
9 9
ETHERNET
C2104
0.01uF
50V

ETHERNET 21
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

IR/LED and control for on.y ’12 sub without IR-OUT.
+3.5V_ST
R2411
100
SENSOR_SCL P2400
OPT 12507WR-10L
D2403
R2404 R2405 C2408 5.48VTO5.76V
10K 10K 18pF
1% 1% 50V
L2401
R2401 BLM18PG121SN1D 1
100
KEY1 AMOTECH CO., LTD.
L2402 OPT R2412 100
R2402 D2402 SENSOR_SDA 2
100 BLM18PG121SN1D
5.6V OPT
KEY2
C2409 D2404
C2401 C2402 18pF 5.48VTO5.76V 3
0.1uF 0.1uF OPT
50V
D2401
5.6V
AMOTECH CO., LTD. JP2407
4
+3.5V_ST JP2408
5
L2403
BLM18PG121SN1D
6
C2403 C2404 7
0.1uF 1000pF
16V 50V R2413
LED_B/LG_LOGO
1.5K JP2409
8
LED_R/BUZZ
OPT
C2410
IR_OUT 0.1uF JP2410
16V 9
+3.5V_ST
10
11
R2426
3.3K
IR
C2407
100pF D2405
50V 5.48VTO5.76V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. IR/CONTROL_W/O_IR_OUT 23

GP4R_GLOBAL_TUNER_BLOCK
OPT
ERROR & VALID PIN IC2601
+3.3V_TU
74LVC1G08GW
OPT
RF_SW_OPT R2627
R2603 FE_TS_VAL 0
0 1 5
OPT
RF_SWITCH_CTL
C2640
RF_SW_OPT
+3.3V_TU FE_TS_ERR 0.1uF
2 16V
C2603
0.1uF
16V
Close to TUNER OPT
R2631
0
3 4 FE_TS_VAL_ERR
TU_T/C TU_T2/C TU_T/C/S2 R2614
R2611 100K
100
TU2602 TU2603 TU2601 TUNER_RESET
TDSS-G101D TDSN-G301D TDSQ-G001D C2622

0.1uF
16V
GPIO must be added. R2628
0
+3.3V_TU
OPT
NC NC_1 NC_1 R2615
1 1 1 0
RESET RESET RESET R2870 R2871

2 2 2 1K 1K
+3.3V_TU
SCL SCL SCL R2609 33 +3.3V_TU
3 3 3 TU_SCL
+3.3V_TU
SDA SDA SDA R2618
4 4 4 R2610 33 470
C2607 C2612 C2651 C2652 TU_SDA
20pF 20pF 20pF 20pF R2619
+3.3V +B1[3.3V] +B1[3.3V] 82
5 5 5 50V 50V 50V 50V TU_SIF
C2621 C2623 R2624 R2625
E
SIF SIF SIF 100pF 0.1uF 220 220
6 6 6 50V 16V Q2600
+1.8V_TU C2626 B MMBT3906(NXP)
+1.8V +B2[1.8V] +B2[1.8V] 0.1uF R2616
+2.5V_TU 16V 4.7K
7 7 7 OPT C TU_CVBS
C2602 C2604 C2606 OPT
100uF R2621 E
CVBS CVBS CVBS 100pF 0.1uF
16V
R2607 close to TUNER 0
8 8 8 50V 16V 0 Q2601
B MMBT3906(NXP)
IF_AGC NC_2 T/C_IF_AGC OPT
9 9 9 IF_AGC_MAIN
R2622
1K
C
HALF_NIM/EU_NON_T2
DIF[P] NC_3 T/C_DIF[P] C2600 R2608
10 10 10 should be guarded by ground
0.1uF 0
16V HALF_NIM/EU_NON_T2
DIF[N] NC_4 T/C_DIF[N] R2602
11 11 11 0
IF_P_MSTAR
+B3[3.3V] NC_2
12 12 +3.3V_T2_TU
12 IF_N_MSTAR
HALF_NIM/EU_NON_T2
+B4[1.23V] NC_3 R2601
T2
R2606
13 13 0 0
SHIELD NC_5 NC_4 OPT T2 T2 T2 Close to the tuner
14 14 C2601 C2614 C2617 C2618
0.1uF 100pF 0.1uF 10uF +1.23V_TU
16V 50V 16V 6.3V DEMOD_RESET
GND GND_1 T2
15 15 L2601
This was being applied to the only china demod,
BLM18PG121SN1D
ERROR ERROR close to TUNER +3.3V_TU so this has to be deleted in both main and ISDB sheet.
16 16 T2 T2
IC2603 IF_AGC_SEL
C2616 C2620 +1.8V_TU
0.1uF 0.1uF AP1117E18G-13 LNA2_CTL
SYNC SYNC
17 17 16V 16V R1
FULL_NIM_NON_S INADJ/GND
VALID VALID AR3701 47
OPT
18 18 OUT
R2873
FE_TS_ERR 200
MCLK MCLK FE_TS_SYNC 1%
19 19 FE_TS_VAL
AR3701-*1
D0 D0 FE_TS_CLK 33 R2872
20 20 1/16W 0
OPT R2632
R2876 R2 1
D1 D1 0
21 21 T2_DMOD_CAM
DVB_S
D2 D2 FULL_NIM_NON_S FE_TS_DATA[0-7] C2641 C2642
22 22 AR3702 47
FE_TS_DATA[0]
Vo=VREF*(1+R2/R1) 0.1uF 10uF
AR3702-*1 16V 10V
D3 D3 FE_TS_DATA[1] 33 VREF=1.25V
1/16W
23 23 FE_TS_DATA[2]
FE_TS_DATA[3]
D4 D4 DVB_S
24 24 FULL_NIM_NON_S
AR3703 47 FULL_NIM
D5 D5 FE_TS_DATA[4]
IC2602
25 25 FE_TS_DATA[5]
AR3703-*1 TJ4220GDP-ADJ [EP]GND
TU_CHINA D6 D6 FE_TS_DATA[6] Vo=0.8*(1+R2/R1)
33 +1.23V_TU
26 26 FE_TS_DATA[7] 1/16W
TU2603-*1 NC_1 GND
D7 D7 1 8
TDSN-C201D 27 27
DVB_S
FULL_NIM
FULL_NIM
THERMAL
R2633
R2629 12K
3.3K EN2 ADJ/SENSE R2
9
28 GND_2 2 7 1%
RF_S/W_CTL 28
1
RESET GND_3 +1.23V_TU C2635 VIN3 VOUT
2 0.1uF 3 6
SHIELD 29 DVB_S 16V
SCL L2600
3
+B3[1.23V] BLM18PG121SN1D NC4 NC_2 FULL_NIM
FULL_NIM
SDA 30 4 5 R2634 FULL_NIM
4 DVB_S C2645 C2647
DVB_S DVB_S 22K
+B1[3.3V] C2615 0.1uF 10uF
5 S2_RESET C2608 C2611
10uF +1.23V_TU 1%
R1 16V 10V
31 100pF 0.1uF
10V
SIF 50V 16V
6
+B4[3.3V]
+B2[1.8V] 32
7
DVB_S DVB_S
CVBS S2_F22_OUTPUT R2600 R2612 DVB_S
8 51 2.2K R2613
33 LNB_TX 10 S2_RESET
NC_1
9 +3.3V_S2_DE
S2_SCL
NC_2 34 DVB_S
10 C2619
NC_3 S2_SDA 0.1uF
11 16V
35
+B3[3.3V]
12 DVB_S DVB_S
LNB DVB_S C2624 C2625
+B4[1.23V] 36 100pF 0.1uF
13 R2605 22
DEMOD_SCL 50V 16V
NC_4 GND_4 DVB_S
14
37 R2604 22
GND 38 DEMOD_SDA
15
ERROR OPT OPT
16 C2610 C2613
18pF 18pF
SYNC
17 50V 50V
SHIELD DVB_S_FILTER
VALID
R2875-*1
+3.3V_TU +2.5V_TU +3.3V_TU +3.3V_S2_DE +3.3V_TU +3.3V_Normal
18
MLB-201209-0120P-N2
MCLK OPT
19
IC2600
20
D0 close to TUNER AP2114H-2.5TRG1 DVB_S
Pull-up can’t be applied L2602 L2606
DVB_S_NON_FILTER
D1 because of MODEL_OPT_2 BLM18PG121SN1D CIS21J121
21 R2875
0 Surge protectioin VIN VOUT
D2 LNB_OUT OPT
22 OPT GND C2630 DVB_S DVB_S C2643 C2646 C2648
DVB_S DVB_S DVB_S R2620 C2644
D3 OPT C2650 OPT DVB_S C2627 0.1uF C2632 C2634 22uF 0.1uF 22uF 0.1uF
23 C2605 C2609 D2600 R2874 1
C2649 18pF 33pF 0.1uF 16V 10uF 0.1uF 10V 16V 10V 16V
18pF 33pF 3.0SMCJ20A(suzhougrande) 2.2K 1/16W
D4 50V 50V 50V 20V 1W 16V 10V 16V
24 50V 5%
OPT OPT
D5 C2628 C2629
25
10uF 0.1uF
D7 10V 16V +3.3V_T2_TU
26
T2
D8 L2603
27
BLM18PG121SN1D
28
SHIELD T2 T2
C2631 C2633
10uF 0.1uF
10V 16V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. TUNER_EU 26

DVB-S2 LNB Part Allegro
(Option:LNB)
LNB
LNB D2702
ZD1 40V
40V SX34
2A 3A
LNB LNB LNB LNB +12V_LNB
C2701 C2713 C2705 C2707
0.01uF 1uF 68uF 68uF
50V 50V 35V 35V
LNB
L2700
LNB
33UH LNB
SP-7850_33 C2711 C2712 DCDC_GND and A_GND are connected
close to Boost pin(#1)
10uF 0.1uF
2.4A
25V 50V DCDC_GND and A_GND are connected in pin#27
DCDC_GND DCDC_GND PCB_GND and A_GND are connected
LNB close to VIN pin(#25)
D2703 DCDC_GND
MBR230LSFT1G A_GND
LNB_OUT
30V LNB LNB
C2703 D2700 Input trace widths should be sized to conduct at least 3A
0.1uF SX34
LNB 40V
50V
C2700
0.22uF
Ouput trace widths should be sized to conduct at least 2A
25V
GNDLX
[EP]
NC_9
A_GND
LNB
VIN
BFI
BFO
LX
A_GND
28
27
26
25
24
23
22
A_GND
BOOST 1 21 NC_8
THERMAL
VCP 2 20 NC_7
29
LNB TCAP BFC
3 19
C2702
0.1uF LNB NC_1 IC2700 NC_6
C2706 4 18
22000pF
A8290SETTR-T
TDO 5 LNB 17 NC_5 A_GND
A_GND
R2705 R2706
EXTM 6 16 NC_4 0 0
LNB_TX
TDI 7 15 NC_3
10
11
12
13
14
8
+3.3V_Normal
GND
VREG
SDA
ADD
SCL
NC_2
IRQ
A_GND DCDC_GND
A_GND A_GND
LNB
R2704
4.7K
Max 1.3A
R2701 33
R2702 33
+12V/+15V +12V_LNB
LNB
LNB
LNB
0.22uF
L2701
BLM18PG121SN1D
27pF
27pF
LNB
OPT
OPT
C2708
C2709
C2710
A_GND
DEMOD_SDA
DEMOD_SCL

DVB_S 27
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.

AUDIO AMP(STA380BWE)
+24V +24V_AMP
L3400
CIS21J121 L3402
10.0uH
24 NC_12
23 NC_11
22 NC_10
21 NC_9
20 NC_8
19 NC_7
18 NC_6
17 NC_5
16 NC_4
15 NC_3
14 NC_2
13 NC_1
+3.3V_AMP SPK_L+
C3420 C3424
C3400 C3402 0.22uF 1000pF
R3407 R3408 C3418 50V 50V
0.1uF 0.1uF 43 43
50V 50V 0.22uF SPEAKER_L
NC_13 25 12 GND_REG C3409 50V
0.1uF C3413 C3421 C3425
NC_14 26 11 VDD_REG 16V L3403
C3403 330pF 10.0uH 0.22uF 1000pF
0.1uF NC_15 27 10 OUT1A 50V 50V 50V
16V VDDDIG1 28 9 GND1 SPK_L-
GNDDIG1 29 8 VCC1
FFX3A 30 7 OUT1B
FFX3B 31 IC3400 6 OUT2A
+3.3V_Normal +3.3V_AMP EAPD/FFX4A 32 STA380BW 5 VCC2 L3404
C3404 TWARNEXT/FFX4B 33 4 GND2 10.0uH
L3401 2.2uF
VREGFILT 34 3 OUT2B SPK_R+
BLM18PG121SN1D 10V 49 C3414 C3422 C3426
THERMAL
AGNDPLL 35 2 VSS_REG C3408 330pF 0.22uF 1000pF
MCLK 36 1 VCC_REG 0.1uF 50V C3419 50V 50V
16V 0.22uF SPEAKER_R
R3409 R3410
37
38
39
40
41
42
43
44
45
46
47
48
43 43 50V
L3405 C3423 C3427
0.22uF 1000pF
BICKI
LRCKI
SDI
RESET
PWDN
INTLINE
SDA
SCL
SA
TESTMODE
GNDDIG2
VDDDIG2
[EP]
10.0uH
50V 50V
SPK_R-
+3.5V_ST AUD_MASTER_CLK
+3.3V_AMP
AUD_SCK +24V_AMP
NON_LIPS AUD_LRCK
R3412
10K
AUD_LRCH
NON_LIPS C3407 C3411 C3412 C3415 C3416 C3417
R3401 0.1uF 0.1uF 1uF 1uF 0.1uF 10uF
10K 16V 50V 50V 50V 50V 35V
NON_LIPS
R3402
100 AMP_RESET
NON_LIPS
C R3403 0
R3400 NON_LIPS
10K B Q3400 C3401 AMP_SDA
R3404 0
AMP_MUTE MMBT3904(NXP) 1000pF
50V AMP_SCL
E OPT OPT
C3405 C3406
33pF 33pF P3400
50V 50V WAFER-ANGLE
LIPS
R3411
0 SPK_L+
4
POWER_DET
SPK_L-
3
SPK_R+
2
SPK_R-
1

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. AMP_STA380BWE 34

IC102
NAND01GW3B2CN6E
NAND FLASH MEMORY +3.3V_Normal
<CHIP Config(LED_R/BUZZ)>
+3.3V_Normal
Boot from SPI CS1N(EXT_FLASH) 1’b0
NC_1
1 48
NC_29 Boot from SPI_CS0N(INT_FLASH) 1’b1 S7LR2_DIVX_MS10
NAND_FLASH_1G_NUMONYX IC101
NC_2 EAN60762401 NC_28
2 47 LGE2111A-T8
NC_3 NC_27 OS PCM_A[0-7] <CHIP Config>
3 46 PCM_D[0-7]
AR101 (I2S_OUT_BCK,I2S_OUT_MCK,PAD_PWM1PAD_PWM0)
NC_4 NC_26
4 45 22 B51_no_EJ : 4’b0000 Boot from 8051 with SPI flash PCM_D[0] W21
OS OS NC_5 I/O7 PCM_A[7] SB51_WOS : 4’b0001 Secure B51 without scramble PCM_D[1] PCMDATA[0]/GPIO126
R107 R109 5 44 AA18
1K 3.9K SB51_WS : 4’b0010 Secure B51 with scramble PCM_D[2] PCMDATA[1]/GPIO127
NC_6 I/O6 PCM_A[6] MIPS_SPE_NO_EJ : 4’b0100 Boot from MIPS with SPI flash AB22
6 43 PCM_D[3] PCMDATA[2]/GPIO128
MIPS_SPI_EJ_1 : 4’b0101 Boot from MIPS with SPI flash AE20
RB I/O5 PCM_A[5] MIPS_SPI_EJ_2 : 4’b0110 Boot from MIPS with SPI flash PCM_D[4] PCMDATA[3]/GPIO120
7 42 AA15 OS
/F_RB MIPS_WOS : 4’b1001 Secure MIPS without scramble PCMDATA[4]/GPIO119 AR103
R I/O4 PCM_A[4] MIPS_WS : 4’b1010 Scerur MIPS with SCRAMBLE PCM_D[5] AE21 22
8 41 PCM_D[6] PCMDATA[5]/GPIO118
/PF_OE +3.3V_Normal AB21 AE18
E NC_25 PCM_D[7] PCMDATA[6]/GPIO117 NF_CE1Z/GPIO138
9 40 Y15 AC17
/PF_CE0 PCM_A[0-14] PCMDATA[7]/GPIO116 NF_WPZ/GPIO198 /PF_WP
NC_7 NC_24 OS AD18
10 39 PCM_A[0] NF_CEZ/GPIO137 /PF_CE0
C102 W20 AC18
OPT OS NC_8 NC_23 10uF PCM_A[1] PCMADR[0]/GPIO125 NF_CLE/GPIO136 /PF_CE1
1K
1K
1K
1K
1K
R108 11 38 V20 AC19
C101 PCMADR[1]/GPIO124 NF_REZ/GPIO139 /PF_OE
1K PCM_A[2] W22 AD17
0.1uF VDD_1 VDD_2
OPT
OPT
OPT
OPT
PCMADR[2]/GPIO122 NF_WEZ/GPIO140 /PF_WE
OS
12 37 PCM_A[3] AB18 AE17
+3.3V_Normal VSS_1 VSS_2 OS C103 PCM_A[4] PCMADR[3]/GPIO121 NF_ALE/GPIO141 PF_ALE
R115
R117
R165
R123
R152
13 36 0.1uF AA20 AD19
OPT PCM_A[5] PCMADR[4]/GPIO99 NF_RBZ/GPIO142 /F_RB
NC_9 NC_22 AA21
R105 PCMADR[5]/GPIO101 AR104
1K 14 35 PCM_A[6] Y19
LED_R/BUZZ 22
NC_10 NC_21 OS PCM_A[7] AB17
PCMADR[6]/GPIO102
OS
15 34
AR102 AUD_SCK PCM_A[8] Y16
PCMADR[7]/GPIO103
CL NC_20 AUD_MASTER_CLK R148
16 33 22 PCM_A[9] PCMADR[8]/GPIO108
/PF_CE1 AUD_MASTER_CLK_0 AB19 H5
OPT PCMADR[9]/GPIO110 GPIO_PM[0]/GPIO6 POWER_DET
R104 AL I/O3 PCM_A[3] 56 PCM_A[10] AB20 K6
17 32 OPT
10K PF_ALE PWM1 PCMADR[10]/GPIO114 PM_UART_TX/GPIO_PM[1]/GPIO7 PM_TXD
C112 PCM_A[11] AA16 K5
W I/O2 PCM_A[2]
18 31 100pF PCM_A[12] PCMADR[11]/GPIO112 GPIO_PM[2]/GPIO8 INV_CTL
/PF_WE PWM0 AA19 J6
WP I/O1 PCM_A[1] 50V PCM_A[13] PCMADR[12]/GPIO104 GPIO_PM[3]/GPIO9 RL_ON
1K
1K
1K
1K
1K
19 30 AC21 K4
PCM_A[14] PCMADR[13]/GPIO107 GPIO_PM[4]/GPIO10 POWER_ON/OFF_1
NON_OS
NC_11 I/O0 PCM_A[0] AA17 L6
C
R106
20 29 PCMADR[14]/GPIO106 PM_UART_RX/GPIO_PM[5]/GPIO11 PM_RXD

C2
OS
1K
B NC_12 NC_19 PM_SPI_SCZ1/GPIO_PM[6]/GPIO12

R116
R118
R121
R124
R153
/PF_WP OPT 21 28 Y20 L5
Q101 /PCM_REG PCMREG_N/GPIO123 GPIO_PM[7]/GPIO13 /FLASH_WP
MMBT3904(NXP) NC_13 NC_18 M6
3.3K
R102
E 22 27 GPIO_PM[8]/GPIO14 SIDE_HP_MUTE
AB15 M5
OS
NC_14 NC_17 /PCM_OE PCMOE_N/GPIO113 GPIO_PM[9]/GPIO15 PANEL_CTL

23 26 AA22 C1
/PCM_WE PCMWE_N/GPIO197 PM_SPI_SCZ2/GPIO_PM[10]/GPIO16 PM_MODEL_OPT_0
NC_15 NC_16 AD22 M4
24 25 +5V_Normal /PCM_IORD PCMIORD_N/GPIO111 GPIO_PM[11]/GPIO17 AMP_MUTE
AD20
/PCM_IOWR PCMIOWR_N/GPIO109
A2 R147 33
R132 PM_SPI_SCK/GPIO1 SPI_SCK
AD21 D3 R154 22 R146 33
10K /PCM_CE PCMCE_N/GPIO115 PM_SPI_CZ0/GPIO_PM[12]/GPIO0 /SPI_CS
AC20 B2 OPT
R133 /PCM_IRQA PCMIRQA_N/GPIO105 PM_SPI_SDI/GPIO2 SPI_SDI
Y18 B1 R151 33
10K /PCM_CD PCMCD_N/GPIO130 PM_SPI_SDO/GPIO3 SPI_SDO
Y21 for SERIAL FLASH
/PCM_WAIT PCMWAIT_N/GPIO100
Y22
PCM_RST PCM_RESET/GPIO129
C108 C109
0.1uF 0.1uF CI_TS_CLK
Y14
OPT TS0CLK/GPIO87 CI_TS_VAL
NAND_FLASH_1G_SS NAND_FLASH_1G_TOSHIBA OPT U21 AA10
NAND_FLASH_1G_HYNIX USB1_OCD CI_TS_SYNC
EAN61857001 EAN61508001 PCM2_CE_N/GPIO131 TS0VALID/GPIO85
EAN35669102 R120 22 V21 Y12
IC102-*2 IC102-*3 /CI_CD1 USB1_CTL PCM2_IRQA_N/GPIO132 TS0SYNC/GPIO86 CI_TS_DATA[0-7]
IC102-*1 K9F1G08U0D-SCB0 TC58NVG0S3ETA0BBBH R122 22 R20
H27U1G8F2BTR-BC /CI_CD2 PCM2_CD_N/GPIO135 CI_TS_DATA[0]
OPT T20 Y13 from CI SLOT
PCM_5V_CTL PCM2_WAIT_N/GPIO133 TS0DATA_[0]/GPIO77 CI_TS_DATA[1]
U22 Y11
ERROR_OUT PCM2_RESET/GPIO134 TS0DATA_[1]/GPIO78 CI_TS_DATA[2]
NC_1 NC_29 NC_1 NC_29 MSTAR (IC101) Multi package (11.11.18~) AA12
NC_1 NC_29 1 48 1 48 to delete CI or gate for TS0DATA_[2]/GPIO79 CI_TS_DATA[3]
1 48 D4 AB12
NC_2 NC_28 NC_2 NC_28 UART1_TX/GPIO43 TS0DATA_[3]/GPIO80 CI_TS_DATA[4]
NC_2 NC_28 2 47 2 47 E4 AA14
2 47 TE(US)_Multi T8(EU)_Multi VD(CN)_Multi W1(KR)_Multi UART1_RX/GPIO44 TS0DATA_[4]/GPIO81 CI_TS_DATA[5]
NC_3 NC_27 NC_3 NC_27 IC101-*5 IC101-*6 IC101-*7 IC101-*8 N25 AB14
NC_3 NC_27 3 46 3 46 LGE2111A-TE LGE2111A-T8 LGE2111A-VD LGE2111A-W1 [MULTI] PM_TXD UART2_TX/GPIO65 TS0DATA_[5]/GPIO82 CI_TS_DATA[6]
3 46 N24 AA13
NC_4 NC_26 NC_4 NC_26 PM_RXD UART2_RX/GPIO64 TS0DATA_[6]/GPIO83 CI_TS_DATA[7]
NC_4 NC_26 4 45 4 45 C7 AB25 C7 AB25 C7 AB25 C7 AB25 B8 AB11
4 45 E6
GPIO36 LVA0P
AB23 E6
GPIO36 LVA0P
AB23 E6
GPIO36 LVA0P
AB23 E6
GPIO36 LVA0P
AB23 MODEL_OPT_6 UART3_TX/GPIO47 TS0DATA_[7]/GPIO84
NC_5 I/O7 NC_5 I/O8 F5
GPIO37 LVA0N
AC25 F5
GPIO37 LVA0N
AC25 F5
GPIO37 LVA0N
AC25 F5
GPIO37 LVA0N
AC25 for SYSTEM EEPROM A8 FE_TS_CLK
NC_5 I/O7 5 44 5 44 B6
GPIO38 LVA1P
AB24 B6
GPIO38 LVA1P
AB24 B6
GPIO38 LVA1P
AB24 B6
GPIO38 LVA1P
AB24 MODEL_OPT_7 UART3_RX/GPIO48 FE_TS_VAL_ERR
5 44 E5
GPIO39 LVA1N
AD25 E5
GPIO39 LVA1N
AD25 E5
GPIO39 LVA1N
AD25 E5
GPIO39 LVA1N
AD25 (IC104) AC15
NC_6 I/O6 NC_6 I/O7 D5
GPIO40 LVA2P
AC24 D5
GPIO40 LVA2P
AC24 D5
GPIO40 LVA2P
AC24 D5
GPIO40 LVA2P
AC24 TS1CLK/GPIO98 FE_TS_SYNC
NC_6 I/O6 6 43 6 43 B7
GPIO41 LVA2N
AE23 B7
GPIO41 LVA2N
AE23 B7
GPIO41 LVA2N
AE23 B7
GPIO41 LVA2N
AE23 R136 22 P23 AD15
6 43 E7
GPIO42 LVA3P
AC23 E7
GPIO42 LVA3P
AC23 E7
GPIO42 LVA3P
AC23 E7
GPIO42 LVA3P
AC23 I2C_SCL I2C_SCKM2/DDCR_CK/GPIO72 TS1VALID/GPI96 FE_TS_DATA[0-7]
R/B I/O5 RY/BY I/O6 F7
GPIO45 LVA3N
AC22 F7
GPIO45 LVA3N
AC22 F7
GPIO45 LVA3N
AC22 F7
GPIO45 LVA3N
AC22 R137 22 P24 AC16
R/B I/O5 7 42 7 42 AB5
GPIO46 LVA4P
AD23 AB5
GPIO46 LVA4P
AD23 AB5
GPIO46 LVA4P
AD23 AB5
GPIO46 LVA4P
AD23 I2C_SDA I2C_SDAM2/DDCR_DA/GPIO71 TS1SYNC/GPIO97
7 42 AB3
GPIO49 LVA4N
AB3
GPIO49 LVA4N
AB3
GPIO49 LVA4N
AB3
GPIO49 LVA4N
RE I/O4 RE I/O5 A9
GPIO50
V23 A9
GPIO50
V23 A9
GPIO50
V23 A9
GPIO50
V23 FE_TS_DATA[0] Internal demod out
RE I/O4 8 41 8 41 F4
GPIO51 LVB0P
U24 F4
GPIO51 LVB0P
U24 F4
GPIO51 LVB0P
U24 F4
GPIO51 LVB0P
U24 D2 AD16
8 41 AB1
GPIO52 LVB0N
V25 AB1
GPIO52 LVB0N
V25 AB1
GPIO52 LVB0N
V25 AB1
GPIO52 LVB0N
V25 RGB_DDC_SDA DDCA_DA/UART0_TX TS1DATA_[0]/GPIO88 FE_TS_DATA[1]
CE NC_25 CE NC_25 N6
I2C_SCKM0/GPIO53 LVB1P
V24 N6
V24 N6
V24 N6
V24 D1 AE15
CE NC_25 9 40 9 40 AB2
I2C_SDAM0/GPIO54 LVB1N
W25 AB2
W25 AB2
W25 AB2
W25 RGB_DDC_SCL DDCA_CK/UART0_RX TS1DATA_[1]/GPIO89 FE_TS_DATA[2]
9 40 AC2
GPIO73 LVB2P
W23 AC2
GPIO73 LVB2P
W23 AC2
GPIO73 LVB2P
W23 AC2
GPIO73 LVB2P
W23 AE14
NC_7 NC_24 NC_7 NC_24 GPIO74 LVB2N
AA23
GPIO74 LVB2N
AA23
GPIO74 LVB2N
AA23
GPIO74 LVB2N
AA23 TS1DATA_[2]/GPIO90 FE_TS_DATA[3]
NC_7 NC_24 10 39 10 39 LVB3P
Y24
LVB3P
Y24
LVB3P
Y24
LVB3P
Y24 AC13
10 39 LVB3N
AA25
LVB3N
AA25
LVB3N
AA25
LVB3N
AA25 TS1DATA_[3]/GPIO91 FE_TS_DATA[4]
NC_8 NC_23 NC_8 NC_23 LVB4P
AA24
LVB4P
AA24
LVB4P
AA24
LVB4P
AA24 P21 AC14
NC_8 NC_23 11 38 11 38 LVB4N LVB4N LVB4N LVB4N
PWM0 PWM0/GPIO66 TS1DATA_[4]/GPIO92 FE_TS_DATA[5]
11 38 AE24 AE24 AE24 AE24 N23 AD12
VCC_1 VCC_2 VCC_1 VCC_2 LVACKP
AD24
LVACKP
AD24
LVACKP
AD24
LVACKP
AD24 PWM1 PWM1/GPIO67 TS1DATA_[5]/GPIO93 FE_TS_DATA[6]
VCC_1 VCC_2 12 37 12 37 LVACKN
Y23
LVACKN
Y23
LVACKN
Y23
LVACKN
Y23 P22 AD13
12 37 LVBCKP
W24
LVBCKP
W24
LVBCKP
W24
LVBCKP
W24 PWM2 PWM2/GPIO68 TS1DATA_[6]/GPIO94 FE_TS_DATA[7]
VSS_1 VSS_2 VSS_1 VSS_2 LVBCKN LVBCKN LVBCKN LVBCKN R21 AD14
VSS_1 VSS_2 13 36 13 36 T25 T25 T25 T25 LED_B/LG_LOGO PWM3/GPIO69 TS1DATA_[7]/GPIO95
13 36 GPIO196
U23
GPIO196
U23
GPIO196
U23
GPIO196
U23 P20
NC_9 NC_22 NC_9 NC_22 GPIO193
T24
GPIO193
T24
GPIO193
T24
GPIO193
T24 PWM4/GPIO70
NC_9 NC_22 14 35 14 35 GPIO194
T23
GPIO194
T23
GPIO194
T23
GPIO194
T23 F6
14 35 GPIO195 GPIO195 GPIO195 GPIO195
LED_R/BUZZ PWM_PM/GPIO199
NC_10 NC_21 NC_10 NC_21
NC_10 NC_21 15 34 15 34
15 34
CLE NC_20 CLE NC_20
CLE NC_20 16 33 16 33 H6
16 33 KEY1 SAR0/GPIO31
ALE I/O3 ALE I/O4 G5
ALE I/O3 17 32 17 32 KEY2 SAR1/GPIO32
17 32 G4
WE I/O2 WE I/O3 SAR2/GPIO33
WE I/O2 18 31 18 31 S7LR2_DIVX_AT_ASE S7LR2_DIVX_AT_SPIL S7LR2_DIVX_DTS_AT S7LR2_DIVX_CN J5
18 31 IC101-*1 IC101-*2 IC101-*3 IC101-*4 SAR3/GPIO34
WP I/O1 WP I/O2 LGE2111A-TE LGE2111A-TE SPIL LGE2111A-W1 LGE2111A-VD R164 22 J4
WP I/O1 19 30 19 30 SCART1_MUTE SAR4/GPIO35
19 30 EU_OPT
NC_11 I/O0 NC_11 I/O1 C7 AB25 C7 AB25 C7 AB25 C7 AB25
NC_11 I/O0 20 29 20 29 E6
GPIO36 LVA0P
AB23 E6
GPIO36 LVA0P
AB23 E6
GPIO36 LVA0P
AB23 E6
GPIO36 LVA0P
AB23 LOCAL DIMMING
20 29 F5
GPIO37 LVA0N
AC25 F5
GPIO37 LVA0N
AC25 F5
GPIO37 LVA0N
AC25 F5
GPIO37 LVA0N
AC25
NC_12 NC_19 NC_12 NC_19 B6
GPIO38 LVA1P
AB24 B6
GPIO38 LVA1P
AB24 B6
GPIO38 LVA1P
AB24 B6
GPIO38 LVA1P
AB24 R23
NC_12 NC_19 21 28 21 28 E5
GPIO39 LVA1N
AD25 E5
GPIO39 LVA1N
AD25 E5
GPIO39 LVA1N
AD25 E5
GPIO39 LVA1N
AD25 L/DIM_VS VSYNC_LIKE/GPIO145
21 28 D5
GPIO40 LVA2P
AC24 D5
GPIO40 LVA2P
AC24 D5
GPIO40 LVA2P
AC24 D5
GPIO40 LVA2P
AC24
NC_13 NC_18 NC_13 NC_18 B7
GPIO41 LVA2N
AE23 B7
GPIO41 LVA2N
AE23 B7
GPIO41 LVA2N
AE23 B7
GPIO41 LVA2N
AE23
NC_13 NC_18 22 27 22 27 E7
GPIO42 LVA3P
AC23 E7
GPIO42 LVA3P
AC23 E7
GPIO42 LVA3P
AC23 E7
GPIO42 LVA3P
AC23 R24
22 27 F7
GPIO45 LVA3N
AC22 F7
GPIO45 LVA3N
AC22 F7
GPIO45 LVA3N
AC22 F7
GPIO45 LVA3N
AC22 L/DIM_SCLK SPI1_CK/GPIO201
NC_14 NC_17 NC_14 NC_17 AB5
GPIO46 LVA4P
AD23 AB5
GPIO46 LVA4P
AD23 AB5
GPIO46 LVA4P
AD23 AB5
GPIO46 LVA4P
AD23 R25
NC_14 NC_17 23 26 23 26 AB3
GPIO49 LVA4N
AB3
GPIO49 LVA4N
AB3
GPIO49 LVA4N
AB3
GPIO49 LVA4N
L/DIM_MOSI SPI1_DI/GPIO202
23 26 A9
GPIO50
V23 A9
GPIO50
V23 A9
GPIO50
V23 A9
GPIO50
V23 T21
NC_15 NC_16 NC_15 NC_16 F4
GPIO51 LVB0P
U24 F4
GPIO51 LVB0P
U24 F4
GPIO51 LVB0P
U24 F4
GPIO51 LVB0P
U24 SENSOR_SCL SPI2_CK/GPIO203
NC_15 NC_16 24 25 24 25 AB1
GPIO52 LVB0N
V25 AB1
GPIO52 LVB0N
V25 AB1
GPIO52 LVB0N
V25 AB1
GPIO52 LVB0N
V25 T22
24 25 N6
V24 N6
V24 N6
V24 N6
V24 SENSOR_SDA SPI2_DI/GPIO204
I2C_SDAM0/GPIO54 LVB1N I2C_SDAM0/GPIO54 LVB1N I2C_SDAM0/GPIO54 LVB1N I2C_SDAM0/GPIO54 LVB1N
AB2 W25 AB2 W25 AB2 W25 AB2 W25
GPIO73 LVB2P GPIO73 LVB2P GPIO73 LVB2P GPIO73 LVB2P
AC2 W23 AC2 W23 AC2 W23 AC2 W23
GPIO74 LVB2N GPIO74 LVB2N GPIO74 LVB2N GPIO74 LVB2N
AA23 AA23 AA23 AA23
LVB3P LVB3P LVB3P LVB3P
Y24 Y24 Y24 Y24
LVB3N LVB3N LVB3N LVB3N
AA25 AA25 AA25 AA25
LVB4P LVB4P LVB4P LVB4P
AA24 AA24 AA24 AA24
LVB4N LVB4N LVB4N LVB4N
AE24 AE24 AE24 AE24

LVACKP LVACKP LVACKP LVACKP
AD24 AD24 AD24 AD24
LVACKN LVACKN LVACKN LVACKN
Y23 Y23 Y23 Y23
LVBCKP LVBCKP LVBCKP LVBCKP
DIMMING I2C +3.3V_Normal
LVBCKN
W24
LVBCKN
W24
LVBCKN
W24
LVBCKN
W24
T25 T25 T25 T25

GPIO196 GPIO196 GPIO196 GPIO196
U23 U23 U23 U23
T24 T24 T24 T24
T23 T23 T23 T23
S7LR2_DIVX_MS10
A_DIM IC101
R156 10K
A_DIM PWM0 LGE2111A-T8
R140 R141 R160 R161 R144 R145
1K 1K 1K 1K 2.2K 2.2K
R157 100
PWM_DIM PWM2
C7 AB25
A_DIM AMP_RESET GPIO36 LVA0P RXA0+
C111 AMP_SDA E6 AB23
5V_DET_HDMI_1 GPIO37 LVA0N RXA0-
2.2uF AMP_SCL F5 AC25
5V_DET_HDMI_2 GPIO38 LVA1P RXA1+
B6 AB24
I2C_SDA GPIO39 LVA1N RXA1-
NON_OS_512k_ST NON_OS_512k_ATMEL E5 AD25
I2C_SCL AV_CVBS_DET GPIO40 LVA2P RXA2+
IC104-*3 IC104-*4 D5 AC24
DSUB_DET GPIO41 LVA2N RXA2-
SENSOR_SDA M24512-RMN6TP AT24C512C-SSHD-T B7 AE23
SC1/COMP1_DET GPIO42 LVA3P RXA3+
SENSOR_SCL E7 AC23
HP_DET GPIO45 LVA3N RXA3-
E0 VCC A0 VCC F7 AC22
1 8 1 8 OLP RXA4+
GPIO46 LVA4P
applied on only SMALL PCB AB5 AD23
TUNER_RESET GPIO49 LVA4N RXA4-
E1 WC A1 WP AB3
2 7 2 7
MODEL_OPT_0 GPIO50
A9 V23
GPIO51 LVB0P RXB0+
E2 SCL A2 SCL
HDCP EEPROM +3.3V_Normal Addr:10101-- EEPROM 3 6 3 6
MODEL_OPT_1
F4
GPIO52 LVB0N
U24
RXB0-
+3.3V_Normal AB1 V25
R172 0
*Option : HDCP_EEPROM AMP_SCL I2C_SCKM0/GPIO53 LVB1P RXB1+
VSS SDA GND SDA N6 V24
4 5 4 5 PM MODEL OPTION AMP_SDA
R173 OPT 0
I2C_SDAM0/GPIO54 LVB1N RXB1-
+3.5V_ST OPT AB2 W25
MODEL_OPT_2 GPIO73 LVB2P RXB2+
IC104 AC2 W23
IC103 DEMOD_RESET GPIO74 LVB2N RXB2-
CAT24WC08W-T AT24C256C-SSHL-T C105 EAN43349003 EAN43349004 AA23
C107 LVB3P RXB3+
R113 NVRAM_ATMEL 0.1uF Y24
4.7K 0.1uF LVB3N RXB3-
A0 1 VCC AA25
8 NVRAM_ST NVRAM_RENESAS R174 R177 RXB4+
10K 10K LVB4P
A1 2 WP IC104-*1 IC104-*2 TOUCH_KEY 11_SUB AA24
7 R127 4.7K A0 VCC LVB4N RXB4-
1 8
I2C_SCL M24256-BRMN6TP R1EX24256BSAS0A R178 100 OPT
A2 3 SCL R128 22 PM_MODEL_OPT_0 AE24
6 A1 WP
2 7 LVACKP RXACK+
VSS SDA R179 100 OPT AD24
E0 VCC A0 VCC RXACK-
4 5 A0’h 1 8 1 8
PM_MODEL_OPT_1
LVACKN
Y23
R129 22 I2C_SDA A2 SCL LVBCKP RXBCK+
3 6 R111 22 I2C_SCL W24
E1 WC A1 WP LVBCKN RXBCK-
2 7 2 7 R175 R176
GND SDA 10K 10K
4 5 R112 22 TACT_KEY 12_SUB
I2C_SDA T25
E2 SCL A2 SCL GPIO196 MODEL_OPT_3
C104 C106 3 6 3 6 U23
8pF 8pF GPIO193 MODEL_OPT_4
T24
EAN61133501 OPT OPT VSS SDA VSS SDA GPIO194 MODEL_OPT_5
4 5 4 5 T23
GPIO195 S2_RESET
EAN61548301 EAN62389501
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP4L_S7LR2 2011.11.02
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. FLASH/EEPROM/GPIO 50

MODEL OPTION
+3.3V_Normal +2.5V_Normal +3.3V_Normal

PIN NAME PIN NO. LOW HIGH
MODEL OPTION
+1.10V_VDDC
MODEL_OPT_0 AB3 FHD HD VDDC 1.05V +1.10V_VDDC
1K
1K
1K
1K
1K
1K
1K
1K
VDDC : 2026mA
MODEL_OPT_1 F4 PHM_OFF PHM_ON
DVB_T2
PHM_ON
120HZ
DVB_S
OS(not use) / NonOS_Non_ErrorOut

OLED
3D
HD
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
10uF
10uF
MODEL_OPT_2 AB2
10uF
NON_DVB_T2 DVB_T2
1uF
1uF
R4028
R4027
OPT OPT
R290
R291
R206
R208
R211
R226
MODEL_OPT_3 T25 NON_3D 3D
C275
C276
C228
OPT OPT
C4006
C4011
C4013
C4019
C4024
OPT OPT OPT OPT
OPT 100
C277
C280
C283
C292
C299
R201
IF_AGC_SEL MODEL_OPT_0 MODEL_OPT_4 U23 NON_OLED OLED
R202 BOOSTER_OPT100
LNA2_CTL MODEL_OPT_1
R203 RF_SW_OPT 100 MODEL_OPT_5 T24 NON_DVB_S DVB_S
RF_SWITCH_CTL MODEL_OPT_2
R204 OPT 100
MODEL_OPT_3
R4031 OPT 100 MODEL_OPT_4 MODEL_OPT_6 B8 NON_120HZ 120HZ
R4032 OPT 100 MODEL_OPT_5 HALF_NIM/ASIA HALF_NIM/ASIA
OS(use) OS(not use)
R4040 OPT 100 MODEL_OPT_6 MODEL_OPT_7 A8 NonOS_ErrorOut NonOS_Non_ErrorOut C4068-*1 C4069-*1 IC101
R4039 OPT 100 MODEL_OPT_7 68pF 68pF LGE2111A-T8
+1.10V_VDDC
Close to MSTAR
HALF_NIM/EU_NON_T2 HALF_NIM/EU_NON_T2 S7LR2_DIVX_MS10
1K
1K
1K
1K
1K
1K
1K
1K
NON_DVB_T2
NON_120HZ
NON_DVB_S
DTV_IF
NON_OLED
Normal Power 3.3V

PHM_OFF
NON_3D
R288 100 C257 0.1uF K12 G10

IF_P_MSTAR
FHD
OS(use) / NonOS_ErrorOut AVDDLV_USB GND_32

HALF_NIM/EU_NON_T2 G11
C4067 VDD33 GND_33
R4030
R4029
C4068 +3.3V_Normal G9 G12

R293
R294
R207
R209
R212
R227
HALF_NIM/EU_NON_T2 HALF_NIM/EU_NON_T2 OPT 100pF VDDC_1 GND_34

H9 G13
R289 100 C258 0.1uF VDDC_2 GND_35
IF_N_MSTAR L204 K10 G14
C4069 BLM18PG121SN1D VDDC_3 GND_36
100pF K11 G17
VDDC_4 GND_37
0.1uF
HALF_NIM/EU_NON_T2
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
L10 G18
10uF
10uF
10uF
IC101 VDDC_5 GND_38
OPT
OPT
OPT
OPT
OPT
OPT
OPT
M12 G19
LGE2111A-T8 M13
VDDC_6 GND_39
G24
VDDC_7 GND_40
C250 0.1uF R4002 47
C4043
C4044
TU_SIF N12 H11
C4001
C4007
C4012
C4014
C4020
C4025
C4031
VDDC_8 GND_41
C284
C293
C265
C267
C232
S7LR2_DIVX_MS10 C251 0.1uF R4003 47 P14 H12
C264 VDDC_9 GND_42
J2 AC4 1000pF P15 H13
CK+_HDMI1 RXACKP VIFP VDDC_10 GND_43
J3 AD3 ANALOG SIF OPT R10 H14
CK-_HDMI1 RXACKN VIFM VDDC_11 GND_44
K3 Close to MSTAR FB_CORE R14 H15
D0+_HDMI1 RXA0P VDDC_12 GND_45
J1 AC3 R15 H16
D0-_HDMI1 RXA0N IP +3.3V_Normal AVDD_AU33 VDDC_13 GND_46
K2 AE3 T10 H17
D1+_HDMI1 RXA1P IM VDDC_14 GND_47
K1 L227 H18
D1-_HDMI1 RXA1N BLM18PG121SN1D L208 GND_48
L2 AD4 HALF_NIM/EU_NON_T2 BLM18PG121SN1D H19
D2+_HDMI1 RXA2P SIFP GND_49
L3 AC5 P10 J9
D2-_HDMI1 RXA2N SIFM AVDD1P0 GND_50
T5 HALF_NIM/EU_NON_T2 C240 C241 P19 J10
DDC_SDA_1 DDCDA_DA/GPIO24 0.1uF FB_CORE FB_CORE GND_51
T4 C4064 HALF_NIM/EU_NON_T2 0.1uF R16 J11
DDC_SCL_1 0.1uF R4019
DDCDA_CK/GPIO23 10K AVDDL_MOD GND_52
V5 L11 J12
HPD1 HOTPLUGA/GPIO19 HALF_NIM/EU_NON_T2 AVDD10_LAN GND_53
R4004 M14 J13
0 MIUVDDC DVDD_DDR GND_54
AD2 J14
IF_AGC IF_AGC_MAIN GND_55
AE2 J15
RF_AGC C4065 GND_56
OPT 0.047uF W9 J16
R4001 AVDD2P5 AVDD2P5_ADC_1 GND_57
25V W10 J18
TUNER_I2C 0
HALF_NIM/EU_NON_T2 AVDD2P5_ADC_2 GND_58
AE6 W11 J19
I2C_SCKM1/GPIO75 TU_SCL AVDD2P5_ADC_3 GND_59
AD6 W12 J25
I2C_SDAM1/GPIO76 TU_SDA AVDD25_REF GND_60
Close to MSTAR K9
GND_61
Y17 K13
C261 22pF AVDD25_LAN GND_62
AD1 K14
XIN GND_63
AC1 V18 H10
R287
X201 AVDD2P5_MOD
XOUT AVDD_MOD_1 GND_64
1M
R5 24MHz C262 22pF U19 K18

PM_MODEL_OPT_1 HOTPLUGB/GPIO20 AVDD_MOD_2 GND_65
HDMI
K19
GND_66
AE9 D7 OPT R297 0 K22
RXCCKP SPDIF_IN/GPIO152 CI_DET GND_67
AC9 D6 W14 L8
RXCCKN SPDIF_OUT/GPIO153 SPDIF_OUT AVDD25_PGA AVDD25_PGA GND_68
AC10 W15 L9
AVSS_PGA
AD9
RXC0P
RXC0N
Normal 2.5V AVSS_PGA GND_69
GND_70
J8
AC11 E3 U7 L12
RXC1P USB0_DM AVDD_NODIE AVDD_NODIE GND_71
AD10 E2 +2.5V_Normal AVDD2P5 L13
RXC1N USB0_DP GND_72
AE11 SIDE USB L7 L18
RXC2P VDD33 AVDD_DVI_USB_1 GND_73
AD11 AC12 L211 AVDD2P5:172mA M7 L19
RXC2N USB1_DM SIDE_USB1_DM BLM18PG121SN1D AVDD_DVI_USB_2 GND_74
AE8 AE12 P7 M8
DDCDC_DA/GPIO28 USB1_DP SIDE_USB1_DP AVDD3P3_MPLL GND_75
AD8 R7 K8
DDCDC_CK/GPIO27 AMP_SCL AVDD_DMPLL GND_76
AC8 M10
HOTPLUGC/GPIO21 AMP_SDA C269 C270 C271 C273 C274 GND_77
C8 R213 22 DVB_S 10uF 0.1uF 0.1uF 0.1uF 0.1uF C4045 1uF M19 M11
I2S_IN_BCK/GPIO150 DEMOD_SCL OPT OPT DVDD_NODIE GND_78
F2 D8 R214 22 DVB_S L14
CK+_HDMI2 RXDCKP I2S_IN_SD/GPIO151 DEMOD_SDA GND_79
F3 D9 V7 M15
CK-_HDMI2 RXDCKN I2S_IN_WS/GPIO149 COMP2_DET AVDD_AU33 AVDD_AU33 GND_80
G3 W7 M16
D0+_HDMI2 RXD0P AVDD2P5_MOD AVDD_EAR33 GND_81
F1 B10 M18
D0-_HDMI2 RXD0N I2S_OUT_BCK/GPIO156 AUD_SCK AVDD25_PGA:13mA GND_82
G2 C9 R19 M25
D1+_HDMI2 RXD1P I2S_OUT_MCK/GPIO154 AUD_MASTER_CLK_0 L229 VDD33 VDDP_1 GND_83
G1 B9 BLM18PG121SN1D T19 N10
D1-_HDMI2 RXD1N I2S_OUT_SD/GPIO157 AUD_LRCH VDDP_2 GND_84
H2 N11
D2+_HDMI2 RXD2P GND_85
H3 W18 N13
D2-_HDMI2 RXD2N I2S_I/F C4070 AVDD_LPLL_1 GND_86
R6 0.1uF W19 N14
DDC_SDA_2 DDCDD_DA/GPIO30 AVDD_LPLL_2 GND_87
U6 C10 16V N15
DDC_SCL_2 DDCDD_CK/GPIO29 I2S_OUT_WS/GPIO155 AUD_LRCK GND_88
P5 V19 N16
HPD2 HOTPLUGD/GPIO22 VDD33 VDDP_NAND GND_89
R4 N17
CEC_REMOTE_S7 CEC/GPIO5 GND_90
AB9 C236 2.2uF EU_OPT N19
AUL0 SC1/COMP1_L_IN AVDD25_PGA GND_91
AA11 C237 2.2uF EU_OPT J17 K7
DSUB AUR0 SC1/COMP1_R_IN AVDD_MIU AVDD_DDR0_D_1 GND_92
P2 Y9 L219 K15 P8
DSUB_HSYNC HSYNC0 AUL1 BLM18PG121SN1D AVDD_DDR0_D_2 GND_93
R3 AA9 K16 P9
DSUB_VSYNC VSYNC0 AUR1 AVDD_DDR0_D_3 GND_94
N2 AA7 L15 M9
DSUB_R+ RIN0P AUL2 AVDD_DDR0_C GND_95
P3 AB8 P11
DSUB_R- RIN0M AUR2 C4027 GND_96
N3 Y8 C242 2.2uF 0.1uF K17 P13
DSUB_G+ GIN0P AUL3 COMP2_L_IN AVDD_DDR1_D_1 GND_97
N1 Y10 C243 2.2uF L223 L17 P16
DSUB_G- GIN0M AUR3 COMP2_R_IN AVDD_DDR1_D_2 GND_98
M3 AC7 AVSS_PGA M17 P17
DSUB_B+ BIN0P AUL4 PC_L_IN AVDD_DDR1_D_3 GND_99
M2 AD7 BLM18SG121TN1D L16 P18
DSUB_B- BIN0M AUR4 PC_R_IN AVDD_DDR1_C GND_100
M1 P12
DSUB_SOG SOGIN0 Close to IC with width trace GND_101
AUDIO IN R8
GND_102
E9 R9
SCART1_RGB/COMP1 V2
GND_EFUSE GND_103
R11
SC1_ID HSYNC1 GND_104
V3 W6 AUDIO OUT R12
SC1_FB VSYNC1 AUOUTL0 GND_105
R253 33 C211 0.047uF U3 V6 A23 R13
SC1_R+/COMP1_Pr+ RIN1P AUOUTL2 SCART1_Lout GND_1 GND_106
R254 68 C212 0.047uF U2 V4 TP207 B17 R17
RIN1M AUOUTL3 GND_2 GND_107
R255 C213 T1 Y7 C23 T8
SC1_G+/COMP1_Y+
R256
33
68 C214
0.047uF
0.047uF T2
GIN1P AUOUTR0
W5
TP208 DDR3 1.5V A5
GND_3 GND_108
T9
GIN1M AUOUTR2 SCART1_Rout GND_4 GND_109
R257 33 C215 0.047uF R2 U5 C11 N7
SC1_B+/COMP1_Pb+ BIN1P AUOUTR3 TP209 GND_5 GND_110
R258 68 C216 0.047uF R1 C19 T11
BIN1M GND_6 GND_111
C217 1000pF T3 C22 T12
SC1_SOG_IN SOGIN1 GND_7 GND_112
AVDD_DDR0:55mA D14 T13
*Opt : EU_OPT +1.5V_DDR D18
GND_8 GND_113
T14
AVDD_MIU
GND_9 GND_114
AA2 D19 T15
COMP2(common AV) R237 33 C218 0.047uF Y2
HSYNC2 L209 E17
GND_10 GND_115
T16
COMP2_Pr+ RIN2P L202 BLM18PG121SN1D GND_11 GND_116
R238 68 C219 0.047uF AA3 BLM18SG121TN1D E18 T17
RIN2M GND_12 GND_117
0.1uF
0.1uF
0.1uF
0.1uF
R239 33 C220 0.047uF W2 AD5 E19 U8

10uF
10uF
COMP2_Y+/AV_CVBS_IN GIN2P AUVRM GND_13 GND_118

OPT
OPT
OPT
1uF
R240 68 C221 0.047uF Y3 C249 C253 C256 C263 E22 U9

C4046
0.1uF
GIN2M 4.7uF 1uF 0.1uF 10uF GND_14 GND_119

R241 33 C222 0.047uF V1 AE5 F8 U10
COMP2_Pb+ BIN2P AUVAG GND_15 GND_120
R242 68 C223 0.047uF W3 AC6 F17 U11
C4036
C4038
C4009
C4042
BIN2M AUVRP GND_16 GND_121

C278
C281
C290
C224 1000pF W1 F18 U12

SOGIN2
AA6 H/P OUT F19
GND_17 GND_122
U13
EARPHONE_OUTL HP_LOUT GND_18 GND_123
AB6 G8 U14
CVBS In/OUT EARPHONE_OUTR HP_ROUT GND_19 GND_124
R244 33 C225 0.047uF AA8 H8 U15
TU_CVBS CVBS0 GND_20 GND_125
R245 33 C226 0.047uF Y4 AVDD_DDR1:55mA N22 U16
SC1_CVBS_IN CVBS1 GND_21 GND_126
R246 33 C227 0.047uF W4 C6 N21 U17
COMP2_Y+/AV_CVBS_IN CVBS2 ET_RXD[0]/RP/GPIO60 EPHY_RP GND_22 GND_127
AA5 C5 N20 R18
CVBS3 ET_TXD[0]/TP/GPIO57 EPHY_TP GND_23 GND_128
Y5 M22 V9
CVBS4 GND_24 GND_129
AA4 A6 M21 V10
CVBS5 ET_RXD[1]/RN/GPIO63 EPHY_RN GND_25 GND_130
Y6 C4 M20 V11
AA1
CVBSOUT0 ET_TXD[1]/LED1/GPIO56 SOC_RESET F10
GND_26 GND_131
V12
DTV/MNT_VOUT
CVBSOUT1 GND_27 GND_132
B5 V15 V14
C203 ET_TX_CLK/TN/GPIO59 EPHY_TN +3.5V_ST GND_28 GND_133
1000pF R252 68 C233 0.047uF AB4 C3 W16 V17
VCOM ET_TX_EN/GPIO58 GND_29 GND_134
OPT A3 R264 R265 R262 R263 *H/W opt : V8 T7
ET_MDC/GPIO61 49.9 49.9 49.9 49.9 GND_30 GND_135
B3 ETHERNET T18 E8
ET_MDIO/GPIO62 GND_31 GND_136
ET_COL/LED0/GPIO55
B4
C294 C295
STby 3.5V +1.10V_VDDC
MIUVDDC
Close to MSTAR 0.1uF 0.1uF
C200 AVDD_NODIE:7.362mA L228
DSUB_HSYNC DSUB_B+ BLM18PG121SN1D
4.7uF R217
N4 10V +3.5V_ST
DSUB_VSYNC DSUB_B- IRIN/GPIO4 IR 10 AVDD_NODIE
T6 R210 33 C231 0.047uF SOC_RESET
ARC0 HDMI_ARC L206
N5 HDMI_ARC D200 BLM18PG121SN1D C4071 C4062
DSUB_R+ DSUB_SOG PC_L_IN EPHY_RP HDMI_ARC 10uF 0.1uF
HWRESET SOC_RESET KDS181
DSUB_R- PC_R_IN EPHY_RN R200 C201 C286 C252
62K 0.1uF 0.1uF 0.1uF
DSUB_G+ HP_LOUT EPHY_TP
DSUB_G- SPDIF_OUT HP_ROUT EPHY_TN

FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS GP4L_S7LR2 2011.08.24
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. POWER,IN/OUT,H/W OPT 51

USB (SIDE)
USB1_DIODES
EAN61849601
L1451-*1
IC1450
MLB-201209-0120P-N2 AP2191DSG
120-ohm
NC GND +5V_USB
8 1
L1451
CIS21J121 $0.0665
OUT_2 IN_1
7 2
OPT OPT
R1458 R1459 C1451 OUT_1 IN_2 C1452
22uF C1453
2K 2K 6 3 10uF 0.1uF
1/8W 1/8W 16V 10V
5% 5%
FLG EN +3.3V_Normal
5 4
OPT
R1455
4.7K
USB1_CTL
R1454
10K
R1451
USB_1_32LS3500 USB_1_NORMAL 47
JK1450-*1 JK1450 USB1_OCD
3AU04S-305-ZC-(LG)
3AU04S-345-ZC-H-LG
1
USB DOWN STREAM
USB DOWN STREAM

2
SIDE_USB1_DM
3
SIDE_USB1_DP
4
OPT
D1451
5
RCLAMP0502BA

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. USB_OCP_DIODE_1EA 52

HDMI_2EA(NON SIDE HDMI)
5V_HDMI_1 +5V_Normal 5V_HDMI_2 +5V_Normal

5V_HDMI_1 5V_DET_HDMI_1
HDMI_1 R806
10K
A1
A2
A1
A2
HDMI_2
D821 D822
SHIELD MMBD6100 MMBD6100
C
C
R896
20 1K C R830
NON_CI_CAP 10K
Q802 B
C802 2SC3052 HPD1
19
0.1uF
R885 R889
HDMI_2
HDMI_2
16V E R884 R888
18
R804 2.7K 2.7K 2.7K 2.7K
1.8K R802
17 3.3K
DDC_SDA_1 DDC_SDA_1 DDC_SDA_2
16
DDC_SCL_1
15
DDC_SCL_1 DDC_SCL_2
14
HDMI_CEC
EAG59023302
13
CK-_HDMI1
12
11
CK+
10 CK+_HDMI1
9
D0-
D0-_HDMI1 For CEC
D0_GND
8
D0+
7 D0+_HDMI1
D1- R855
6 D1-_HDMI1 100
D1_GND HDMI_CEC CEC_REMOTE_S7
5
D1+
4 D1+_HDMI1
D2-
3 D2-_HDMI1
D2_GND
2
D2+
1 D2+_HDMI1
OPT
D802
JK802
HDMI_2 5V_HDMI_2 5V_DET_HDMI_2

HDMI_2
R807
10K
SHIELD HDMI_2
R895
1K
20 C HDMI_2
NON_CI_CAP_HDMI_2 HDMI_2 R828
C801 Q801 B 10K
19 2SC3052 HPD2
0.1uF
16V
18 HDMI_2 E
R803 HDMI_2
17 1.8K R801
3.3K
DDC_SDA_2
16
DDC_SCL_2
15 R805
HDMI_ARC
0
14 HDMI_ARC
HDMI_CEC
13
EAG59023302
CK-_HDMI2
12
11
CK+
10 CK+_HDMI2
D0-
9 D0-_HDMI2
D0_GND
8
D0+
7 D0+_HDMI2
D1-
6 D1-_HDMI2
D1_GND
5
D1+
4 D1+_HDMI2
D2-
3 D2-_HDMI2
D2_GND
2
D2+
1 D2+_HDMI2
OPT
D801
HDMI_2
JK801

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. HDMI_2EA(NON SIDE HDMI) 53

COMPONENT R2831
10K
COMP2_R_IN
OPT
OPT R2826 C2811 R2833
D2816 470K 1000pF 12K
5.6V 50V
R2832
10K
COMP2_L_IN
OPT OPT
R2825 C2810 R2834
JK2803 D2815 470K 1000pF 12K
PPJ234-05 5.6V 50V
6E [RD]E-LUG
+3.3V_Normal
5E [RD]O-SPRING_2
R2841
4E [RD]CONTACT_2 10K R2842
1K
[WH]O-SPRING COMP2_DET
5D
OPT
D2818
4C [RD]CONTACT_1 5.6V
5C [RD]O-SPRING_1
COMP2_Pr+
[RD]E-LUG-S OPT R2823
7C D2813
20V 75
5B [BL]O-SPRING
7B [BL]E-LUG-S
COMP2_Pb+
4A [GN]CONTACT
OPT R2824 +3.3V_Normal
D2812
20V 75
5A [GN]O-SPRING
6A [GN]E-LUG R2837
10K R2838
1K
AV_CVBS_DET
OPT
D2817 C2813
5.6V 0.1uF
16V
EU_OPT_AUK
IC2800-*1
SN324
OPT R2822 COMP2_Y+/AV_CVBS_IN
D2814 75
20V
OUT1 OUT4
1 14
INV_IN1 INV_IN4
2 13
NON_INV_IN1 NON_INV_IN4
3 12
VCC GND
Full Scart +3.3V_Normal
4 11
NON_INV_IN2 NON_INV_IN3
5 10
EU_OPT EU_OPT
R2808 R2810
10K 1K IN CASE OF SMALL= 15V INV_IN2 INV_IN3
SC1/COMP1_DET 6 9
+12V/+15V
EU_OPT
OPT C2801 OUT2 OUT3
D2810 0.1uF 7 8
5.6V EU_OPT
16V L2804
EU_OPT
R2809
0
SC1_SOG_IN EU_OPT E EU_OPT EU_OPT EU_OPT
R2828 C2815
Q2800 470 C2814
EU_OPT 0.1uF
JK2801 SC1_CVBS_IN
MMBT3906(NXP)
B
0.1uF
50V 50V SCART AUDIO OUT EU_OPT_BCD
PSC008-01 OPT
EU_OPT
EU_OPT
IC2800
EU_OPT EU_OPT C2802 C Q2801 AS324MTR-E1
C2800 MMBT3904(NXP) R2829
R2807 220pF 47K EU_OPT
47pF EU_OPT C EU_OPT CLOSE TO MSTAR
75 50V R2821 C2812 R2861
AV_DET 50V OUT1 OUT4
390 B 47uF 2.2K
22 DTV/MNT_L_OUT 1 14
COM_GND OPT 25V
D2801 EU_OPT EU_OPT
EU_OPT R2866
21 20V C2809 E DTV/MNT_VOUT C2821
SYNC_IN EU_OPT 100uF EU_OPT OPT 33K IN1- IN4-
10uF R2865 2 13
R2816 16V R2820
20 75 16V 470K
SYNC_OUT 390 EU_OPT EU_OPT EU_OPT EU_OPT
R2830 +12V/+15V C2819 R2857 R2868
19 OPT Rf EU_OPT 330pF 220K EU_OPT EU_OPT 10K IN1+ IN4+
SYNC_GND2 OPT R2827 15K 3 12
D2802 Rg R2862 C2823
D2809 180 5.6K 33pF
18 20V 20V Gain=1+Rf/Rg
SYNC_GND1 EU_OPT SCART1_Lout
R2815 VCC GND
17 22 4 11
RGB_IO EU_OPT EU_OPT
SC1_FB R2863
16 EU_OPT C2817
R_OUT 5.6K IN2+ IN3+
R2811 0.1uF SCART1_Rout 5 10
15 SC1_R+/COMP1_Pr+ 75
OPT EU_OPT 50V EU_OPT
RGB_GND R2867
D2803 R2806 EU_OPT EU_OPT IN2- IN3-
14 75 C2820 R2858 33K
R_GND 20V 6 9
330pF 220K EU_OPT
13 R2869
D2B_OUT 10K OUT2 OUT3
EU_OPT EU_OPT
12 R2860 7 8
G_OUT C2824
2.2K 33pF
OPT SC1_G+/COMP1_Y+
11 DTV/MNT_R_OUT
D2B_IN D2804 EU_OPT EU_OPT
10 20V R2802 C2822 OPT
G_GND 75 EU_OPT 10uF R2864
R2814 16V 470K
9 15K
ID
8 SC1_ID
B_OUT
SC1_B+/COMP1_Pb+ OPT EU_OPT
7 OPT D2811 R2817
AUDIO_L_IN EU_OPT 20V
D2805 R2803 3.9K
6 20V
B_GND 75
5
AUDIO_GND
4 EU_OPT
L2803 EU_OPT
AUDIO_L_OUT R2812
3 120-ohm 10K
AUDIO_R_IN SC1/COMP1_L_IN
2 EU_OPT
AUDIO_R_OUT OPT EU_OPT C2805 EU_OPT
1 D2806 R2804 R2818
470K 330pF
5.6V 12K
50V
EU_OPT
EU_OPT
L2802
120-ohm R2813
10K
SCART AUDIO MUTE
SC1/COMP1_R_IN
OPT EU_OPT EU_OPT EU_OPT

D2808 R2805 C2806 R2819 +3.5V_ST
5.6V 470K 330pF 12K DTV/MNT_L_OUT EU_OPT
50V R2839
EU_OPT 2K
Q2802 EU_OPT
EU_OPT EU_OPT R2844
MMBT3904(NXP) 10K
L2800 Q2804
BLM18PG121SN1D MMBT3906(NXP)
DTV/MNT_L_OUT
EU_OPT EU_OPT SCART1_MUTE
OPT DTV/MNT_R_OUT EU_OPT
D2807 C2803 C2807 3 1
R2840
5.6V 1000pF 4700pF EU_OPT EU_OPT
2K
50V Q2803 2 C2816
MMBT3904(NXP) 0.1uF
EU_OPT
L2801
BLM18PG121SN1D
DTV/MNT_R_OUT
OPT EU_OPT EU_OPT

D2800 C2808
5.6V C2804 4700pF
1000pF
50V

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. REAR_JACK_EU(ERRC) 55

RS-232C 4PIN
P1000
+3.5V_ST
12507WS-04L
VCC
1
PM_RXD
PM_RXD 2
GND
3
PM_TXD
PM_TXD 4
GND

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. RS232C_4PIN 57

MSTART DEBUG_4PIN
P1
12505WS-04A00
1 MSTAR_DEBUG_4P
3 RGB_DDC_SCL
4 RGB_DDC_SDA

THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC. MSTAR DEBUG_4PIN 58


Led TV LG 32ls3500

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Internal Use Only

North/Latin America http://aic.lgservice.com

P/NO : MFL67360705(1204-REV00) Printed in China

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SAFETY PRECAUTIONS ........................................................................ 3

SERVICING PRECAUTIONS ................................................................... 4

ADJUSTMENT INSTRUCTION ............................................................... 9

BLOCK DIAGRAM ................................................................................. 17

EXPLODED VIEW .................................................................................. 19

SCHEMATIC CIRCUIT DIAGRAM ..............................................................

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IMPORTANT SAFETY NOTICE

General Guidance Leakage Current Hot Check (See below Figure)

Before returning the receiver to the customer,

always perform an AC leakage current check on the exposed

Leakage Current Cold Check(Antenna Cold Check)

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Fuse and Conventional Resistor

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1. Application range 3. Test method

1) Temperature: 25 °C ± 5 °C(77 °F ± 9 °F), CST: 40 °C ± 5 °C

4 Video Input RCA(1EA) PAL,NTSC

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6. RGB input (PC)

3 640*480 31.469 59.94 VESA(SVGA)

4 800*600 37.879 60.31 VESA(XGA)

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1.2 Main manufacturing type

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* Boot file Download

Please Check the Speed :

5. Click “Auto” tab and set as below.

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3. Show the message “Copying files from memory”

5. Updating Completed, The TV will restart automatically.

* After downloading, have to check and adjust TOOL OPTION again.

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47LS4100-CA LGD 33079 2498 9539 13240 2048

42LS4100-CA LGD 33078 2498 9539 13240 2048

42CS460-CB LGD 32790 450 9291 13232 2561

32CS460-CB LGD 32788 450 9291 13232 2592

32LS3500-CA LGD 33060 33218 9547 13232 2080

42LM3400-CC LGD 33206 450 25803 46000 2080

42LM3100-CC LGD 33286 450 25795 46008 2080

32LM3100-CC LGD 33284 450 25795 46008 2080

4. Completed selecting Tool option.

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EZ ADJUST ADC Calibration

☞ Caution: Using ‘P-ONLY’ button of the Adjustment R/C , power on TV.

※ ADC Calibration Protocol (RS-232)

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4. Total Assembly line process

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◈ Summary about W/B information

Model Information W/B Information

※ Connecting picture of the measuring instrument (On Automatic control)

Auto-control interface and directions

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RS-232C COMMAND CENTER

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EZ ADJUST White Balance