M(IIl)-Pltysics-H/Pr.lBAIQ/lnst.

2019
PHYSICS - HONOURS PRACTICAL
Eighth Paper
(Group-A)
Full Marks : 50
The figures in the margin indicate full marks.
[Experiment_ 30; Laboratory Notebook- IO; Viva Voce -10)
Answer any one question
1. (a) Design a series regulated power supply from a given unregulated power supply with only one
C-filter. To design this series regulated power supply, use a transistor (SL100/2N3055/ ... ) as a
pass element, another transistor as a feedback amplifier and a Zener diode as a reference voltage
source. Give the design procedure with the following supplied data :
Design specification :
Output voltage of unregulated power supply == Vin(low) == .. .•.. to Vin(max) == .•• .volt
Regulated output voltage to be designed == volt
Maximum Load current == mA
P(pass) = P(feedback) == Breakdown voltage of Zener diode == volt at I2 == mA.
[Circuit diagram - 01 ; Determination of resistance values (calculated and procured) - 04 + 01;
Circuit fabrication - 02; Total == 08)
(b) Study the load regulation characteristics of the above fabricated circuit for a fixed input voltage
and draw the load current vs. load voltage graph. Calculate the percentage regulation at a specified
load current. Check what happens to the regulated output voltage for a fixed but minimum input
voltage if you increase the load current by 20% beyond the specified maximum value. Explain the
result.
[Data - 04; Graph - 02; Calculation of % regulation - 02 ; Output voltage for 20% increase in
current and explanation - 2+2; Total == 12]
Or,
Measure the ripple voltage and calculate the ripple factor at different load currents by varying the
load resistance in the above circuit for a fixed but maximum input voltage . Draw a graph showing
the variation of the ripple factor with the load current till it crosses 20% beyond the specified
maximum value. Explain the result.
[Data - 04; Calculation - 02; Graph - 04; Explanation - 02 ; Total = 12]
(c) Study the line regulation characteristics of the above fabricated circuit for regulated power supply
for a given load current by varying input voltage within the specified range between V . (I ) and
. .
Vin(max) · Draw the vanation f tn ow
o output voltage as a function of input voltage in a graph.
Calculate % input regulation at a specified load current and comment.
[Data and graph - 04+02; Calculation of % input regulation - 0 l; Comment - O1; Total = 08]
(d) Skill - 02.
 ( 2) M(/ll)-Physics-H/Pr./8AIQl/nsl

2. (a) Fabricate symmetrical astable multi vibrators using ~o tra~s~stors (of almost equal value of h FE)
!
capable of generating square waves of two frequenc1e~ w1thm 1 KHz to 0 KHz with two given
pairs of C's. The required Rs and Re are to be e~tnnated from the given data for each set.
Observe the output waveform in CRO and analyze it.
[Use D.C. voltage source= ... volt; le of each transistor = ... mA; ~min of each transistor = ...]
[Working formula - 02; Estimation of Re - 01; Estimation of Rs - 01; Fabrication - 02; Observation
of the output - 01 ; Analysis - 01: Total = 08]

(b) Record on-time and off-time of each transistor with CRO for two frequencies separately. Hence
compare the time period with the theoretical value. Observe the wave pattern at the collector and
the base of each transistor and draw the same replica (as far as possible) in a mm graph.
[Record of on-time - 0 1+0 1; Record of off-time - 01 +0 1; Comparison - 02; Drawing of the
patterns - 01 +0 1; Total = 08]

(c) Using the previous design as obtained in part (a), fabricate asymmetrical astable multivibrator using
previous C's (taking one C connected at the collector of one transistor and other C at the collector
of other transistor). Hence take record on-time and off-time of each transistor. Observe the wave
pattern at the collector and the base of each transistor and draw the same replica
(as far as possible) in a mm graph.
[Fabrication - 01 ; Record of on-time - 02+02 ; Record of off-time - 02+02; Drawing of the
patterns - 02+02; Total = 13]
(d) Skill - 01

3. (a) Design a CE amplifier for a mid-band gain of .... .. with the transistor supplied ___ with an
emitter resistance short-circuited by a suitable capacitor. (hie is to be supplied at a particular J ).
[Design procedure: Resistance calculation - 04; Capacitances - 02; Fabrication - 04; Total = 1OJ

(b) Record the operating points (Ve , I c and Vs) -

(c) Study the linearity of the voltage gain of the above designed amplifier at a suitable frequency still
clipping. Choose suitable amplitude of the input signal from the linear region to be used to get data
for drawing the frequency response curve of the amplifier.
[Record - 02+01 ; Graph - 01 ; Total = 04]

(d) With the above designed amplifier, study the frequency response characteristics with an output
bypass capacitor. Measure the bandwidth with capacitor only.
[Data - 06; Graph - 03 ; Band-width - 02; Total = 11]

(e) At a frequency corresponding to the mid-band, measure the amplitude of the voltage output without
the bypass capacitor CE and comment on the result so obtained. 2
 (3)
M(Ill)-Physics-H/pr.l8AIQ/lnst.

er the following questions :

4. (a) Answ . . .
(1). Desi·gn and
· fabricate an mvertmg amplifier
f h' using
. an OPAMP w'th 1 .
a suitable gain b
d Measure the output vo 1tage o t 1s amplifier by varying input 1 . _on a read
boar . .. I D h . . vo tage m suitable t
negative to pos1t1ve va ues. raw
I dI
t e vanat10n
.
of output voltage as a function
. s eps
from e in a graph. Determme .
the c ose oop gam of the above amplifier from th
of in
put
vo ltag . I I p f . e graph and
compare with the theoret1ca va ue. resence o any mput offset voltage should be recorded
and nullified.
(Design - 01; Fab~cation - 0 I; Off~et null - 01; Data - 03; Graph - 02; Gain calculation from
graph and companson - 01; Total - 09]

(ii) Fabricate a Schmitt trigger using a~ OPAMP and a Zener diode on a bread board. Calculate
the triggering voltages and hysteresis voltage. ~eas~re the output voltages corresponding to
the different values (less and greater than the tngge~mg :oltages) of the input voltage. Draw
the input vs. output voltage graph. D_etermine the tnggenng and hysteresis voltages from the
graph and compare with the theoretical values.
[Fabrication _ 02; Data- 03; Graph - 02; Comparison of triggering and hysteresis
voltages - 02; Total = 09]
(iii) Fabricate a stable differentiator circuit using an OPAMP on a bread board. Measure the
amplitude(~) of the output voltage by varying the frequency (t) of the input ac voltage having

amplitude ( VJ applied at the inverting terminal. Draw Vo vs. / graph.

VI

~et_e~ine the value of capacitor C from the slope of the graph and hence calculate the
hm1tmg frequency.
· 0 f 1· · ·
[Fabrication - 02; Data - 03; Graph - 02; Value of C from graph - Ol • Calcul t100
frequency - 0 I; Total = 09] ' a imttmg

(b) Skill - 03
 (4)
[ M(lll)-Physics-H/Pr./8AIQ/lnsL )
_ (a) Answer the following questions :
5
(i) Design and fabricate a non-inv · . •
board. Measure the ertmg amplifier using OPAMP with a suitable gam on a bread
firom negative to pos1 o_ut~put voltage of this amplifier by varying input voltage in suitable steps
ltage in a gr h D 1ve values . · Draw the vanat10n
• - of output voltage as a function · o f mpu
· t
vo . h ahp · etermme the closed loop gain of the above amplifier from the graph and
compare wit t e theoret · l l
.fi d tea va ue. Presence of any input offset voltage should be recorded
and nu111 1e .

[Design a nd Fabrication - 02; Offset null - OI· Data - 03 · Graph - 02 · Gain calculation from
graph and comparison - 0 I ; Total = 09] ' ' '

(ii) Design and fabricate a differential amplifier using OPAMP with a suitable gain on a bread
board. Measure the output voltage of this differential amplifier by varying input voltage in
suitable steps from negative to positive values. Draw the variation of output voltage as a
function of differential input voltage in a graph. Determine the closed loop gain of the above
amplifier from the graph and compare with the theoretical value. For zero differential input,
presence of any input offset voltage should be recorded and nullified.
[Design and Fabrication - 02; Offset null - 0 I; Data - 03; Graph - 02; Gain calculation from
graph and comparison - 0 I; Total = 09]

(iii) Fabricate an integrator circuit using an OPAMP on a bread board. The integrator circuit
should be free from OPAMP saturation for de signal. Measure the amplitude ( V0 ) of the
output voltage by varying the frequency (f) of the input ac voltage having amplitude ( V)

applied at the inverting terminal. Draw V; vs. f graph. Determine the value of capacitor C
Vo
from the slope of the graph and hence calculate the limiting frequency.
[Fabrication - 02; Data - 03 ; Graph - 02; Value of C from graph - 0 I ; Calculation of limiting
frequency - 01; Total = 09]

(b) Skill - 03
 (5) (M(lll)-Physics-H/Pr./8AIQ/Insl)
6. (a) Choose one pair of R -
(b)
w· h . and C for fabncating a Wien-Bridge oscillator of frequency ·· ... KHz. 2
tt this pair of R nd
a C, study lead-lag network of the Wien-Bridge oscillator to be con structed.
Determine the phase shift and Vout
by varying frequency of the input signal.
V;n

Plot (i) phase shift vs. fr Vout

equency and (ii) V vs. frequency curves in separate graph paper.
m

Find the frequency for zero phase shifts and the frequency for maximum value of Vout from the
V;n
graph and comment with the theoretical value.
[Theory and circuit - 03; Recording of Data - 03+03 ; Graph - 02+02; Results from graph- 02;
Total= 15]
(c) Construct Wien-Bridge oscillator with the above pair of Rand C, an OPAMP and semiconductor
diodes. Measure the frequency and amplitude of the sine wave output of the oscillator with a
CRO. Compare with the theoretical values. Study the variation of amplitude of oscillation with the
resistance R 3 connected in series with the parallel combination of diodes. Use at least four
different values of the resistance R 3 .
[Fabrication - 04; Frequency and amplitude of the output - 02; Comparison with the theoretical
value - 02; Effect of the resistance R 3 - 03 ; Total= 11]
(d) Skill - 02
 ( 6) ( M(lll)-Physics-H/Pr.lBAIQ/lnsL )
7. Design and fabricate a t
heater an oil/w t b emperature controller with help of OPAMPs, a thermistor, a thermometer, a
' a er ath and a relay/SCR.
(a) Calibrate the sensor of th b
h . e a ove temperature controller by measuring the voltage across the
st0 th
thermi r or e reference voltage and the temperature of the bath with the help of a standard
t ermometer. Plot the thermistor voltage vs. temperature of the bath or the reference voltage vs.
temperature of the bath.

[M~a s urement of resi~tance of the thermistor at room temperature - Ol ; Choice of series

resistance - 02; Recordmg of data voltage versus temperature data - 03 ; Graph - 03 ; Total= 09]
(b) Construct a temperature controller for temperatures of .........°C and .........°C respectively using
the above calibrated thermistor and the following process outlined below. Amplify the voltage
developed across the thermistor using a suitable gain as necessary with operational amplifier
circuit. Determine the gain of the amplifier and compare it with the theoretical value. Apply the
amplified voltage to a comparator circuit made up of operational amplifier whose output current
is amplified by a transistor. Join the output of the transistor to the ON/OFF system of the electrical
heater as supplied. Measure the temperature of the oven/bath in suitable interval up to 10 minutes
for each of the two specified temperature values. Plot this data for any one of the temperatures
showing at least two switching. Discuss how the transistor acts as a switch.
[Circuit diagram - 02; Fabricati~n. of the ~mpli~er - ~3 ; ~ata for gain _and comparison - ?2;
Fabrication of comparator - 03 ; Jommg transistor with esttmatton of base res1stance - 02; Recordmg
of temperature vs. time data - 03+03 ; Graph showing the variation of temperature as a function
of time - 02 ; Discussion - 01 ; Total = 21]
 (7) ( M(lll)-Plrysics-H/Pr.lRAIQ/lnsL)
8. (a) Design S-R flip fl -h . . . . h d .h
'enable' : - op wit NAND/NOR gates and verify the following cond11Ions wtt an wit out

(i) When S = I and R = 0, Q is 1

(ii) When S = O and R = I, Q is 0
(iii) When S = 0 and R = O, Q h o Ids the prev10us
- value.
(Circuit diagram - 02; Data for verification_ 04; Total = 06]

(b) Convert th e above S-R flip-flop into J-K flip-flop and verify the following conditions with and
without 'enable':
(i) When J = 1 and K = 0, Q is I
(ii) When J = 0 and K = I , Q is O
(iii) When J = 0 and K = 0, Q holds the previous value without enable.
Measure the output voltage under the condition J = l and K = 1 and comment. How can you
conclude from your experimental data that a flip-flop is an one bit memory device? Discuss.
[Circuit diagram - 02; Data for verification - 04; Result and comment for J=l and K = 1- 02;
Discussion - 02; Total = I OJ

(c) Design and fabricate a 4: I Multiplexer using basic gates of combinational logic. Draw the circuit
diagram, write down the identity and varify the result.
[Circuit diagram - 02; Data for verification - 03 ; Identity - 0 I; Total = 06]
Or,
Design and fabricate a MOD-5 counter using IC 7473 and NAND gates.
[Circuit diagram - 03 ; Data for verification - 03; Total= 06]

(d) Design and fabricate a l :4 Demultiplexer using basic gates of combinational logic. Draw the circuit
diagram, write down the identity and verify the result. Can you think that a Multiplexer may be
utilized as a basic gate? Discuss.
[Circuit diagram - 02; Data for verification - 03 ; Identity - 0 l; Discussion - 02; Total = 08]
Or,
Design and fabricate a MOD-IO counter using IC 7473 and NAND gates.
[Circuit diagram - 04; Data for verification - 04; Total = 08]