1

TECHNOLOGICAL INSTITUTE OF THE PHILIPPINES

938 Aurora Blvd., Cubao, Quezon City

COLLEGE OF ENGINEERING AND ARCHITECTURE

ELECTRONICS ENGINEERING DEPARTMENT

1ST SEMESTER AY 2019-2020

MIDTERM

POWER ELECTRONICS
ECE 112
EC42FB11

BUCK CONVERTER
DC-DC CONVERTER

Submitted to:

Submitted on:
September 9, 2019

Submitted by:
POWER
 2

BUCK CONVERTER
DC-DC CONVERTER

Abstract— Nowadays, the DC-DC converter application has II. OBJECTIVES

been increases from our cellular devices to Machine power
General Objective
supply. On our final project we will design and simulate DC-
DC Buck Converter, that is capable of providing up to 5 Volts The general objective of this project is to create a DC
to a device. to DC buck converter with an input voltage of 12V and an
output voltage of 5V.
I. INTRODUCTION
Specific Objective
In this modern world, technology took over almost ● Be familiarize on buck converter.
everything and it is already part of our daily life. ● To understand how does buck converter works.
Technology helps us to communicate with our family and
friends, we also uses in our school and work and some of ● To determine the parameters of the output voltages for
the dc-dc converters.
the examples are cell phones, laptop, etc. In these devices,
there is one in common that keeps the user safe and the III. METHODOLOGIES
device worked and that is buck converter.

A buck converter (step-down converter) is a DC-to-

DC powerINPUT PROCESS
converter which steps down voltage OUTPUT
(while
stepping up current) from -Computation
its input (supply) to itsBuck
output
of the
(load).Software:
It is a classcomponents of switched-mode converter
power
with output
supply (SMPS) typically -Simulation of
containing at least
voltage two
of 5V
the circuit
- LTspice (a diode and a transistor, although modern
semiconductors using LTspice
-Kicad -Measuring
buck converters frequently replace the diode with a second
the all the
transistor used for synchronous rectification) and at least
parameters
one energy storage element, a capacitor, inductor, or the
two in combination. To reduce voltage ripple, filters made
of capacitors (sometimes in combination with inductors)
IV. DESIGN SPECIFICATIONS
are normally added to such a converter's output (load-side
filter) and input (supply-side filter). Table 1. Design Specifications.

Specifications Ratings
Maximum Input Voltage Vin(Max) 12V
Average Input Voltage Vin(Avg) V
Minimum Input Voltage Vin(Min) V
Switching Frequency fs 40 kHz
Efficiency η 80 %
Output Power Pout 1W
Output Voltage Vout 5V
Percent Ripple %r 1%
Percent Line Regulation %RegLine 5%
Percent Load Regulation %RegLoad 5%
Percent Current Ripple %ΔIL 40 %
The conceptual model of the buck converter is best
understood in terms of the relation between current and
voltage of the inductor. Beginning with the switch open V. THEORY OF OPERATION
(off-state), the current in the circuit is zero. When the
switch is first closed (on-state), the current will begin to Buck Converter is used in SMPS circuits where the DC
increase, and the inductor will produce an opposing voltage output voltage needs to be lower than the DC input voltage.
across its terminals in response to the changing current. The DC input can be derived from rectified AC or from any
This voltage drop counteracts the voltage of the source and DC supply. It is useful where electrical isolation is not
therefore reduces the net voltage across the load. needed between the switching circuit and the output, but
where the input is from a rectified AC source, isolation
 3
between the AC source and the rectifier could be provided
by a mains isolating transformer.

The switching transistor between the input and

output of the Buck Converter continually switches on and
off at high frequency. To maintain a continuous output, the
circuit uses the energy stored in the inductor L, during the
on periods of the switching transistor, to continue
supplying the load during the off periods. The circuit
operation depends on what is sometimes also called a
Flywheel Circuit. This is because the circuit acts rather like
a mechanical flywheel that, given regularly spaced pulses
of energy keeps spinning smoothly (outputting energy) at
a steady rate.

Buck Converter Operation Transistor Switch ‘off’ Period

The buck Converter circuit consists of the switching
transistor, together with the flywheel circuit (Dl, L1 and
C1). While the transistor is on, current is flowing through
the load via the inductor L1. The action of any inductor
opposes changes in current flow and also acts as a store of
energy. In this case the switching transistor output is
prevented from increasing immediately to its peak value as
the inductor stores energy taken from the increasing
output; this stored energy is later released back into the
circuit as a back e.m.f. as current from the switching
transistor is rapidly switched off.
When the transistor switches off as shown in Fig
3.1.3 the energy stored in the magnetic field around L1
is released back into the circuit. The voltage across the
inductor (the back e.m.f.) is now in reverse polarity to
the voltage across L1 during the ‘on’ period, and
sufficient stored energy is available in the collapsing
magnetic field to keep current flowing for at least part of
the time the transistor switch is open.
The back e.m.f. from L1 now causes current to
flow around the circuit via the load and D1, which is
now forward biased. Once the inductor has returned a
large part of its stored energy to the circuit and the load
voltage begins to fall, the charge stored in C1 becomes
the main source of current, keeping current flowing
through the load until the next ‘on’ period begins.

The overall effect of this is that, instead of a large

square wave appearing across the load, there remains
only a ripple waveform, i.e. a small amplitude, high
frequency triangular wave with a DC level.

Transistor Switch ‘on’ Period

When the switching transistor is switched on, it is
supplying the load with current. Initially current flow to the
load is restricted as energy is also being stored in L1,
therefore the current in the load and the charge on C1 builds
up gradually during the “on” period. Notice that throughout
the on period, there will be a large positive voltage on D1
cathode and so the diode will be reverse biased and
therefore play no part in the action.
 4
VI. SYSTEM DIAGRAMS
● Block Diagrams. Show in a basic and general sense
what subsystems/parts comprise the whole system.
Indicate all necessary connections and explain how
each of them interacts with one another.
Note that the equation is centered using a center tab
stop. Be sure that the symbols in your equation have been
defined before or immediately following the equation. Use
“(1),” not “Eq. (1)” or “equation (1),” except at the
beginning of a sentence: “Equation (1) is ...”
A. Computations
i. Ideal Values
Creating a buck convert with an output voltage of 5V
1. Computation of Duty Cycle based on the
given input and output voltage

D=Vo/Vs
D=5V/12V
D=0.42
2. Compute for the IL

Figure 2. Block IL =Vo/R

Diagram.
= 5V/(6.2k//2k)
● Schematic Diagrams. Show and explain the =3.3mA
schematic diagram for the external 3. Compute for the value of ΔIL
hardware/circuitry made. Make sure it is still clear
when printed.
ΔIL=((Vs-Vo)/L)DT
=((12V-5V)/(13Mh)(0.42)(1/40k)
=5.37mA

4. Compute Imax and Imin

Imax= IL + ΔIL/2
=3.3mA+(5.37mA/2)
=2.688A

Imin= IL -ΔIL/2
Figure 3. Schematic Diagram. =3.3mA-(5.37mA/2)
=-2.68mA

5. Calculate the value of the Inductor

L=1.25Lmin Lmin=(1-D)R/2f
VII. COMPUTATIONS AND SIZING
=1.25( 10.95Mh) =(1-
Place necessary computations and sizing here. Sizing
0.42)(1.51k)/2(40k)
refers to the finding the closest value to the computed
values and the effect of it to your system, such as possible = 13.69mH =10.95mH
errors to theoretical values/parameters. Synthesis refers to
the analysis of the possible effect(s) of sizing. Final answers 6. Calculate the value of the Capacitor
should be boldfaced. Number equations consecutively.
Equation numbers, within parentheses, are to position flush
right, as in (1), using a right tab stop. To make your C=(1-D)/8L(%r)f^2
equations more compact, you may use the solidus ( / ), the =(1-0.42)/8(13.69mH)(0.05)(40k)^2
exp function, or appropriate exponents. Italicize Roman =661.97uF
symbols for quantities and variables, but not Greek
symbols. Use a long dash rather than a hyphen for a minus
sign. Punctuate equations with commas or periods when
Table 2. Ideal Values Summary.
they are part of a sentence, as in
Parameters Calculated Value
a + b =(1) α + β = χ. (1)
 5
D 0.42 Step 7: Now we will calculate the Toff time. As we
IL 3.3mA
ΔIL 5.37mA
calculated the Ton + Toff and Ton / Toff previously, the
Imin -2.68mA calculation will be easier now.
Imax 2.688mA
Lmin 13.69mH Toff=(ton+toff)/(ton/toff)+1
L 10.95mH
C 661.97uF
Toff=25uS/0.95Us+1

ii. Actual Values Toff=12.95uS

Step 1: First, we need to select the diode. We will choose

widely available diode 1N5819. as per the datasheet, at
1A forward current the forwrd voltage of the diode will be Step 8: Now the next step is to calculate Ton.
0.60V.
Ton=(ton+toff)-toff
Step 2: Next we compute for the inductor and switching
Ton=25uS-12.95uS
current.Our inductor current is 1A.
Ton=12.05uS
Step 3: Calculate for the ripple current of the inductor. A
typical inductor use 20-40% of the average output current.
So, we choose the inductor ripple current 30%.
Step 9 We need to choose the timing Capacitor Ct, which
Iripple= 1A(30%) will be required to produce the desired frequency.

Iripple=0.30A Ct=4.0x10^-5(ton)

Ct=4.0x10^-5(12.05uS)

Step 4: Compute for the switching current Ct=482pF

IL(avg) + Iripple/2 = 1 + .30/2 = 1.15A Step 10: Calculate the Inductor value

Step 5: Calculate the ton/toff using the formula from

the datasheet.
Lmin=(12v-1v-5v)/1.15A
Ton/toff=(5V+0.7)/(12V-1V-5V)
Lmin=62.87uH
Ton/toff=0.95uS

Step 11: Compute for the Rsc value

Step 6: Now we will calculate the Ton + Toff time, as per
Rsc=0.3/ipk
the formula;
Rsc=0.3/1.15
Ton + Toff = 1 / f
Rsc=0.26ohms

ton+toff=1/40kHz

Ton+toff=25uS
Step 12: Compute for the Cout
 6
Cout=(1.15x25)/(8x100) whenever applicable. Do not forget and go beyond the
gutter margin at the left side for compilation purposes. It
Cout=359.37uF should at least be an additional 0.25” on the left side
margin. Review and proofread the content before
submitting. Good luck now!

Step 13: Last we need to calculate the voltage feedback C. Activity n

resistors value. We will choose R1 value 2k, So, the R2 Place proper simulation screenshots here with respect
value will be calculated as: to their corresponding subheadings. Figures of screenshots
should be included with proper format. That includes the
Vout=1.25(1+R2/R1)5 references at the end. References should be added
whenever applicable. Do not forget and go beyond the
5v=1.25(1+R2/2K)(5) gutter margin at the left side for compilation purposes. It
should at least be an additional 0.25” on the left side
R2=6.2k margin. Review and proofread the content before
submitting. Good luck now!

Table 3. Actual Values Summary. IX. SYSTEM USAGE PROCEDURES

1. Understand how DC-DC Buck Converter works.
Parameters Calculated Value 2. Computation for the components that should be used.
Ct 482pF
Lmin 62.87uH
3. Check the availability of the components if it is
R1 0.26 available in the country.
Cout 359.37uF 4. If the components is available, simulate the
R2 6.2K schematic diagram in LTspice.
5. Measure the output voltage if it is the needed voltage.

B. Sizing X. TESTING AND TROUBLESHOOTING

Table 4. Component Sizing. Place proper proof of testing and troubleshooting
pictures here with respect to their corresponding
Actual Value Sized Value subheadings (Testing, Troubleshooting). The materials,
Capacitor 100uF 100uF
tools, equipment and testing devices used should also be
Capacitor 470uF 470uF
Capacitor 470pF 470pF stated. Figures in the form of pictures should be included
Resistor 0.26 Ohm 0.26 Ohm with proper format. References should be added whenever
Resistor 6.2k Ohm 6.8k Ohm applicable. Do not forget and go beyond the gutter margin
Resistor 2k Ohm 2k Ohm at the left side for compilation purposes. It should at least
Inductor 100uH 160uH be an additional 0.25” on the left side margin. Review and
Diode 1N5819 1N5819 proofread the content before submitting. Good luck now!
A. Materials, Tools, Equipment and Testing Devices
C. Synthesis
If the components in the computed is not available in the Place the materials, tools, equipment and testing
devices used for testing and troubleshooting in bulleted
market we need to find alternative based on the data sheet
form here.
or we need to make some adjustments to other components
● It can be grouped according to its functionality or
for us to have the desired ouput. any possible order.
VIII. SIMULATIONS ● Briefly specify the reason for using such tools,
equipment and testing devices.
Place a brief description on how the system was
simulated and any configurations made. LTSpice or ● Materials refer to other things used in Testing and
MATLAB Simulink simulation is highly encouraged. Any Troubleshooting, which can’t be classified under
specific simulation configurations should be included in Tools, Equipment and Testing Devices.
that particular activity subheading. Review and proofread ● Do not include component values here. They are
the content before submitting. Good luck now! placed under Bill of Materials on the Appendices
section.
A. Activity1
● Do not forget and go beyond the gutter margin at
the left side for compilation purposes. It should at
B. Activity 2 least be an additional 0.25” on the left side margin.
Place proper simulation screenshots here with respect ● Review and proofread the content before
to their corresponding subheadings. Figures of screenshots submitting. Good luck now!
should be included with proper format. That includes the
references at the end. References should be added
 7
B. Testing A. DC-DC Converter
Place proper proof of testing pictures here with
respect to their corresponding subheadings (Activity No.).
Figures of experimentation pictures should be included
with proper format. References should be added whenever
applicable. Do not forget and go beyond the gutter margin
at the left side for compilation purposes. It should at least
be an additional 0.25” on the left side margin. Review and
proofread the content before submitting. Good luck now!
i. Basic Power Supply Set-up

ii. Line and Load Regulation B. Line and Load Regulation

Place proper information here in accordance to the
iii. Output Ripple and Noise laboratory manual order. Remember, both simulation and
experimentation is required together with its interpretation,
analysis and comparison. Go directly to the point.
iv. Current Regulation
Table 5. Line and Load Regulation.

v. Overcurrent and Short Circuit Line Regulation (FL) Load Regulation (Vi(Avg))
Vin Vo Io Vo
Low No Load (NL)
vi. Break Regulation Nominal Full Load (FL)
High
vii. Efficiency Line Regulation % Load Regulation %

viii. Power Device Peak Voltage Measurement

ix. Component Temperature Measurement

x. Burn-in Test

C. Troubleshooting
Place proper proof of troubleshooting pictures here
with respect to their corresponding subheadings (Activity
No.). Figures of experimentation pictures should be
included with proper format. References should be added
whenever applicable. Do not forget and go beyond the
gutter margin at the left side for compilation purposes. It
should at least be an additional 0.25” on the left side
margin. Review and proofread the content before
submitting. Good luck now!
XI. DATA AND RESULTS
Data and Results from both simulation and testing
should be placed one after another together with its
comparison, analysis and interpretation. Place particular
Tables and Figures here with respect to their
corresponding subheadings and order. Graphical
representations are required and must be placed
immediately after its corresponding table. Other figures
such as waveforms follow the order it should be placed.
Tables and Figures should be included with proper format.
Do not forget and go beyond the gutter margin at the left
side for compilation purposes. It should at least be an
additional 0.25” on the left side margin. Review and
proofread the content before submitting. Good luck now!
 8
experimentation is required together with its interpretation,
analysis and comparison. Go directly to the point.
[Photo of V-I Graph/Plot]
<Simulation information…>
<Testing information…>
<Synthesis: Comparison, Analysis and Interpretation …>
E. Break Regulation
Place proper information here in accordance to the
laboratory manual order. Remember, both simulation and
experimentation is required together with its interpretation,
analysis and comparison. Go directly to the point.
[Vi-fr Graph/Plot]
[Vi-Vr(pp) Graph/Plot]
[Vi-Vo Graph/Plot]
<Simulation information…>
<Testing information…>
<Synthesis: Comparison, Analysis and Interpretation …>
F. Efficiency
Place proper information here in accordance to the
laboratory manual order. Remember, both simulation and
experimentation is required together with its interpretation,
analysis and comparison. Go directly to the point.
Table 7. Efficiency at Varying Line Voltage.

LOW NOMINAL HIGH

In Out 𝛈% In Out 𝛈 % In Out 𝛈%
V
I
P

C. Output Ripple
[Graph/Plot]
Place proper information here in accordance to the
laboratory manual order. Remember, both simulation and
experimentation is required together with its interpretation, <Simulation information…>
analysis and comparison. Go directly to the point. <Testing information…>
Table 6. Output Ripple in Varying Line Voltage and Load. <Synthesis: Comparison, Analysis and Interpretation …>
Vin Load Io (A) Vo,r(pp) (V) %r G. Power Device Peak Voltage
L NL Place proper information here in accordance to the
L FL laboratory manual order. Remember, both simulation and
N NL experimentation is required together with its interpretation,
N FL analysis and comparison. Go directly to the point.
H NL Table 8. Power Device Peak Voltage Measurements.

H FL SECT. LOW NOMINAL HIGH

<Simulation information…>
<Testing information…>
<Synthesis: Comparison, Analysis and Interpretation …>
D. Current Regulation
Place proper information here in accordance to the
[Graph/Plot]
laboratory manual order. Remember, both simulation and
 9
<Simulation information…> XIII. POST EVALUATIONS
<Testing information…> Place post evaluations such as conclusions,
recommendations, lessons learned and summary here. It
<Synthesis: Comparison, Analysis and Interpretation …> can be in paragraph and/or bulleted form. Do not forget and
H. Component Temperature go beyond the gutter margin at the left side for compilation
purposes. It should at least be an additional 0.25” on the
Place proper information here in accordance to the left side margin. Review and proofread the content before
laboratory manual order. Remember, both simulation and submitting. Good luck now!
experimentation is required together with its interpretation,
analysis and comparison. Go directly to the point. A. Conclusions
Table 9. Component Temperature Measurements. Place conclusions here. It should be weighed in
connection to the objectives initially set and should be in
Iter. 1 2 3 4 5 6 bulleted form (1:1 ratio with objectives). Do not forget and
Period 20 40 60 80 100 120 go beyond the gutter margin at the left side for compilation
LOW
Q
purposes. It should at least be an additional 0.25” on the
D left side margin. Review and proofread the content before
U submitting. Good luck now!
NOMINAL
Q B. Recommendations
D Place recommendations here. It should be weighed in
U
connection to totality and generality of the project
HIGH
Q planning and execution throughout its duration and can be
D in paragraph and/or bulleted form. Do not forget and go
U beyond the gutter margin at the left side for compilation
purposes. It should at least be an additional 0.25” on the
left side margin. Review and proofread the content before
[Graph/Plot] submitting. Good luck now!

<Simulation information…> C. Lessons Learned

<Testing information…>
<Synthesis: Comparison, Analysis and Interpretation …>
XII. PROBLEMS ENCOUNTERED AND ACTIONS TAKEN
Place the particular problems encountered and the
actions taken here in tabular form in the order they are
encountered. Make sure to log all of it prior to preparing
the documentations. Make use of the information provided
in the Weekly Progress Reports. Place one problem per row
with its corresponding solution(s). It should be included
with proper format. Details should be placed in bulleted
form. Do not forget and go beyond the gutter margin at the
left side for compilation purposes. It should at least be an
additional 0.25” on the left side margin. Review and
proofread the content before submitting. Good luck now!
PROBLEMS ENCOUNTERED AND ACTIONS T AKEN
Problems Encountered Actions Taken
● ●
● Proper Format (Figures and Tables)
● ●
●
● ●
● below the figures; table heads should appear above the
● ●
● of a sentence.
Place lessons learned here. It should be based on the
personal development of the team and its members in
connection to totality and generality of the project
planning and execution throughout its duration and can be
in paragraph and/or bulleted form. Non-technical aspect is
highly encouraged. Do not forget and go beyond the gutter
margin at the left side for compilation purposes. It should
at least be an additional 0.25” on the left side margin.
Review and proofread the content before submitting. Good
luck now!
D. Summary
Place summary here. It should be weighed in
connection to totality and generality of the project
planning and execution throughout its duration and can be
in paragraph and/or bulleted form. Do not forget and go
beyond the gutter margin at the left side for compilation
purposes. It should at least be an additional 0.25” on the
left side margin. Review and proofread the content before
submitting. Good luck now!
Positioning Figures and Tables: Place figures and
tables at the top and bottom of columns. Avoid placing
them in the middle of columns. Large figures and tables
may span across both columns. Figure captions should be
tables. Insert figures and tables after they are cited in the
text. Use the abbreviation “Fig. 1,” even at the beginning

TABLE STYLES

Table Column Head

 10
Table
Table column subhead Subhead Subhead Flyback. Use the same doc/excel file from your
Head Prelim Project).
a
copy More table copy ix. Datasheet (include only useful pages
Sample of a Table footnote. (Table footnote) containing the highlighted parameters, figures,
and/or specifications used).
Example of a figure caption. (figure caption) x. SIGNED Weekly Progress ReportS.

Figure Labels: Use 8 point Times New Roman for 8. REFERENCES Commented [1]: Place ALL references used.
Within 5 years recency as much as possible.
Figure labels. Use words rather than symbols or The template will number citations consecutively Journals and other online publications are highly encouraged.
abbreviations when writing Figure axis labels to avoid within brackets [1]. The sentence punctuation follows the
confusing the reader. As an example, write the quantity bracket [2]. Refer simply to the reference number, as in
“Magnetization,” or “Magnetization, M,” not just “M.” If [3]—do not use “Ref. [3]” or “reference [3]” except at the
including units in the label, present them within beginning of a sentence: “Reference [3] was the first ...”
parentheses. Do not label axes only with units. In the
Number footnotes separately in superscripts. Place the
example, write “Magnetization (A/m)” or “Magnetization
actual footnote at the bottom of the column in which it was
(A ( m(1),” not just “A/m.” Do not label axes with a ratio
cited. Do not put footnotes in the reference list. Use letters
of quantities and units. For example, write “Temperature
for table footnotes.
(K),” not “Temperature/K.”
Unless there are six authors or more give all authors’
Kindly REMOVE the red sections afterwards.
names; do not use “et al.”. Papers that have not been
7. TASK DISTRIBUTION published, even if they have been submitted for
publication, should be cited as “unpublished” [4]. Papers
Place the role and tasks each member has contributed. that have been accepted for publication should be cited as
For instance the workload can generally include: (i) “in press” [5]. Capitalize only the first word in a paper title,
conceptualization and coordination, (ii) calculations and except for proper nouns and element symbols.
sizing, (iii) simulation, (iv) testing and troubleshooting, (v)
evaluation, (vi) interpretation, analysis and comparison; For papers published in translation journals, please give
and (vii) documentation. Other possible workload can also the English citation first, followed by the original foreign-
be included. A table of the workload is encouraged to keep language citation [6].
it organized.
G. Eason, B. Noble, and I.N. Sneddon, “On certain integrals of Lipschitz-
Note1: WEEKLY WORKLOAD should be attached Hankel type involving products of Bessel functions,” Phil. Trans.
to the weekly progress report for it to be monitored Roy. Soc. London, vol. A247, pp. 529-551, April 1955. (references)
throughout the period. J. Clerk Maxwell, A Treatise on Electricity and Magnetism, 3rd ed., vol.
2. Oxford: Clarendon, 1892, pp.68-73.
Note2: SUPPORTING DOCUMENTS includes the I.S. Jacobs and C.P. Bean, “Fine particles, thin films and exchange
anisotropy,” in Magnetism, vol. III, G.T. Rado and H. Suhl, Eds.
following. It should be attached and placed at the last New York: Academic, 1963, pp. 271-350.
part of the documentation in the following order: K. Elissa, “Title of paper if known,” unpublished.
R. Nicole, “Title of paper with only first word capitalized,” J. Name
i. Team Profile (Member Name – Role). Stand. Abbrev., in press.
Y. Yorozu, M. Hirano, K. Oka, and Y. Tagawa, “Electron spectroscopy
ii. Bill of Materials (include the Part Designation studies on magneto-optical media and plastic substrate interface,”
No. with respect to schematic designation, IEEE Transl. J. Magn. Japan, vol. 2, pp. 740-741, August 1987
[Digests 9th Annual Conf. Magnetics Japan, p. 301, 1982].
Value, Remarks, Quantity, Entity purchased M. Young, The Technical Writer’s Handbook. Mill Valley, CA:
from, Cost, and Total Cost for each University Science, 1989.
subsystems). See format below.
iii. Schematic Diagram (Layout Form with Title
Block containing Team Name, Team Logo,
Team Members, and Device Name).
iv. PCB Layout (Layout Form with Title Block
containing Team Name, Team Logo, Team
Members, and Device Name).
v. Mechanical Layouts (Layout Form with Title
Block containing Team Name, Team Logo,
Team Members, and Device Name). Commented [2]: REPLACE THIS PAGE WITH
a. Isometric View
(SUPPORTING DOCUMENTS)
CORRESPONDING DOCUMENTS UPON PRINTING AND
b. All Sides (with measurements) SUBMISSION.
vi. Codes/Programs (If applicable)
vii. DC-DC Converter <Photographs in various
views/perspective.>
viii. Modified Flyback Laboratory Result (Perform
the same set of evaluation from the Unmodified
 11
APPENDIX A:
TEAM PROFILE

POWER
LET’S DO THIS

Member Role Specialization(s)

Simulation, Documentation and ●
Computation
Documentation, Prototype and Moral ●
Support
 12
APPENDIX B:
BILL OF MATERIALS

Part Values and Unit Cost Gross Cost

Remark(s) Purchased From Quantity
No. Ratings (Php) (Php) Commented [3]: With respect to Schematic.
Ex: R1, C23, Q1, D2
<Subsystem 1>
Commented [4]: =Quantity x Unit Cost

Sub Cost
<Subsystem 2>

Sub Cost
<Subsystem 3>

Sub Cost
<Subsystem N>

Sub Cost
Total Cost
(Php)
 13
APPENDIX C:
SCHEMATIC DIAGRAM

<Example: http://www.ni.com/tutorial/52655/en/>
 14
APPENDIX D:
PCB LAYOUT

<Example: http://www.ni.com/tutorial/52655/en/>
 15
APPENDIX E:
MECHANICAL LAYOUT

<Example: https://www.csuchico.edu/mmem/documents/Department_Drawing_Standard.pdf>
 16
APPENDIX F:
_____ CONVERTER
 17
APPENDIX G:
_____ CONVERTER EVALUATION RESULTS

I. Lab Set-Up
[Photo of Complete Setup WITH Label]

II. Line and Load Regulation

Line Regulation (Full Load) Load Regulation (Nominal Input)

Vin Vo IO Vo

Low No Load (NL)

Nominal Full Load (FL)

High

Line Regulation % Load Regulation %

III. Output Ripple and Noise

Vin Load Io Vr(pp) Waveform

L NL

L FL

N NL

N FL

H NL

H FL

IV. Current Regulation

[Photo of V-I Graph/Plot]
 18

V. Overcurrent and Short Circuit

A. Overcurrent Data: See Current Regulation Results
B. Short Circuit: [ ] Pass [ ] Fail

VI. Break Regulation

[Vi-fr Graph/Plot]
[Vi-Vr(pp) Graph/Plot]
[Vi-Vo Graph/Plot]

VII. Efficiency

LOW NOMINAL HIGH

Input Output 𝛈% Input Output 𝛈% Input Output 𝛈%

[Graph/Plot → See Excel]

VIII. Power Device Peak Voltage Measurement

SEC. LOW NOMINAL HIGH

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Measurements Shown> Measurements Shown> Measurements Shown>

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Measurements Shown> Measurements Shown> Measurements Shown>

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Measurements Shown> Measurements Shown> Measurements Shown>
 19
<Visible Waveform with <Visible Waveform with <Visible Waveform with
Measurements Shown> Measurements Shown> Measurements Shown>

<Visible Waveform with <Visible Waveform with <Visible Waveform with

Measurements Shown> Measurements Shown> Measurements Shown>

<Visible Waveform with <Visible Waveform with <Visible Waveform with

Measurements Shown> Measurements Shown> Measurements Shown>

IX. Component Temperature Measurement

Thermal Gun
Period LOW NOMINAL HIGH
Iteration
(mins.) Q D U Q D U Q D U

1 20

2 40

3 60

4 80

5 100

6 120

IR Camera

Period
Iteration LOW NOMINAL HIGH
(mins.)

1 20

2 40

3 60

4 80
 20

5 100

6 120

X. Burn-In Test
✔ 3 x 45 Mins. Full Load Low each at Low Nominal and High Input.
✔ 3 x 10 Mins. Evaluation.
✔ 3 x 5 Mins. Cool Down.
✔ Compare results from Before and After the Burn-In Test. Include the percent error.