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OptiMOS®2 Power-Transistor
Product Summary
Features
V DS 30 V
• Fast switching MOSFET for SMPS
R DS(on),max 9.4 mΩ
• Optimized technology for notebook DC/DC converters
ID 35 A
1)
• Qualified according to JEDEC for target applications
• N-channel
• Logic level
• Avalanche rated
T C=100 °C 35
T A=25 °C,
14.6
R thJA=45 K/W 2)
I D=40 A, V DS=24 V,
Reverse diode dv /dt dv /dt di /dt =200 A/µs, 6 kV/µs
T j,max=150 °C
T A=25 °C,
2.8
R thJA=45 K/W 2)
Thermal characteristics
Static characteristics
V DS=30 V, V GS=0 V,
Zero gate voltage drain current I DSS - 0.1 1 µA
T j=25 °C
V DS=30 V, V GS=0 V,
- 10 100
T j=125 °C
Gate resistance RG - 1 - Ω
1)
J-STD20 and JESD22
2)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
2)
See figure 3
Dynamic characteristics
Q sw V GS=0 to 5 V
Switching charge - 4.9 7.0
V DS=0.1 V,
Gate charge total, sync. FET Q g(sync) - 9 12 nC
V GS=0 to 5 V
Reverse Diode
V GS=0 V, I F=35 A,
Diode forward voltage V SD - 0.93 1.2 V
T j=25 °C
V R=15 V, I F=I S,
Reverse recovery charge Q rr - - 10 nC
di F/dt =400 A/µs
3)
See figure 16 for gate charge parameter definition
60 40
50
30
40
P tot [W]
I D [A]
30 20
20
10
10
0 0
0 40 80 120 160 0 40 80 120 160
T C [°C] T C [°C]
103 1000
101 10
limited by on-state
resistance
1 µs
102 100
10 µs
0.5
100 1
100 µs
0.2
DC
Z thJC [K/W]
I D [A]
101 10
0.1
1 ms
0.05
10 ms 10-1 0.1
0.02
0.01
100 1
single pulse
10-1 0.1
0.1 1 10 100
10-2 0.01
0 0 0 0 0 0
-1 0 1 2
10 10 10 10 10-6 10-5 10-4 10-3 10-2 10-1
V DS [V] t p [s]
80 30
3V 3.2 V 3.4 V 3.7 V
10 V
70 4.5 V
25
60 4V
20
50
R DS(on) [mΩ]
4V
I D [A]
40 3.7 V 15
4.5 V
30
3.4 V
10
10 V
20
3.2 V
5
10 3V
2.8 V
0 0
0 1 2 3 0 10 20 30 40 50
V DS [V] I D [A]
80 80
70 70
60 60
50 50
g fs [S]
I D [A]
40 40
30 30
20 20
150 °C
25 °C
10 10
0 0
0 1 2 3 4 5 0 10 20 30 40 50 60
V GS [V] I D [A]
16 2.5
14
2
12
98 % 250 µA
10
R DS(on) [mΩ]
1.5
V GS(th) [V]
25 µA
8
typ
1
6
4
0.5
0 0
-60 -20 20 60 100 140 180 -60 -20 20 60 100 140 180
T j [°C] T j [°C]
104 10000
103
Ciss
102 150 °C
25 °C
103 1000
150 °C, 98%
Coss
C [pF]
I F [A]
101
25 °C, 98%
102 100
Crss
100
101 10
10-1
0 5 10 15 20 25 30 0 0.5 1 1.5 2
V DS [V] V SD [V]
100 12
15 V
10
6V 24 V
100 °C 25 °C
8
125 °C
V GS [V]
I AV [A]
10 6
1 0
1 10 100 1000 0 5 10 15 20 25
t AV [µs] Q gate [nC]
40
V GS
Qg
35
V BR(DSS) [V]
30
V g s(th)
25
Q g(th) Q sw Q g ate
Q gs Q gd
20
-60 -20 20 60 100 140 180
T j [°C]
PG-TDSON-8: Outline
Package Outline
PG-TDSON-8: Tape
Dimensions in mm
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2008 Infineon Technologies AG
All Rights Reserved.
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conditions or characteristics. With respect to any examples or hints given herein, any typical
values stated herein and/or any information regarding the application of the device,
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including without limitation, warranties of non-infringement of intellectual property rights
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