612 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 46, NO.

2, MARCH/APRIL 2010

Design of a High-Speed Motor Bus Transfer System

Murty V. V. S. Yalla, Fellow, IEEE

Abstract—This paper addresses the design of a high-speed mo-

tor bus transfer system for power-generating plants and industrial
facilities where motor loads require comprehensive source transfer
strategies during transfer of the load from one source to another.
Motor bus transfer schemes are needed not only to maintain
process continuity but also to transfer sources in such a manner
to prevent damage to the motors and connected loads. The motor
bus frequency and voltage decay rapidly upon disconnection from
the main source. This paper proposes a digital signal processing
algorithm that can measure the magnitude and phase angle of the
decaying bus voltage accurately while measuring the auxiliary-
source voltage magnitude and phase angle at rated frequency.
This paper details an algorithm to predict the phase coincidence
between the motor bus voltage and the auxiliary-source voltage.
The algorithm uses delta frequency, the rate of change of delta
frequency, and breaker closing time to predict the phase coinci- Fig. 1. Typical one-line diagram of a two-breaker motor bus transfer scheme.
dence. This paper also details the implementation of the motor bus
transfer scheme that includes fast, in-phase, and residual transfer phase-angle difference during source transfer, one can use
methods. The results of some real-time transfer cases are also ANSI/IEEE Standard C50.41-2000 [5], which states that the
included.
V/Hz across the open breaker must be less than 1.33 PU in order
Index Terms—Fast bus transfer, in-phase transfer, motor bus to prevent motor damage. The larger the phase-angle difference,
transfer, residual voltage transfer. the larger the V/Hz.
Electromechanical or static sync-check relays do not operate
I. I NTRODUCTION fast enough for motor bus transfer applications. If these relays
are used, the auxiliary-source breaker may close at a large
M OTOR BUS transfer schemes have been used in electric
power plants and industrial facilities for a number of
years to transfer a load bus that mainly comprises induction
phase angle due to the slow dropout of the sync-check relay,
or it may fail to close due to the slow pickup of the sync-
motors or a combination of induction and synchronous motors check relay. It is important to very quickly measure the voltage
from a main source to an auxiliary source [1]–[4]. Fig. 1 magnitude and phase angle for proper operation of the transfer
shows a typical one-line diagram of a two-breaker motor bus scheme. It is also important to measure the voltage magnitude
transfer scheme. The transfer from a main source to an auxiliary and phase angle of the motor bus voltage accurately over a
source takes place during a fault on the main source, scheduled wide frequency range as the bus frequency can be much lower
maintenance, or emergency conditions. The transfer may be than the frequency of the auxiliary source due to deceleration
initiated manually or automatically by a protective relay. of the motors. Another complication to the problem is that
During the bus transfer, there can be a substantial initial the measurement algorithm has to handle one signal (auxiliary
phase-angle difference between the motor bus voltage and the source) at rated frequency while handling the other signal (bus
auxiliary-source voltage (across the open breaker). There are voltage) at a decaying frequency.
several reasons for this phase-angle difference, including the The following sections of this paper describe the following:
following: the effect of a fault on the main source, system a general description of bus transfer methods, digital signal
separation between the two sources, supply source transformer processing algorithms that can measure the magnitude and
phase shifts, and phase shift as a result of the disconnection of phase angle of the decaying bus voltage accurately, and details
the motor from the main source. To determine the acceptable of an algorithm to predict the phase coincidence between the
motor bus voltage and the auxiliary-source voltage. The imple-
mentation of the motor bus transfer scheme that includes fast,
Paper 2008-PSPC-227, presented at the 2009 IEEE/IAS Industrial and in-phase, and residual transfer methods, along with some real-
Commercial Power Systems Technical Conference, Calgary, AB, Canada, time transfer cases, is also presented.
May 3–7, and approved for publication in the IEEE T RANSACTIONS ON
I NDUSTRY A PPLICATIONS by the Power Systems Protection Committee of
the IEEE Industry Applications Society. Manuscript submitted for review
February 1, 2009, and released for publication July 14, 2009. First published II. B US T RANSFER M ETHODS
February 5, 2010; current version published March 19, 2010.
The author is with Beckwith Electric Company, Inc., Largo, FL 33773-3724 The following methods of bus transfer are used to transfer a
USA (e-mail: myalla@beckwithelectric.com). motor bus from a main source to an auxiliary source and vice
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
versa:
Digital Object Identifier 10.1109/TIA.2010.2041097 1) residual voltage transfer;

0093-9994/$26.00 © 2010 IEEE

YALLA: DESIGN OF A HIGH-SPEED MOTOR BUS TRANSFER SYSTEM
Fig. 2. Graphical representation of bus transfer methods.
2) in-phase transfer;
3) fast transfer.
A. Residual Voltage Transfer
The majority of bus transfer schemes in use today are of
the residual voltage type [1]–[3]. In this type of transfer, the
auxiliary loads are transferred once the motor residual voltage
reaches a low value to prevent motor damage. Typically, resid-
ual voltage transfers are done at 25%–30% of the rated voltage,
irrespective of the phase angle of the motor bus. As the residual
transfer is slow, process interruption is likely to take place.
Also, in the majority of cases, motors cannot be reaccelerated
simultaneously following such a transfer as their speeds have
fallen so low that inrush currents approach motor locked-rotor
values, and stalling would occur due to depressed voltage. In
some cases, critical drives are restarted in blocks so that full
plant operations may not be reestablished for some time.
It is important to measure the voltage magnitude accurately
during a very low bus frequency (as low as 4 Hz) as the bus
frequency can reach a very low value during residual transfer.
B. In-Phase Transfer
In the in-phase transfer scheme, the auxiliary-source breaker
is closed when the phase angle of the bus voltage is in-phase
with the phase angle of the auxiliary-source voltage. To achieve
this, a phase-angle measuring relay, which can predict the in-
phase condition in advance of auxiliary-source breaker closing
time, is required. In-phase transfer minimizes the resultant
V/Hz difference between the bus voltage and the auxiliary-
source voltage. This is in contrast to the residual voltage trans-
fer, which can allow closure even at 180◦ . In-phase transfer can
be used successfully on systems that exhibit a slow-to-moderate
rate of change in phase angle.
C. Fast Transfer
In the fast-transfer scheme, the transfer is attempted as fast
as possible, minimizing the time that the loads are discon-
nected from either source. The fast-transfer method requires
a very high speed sync-check relay (subcycle phase-angle
measurement).
613
Fig. 3. Sampling of a 60-Hz voltage waveform at 1.92-kHz sampling rate.
Fig. 4. Sampling of a 55-Hz voltage waveform at 1.92-kHz sampling rate.
The following are the two types of transfer schemes.
1) Sequential transfer: In sequential transfer, a “b” or early
“b” contact of the main-source breaker is used to initiate
closing of the auxiliary-source breaker. This approach
provides increased security because the bus has been
disconnected from the main source prior to the auxiliary-
source breaker closing. A bus dead time of 5–7 cycles is
normally encountered with this type of transfer.
2) Simultaneous transfer: In simultaneous transfer, both the
trip of the main breaker and the close of the auxiliary-
source breaker are initiated at the same time. This type of
transfer has the shortest dead time of 1–2 cycles.
Failure of the main source breaker to open will result in
paralleling the two sources and, if out of phase, will result in
equipment damage. This type of transfer may not be possible
when the main source is lost due to a close-in electrical fault
or abnormal condition that causes the phase angle to move
instantaneously. Also, a breaker failure scheme is required for
simultaneous transfer so that if the main source breaker fails to
open during a transfer, then the auxiliary-source breaker will be
tripped to avoid paralleling both sources.
The aforementioned three methods are shown graphically
in Fig. 2. The following three windows are shown: fast, in-
phase, and residual. The scale for phase angle (solid line) is
shown on the far left of the graph, and the scale for bus voltage
magnitude (dashed line) is shown on the far right of the graph.
A fast transfer is attempted during the first few cycles after
the source breaker is tripped. If a fast-transfer attempt is not
successful due to large initial phase angle, then the transfer
614 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 46, NO. 2, MARCH/APRIL 2010

Fig. 5. Measurement error of the delta angle with a fixed-window DFT

algorithm.
Fig. 6. Measurement error of the delta angle with the adaptive window DFT
algorithm.
scheme will wait and try for an in-phase transfer. The in-phase
transfer scheme will try to send a close signal to the auxiliary- The rms value of the voltage signal (Vrms ) is calculated using
source breaker in advance so that the phase-angle difference voltage samples as follows [7]:
between the bus voltage and the auxiliary-source voltage when 

the breaker closes is close to zero. If an in-phase transfer is 1  m

not possible, then the transfer scheme will wait for the residual Vrms =  vk2 Δt (1)
T
k=1
transfer. Some schemes also utilize fixed-time transfer, which
is basically a residual voltage transfer, but no measurement of where vk is the sampled value of the voltage signal at sample
voltage is performed as the time delay will be such that the number “ k,” T is the time period of the voltage signal, and m is
voltage is assumed to have reached a safe level. the total number of samples in one cycle of the voltage signal.
Time period T can be calculated using the following:
   
III. D IGITAL S IGNAL P ROCESSING A LGORITHMS v1 vm
T= Δt + Δt + (m −1)Δt (2)
v1 − v 0 vm+1 − vm
A. Voltage Magnitude Calculation
When the main source is disconnected from the motor bus, where v0 and v1 are the voltage samples on the negative and
the frequency of the motor bus voltage will decay rapidly from positive sides of a positive-going zero-crossing, respectively;
the nominal value. Application of a Discrete Fourier Transform vm and vm+1 are the voltage samples on the negative and
(DFT) algorithm to calculate the magnitude and phase angle positive sides of a next successive positive-going zero-crossing,
will introduce large errors at abnormal frequencies. respectively; and Δt is the sampling interval.
A frequency-tracking technique was applied in the past to The frequency (f ) of the motor bus voltage is calculated
reduce measurement errors, where the sampling frequency is from time T as
adjusted continuously so that the number of samples per fun-
damental frequency cycle of the signal is kept constant [6]. f = 1/T. (3)
However, for bus transfer application, the frequency of the
auxiliary-source voltage is kept constant near its nominal value B. Voltage Phase-Angle Calculation
(60 or 50 Hz),whereas the frequency of the bus voltage is
varying. If the sampling frequency is changed to track the bus The phase angle of the voltage can be calculated using a DFT
frequency, then the auxiliary-voltage phase-angle and magni- algorithm. A recursive form of the DFT algorithm is used here
tude calculations suffer from inaccuracies. to reduce the number of computations.
To eliminate the inaccuracies during off-nominal frequen- The real (V R) and imaginary (V I) components of the fun-
cies, the voltage magnitude is calculated using a rms algorithm damental frequency voltage phasor are given by the following:
in the time domain [7] instead of a DFT algorithm. Voltage 2 2πk
V Rk = V Rk−1 + (vk − vk−N ) cos (4)
signals are also prefiltered to remove any noise that can cause N N
measurement errors. This method provides a very accurate 2 2πk
V Ik = V Ik−1 + (vk − vk−N ) sin (5)
measurement of voltage magnitude down to 4 Hz. This is N N
particularly important for a residual voltage transfer where the where vk is the sampled value of the voltage signal at the kth
frequency can reach very low values. If the voltage measure- sample, N is the number of samples in a fundamental frequency
ment algorithm is not accurate down to this low frequency, the cycle, and v−1 , v−2 , . . . , v−N , V R−1 , and V I−1 are set to zero.
bus transfer can take place at a much higher residual voltage The phase angle is given by
than the undervoltage setpoint, which can cause motor damage.  
The voltage magnitude calculation is performed 16 times per VI
θ = tan−1 . (6)
cycle. VR
YALLA: DESIGN OF A HIGH-SPEED MOTOR BUS TRANSFER SYSTEM
Fig. 7. Hardware block diagram of a digital MBTS.
Once the voltage phasors of the bus (V Rbus + jV Ibus ) and
the auxiliary-source (V Raux + jV Iaux ) voltage are calculated,
the delta phase angle (Δθ) between the bus and the auxiliary-
source voltage can be calculated using the following:
 
V Ibus V Raux − V Rbus V Iaux
Δθ = arctan . (7)
V Rbus V Raux + V Ibus V Iaux
As described earlier, the frequency of the bus voltage decays
rapidly, and the phase angle calculated from the DFT algorithm
suffers from errors at off-nominal frequencies. In order to
reduce these errors, an adaptive time window DFT algorithm
is proposed here.
The phase-angle measurements are obtained 16 times per
cycle, and a high-speed sync check is also performed 16 times
per cycle.
Adaptive time window DFT algorithm: Fig. 3 shows the
sampling of a 60 Hz voltage signal at 1.92 kHz (32 × 60). Also,
Fig. 4 shows the sampling of 55 Hz voltage signal at 1.92 kHz
(32 × 60). As shown, when the frequency deviates from the
nominal value, the number of samples in one cycle window is
increased from 32 (for a 60 Hz signal) to 35 (for a 55 Hz signal).
Therefore, taking only 32 samples for a 55 Hz signal does not
include a full cycle of the waveform. Hence, the magnitude and
phase angle calculated using DFT from this partial waveform
suffer from inaccuracies.
Fig. 5 shows the delta phase-angle measurement error with
a standard DFT (window fixed at 32 samples) for a delta
frequency of 0–10 Hz. These results are obtained using a fixed
32-sample window for the bus voltage and the auxiliary-source
voltage waveform. As shown in Fig. 5, the delta phase-angle
error increases from 0 ◦ to 5.25◦ as the bus frequency is decayed
from 60 to 50 Hz.
Several discrete frequency steps are used by increasing the
time window from 32 samples per cycle to 38 samples per
615
cycle. That is, the measurement window is increased in integral
steps of 32, 33, 34, 35, 36, 37, and 38 samples as the frequency
is decreasing from 60 to 50 Hz. A total of seven recursive
DFT calculations are implemented—one for each of the sample
window lengths—in parallel, and the appropriate phasors are
selected based on the measured frequency.
The time window in samples for the bus voltage will increase
as the bus frequency is decaying. That means that the bus
voltage and the auxiliary-source voltage may use different
rotating references to obtain phasors. This introduces an error
in the delta phase angle, which can be calculated as follows:
2π(Maux − Mbus )
Δθerror (i) = i (8)
Mbus · Maux
where Maux and Mbus are the time windows in samples of
the auxiliary-source and bus voltages, respectively, and index
“i” represents the sample number.
The corrected delta phase angle (Δθc ) between the bus and
the auxiliary-source voltage can be calculated using auxiliary-
source and bus voltage phasors—as given by (7), along with the
compensation for delta phase-angle error—as given by (8), as
follows:
Δθc = Δθ + Δθerror . (9)
Fig. 6 shows the delta phase-angle measurement error using
the adaptive time window DFT algorithm. Using this technique,
the worst case measurement error for a delta-frequency range
of 0–10 Hz is less than 1◦ . Also, the noise level of the phase-
angle measurement is considerably reduced, which makes
the delta-frequency and double-delta-frequency calculation,
which is required for zero phase-coincidence prediction, more
accurate.
616 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 46, NO. 2, MARCH/APRIL 2010

Fig. 8. Live in-phase transfer event at a power-generating plant.

C. Delta-Frequency Calculation D. Zero-Phase Coincidence Prediction

The delta frequency between the bus and auxiliary-source The phase angle at the instant of breaker closing (ΔθP ) can
voltages is calculated using the rate of change of the delta phase be predicted using the estimated delta frequency Δfe , the rate
angle as follows: of change of delta frequency, and the breaker closing time (TB )
1 (Δθ − Δθ ) as follows:
Δf = (10)
2π T    
where Δθ is the delta phase angle at the previous measure- 1 Δfave
ΔθP = Δθ + 2π Δfe + d · (TB ) · TB . (12)
ment and T is the time interval in seconds between the two 2 dt
measurements.
The delta frequency is averaged over a period of Tave to filter When the motor bus is disconnected from the main source,
the noise in the measurements. Assuming that the rate of change the frequency of the motor bus decays rapidly. The phase angle
of delta frequency (d(Δfave )/dt) is constant, the average delta calculated with only delta frequency and breaker closing time
frequency Δfave is at the middle of the Tave window. The will not be accurate as the delta frequency is varying with
delta frequency (Δfe ) can be estimated using Δfave , Tave , and time. The use of the rate of change of delta frequency in the
d(Δfave )/dt as follows: prediction of phase angle at the instant of breaker closing in
Tave d(Δfave ) (12) will greatly reduce these errors as the delta frequency is
Δfe = Δfave + . (11)
2 dt not constant during this period.
YALLA: DESIGN OF A HIGH-SPEED MOTOR BUS TRANSFER SYSTEM
Fig. 9. Live simultaneous fast-transfer event at a power-generating plant.
IV. I MPLEMENTATION OF THE B US T RANSFER S YSTEM
The hardware implementation of a digital motor bus transfer
system (MBTS) is shown in Fig. 7. The MBTS has analog
inputs for single- or three-phase voltages for measuring main-
source, auxiliary-source, and bus voltages; main- and auxiliary-
source currents; contact inputs for breaker status, transfer
initiate, trip/close coil monitoring, and block transfer; and
contact outputs for breaker trip/close, load shedding, and other
alarm conditions. The MBTS also has several communications
ports (RS-232, RS-485, and Ethernet) to communicate with a
personal computer or SCADA system. The analog hardware
consists of an analog data acquisition system that includes
signal scaling, isolation, filtering (anti-aliasing), analog multi-
plexing, and analog-to-digital conversion. The digital subsys-
tem consists of a microprocessor, Flash memory for program
storage, random access memory for temporary storage of
information, and electrically erasable programmable memory
for storage of setpoints. It also has front-panel light-emitting
diodes for target indication and a local human–machine
617
interface. The relay is powered by a switching power
supply.
Some of the main features implemented in the MBTS are as
follows:
1) automatic and manual transfer modes with fast, in-phase,
and residual transfer;
2) manual hot parallel transfer (make before break);
3) sequential and simultaneous transfer modes;
4) transfer initiate from external contacts or internally using
bus undervoltage;
5) load shedding using bus undervoltage, under frequency
and rate of change of frequency;
6) trip/close coil monitoring and breaker failure detection;
7) auto trip feature in case both breakers are in close
condition;
8) bus VT fuse loss detection;
9) adaptive breaker closing-time measurement;
10) event recorder with transfer event logs and sequence of
events;
11) oscillography recording of bus transfer events.
618 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 46, NO. 2, MARCH/APRIL 2010
Fig. 10. Live in-phase transfer event at a chemical plant.
V. L IVE B US T RANSFER E VENTS
This section details three cases of live bus transfer events.
Fig. 8 shows an oscillograph of a live transfer event at a
power-generating plant. The transfer was initiated manually and
completed by the in-phase transfer method. The transfer initiate
signal started at 23.8◦ phase angle with a bus voltage of 121.6 V.
The breaker opening time is 2.4 cycles, and the breaker closing
time is 3 cycles. The auxiliary-source breaker was closed at
2◦ with a bus frequency at 53.12 Hz and a bus voltage at
79 V. The open transition (bus interrupting) time is 13.3 cycles.
For this example, if the rate of change of delta frequency is not
used in the calculation of phase coincidence in (12), then the
breaker closing would have been delayed by 12◦ and the phase
angle at closing would be 14◦ instead of 2◦ . This clearly shows
the advantage of using the rate of change of delta frequency in
predicting the phase coincidence.
Fig. 9 shows an oscillograph of a live transfer event at a
power-generating plant. The transfer was initiated by a gen-
erator trip via a generator lockout relay and completed by a
simultaneous mode of the fast-transfer method.
The initiated signal started at −0.4◦ phase angle with a bus
voltage of 121.7 V. The breaker opening time is 1.0 cycle,
and the breaker closing time is 3.27 cycles. The breaker was
closed at −15.2◦ with a bus frequency at 59.45 Hz and a bus
voltage at 100.7 V. The open transition (bus interrupting) time is
2.27 cycles.
Fig. 10 shows an oscillograph of a live transfer event that was
initiated by an undervoltage relay due to a trip of the upstream
YALLA: DESIGN OF A HIGH-SPEED MOTOR BUS TRANSFER SYSTEM
breaker. The transfer was completed by the in-phase transfer
method. The initiated signal started at 178.5◦ phase angle with
a bus voltage of 96.3 V. The breaker opening time is 2.5 cycles,
and the breaker closing time is 2.9 cycles. The bus-tie breaker
was closed at −1.7◦ with a bus frequency at 55.22 Hz and a bus
voltage at 95.6 V. The open transition (bus interrupting) time is
4.4 cycles. All of the transfers were successful, and there was
no process interruption.
VI. C ONCLUSION
The design of a digital high-speed bus transfer system has
been presented in this paper. Digital signal processing algo-
rithms that calculate the magnitude and phase angle of a voltage
signal over a wide frequency range have been presented. Also
presented is an algorithm to predict the phase coincidence
between the motor bus voltage and the auxiliary-source voltage
using delta frequency, the rate of change of delta frequency, and
breaker closing time, which results in a very accurate prediction
of phase coincidence. The algorithm has also calculated the
bus voltage magnitude very accurately down to 4 Hz, which is
important for the residual transfer method. The data from some
real-time events have also been presented. With the present-day
digital signal processing technology, high-speed MBTSs can
be designed to safely transfer a motor bus from a main source
to an auxiliary source using fast, in-phase, or residual transfer
method.
Several hundred digital bus transfer schemes are installed and
successfully running at various power-generating plants and
industrial facilities around the world using the design presented
in this paper.
R EFERENCES
[1] T. A. Higgins, W. L. Snider, P. L. Young, and H. J. Holley, “Report on
bus transfer: Part I—Assessment and application,” IEEE Trans. Energy
Convers., vol. 5, no. 3, pp. 462–469, Sep. 1990.
[2] T. A. Higgins, W. L. Snider, P. L. Young, and H. J. Holley, “Report on
bus transfer: Part II—Computer modeling for bus transfer studies,” IEEE
Trans. Energy Convers., vol. 5, no. 3, pp. 470–476, Sep. 1990.
[3] T. A. Higgins, W. L. Snider, P. L. Young, and H. J. Holley, “Report on bus
transfer: Part III—Full scale testing and evaluation,” IEEE Trans. Energy
Convers., vol. 5, no. 3, pp. 477–484, Sep. 1990.
619
[4] R. D. Pettigrew, “Motor bus transfer—Report prepared by the motor bus
transfer Working Group of the Power System Relaying Committee,” IEEE
Trans. Power Del., vol. 8, no. 4, pp. 1747–1758, Oct. 1993.
[5] American National Standard for Polyphase Induction Motors for Power
Generating Stations, ANSI C50.41-2000, 2000.
[6] G. Benmouyal, “An adaptive sampling-interval generator for digital relay-
ing,” IEEE Trans. Power Del., vol. 4, no. 3, pp. 1602–1609, Jul. 1, 1989.
[7] M. V. V. S. Yalla, “Design and implementation of a digital volts per hertz
protective relay for generators and transformers,” presented at the CIGRE
SC34 Colloq., Johannesburg, South Africa, Oct. 1997, Paper 109.
Murty V. V. S. Yalla (M’84–SM’92–F’06) received
the Diploma in electrical engineering from Andhra
Polytechnic, Kakinada, India, in 1976, the B.S.
degree in electrical engineering from Jawaharlal
Nehru Technological University, Kakinada, India, in
1981, the M.S. degree in electrical engineering from
the Indian Institute of Technology, Kanpur, India, in
1983, and the Ph.D. degree in electrical engineering
from the University of New Brunswick, Fredericton,
NB, Canada, in 1987.
He has been with Beckwith Electric Company,
Largo, FL, since 1989, where he is currently the President. From 1988 to
1989, he taught and conducted research on digital power system protection
at the Memorial University of Newfoundland, St. John’s, NL, Canada. He has
published several research papers in international journals on digital protection.
He is the holder of five U.S. patents in the areas of digital controls and protective
relays.
Dr. Yalla is the Convener of the IEC Technical Committee 95 Maintenance
Team 4—Measuring Relays and Protection Equipment: Functional Standards.
He is also a member of CIGRÉ Working Groups B5.04 Modern Techniques for
Protecting and Monitoring Generating Plants and B5.05 Modern Techniques
for Protecting, Controlling and Monitoring of Power Transformers. In 2006, he
was elected as a Fellow by the IEEE Fellow Committee for his contributions
in computer relays for power systems. He has been an active member of the
IEEE Power System Relaying Committee (PSRC) for the past 18 years. He is
also a member of several working groups in PSRC and the Chairman of the
working group that developed IEEE Standard C37.102-2006 “Guide for AC
Generator Protection.” He coauthored an IEEE PES tutorial on “Protection
of Synchronous Generators.” He was the Chairman of the working group
that received the IEEE Power Engineering Society (PES) Working Group
Recognition Award for an outstanding technical report entitled “Application
of Peer-to-Peer Communications for Protective Relaying” at the IEEE PES
General Meeting held in Denver, CO, in June 2004. He also received the IEEE
Florida Council Outstanding Engineer Award in 2005.