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MINI PROJECT ON
WASHING MACHINE
BLOCK DIAGRAM
SIGNAL SPECIFICATION
FSM DIAGRAM
CODE
module wm
(done,motor_on,fill_valve_on,drain_valve_on,door_lock,rst,start,door_close,filled,drain,added,c
ycle_time_out,spin_time_out);
input rst,start,door_close,added,cycle_time_out,spin_time_out;
output reg done,motor_on,fill_valve_on,drain_valve_on,door_lock;
parameter check_door=3'b000,
fill_water=3'b001,
add_det=3'b011,
cycle=3'b010,
drain_water=3'b101,
spin=3'b111;
reg clk;
reg [2:0]d,q;
initial begin
clk=0;
end
always
#10 clk=~clk;
always @(start,door_close,added,cycle_time_out,spin_time_out,filled,drain,q)
begin
done=0;
motor_on=0;
fill_valve_on=0;
drain_valve_on=0;
door_lock=1;
case(q)
d<=fill_water;
end
else begin
d<=check_door;
end
d<=fill_water;
fill_valve_on=1;
end
else if(filled==2'b01)begin
d<=add_det;
end
else begin
d<=cycle;
end
d<=add_det;
end
else begin
d<=cycle;
end
d<=cycle;
motor_on<=1;
end
else begin
d<=drain_water;
end
d<=drain_water;
drain_valve_on=1;
end
d<=spin;
drain_valve_on=1;
end
else begin
d<=fill_water;
end
d<=spin;
drain_valve_on=1;
end
else begin
d<=check_door;
done<=1;
door_lock<=0;
end
default : begin
done=0;
motor_on=0;
fill_valve_on=0;
drain_valve_on=0;
door_lock=1;
q=0;
d<=check_door;
end
endcase
end
if(~rst)
q<=0;
else
q<=d;
end
endmodule
module tb_wm;
reg rst,start,door_close,added,cycle_time_out,spin_time_out;
wire done,motor_on,fill_valve_on,drain_valve_on,door_lock;
reg[1:0] filled,drain;
wm
m1(done,motor_on,fill_valve_on,drain_valve_on,door_lock,rst,start,door_close,filled,drain,adde
d,cycle_time_out,spin_time_out);
initial begin
$monitor("$time=%d,done=%b,motor_on=%b,fill_valve_on=%b,drain_valve_on=%b,door_lock=
%b,rst=%b,start=%b,door_close=%b,filled=%b,drain=%b,added=%b,cycle_time_out=
%b,spin_time_out=%b",$time
,done,motor_on,fill_valve_on,drain_valve_on,door_lock,rst,start,door_close,filled,drain,added,c
ycle_time_out,spin_time_out);
end
initial begin
rst=0;
#11 rst=1;
end
initial begin
#30 start=1;door_close=1;
#20 filled=2'b00;
#20 filled=2'b01;
#20 added=1;
#20 cycle_time_out=0;
#20 cycle_time_out=1;
#20 drain=2'b00;
#20 drain=2'b01;
#20 spin_time_out=0;
#20 spin_time_out=1;
end
endmodule
OUTPUT
WAVE