Differential Amplifiers

EE105 - Spring 2007 ƒ General Considerations

Microelectronic Devices and ƒ MOS Differential Pair
Circuits ƒ Cascode Differential Amplifiers
ƒ Common-Mode Rejection
ƒ Differential Pair with Active Load
Lecture 8
Differential Amplifiers

Audio Amplifier Example Small-Signal Model for Bipolar Transistor

ƒ An audio amplifier is constructed above that takes on a ƒ Some examples in this chapter are explained in bipolar
rectified AC voltage as its supply and amplifies an audio transistor circuits
signal from a microphone. ƒ The small-signal model of a bipolar transistor is very
similar to that of the MOSFET, except bipolar transistor
has low input impedance at base
3 4
 “Humming” Noise in Audio Amplifier Example Supply Ripple Rejection

v X = Av vin + vr
vY = vr
v X − vY = Av vin

ƒ However, VCC contains a ripple from rectification that

ƒ Since both node X and Y contain the ripple, their
leaks to the output and is perceived as a “humming”
difference will be free of ripple.
noise by the user.
5 6

Ripple-Free Differential Output Common Inputs to Differential Amplifier

v X = Av vin + vr
vY = Av vin + vr
v X − vY = 0

ƒ Signals cannot be applied in phase to the inputs of a

ƒ Since the signal is taken as a difference between two differential amplifier, since the outputs will also be in
nodes, an amplifier that senses differential signals is phase, producing zero differential output.
needed.
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 Differential Inputs to Differential Amplifier Differential Signals

v X = Av vin + vr
vY = − Av vin + vr
v X − vY = 2 Av vin

ƒ A pair of differential signals can be generated, among

other ways, by a transformer.
ƒ When the inputs are applied differentially, the outputs ƒ Differential signals have the property that they share the
are 180° out of phase; enhancing each other when same average value to ground and are equal in
sensed differentially. magnitude but opposite in phase.
9 10

Single-ended vs. Differential Signals Differential Pair

ƒ With the addition of a tail current, the circuits above

operate as an elegant, yet robust differential pair.
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 MOS Differential Pair’s Common-Mode
Response Equilibrium Overdrive Voltage

I SS
I
VX = VY = VDD − RD SS
(VGS − VTH )equil = W
2 μnCox
L

ƒ The equilibrium overdrive voltage is defined as the

ƒ Similar to its bipolar counterpart, MOS differential pair
overdrive voltage seen by M1 and M2 when both of them
produces zero differential output as VCM changes.
carry a current of ISS/2.
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Minimum Common-mode Output Voltage Differential Response

I SS
VDD − RD > VCM − VTH
2

ƒ In order to maintain M1 and M2 in saturation, the

common-mode output voltage cannot fall below the
value above.
ƒ This value usually limits voltage gain. 15 16
 Virtual Ground Small-Signal Response
ΔVP = 0 Δ VP = 0
V X − VY
ΔI D1 = g m ΔV Av =
Δ V − ( −Δ V )
ΔI D 2 = − g m ΔV − 2 g m Δ VR D
=
2ΔV
= − g m RD
VP

ƒ For small changes at inputs, the gm’s are the same, and
the respective increase and decrease of ID1 and ID2 are
the same, node P must stay constant to accommodate
these changes. Therefore, node P can be viewed as AC
ground.
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ƒ Since the output changes by -2gmΔVRD and input by
2ΔV, the small signal gain is –gmRD, similar to that of
the CS stage. However, to obtain same gain as the CS
stage, power dissipation is doubled. 18

MOS Differential Pair’s Large-Signal Response Maximum Differential Input Voltage

V in 1 − V in 2 max
= 2 (V GS − V TH )equil
ƒ There exists a finite differential input voltage that
1
I D1 − I D2 = μnCox
2
W
L
(
Vin1 −Vin 2 ) 4I SS
W
− (Vin1 − Vin2 )
2
completely steers the tail current from one
μnCox transistor to the other. This value is known as the
L
maximum differential input voltage.
19 20
 The effects of Doubling the Tail Current The effects of Doubling W/L

ƒ Since W/L is doubled and the tail current remains

ƒ Since ISS is doubled and W/L is unchanged, the equilibrium
overdrive voltage for each transistor must increase by 2 to
accommodate this change, thus ΔVin,max increases by 2 as well.
Moreover, since ISS is doubled, the differential output swing will
double.
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unchanged, the equilibrium overdrive voltage will be
lowered by 2 to accommodate this change, thus ΔVin,max
will be lowered by 2 as well. Moreover, the differential
output swing will remain unchanged since neither ISS nor RD
has changed
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Small-Signal Analysis of MOS Differential Pair Virtual Ground and Half Circuit

4I SS
1 W
I D1 − I D2 ≈ μnCox (Vin1 −Vin2 )
W
= μnCox I SS (Vin1 − Vin2 ) ΔVP = 0
2 L W L
μnCox Av = − g m RC
L

ƒ When the input differential signal is small compared to ƒ Since VP is grounded, we can treat the differential pair
4 ISS/μnCox(W/L), the output differential current is as two CS “half circuits”, with the same small-signal
linearly proportional to it, and small-signal model can
gain
be applied.
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 MOS Differential Pair Half Circuit Example I MOS Differential Pair Half Circuit Example II

λ =0
λ≠0 g m1
⎛ 1 ⎞ Av = −
Av = − g m1 ⎜ || rO 3 || rO1 ⎟ g m3
⎝ gm3 ⎠
25 26

Extension of Virtual Ground MOS Differential Pair Half Circuit Example III

VX = 0

ƒ It can be shown that if R1 = R2, and points A and B go up λ =0

and down by the same amount respectively, VX does not RDD 2
move. Av = −
RSS 2 + 1 g m
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 MOS Cascode Differential Pair MOS Telescopic Cascode

Av ≈ − g m1rO 3 g m 3 rO1 Av ≈ − g m1 ⎡⎣( g m 3 rO 3 rO1 ) || ( g m 5 rO 5 rO 7 ) ⎤⎦

29 30

CM to DM Conversion, ACM-DM Differential to Single-ended Conversion

ΔVout ΔRD
=
ΔVCM 1/ g m + 2 RSS

ƒ If finite tail impedance and asymmetry are both present, ƒ Many circuits require a differential to single-ended
then the differential output signal will contain a portion conversion, however, the above topology is not very
of input common-mode signal. good.
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 Supply Noise Corruption MOS Differential Pair with Active Load

I SS
I SS + ΔI
+ ΔI 2
2 2ΔI
I SS
− ΔI
2

ƒ This circuit topology performs differential to single-ended

ƒ The most critical drawback of this topology is supply
noise corruption, since no common-mode cancellation
mechanism exists. Also, we lose half of the signal.
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conversion with no loss of gain.
ƒ The input differential pair decreases the current drawn from RL
by ΔI and the active load pushes an extra ΔI into RL by current
mirror action; these effects enhance each other. 34

Asymmetric Differential Pair

ƒ Because of the vastly different resistance magnitude at

the drains of M1 and M2, the voltage swings at these two
nodes are different and therefore node P cannot be
viewed as a virtual ground.
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